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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -mattr=+d,+v,+experimental-zvfbfa -target-abi lp64d -verify-machineinstrs < %s | FileCheck %s3; RUN: llc -mtriple=riscv32 -mattr=+d,+v,+experimental-zvfbfa -target-abi ilp32d -verify-machineinstrs < %s | FileCheck %s4 5define bfloat @intrinsic_vfmv.f.s_s_nxv1bf16(<vscale x 1 x bfloat> %0) nounwind {6; CHECK-LABEL: intrinsic_vfmv.f.s_s_nxv1bf16:7; CHECK: # %bb.0: # %entry8; CHECK-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma9; CHECK-NEXT: vfmv.f.s fa0, v810; CHECK-NEXT: ret11entry:12 %a = call bfloat @llvm.riscv.vfmv.f.s.nxv1bf16(<vscale x 1 x bfloat> %0)13 ret bfloat %a14}15 16define bfloat @intrinsic_vfmv.f.s_s_nxv2bf16(<vscale x 2 x bfloat> %0) nounwind {17; CHECK-LABEL: intrinsic_vfmv.f.s_s_nxv2bf16:18; CHECK: # %bb.0: # %entry19; CHECK-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma20; CHECK-NEXT: vfmv.f.s fa0, v821; CHECK-NEXT: ret22entry:23 %a = call bfloat @llvm.riscv.vfmv.f.s.nxv2bf16(<vscale x 2 x bfloat> %0)24 ret bfloat %a25}26 27define bfloat @intrinsic_vfmv.f.s_s_nxv4bf16(<vscale x 4 x bfloat> %0) nounwind {28; CHECK-LABEL: intrinsic_vfmv.f.s_s_nxv4bf16:29; CHECK: # %bb.0: # %entry30; CHECK-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma31; CHECK-NEXT: vfmv.f.s fa0, v832; CHECK-NEXT: ret33entry:34 %a = call bfloat @llvm.riscv.vfmv.f.s.nxv4bf16(<vscale x 4 x bfloat> %0)35 ret bfloat %a36}37 38define bfloat @intrinsic_vfmv.f.s_s_nxv8bf16(<vscale x 8 x bfloat> %0) nounwind {39; CHECK-LABEL: intrinsic_vfmv.f.s_s_nxv8bf16:40; CHECK: # %bb.0: # %entry41; CHECK-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma42; CHECK-NEXT: vfmv.f.s fa0, v843; CHECK-NEXT: ret44entry:45 %a = call bfloat @llvm.riscv.vfmv.f.s.nxv8bf16(<vscale x 8 x bfloat> %0)46 ret bfloat %a47}48 49define bfloat @intrinsic_vfmv.f.s_s_nxv16bf16(<vscale x 16 x bfloat> %0) nounwind {50; CHECK-LABEL: intrinsic_vfmv.f.s_s_nxv16bf16:51; CHECK: # %bb.0: # %entry52; CHECK-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma53; CHECK-NEXT: vfmv.f.s fa0, v854; CHECK-NEXT: ret55entry:56 %a = call bfloat @llvm.riscv.vfmv.f.s.nxv16bf16(<vscale x 16 x bfloat> %0)57 ret bfloat %a58}59 60define bfloat @intrinsic_vfmv.f.s_s_nxv32bf16(<vscale x 32 x bfloat> %0) nounwind {61; CHECK-LABEL: intrinsic_vfmv.f.s_s_nxv32bf16:62; CHECK: # %bb.0: # %entry63; CHECK-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma64; CHECK-NEXT: vfmv.f.s fa0, v865; CHECK-NEXT: ret66entry:67 %a = call bfloat @llvm.riscv.vfmv.f.s.nxv32bf16(<vscale x 32 x bfloat> %0)68 ret bfloat %a69}70 71