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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v,+experimental-zvfbfa \3; RUN: -verify-machineinstrs -target-abi=ilp32d | FileCheck %s4; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v,+experimental-zvfbfa \5; RUN: -verify-machineinstrs -target-abi=lp64d | FileCheck %s6 7define <vscale x 1 x bfloat> @intrinsic_vfmv.v.f_f_nxv1bf16(bfloat %0, iXLen %1) nounwind {8; CHECK-LABEL: intrinsic_vfmv.v.f_f_nxv1bf16:9; CHECK: # %bb.0: # %entry10; CHECK-NEXT: vsetvli zero, a0, e16alt, mf4, ta, ma11; CHECK-NEXT: vfmv.v.f v8, fa012; CHECK-NEXT: ret13entry:14 %a = call <vscale x 1 x bfloat> @llvm.riscv.vfmv.v.f.nxv1bf16(15 <vscale x 1 x bfloat> poison,16 bfloat %0,17 iXLen %1)18 19 ret <vscale x 1 x bfloat> %a20}21 22define <vscale x 2 x bfloat> @intrinsic_vfmv.v.f_f_nxv2bf16(bfloat %0, iXLen %1) nounwind {23; CHECK-LABEL: intrinsic_vfmv.v.f_f_nxv2bf16:24; CHECK: # %bb.0: # %entry25; CHECK-NEXT: vsetvli zero, a0, e16alt, mf2, ta, ma26; CHECK-NEXT: vfmv.v.f v8, fa027; CHECK-NEXT: ret28entry:29 %a = call <vscale x 2 x bfloat> @llvm.riscv.vfmv.v.f.nxv2bf16(30 <vscale x 2 x bfloat> poison,31 bfloat %0,32 iXLen %1)33 34 ret <vscale x 2 x bfloat> %a35}36 37define <vscale x 4 x bfloat> @intrinsic_vfmv.v.f_f_nxv4bf16(bfloat %0, iXLen %1) nounwind {38; CHECK-LABEL: intrinsic_vfmv.v.f_f_nxv4bf16:39; CHECK: # %bb.0: # %entry40; CHECK-NEXT: vsetvli zero, a0, e16alt, m1, ta, ma41; CHECK-NEXT: vfmv.v.f v8, fa042; CHECK-NEXT: ret43entry:44 %a = call <vscale x 4 x bfloat> @llvm.riscv.vfmv.v.f.nxv4bf16(45 <vscale x 4 x bfloat> poison,46 bfloat %0,47 iXLen %1)48 49 ret <vscale x 4 x bfloat> %a50}51 52define <vscale x 8 x bfloat> @intrinsic_vfmv.v.f_f_nxv8bf16(bfloat %0, iXLen %1) nounwind {53; CHECK-LABEL: intrinsic_vfmv.v.f_f_nxv8bf16:54; CHECK: # %bb.0: # %entry55; CHECK-NEXT: vsetvli zero, a0, e16alt, m2, ta, ma56; CHECK-NEXT: vfmv.v.f v8, fa057; CHECK-NEXT: ret58entry:59 %a = call <vscale x 8 x bfloat> @llvm.riscv.vfmv.v.f.nxv8bf16(60 <vscale x 8 x bfloat> poison,61 bfloat %0,62 iXLen %1)63 64 ret <vscale x 8 x bfloat> %a65}66 67define <vscale x 16 x bfloat> @intrinsic_vfmv.v.f_f_nxv16bf16(bfloat %0, iXLen %1) nounwind {68; CHECK-LABEL: intrinsic_vfmv.v.f_f_nxv16bf16:69; CHECK: # %bb.0: # %entry70; CHECK-NEXT: vsetvli zero, a0, e16alt, m4, ta, ma71; CHECK-NEXT: vfmv.v.f v8, fa072; CHECK-NEXT: ret73entry:74 %a = call <vscale x 16 x bfloat> @llvm.riscv.vfmv.v.f.nxv16bf16(75 <vscale x 16 x bfloat> poison,76 bfloat %0,77 iXLen %1)78 79 ret <vscale x 16 x bfloat> %a80}81 82define <vscale x 32 x bfloat> @intrinsic_vfmv.v.f_f_nxv32bf16(bfloat %0, iXLen %1) nounwind {83; CHECK-LABEL: intrinsic_vfmv.v.f_f_nxv32bf16:84; CHECK: # %bb.0: # %entry85; CHECK-NEXT: vsetvli zero, a0, e16alt, m8, ta, ma86; CHECK-NEXT: vfmv.v.f v8, fa087; CHECK-NEXT: ret88entry:89 %a = call <vscale x 32 x bfloat> @llvm.riscv.vfmv.v.f.nxv32bf16(90 <vscale x 32 x bfloat> poison,91 bfloat %0,92 iXLen %1)93 94 ret <vscale x 32 x bfloat> %a95}96 97define <vscale x 1 x bfloat> @intrinsic_vfmv.v.f_zero_nxv1bf16(iXLen %0) nounwind {98; CHECK-LABEL: intrinsic_vfmv.v.f_zero_nxv1bf16:99; CHECK: # %bb.0: # %entry100; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma101; CHECK-NEXT: vmv.v.i v8, 0102; CHECK-NEXT: ret103entry:104 %a = call <vscale x 1 x bfloat> @llvm.riscv.vfmv.v.f.nxv1bf16(105 <vscale x 1 x bfloat> poison,106 bfloat 0.0,107 iXLen %0)108 109 ret <vscale x 1 x bfloat> %a110}111 112define <vscale x 2 x bfloat> @intrinsic_vmv.v.i_zero_nxv2bf16(iXLen %0) nounwind {113; CHECK-LABEL: intrinsic_vmv.v.i_zero_nxv2bf16:114; CHECK: # %bb.0: # %entry115; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma116; CHECK-NEXT: vmv.v.i v8, 0117; CHECK-NEXT: ret118entry:119 %a = call <vscale x 2 x bfloat> @llvm.riscv.vfmv.v.f.nxv2bf16(120 <vscale x 2 x bfloat> poison,121 bfloat 0.0,122 iXLen %0)123 124 ret <vscale x 2 x bfloat> %a125}126 127define <vscale x 4 x bfloat> @intrinsic_vmv.v.i_zero_nxv4bf16(iXLen %0) nounwind {128; CHECK-LABEL: intrinsic_vmv.v.i_zero_nxv4bf16:129; CHECK: # %bb.0: # %entry130; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma131; CHECK-NEXT: vmv.v.i v8, 0132; CHECK-NEXT: ret133entry:134 %a = call <vscale x 4 x bfloat> @llvm.riscv.vfmv.v.f.nxv4bf16(135 <vscale x 4 x bfloat> poison,136 bfloat 0.0,137 iXLen %0)138 139 ret <vscale x 4 x bfloat> %a140}141 142define <vscale x 8 x bfloat> @intrinsic_vmv.v.i_zero_nxv8bf16(iXLen %0) nounwind {143; CHECK-LABEL: intrinsic_vmv.v.i_zero_nxv8bf16:144; CHECK: # %bb.0: # %entry145; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma146; CHECK-NEXT: vmv.v.i v8, 0147; CHECK-NEXT: ret148entry:149 %a = call <vscale x 8 x bfloat> @llvm.riscv.vfmv.v.f.nxv8bf16(150 <vscale x 8 x bfloat> poison,151 bfloat 0.0,152 iXLen %0)153 154 ret <vscale x 8 x bfloat> %a155}156 157define <vscale x 16 x bfloat> @intrinsic_vmv.v.i_zero_nxv16bf16(iXLen %0) nounwind {158; CHECK-LABEL: intrinsic_vmv.v.i_zero_nxv16bf16:159; CHECK: # %bb.0: # %entry160; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma161; CHECK-NEXT: vmv.v.i v8, 0162; CHECK-NEXT: ret163entry:164 %a = call <vscale x 16 x bfloat> @llvm.riscv.vfmv.v.f.nxv16bf16(165 <vscale x 16 x bfloat> poison,166 bfloat 0.0,167 iXLen %0)168 169 ret <vscale x 16 x bfloat> %a170}171 172define <vscale x 32 x bfloat> @intrinsic_vmv.v.i_zero_nxv32bf16(iXLen %0) nounwind {173; CHECK-LABEL: intrinsic_vmv.v.i_zero_nxv32bf16:174; CHECK: # %bb.0: # %entry175; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma176; CHECK-NEXT: vmv.v.i v8, 0177; CHECK-NEXT: ret178entry:179 %a = call <vscale x 32 x bfloat> @llvm.riscv.vfmv.v.f.nxv32bf16(180 <vscale x 32 x bfloat> poison,181 bfloat 0.0,182 iXLen %0)183 184 ret <vscale x 32 x bfloat> %a185}186 187