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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s3; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s4; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfhmin,+v,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s5; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfhmin,+v,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s6 7define <vscale x 2 x float> @vfpext_nxv2f16_nxv2f32(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 zeroext %vl) {8; CHECK-LABEL: vfpext_nxv2f16_nxv2f32:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma11; CHECK-NEXT: vfwcvt.f.f.v v9, v8, v0.t12; CHECK-NEXT: vmv1r.v v8, v913; CHECK-NEXT: ret14 %v = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %vl)15 ret <vscale x 2 x float> %v16}17 18define <vscale x 2 x float> @vfpext_nxv2f16_nxv2f32_unmasked(<vscale x 2 x half> %a, i32 zeroext %vl) {19; CHECK-LABEL: vfpext_nxv2f16_nxv2f32_unmasked:20; CHECK: # %bb.0:21; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma22; CHECK-NEXT: vfwcvt.f.f.v v9, v823; CHECK-NEXT: vmv1r.v v8, v924; CHECK-NEXT: ret25 %v = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 true), i32 %vl)26 ret <vscale x 2 x float> %v27}28 29define <vscale x 2 x double> @vfpext_nxv2f16_nxv2f64(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 zeroext %vl) {30; CHECK-LABEL: vfpext_nxv2f16_nxv2f64:31; CHECK: # %bb.0:32; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma33; CHECK-NEXT: vfwcvt.f.f.v v10, v8, v0.t34; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma35; CHECK-NEXT: vfwcvt.f.f.v v8, v10, v0.t36; CHECK-NEXT: ret37 %v = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %vl)38 ret <vscale x 2 x double> %v39}40 41define <vscale x 2 x double> @vfpext_nxv2f16_nxv2f64_unmasked(<vscale x 2 x half> %a, i32 zeroext %vl) {42; CHECK-LABEL: vfpext_nxv2f16_nxv2f64_unmasked:43; CHECK: # %bb.0:44; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma45; CHECK-NEXT: vfwcvt.f.f.v v10, v846; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma47; CHECK-NEXT: vfwcvt.f.f.v v8, v1048; CHECK-NEXT: ret49 %v = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 true), i32 %vl)50 ret <vscale x 2 x double> %v51}52 53define <vscale x 2 x double> @vfpext_nxv2f32_nxv2f64(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 zeroext %vl) {54; CHECK-LABEL: vfpext_nxv2f32_nxv2f64:55; CHECK: # %bb.0:56; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma57; CHECK-NEXT: vmv1r.v v10, v858; CHECK-NEXT: vfwcvt.f.f.v v8, v10, v0.t59; CHECK-NEXT: ret60 %v = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %vl)61 ret <vscale x 2 x double> %v62}63 64define <vscale x 2 x double> @vfpext_nxv2f32_nxv2f64_unmasked(<vscale x 2 x float> %a, i32 zeroext %vl) {65; CHECK-LABEL: vfpext_nxv2f32_nxv2f64_unmasked:66; CHECK: # %bb.0:67; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma68; CHECK-NEXT: vmv1r.v v10, v869; CHECK-NEXT: vfwcvt.f.f.v v8, v1070; CHECK-NEXT: ret71 %v = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> splat (i1 true), i32 %vl)72 ret <vscale x 2 x double> %v73}74 75define <vscale x 7 x double> @vfpext_nxv7f32_nxv7f64(<vscale x 7 x float> %a, <vscale x 7 x i1> %m, i32 zeroext %vl) {76; CHECK-LABEL: vfpext_nxv7f32_nxv7f64:77; CHECK: # %bb.0:78; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma79; CHECK-NEXT: vmv4r.v v16, v880; CHECK-NEXT: vfwcvt.f.f.v v8, v16, v0.t81; CHECK-NEXT: ret82 %v = call <vscale x 7 x double> @llvm.vp.fpext.nxv7f64.nxv7f32(<vscale x 7 x float> %a, <vscale x 7 x i1> %m, i32 %vl)83 ret <vscale x 7 x double> %v84}85 86define <vscale x 32 x float> @vfpext_nxv32f16_nxv32f32(<vscale x 32 x half> %a, <vscale x 32 x i1> %m, i32 zeroext %vl) {87; CHECK-LABEL: vfpext_nxv32f16_nxv32f32:88; CHECK: # %bb.0:89; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma90; CHECK-NEXT: vmv1r.v v24, v091; CHECK-NEXT: csrr a1, vlenb92; CHECK-NEXT: srli a2, a1, 293; CHECK-NEXT: slli a1, a1, 194; CHECK-NEXT: vslidedown.vx v0, v0, a295; CHECK-NEXT: sub a2, a0, a196; CHECK-NEXT: sltu a3, a0, a297; CHECK-NEXT: addi a3, a3, -198; CHECK-NEXT: and a2, a3, a299; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma100; CHECK-NEXT: vfwcvt.f.f.v v16, v12, v0.t101; CHECK-NEXT: bltu a0, a1, .LBB7_2102; CHECK-NEXT: # %bb.1:103; CHECK-NEXT: mv a0, a1104; CHECK-NEXT: .LBB7_2:105; CHECK-NEXT: vmv1r.v v0, v24106; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma107; CHECK-NEXT: vfwcvt.f.f.v v24, v8, v0.t108; CHECK-NEXT: vmv8r.v v8, v24109; CHECK-NEXT: ret110 %v = call <vscale x 32 x float> @llvm.vp.fpext.nxv32f32.nxv32f16(<vscale x 32 x half> %a, <vscale x 32 x i1> %m, i32 %vl)111 ret <vscale x 32 x float> %v112}113 114define <vscale x 2 x float> @vfpext_nxv2bf16_nxv2f32(<vscale x 2 x bfloat> %a, <vscale x 2 x i1> %m, i32 zeroext %vl) {115; CHECK-LABEL: vfpext_nxv2bf16_nxv2f32:116; CHECK: # %bb.0:117; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma118; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8, v0.t119; CHECK-NEXT: vmv1r.v v8, v9120; CHECK-NEXT: ret121 %v = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2bf16(<vscale x 2 x bfloat> %a, <vscale x 2 x i1> %m, i32 %vl)122 ret <vscale x 2 x float> %v123}124 125define <vscale x 2 x float> @vfpext_nxv2bf16_nxv2f32_unmasked(<vscale x 2 x bfloat> %a, i32 zeroext %vl) {126; CHECK-LABEL: vfpext_nxv2bf16_nxv2f32_unmasked:127; CHECK: # %bb.0:128; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma129; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8130; CHECK-NEXT: vmv1r.v v8, v9131; CHECK-NEXT: ret132 %v = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2bf16(<vscale x 2 x bfloat> %a, <vscale x 2 x i1> splat (i1 true), i32 %vl)133 ret <vscale x 2 x float> %v134}135 136define <vscale x 2 x double> @vfpext_nxv2bf16_nxv2f64(<vscale x 2 x bfloat> %a, <vscale x 2 x i1> %m, i32 zeroext %vl) {137; CHECK-LABEL: vfpext_nxv2bf16_nxv2f64:138; CHECK: # %bb.0:139; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma140; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8, v0.t141; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma142; CHECK-NEXT: vfwcvt.f.f.v v8, v10, v0.t143; CHECK-NEXT: ret144 %v = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2bf16(<vscale x 2 x bfloat> %a, <vscale x 2 x i1> %m, i32 %vl)145 ret <vscale x 2 x double> %v146}147 148define <vscale x 2 x double> @vfpext_nxv2bf16_nxv2f64_unmasked(<vscale x 2 x bfloat> %a, i32 zeroext %vl) {149; CHECK-LABEL: vfpext_nxv2bf16_nxv2f64_unmasked:150; CHECK: # %bb.0:151; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma152; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8153; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma154; CHECK-NEXT: vfwcvt.f.f.v v8, v10155; CHECK-NEXT: ret156 %v = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2bf16(<vscale x 2 x bfloat> %a, <vscale x 2 x i1> splat (i1 true), i32 %vl)157 ret <vscale x 2 x double> %v158}159 160