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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfh,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFH3; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfh,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFH4; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfhmin,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN5; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfhmin,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN6 7define <vscale x 2 x i1> @vfptosi_nxv2i1_nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vfptosi_nxv2i1_nxv2bf16:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma11; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v812; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma13; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v9, v0.t14; CHECK-NEXT: vmsne.vi v0, v8, 0, v0.t15; CHECK-NEXT: ret16 %v = call <vscale x 2 x i1> @llvm.vp.fptosi.nxv2i1.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 %evl)17 ret <vscale x 2 x i1> %v18}19 20define <vscale x 2 x i1> @vfptosi_nxv2i1_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, i32 zeroext %evl) {21; CHECK-LABEL: vfptosi_nxv2i1_nxv2bf16_unmasked:22; CHECK: # %bb.0:23; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma24; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v825; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma26; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v927; CHECK-NEXT: vmsne.vi v0, v8, 028; CHECK-NEXT: ret29 %v = call <vscale x 2 x i1> @llvm.vp.fptosi.nxv2i1.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)30 ret <vscale x 2 x i1> %v31}32 33define <vscale x 2 x i1> @vfptosi_nxv2i1_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {34; ZVFH-LABEL: vfptosi_nxv2i1_nxv2f16:35; ZVFH: # %bb.0:36; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma37; ZVFH-NEXT: vfcvt.rtz.x.f.v v8, v8, v0.t38; ZVFH-NEXT: vmsne.vi v0, v8, 0, v0.t39; ZVFH-NEXT: ret40;41; ZVFHMIN-LABEL: vfptosi_nxv2i1_nxv2f16:42; ZVFHMIN: # %bb.0:43; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma44; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v845; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma46; ZVFHMIN-NEXT: vfcvt.rtz.x.f.v v8, v9, v0.t47; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0, v0.t48; ZVFHMIN-NEXT: ret49 %v = call <vscale x 2 x i1> @llvm.vp.fptosi.nxv2i1.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)50 ret <vscale x 2 x i1> %v51}52 53define <vscale x 2 x i1> @vfptosi_nxv2i1_nxv2f16_unmasked(<vscale x 2 x half> %va, i32 zeroext %evl) {54; ZVFH-LABEL: vfptosi_nxv2i1_nxv2f16_unmasked:55; ZVFH: # %bb.0:56; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma57; ZVFH-NEXT: vfcvt.rtz.x.f.v v8, v858; ZVFH-NEXT: vmsne.vi v0, v8, 059; ZVFH-NEXT: ret60;61; ZVFHMIN-LABEL: vfptosi_nxv2i1_nxv2f16_unmasked:62; ZVFHMIN: # %bb.0:63; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma64; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v865; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma66; ZVFHMIN-NEXT: vfcvt.rtz.x.f.v v8, v967; ZVFHMIN-NEXT: vmsne.vi v0, v8, 068; ZVFHMIN-NEXT: ret69 %v = call <vscale x 2 x i1> @llvm.vp.fptosi.nxv2i1.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)70 ret <vscale x 2 x i1> %v71}72 73define <vscale x 2 x i1> @vfptosi_nxv2i1_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {74; CHECK-LABEL: vfptosi_nxv2i1_nxv2f32:75; CHECK: # %bb.0:76; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma77; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8, v0.t78; CHECK-NEXT: vmsne.vi v0, v8, 0, v0.t79; CHECK-NEXT: ret80 %v = call <vscale x 2 x i1> @llvm.vp.fptosi.nxv2i1.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)81 ret <vscale x 2 x i1> %v82}83 84define <vscale x 2 x i1> @vfptosi_nxv2i1_nxv2f32_unmasked(<vscale x 2 x float> %va, i32 zeroext %evl) {85; CHECK-LABEL: vfptosi_nxv2i1_nxv2f32_unmasked:86; CHECK: # %bb.0:87; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma88; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v889; CHECK-NEXT: vmsne.vi v0, v8, 090; CHECK-NEXT: ret91 %v = call <vscale x 2 x i1> @llvm.vp.fptosi.nxv2i1.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)92 ret <vscale x 2 x i1> %v93}94 95define <vscale x 2 x i1> @vfptosi_nxv2i1_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {96; CHECK-LABEL: vfptosi_nxv2i1_nxv2f64:97; CHECK: # %bb.0:98; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma99; CHECK-NEXT: vfcvt.rtz.x.f.v v10, v8, v0.t100; CHECK-NEXT: vmsne.vi v8, v10, 0, v0.t101; CHECK-NEXT: vmv1r.v v0, v8102; CHECK-NEXT: ret103 %v = call <vscale x 2 x i1> @llvm.vp.fptosi.nxv2i1.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)104 ret <vscale x 2 x i1> %v105}106 107define <vscale x 2 x i1> @vfptosi_nxv2i1_nxv2f64_unmasked(<vscale x 2 x double> %va, i32 zeroext %evl) {108; CHECK-LABEL: vfptosi_nxv2i1_nxv2f64_unmasked:109; CHECK: # %bb.0:110; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma111; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8112; CHECK-NEXT: vmsne.vi v0, v8, 0113; CHECK-NEXT: ret114 %v = call <vscale x 2 x i1> @llvm.vp.fptosi.nxv2i1.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)115 ret <vscale x 2 x i1> %v116}117