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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfh,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFH3; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfh,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFH4; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfhmin,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN5; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfhmin,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN6 7define <vscale x 2 x i7> @vfptosi_v4i7_v4bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vfptosi_v4i7_v4bf16:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma11; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v812; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v9, v0.t13; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma14; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t15; CHECK-NEXT: ret16 %v = call <vscale x 2 x i7> @llvm.vp.fptosi.v4i7.v4bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 %evl)17 ret <vscale x 2 x i7> %v18}19 20define <vscale x 2 x i8> @vfptosi_nxv2i8_nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {21; CHECK-LABEL: vfptosi_nxv2i8_nxv2bf16:22; CHECK: # %bb.0:23; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma24; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v825; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v9, v0.t26; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma27; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t28; CHECK-NEXT: ret29 %v = call <vscale x 2 x i8> @llvm.vp.fptosi.nxv2i8.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 %evl)30 ret <vscale x 2 x i8> %v31}32 33define <vscale x 2 x i8> @vfptosi_nxv2i8_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, i32 zeroext %evl) {34; CHECK-LABEL: vfptosi_nxv2i8_nxv2bf16_unmasked:35; CHECK: # %bb.0:36; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma37; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v838; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v939; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma40; CHECK-NEXT: vnsrl.wi v8, v8, 041; CHECK-NEXT: ret42 %v = call <vscale x 2 x i8> @llvm.vp.fptosi.nxv2i8.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)43 ret <vscale x 2 x i8> %v44}45 46define <vscale x 2 x i16> @vfptosi_nxv2i16_nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {47; CHECK-LABEL: vfptosi_nxv2i16_nxv2bf16:48; CHECK: # %bb.0:49; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma50; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v851; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v9, v0.t52; CHECK-NEXT: ret53 %v = call <vscale x 2 x i16> @llvm.vp.fptosi.nxv2i16.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 %evl)54 ret <vscale x 2 x i16> %v55}56 57define <vscale x 2 x i16> @vfptosi_nxv2i16_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, i32 zeroext %evl) {58; CHECK-LABEL: vfptosi_nxv2i16_nxv2bf16_unmasked:59; CHECK: # %bb.0:60; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma61; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v862; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v963; CHECK-NEXT: ret64 %v = call <vscale x 2 x i16> @llvm.vp.fptosi.nxv2i16.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)65 ret <vscale x 2 x i16> %v66}67 68define <vscale x 2 x i32> @vfptosi_nxv2i32_nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {69; CHECK-LABEL: vfptosi_nxv2i32_nxv2bf16:70; CHECK: # %bb.0:71; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma72; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v873; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma74; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v9, v0.t75; CHECK-NEXT: ret76 %v = call <vscale x 2 x i32> @llvm.vp.fptosi.nxv2i32.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 %evl)77 ret <vscale x 2 x i32> %v78}79 80define <vscale x 2 x i32> @vfptosi_nxv2i32_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, i32 zeroext %evl) {81; CHECK-LABEL: vfptosi_nxv2i32_nxv2bf16_unmasked:82; CHECK: # %bb.0:83; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma84; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v885; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma86; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v987; CHECK-NEXT: ret88 %v = call <vscale x 2 x i32> @llvm.vp.fptosi.nxv2i32.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)89 ret <vscale x 2 x i32> %v90}91 92define <vscale x 2 x i64> @vfptosi_nxv2i64_nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {93; CHECK-LABEL: vfptosi_nxv2i64_nxv2bf16:94; CHECK: # %bb.0:95; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma96; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v897; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma98; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v10, v0.t99; CHECK-NEXT: ret100 %v = call <vscale x 2 x i64> @llvm.vp.fptosi.nxv2i64.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 %evl)101 ret <vscale x 2 x i64> %v102}103 104define <vscale x 2 x i64> @vfptosi_nxv2i64_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, i32 zeroext %evl) {105; CHECK-LABEL: vfptosi_nxv2i64_nxv2bf16_unmasked:106; CHECK: # %bb.0:107; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma108; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8109; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma110; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v10111; CHECK-NEXT: ret112 %v = call <vscale x 2 x i64> @llvm.vp.fptosi.nxv2i64.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)113 ret <vscale x 2 x i64> %v114}115 116define <vscale x 2 x i7> @vfptosi_v4i7_v4f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {117; ZVFH-LABEL: vfptosi_v4i7_v4f16:118; ZVFH: # %bb.0:119; ZVFH-NEXT: vsetvli zero, a0, e8, mf4, ta, ma120; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8, v0.t121; ZVFH-NEXT: vmv1r.v v8, v9122; ZVFH-NEXT: ret123;124; ZVFHMIN-LABEL: vfptosi_v4i7_v4f16:125; ZVFHMIN: # %bb.0:126; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma127; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8128; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9, v0.t129; ZVFHMIN-NEXT: vsetvli zero, zero, e8, mf4, ta, ma130; ZVFHMIN-NEXT: vnsrl.wi v8, v8, 0, v0.t131; ZVFHMIN-NEXT: ret132 %v = call <vscale x 2 x i7> @llvm.vp.fptosi.v4i7.v4f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)133 ret <vscale x 2 x i7> %v134}135 136define <vscale x 2 x i8> @vfptosi_nxv2i8_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {137; ZVFH-LABEL: vfptosi_nxv2i8_nxv2f16:138; ZVFH: # %bb.0:139; ZVFH-NEXT: vsetvli zero, a0, e8, mf4, ta, ma140; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8, v0.t141; ZVFH-NEXT: vmv1r.v v8, v9142; ZVFH-NEXT: ret143;144; ZVFHMIN-LABEL: vfptosi_nxv2i8_nxv2f16:145; ZVFHMIN: # %bb.0:146; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma147; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8148; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9, v0.t149; ZVFHMIN-NEXT: vsetvli zero, zero, e8, mf4, ta, ma150; ZVFHMIN-NEXT: vnsrl.wi v8, v8, 0, v0.t151; ZVFHMIN-NEXT: ret152 %v = call <vscale x 2 x i8> @llvm.vp.fptosi.nxv2i8.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)153 ret <vscale x 2 x i8> %v154}155 156define <vscale x 2 x i8> @vfptosi_nxv2i8_nxv2f16_unmasked(<vscale x 2 x half> %va, i32 zeroext %evl) {157; ZVFH-LABEL: vfptosi_nxv2i8_nxv2f16_unmasked:158; ZVFH: # %bb.0:159; ZVFH-NEXT: vsetvli zero, a0, e8, mf4, ta, ma160; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8161; ZVFH-NEXT: vmv1r.v v8, v9162; ZVFH-NEXT: ret163;164; ZVFHMIN-LABEL: vfptosi_nxv2i8_nxv2f16_unmasked:165; ZVFHMIN: # %bb.0:166; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma167; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8168; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9169; ZVFHMIN-NEXT: vsetvli zero, zero, e8, mf4, ta, ma170; ZVFHMIN-NEXT: vnsrl.wi v8, v8, 0171; ZVFHMIN-NEXT: ret172 %v = call <vscale x 2 x i8> @llvm.vp.fptosi.nxv2i8.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)173 ret <vscale x 2 x i8> %v174}175 176define <vscale x 2 x i16> @vfptosi_nxv2i16_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {177; ZVFH-LABEL: vfptosi_nxv2i16_nxv2f16:178; ZVFH: # %bb.0:179; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma180; ZVFH-NEXT: vfcvt.rtz.x.f.v v8, v8, v0.t181; ZVFH-NEXT: ret182;183; ZVFHMIN-LABEL: vfptosi_nxv2i16_nxv2f16:184; ZVFHMIN: # %bb.0:185; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma186; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8187; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9, v0.t188; ZVFHMIN-NEXT: ret189 %v = call <vscale x 2 x i16> @llvm.vp.fptosi.nxv2i16.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)190 ret <vscale x 2 x i16> %v191}192 193define <vscale x 2 x i16> @vfptosi_nxv2i16_nxv2f16_unmasked(<vscale x 2 x half> %va, i32 zeroext %evl) {194; ZVFH-LABEL: vfptosi_nxv2i16_nxv2f16_unmasked:195; ZVFH: # %bb.0:196; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma197; ZVFH-NEXT: vfcvt.rtz.x.f.v v8, v8198; ZVFH-NEXT: ret199;200; ZVFHMIN-LABEL: vfptosi_nxv2i16_nxv2f16_unmasked:201; ZVFHMIN: # %bb.0:202; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma203; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8204; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9205; ZVFHMIN-NEXT: ret206 %v = call <vscale x 2 x i16> @llvm.vp.fptosi.nxv2i16.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)207 ret <vscale x 2 x i16> %v208}209 210define <vscale x 2 x i32> @vfptosi_nxv2i32_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {211; ZVFH-LABEL: vfptosi_nxv2i32_nxv2f16:212; ZVFH: # %bb.0:213; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma214; ZVFH-NEXT: vfwcvt.rtz.x.f.v v9, v8, v0.t215; ZVFH-NEXT: vmv1r.v v8, v9216; ZVFH-NEXT: ret217;218; ZVFHMIN-LABEL: vfptosi_nxv2i32_nxv2f16:219; ZVFHMIN: # %bb.0:220; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma221; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8222; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma223; ZVFHMIN-NEXT: vfcvt.rtz.x.f.v v8, v9, v0.t224; ZVFHMIN-NEXT: ret225 %v = call <vscale x 2 x i32> @llvm.vp.fptosi.nxv2i32.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)226 ret <vscale x 2 x i32> %v227}228 229define <vscale x 2 x i32> @vfptosi_nxv2i32_nxv2f16_unmasked(<vscale x 2 x half> %va, i32 zeroext %evl) {230; ZVFH-LABEL: vfptosi_nxv2i32_nxv2f16_unmasked:231; ZVFH: # %bb.0:232; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma233; ZVFH-NEXT: vfwcvt.rtz.x.f.v v9, v8234; ZVFH-NEXT: vmv1r.v v8, v9235; ZVFH-NEXT: ret236;237; ZVFHMIN-LABEL: vfptosi_nxv2i32_nxv2f16_unmasked:238; ZVFHMIN: # %bb.0:239; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma240; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8241; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma242; ZVFHMIN-NEXT: vfcvt.rtz.x.f.v v8, v9243; ZVFHMIN-NEXT: ret244 %v = call <vscale x 2 x i32> @llvm.vp.fptosi.nxv2i32.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)245 ret <vscale x 2 x i32> %v246}247 248define <vscale x 2 x i64> @vfptosi_nxv2i64_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {249; ZVFH-LABEL: vfptosi_nxv2i64_nxv2f16:250; ZVFH: # %bb.0:251; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma252; ZVFH-NEXT: vfwcvt.f.f.v v10, v8, v0.t253; ZVFH-NEXT: vsetvli zero, zero, e32, m1, ta, ma254; ZVFH-NEXT: vfwcvt.rtz.x.f.v v8, v10, v0.t255; ZVFH-NEXT: ret256;257; ZVFHMIN-LABEL: vfptosi_nxv2i64_nxv2f16:258; ZVFHMIN: # %bb.0:259; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma260; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8261; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma262; ZVFHMIN-NEXT: vfwcvt.rtz.x.f.v v8, v10, v0.t263; ZVFHMIN-NEXT: ret264 %v = call <vscale x 2 x i64> @llvm.vp.fptosi.nxv2i64.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)265 ret <vscale x 2 x i64> %v266}267 268define <vscale x 2 x i64> @vfptosi_nxv2i64_nxv2f16_unmasked(<vscale x 2 x half> %va, i32 zeroext %evl) {269; CHECK-LABEL: vfptosi_nxv2i64_nxv2f16_unmasked:270; CHECK: # %bb.0:271; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma272; CHECK-NEXT: vfwcvt.f.f.v v10, v8273; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma274; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v10275; CHECK-NEXT: ret276 %v = call <vscale x 2 x i64> @llvm.vp.fptosi.nxv2i64.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)277 ret <vscale x 2 x i64> %v278}279 280define <vscale x 2 x i8> @vfptosi_nxv2i8_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {281; CHECK-LABEL: vfptosi_nxv2i8_nxv2f32:282; CHECK: # %bb.0:283; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma284; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8, v0.t285; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma286; CHECK-NEXT: vnsrl.wi v8, v9, 0, v0.t287; CHECK-NEXT: ret288 %v = call <vscale x 2 x i8> @llvm.vp.fptosi.nxv2i8.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)289 ret <vscale x 2 x i8> %v290}291 292define <vscale x 2 x i8> @vfptosi_nxv2i8_nxv2f32_unmasked(<vscale x 2 x float> %va, i32 zeroext %evl) {293; CHECK-LABEL: vfptosi_nxv2i8_nxv2f32_unmasked:294; CHECK: # %bb.0:295; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma296; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8297; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma298; CHECK-NEXT: vnsrl.wi v8, v9, 0299; CHECK-NEXT: ret300 %v = call <vscale x 2 x i8> @llvm.vp.fptosi.nxv2i8.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)301 ret <vscale x 2 x i8> %v302}303 304define <vscale x 2 x i16> @vfptosi_nxv2i16_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {305; CHECK-LABEL: vfptosi_nxv2i16_nxv2f32:306; CHECK: # %bb.0:307; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma308; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8, v0.t309; CHECK-NEXT: vmv1r.v v8, v9310; CHECK-NEXT: ret311 %v = call <vscale x 2 x i16> @llvm.vp.fptosi.nxv2i16.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)312 ret <vscale x 2 x i16> %v313}314 315define <vscale x 2 x i16> @vfptosi_nxv2i16_nxv2f32_unmasked(<vscale x 2 x float> %va, i32 zeroext %evl) {316; CHECK-LABEL: vfptosi_nxv2i16_nxv2f32_unmasked:317; CHECK: # %bb.0:318; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma319; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8320; CHECK-NEXT: vmv1r.v v8, v9321; CHECK-NEXT: ret322 %v = call <vscale x 2 x i16> @llvm.vp.fptosi.nxv2i16.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)323 ret <vscale x 2 x i16> %v324}325 326define <vscale x 2 x i32> @vfptosi_nxv2i32_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {327; CHECK-LABEL: vfptosi_nxv2i32_nxv2f32:328; CHECK: # %bb.0:329; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma330; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8, v0.t331; CHECK-NEXT: ret332 %v = call <vscale x 2 x i32> @llvm.vp.fptosi.nxv2i32.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)333 ret <vscale x 2 x i32> %v334}335 336define <vscale x 2 x i32> @vfptosi_nxv2i32_nxv2f32_unmasked(<vscale x 2 x float> %va, i32 zeroext %evl) {337; CHECK-LABEL: vfptosi_nxv2i32_nxv2f32_unmasked:338; CHECK: # %bb.0:339; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma340; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8341; CHECK-NEXT: ret342 %v = call <vscale x 2 x i32> @llvm.vp.fptosi.nxv2i32.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)343 ret <vscale x 2 x i32> %v344}345 346define <vscale x 2 x i64> @vfptosi_nxv2i64_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {347; CHECK-LABEL: vfptosi_nxv2i64_nxv2f32:348; CHECK: # %bb.0:349; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma350; CHECK-NEXT: vmv1r.v v10, v8351; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v10, v0.t352; CHECK-NEXT: ret353 %v = call <vscale x 2 x i64> @llvm.vp.fptosi.nxv2i64.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)354 ret <vscale x 2 x i64> %v355}356 357define <vscale x 2 x i64> @vfptosi_nxv2i64_nxv2f32_unmasked(<vscale x 2 x float> %va, i32 zeroext %evl) {358; CHECK-LABEL: vfptosi_nxv2i64_nxv2f32_unmasked:359; CHECK: # %bb.0:360; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma361; CHECK-NEXT: vmv1r.v v10, v8362; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v10363; CHECK-NEXT: ret364 %v = call <vscale x 2 x i64> @llvm.vp.fptosi.nxv2i64.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)365 ret <vscale x 2 x i64> %v366}367 368define <vscale x 2 x i8> @vfptosi_nxv2i8_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {369; CHECK-LABEL: vfptosi_nxv2i8_nxv2f64:370; CHECK: # %bb.0:371; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma372; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8, v0.t373; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma374; CHECK-NEXT: vnsrl.wi v8, v10, 0, v0.t375; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma376; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t377; CHECK-NEXT: ret378 %v = call <vscale x 2 x i8> @llvm.vp.fptosi.nxv2i8.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)379 ret <vscale x 2 x i8> %v380}381 382define <vscale x 2 x i8> @vfptosi_nxv2i8_nxv2f64_unmasked(<vscale x 2 x double> %va, i32 zeroext %evl) {383; CHECK-LABEL: vfptosi_nxv2i8_nxv2f64_unmasked:384; CHECK: # %bb.0:385; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma386; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8387; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma388; CHECK-NEXT: vnsrl.wi v8, v10, 0389; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma390; CHECK-NEXT: vnsrl.wi v8, v8, 0391; CHECK-NEXT: ret392 %v = call <vscale x 2 x i8> @llvm.vp.fptosi.nxv2i8.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)393 ret <vscale x 2 x i8> %v394}395 396define <vscale x 2 x i16> @vfptosi_nxv2i16_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {397; CHECK-LABEL: vfptosi_nxv2i16_nxv2f64:398; CHECK: # %bb.0:399; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma400; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8, v0.t401; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma402; CHECK-NEXT: vnsrl.wi v8, v10, 0, v0.t403; CHECK-NEXT: ret404 %v = call <vscale x 2 x i16> @llvm.vp.fptosi.nxv2i16.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)405 ret <vscale x 2 x i16> %v406}407 408define <vscale x 2 x i16> @vfptosi_nxv2i16_nxv2f64_unmasked(<vscale x 2 x double> %va, i32 zeroext %evl) {409; CHECK-LABEL: vfptosi_nxv2i16_nxv2f64_unmasked:410; CHECK: # %bb.0:411; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma412; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8413; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma414; CHECK-NEXT: vnsrl.wi v8, v10, 0415; CHECK-NEXT: ret416 %v = call <vscale x 2 x i16> @llvm.vp.fptosi.nxv2i16.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)417 ret <vscale x 2 x i16> %v418}419 420define <vscale x 2 x i32> @vfptosi_nxv2i32_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {421; CHECK-LABEL: vfptosi_nxv2i32_nxv2f64:422; CHECK: # %bb.0:423; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma424; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8, v0.t425; CHECK-NEXT: vmv.v.v v8, v10426; CHECK-NEXT: ret427 %v = call <vscale x 2 x i32> @llvm.vp.fptosi.nxv2i32.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)428 ret <vscale x 2 x i32> %v429}430 431define <vscale x 2 x i32> @vfptosi_nxv2i32_nxv2f64_unmasked(<vscale x 2 x double> %va, i32 zeroext %evl) {432; CHECK-LABEL: vfptosi_nxv2i32_nxv2f64_unmasked:433; CHECK: # %bb.0:434; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma435; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8436; CHECK-NEXT: vmv.v.v v8, v10437; CHECK-NEXT: ret438 %v = call <vscale x 2 x i32> @llvm.vp.fptosi.nxv2i32.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)439 ret <vscale x 2 x i32> %v440}441 442define <vscale x 2 x i64> @vfptosi_nxv2i64_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {443; CHECK-LABEL: vfptosi_nxv2i64_nxv2f64:444; CHECK: # %bb.0:445; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma446; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8, v0.t447; CHECK-NEXT: ret448 %v = call <vscale x 2 x i64> @llvm.vp.fptosi.nxv2i64.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)449 ret <vscale x 2 x i64> %v450}451 452define <vscale x 2 x i64> @vfptosi_nxv2i64_nxv2f64_unmasked(<vscale x 2 x double> %va, i32 zeroext %evl) {453; CHECK-LABEL: vfptosi_nxv2i64_nxv2f64_unmasked:454; CHECK: # %bb.0:455; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma456; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8457; CHECK-NEXT: ret458 %v = call <vscale x 2 x i64> @llvm.vp.fptosi.nxv2i64.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)459 ret <vscale x 2 x i64> %v460}461 462define <vscale x 32 x i16> @vfptosi_nxv32i16_nxv32f32(<vscale x 32 x float> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {463; CHECK-LABEL: vfptosi_nxv32i16_nxv32f32:464; CHECK: # %bb.0:465; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma466; CHECK-NEXT: vmv1r.v v24, v0467; CHECK-NEXT: csrr a1, vlenb468; CHECK-NEXT: srli a2, a1, 2469; CHECK-NEXT: slli a1, a1, 1470; CHECK-NEXT: vslidedown.vx v0, v0, a2471; CHECK-NEXT: sub a2, a0, a1472; CHECK-NEXT: sltu a3, a0, a2473; CHECK-NEXT: addi a3, a3, -1474; CHECK-NEXT: and a2, a3, a2475; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma476; CHECK-NEXT: vfncvt.rtz.x.f.w v28, v16, v0.t477; CHECK-NEXT: bltu a0, a1, .LBB34_2478; CHECK-NEXT: # %bb.1:479; CHECK-NEXT: mv a0, a1480; CHECK-NEXT: .LBB34_2:481; CHECK-NEXT: vmv1r.v v0, v24482; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma483; CHECK-NEXT: vfncvt.rtz.x.f.w v24, v8, v0.t484; CHECK-NEXT: vmv8r.v v8, v24485; CHECK-NEXT: ret486 %v = call <vscale x 32 x i16> @llvm.vp.fptosi.nxv32i16.nxv32f32(<vscale x 32 x float> %va, <vscale x 32 x i1> %m, i32 %evl)487 ret <vscale x 32 x i16> %v488}489 490define <vscale x 32 x i32> @vfptosi_nxv32i32_nxv32f32(<vscale x 32 x float> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {491; CHECK-LABEL: vfptosi_nxv32i32_nxv32f32:492; CHECK: # %bb.0:493; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma494; CHECK-NEXT: vmv1r.v v24, v0495; CHECK-NEXT: csrr a1, vlenb496; CHECK-NEXT: srli a2, a1, 2497; CHECK-NEXT: slli a1, a1, 1498; CHECK-NEXT: vslidedown.vx v0, v0, a2499; CHECK-NEXT: sub a2, a0, a1500; CHECK-NEXT: sltu a3, a0, a2501; CHECK-NEXT: addi a3, a3, -1502; CHECK-NEXT: and a2, a3, a2503; CHECK-NEXT: vsetvli zero, a2, e32, m8, ta, ma504; CHECK-NEXT: vfcvt.rtz.x.f.v v16, v16, v0.t505; CHECK-NEXT: bltu a0, a1, .LBB35_2506; CHECK-NEXT: # %bb.1:507; CHECK-NEXT: mv a0, a1508; CHECK-NEXT: .LBB35_2:509; CHECK-NEXT: vmv1r.v v0, v24510; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma511; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8, v0.t512; CHECK-NEXT: ret513 %v = call <vscale x 32 x i32> @llvm.vp.fptosi.nxv32i32.nxv32f32(<vscale x 32 x float> %va, <vscale x 32 x i1> %m, i32 %evl)514 ret <vscale x 32 x i32> %v515}516 517define <vscale x 32 x i32> @vfptosi_nxv32i32_nxv32f32_unmasked(<vscale x 32 x float> %va, i32 zeroext %evl) {518; CHECK-LABEL: vfptosi_nxv32i32_nxv32f32_unmasked:519; CHECK: # %bb.0:520; CHECK-NEXT: csrr a1, vlenb521; CHECK-NEXT: slli a1, a1, 1522; CHECK-NEXT: sub a2, a0, a1523; CHECK-NEXT: sltu a3, a0, a2524; CHECK-NEXT: addi a3, a3, -1525; CHECK-NEXT: and a2, a3, a2526; CHECK-NEXT: vsetvli zero, a2, e32, m8, ta, ma527; CHECK-NEXT: vfcvt.rtz.x.f.v v16, v16528; CHECK-NEXT: bltu a0, a1, .LBB36_2529; CHECK-NEXT: # %bb.1:530; CHECK-NEXT: mv a0, a1531; CHECK-NEXT: .LBB36_2:532; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma533; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8534; CHECK-NEXT: ret535 %v = call <vscale x 32 x i32> @llvm.vp.fptosi.nxv32i32.nxv32f32(<vscale x 32 x float> %va, <vscale x 32 x i1> splat (i1 true), i32 %evl)536 ret <vscale x 32 x i32> %v537}538