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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \3; RUN: -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \4; RUN: --check-prefixes=CHECK,ZVFH5; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \6; RUN: -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \7; RUN: --check-prefixes=CHECK,ZVFH8; RUN: llc -mtriple=riscv32 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \9; RUN: -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \10; RUN: --check-prefixes=CHECK,ZVFHMIN11; RUN: llc -mtriple=riscv64 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \12; RUN: -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \13; RUN: --check-prefixes=CHECK,ZVFHMIN14 15define <vscale x 1 x bfloat> @vfsub_vv_nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %vb) {16; CHECK-LABEL: vfsub_vv_nxv1bf16:17; CHECK: # %bb.0:18; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma19; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v920; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v821; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma22; CHECK-NEXT: vfsub.vv v9, v9, v1023; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma24; CHECK-NEXT: vfncvtbf16.f.f.w v8, v925; CHECK-NEXT: ret26 %vc = fsub <vscale x 1 x bfloat> %va, %vb27 ret <vscale x 1 x bfloat> %vc28}29 30define <vscale x 1 x bfloat> @vfsub_vf_nxv1bf16(<vscale x 1 x bfloat> %va, bfloat %b) {31; CHECK-LABEL: vfsub_vf_nxv1bf16:32; CHECK: # %bb.0:33; CHECK-NEXT: fcvt.s.bf16 fa5, fa034; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma35; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v836; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma37; CHECK-NEXT: vfsub.vf v9, v9, fa538; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma39; CHECK-NEXT: vfncvtbf16.f.f.w v8, v940; CHECK-NEXT: ret41 %head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 042 %splat = shufflevector <vscale x 1 x bfloat> %head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer43 %vc = fsub <vscale x 1 x bfloat> %va, %splat44 ret <vscale x 1 x bfloat> %vc45}46 47define <vscale x 2 x bfloat> @vfsub_vv_nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %vb) {48; CHECK-LABEL: vfsub_vv_nxv2bf16:49; CHECK: # %bb.0:50; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma51; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v952; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v853; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma54; CHECK-NEXT: vfsub.vv v9, v9, v1055; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma56; CHECK-NEXT: vfncvtbf16.f.f.w v8, v957; CHECK-NEXT: ret58 %vc = fsub <vscale x 2 x bfloat> %va, %vb59 ret <vscale x 2 x bfloat> %vc60}61 62define <vscale x 2 x bfloat> @vfsub_vf_nxv2bf16(<vscale x 2 x bfloat> %va, bfloat %b) {63; CHECK-LABEL: vfsub_vf_nxv2bf16:64; CHECK: # %bb.0:65; CHECK-NEXT: fcvt.s.bf16 fa5, fa066; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma67; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v868; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma69; CHECK-NEXT: vfsub.vf v9, v9, fa570; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma71; CHECK-NEXT: vfncvtbf16.f.f.w v8, v972; CHECK-NEXT: ret73 %head = insertelement <vscale x 2 x bfloat> poison, bfloat %b, i32 074 %splat = shufflevector <vscale x 2 x bfloat> %head, <vscale x 2 x bfloat> poison, <vscale x 2 x i32> zeroinitializer75 %vc = fsub <vscale x 2 x bfloat> %va, %splat76 ret <vscale x 2 x bfloat> %vc77}78 79define <vscale x 4 x bfloat> @vfsub_vv_nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %vb) {80; CHECK-LABEL: vfsub_vv_nxv4bf16:81; CHECK: # %bb.0:82; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma83; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v984; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v885; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma86; CHECK-NEXT: vfsub.vv v10, v12, v1087; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma88; CHECK-NEXT: vfncvtbf16.f.f.w v8, v1089; CHECK-NEXT: ret90 %vc = fsub <vscale x 4 x bfloat> %va, %vb91 ret <vscale x 4 x bfloat> %vc92}93 94define <vscale x 4 x bfloat> @vfsub_vf_nxv4bf16(<vscale x 4 x bfloat> %va, bfloat %b) {95; CHECK-LABEL: vfsub_vf_nxv4bf16:96; CHECK: # %bb.0:97; CHECK-NEXT: fcvt.s.bf16 fa5, fa098; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma99; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8100; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma101; CHECK-NEXT: vfsub.vf v10, v10, fa5102; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma103; CHECK-NEXT: vfncvtbf16.f.f.w v8, v10104; CHECK-NEXT: ret105 %head = insertelement <vscale x 4 x bfloat> poison, bfloat %b, i32 0106 %splat = shufflevector <vscale x 4 x bfloat> %head, <vscale x 4 x bfloat> poison, <vscale x 4 x i32> zeroinitializer107 %vc = fsub <vscale x 4 x bfloat> %va, %splat108 ret <vscale x 4 x bfloat> %vc109}110 111define <vscale x 8 x bfloat> @vfsub_vv_nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %vb) {112; CHECK-LABEL: vfsub_vv_nxv8bf16:113; CHECK: # %bb.0:114; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma115; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v10116; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8117; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma118; CHECK-NEXT: vfsub.vv v12, v16, v12119; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma120; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12121; CHECK-NEXT: ret122 %vc = fsub <vscale x 8 x bfloat> %va, %vb123 ret <vscale x 8 x bfloat> %vc124}125 126define <vscale x 8 x bfloat> @vfsub_vf_nxv8bf16(<vscale x 8 x bfloat> %va, bfloat %b) {127; CHECK-LABEL: vfsub_vf_nxv8bf16:128; CHECK: # %bb.0:129; CHECK-NEXT: fcvt.s.bf16 fa5, fa0130; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma131; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8132; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma133; CHECK-NEXT: vfsub.vf v12, v12, fa5134; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma135; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12136; CHECK-NEXT: ret137 %head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0138 %splat = shufflevector <vscale x 8 x bfloat> %head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer139 %vc = fsub <vscale x 8 x bfloat> %va, %splat140 ret <vscale x 8 x bfloat> %vc141}142 143define <vscale x 8 x bfloat> @vfsub_fv_nxv8bf16(<vscale x 8 x bfloat> %va, bfloat %b) {144; CHECK-LABEL: vfsub_fv_nxv8bf16:145; CHECK: # %bb.0:146; CHECK-NEXT: fcvt.s.bf16 fa5, fa0147; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma148; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8149; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma150; CHECK-NEXT: vfrsub.vf v12, v12, fa5151; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma152; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12153; CHECK-NEXT: ret154 %head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0155 %splat = shufflevector <vscale x 8 x bfloat> %head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer156 %vc = fsub <vscale x 8 x bfloat> %splat, %va157 ret <vscale x 8 x bfloat> %vc158}159 160define <vscale x 16 x bfloat> @vfsub_vv_nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %vb) {161; CHECK-LABEL: vfsub_vv_nxv16bf16:162; CHECK: # %bb.0:163; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma164; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12165; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v8166; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma167; CHECK-NEXT: vfsub.vv v16, v24, v16168; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma169; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16170; CHECK-NEXT: ret171 %vc = fsub <vscale x 16 x bfloat> %va, %vb172 ret <vscale x 16 x bfloat> %vc173}174 175define <vscale x 16 x bfloat> @vfsub_vf_nxv16bf16(<vscale x 16 x bfloat> %va, bfloat %b) {176; CHECK-LABEL: vfsub_vf_nxv16bf16:177; CHECK: # %bb.0:178; CHECK-NEXT: fcvt.s.bf16 fa5, fa0179; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma180; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8181; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma182; CHECK-NEXT: vfsub.vf v16, v16, fa5183; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma184; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16185; CHECK-NEXT: ret186 %head = insertelement <vscale x 16 x bfloat> poison, bfloat %b, i32 0187 %splat = shufflevector <vscale x 16 x bfloat> %head, <vscale x 16 x bfloat> poison, <vscale x 16 x i32> zeroinitializer188 %vc = fsub <vscale x 16 x bfloat> %va, %splat189 ret <vscale x 16 x bfloat> %vc190}191 192define <vscale x 32 x bfloat> @vfsub_vv_nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %vb) {193; CHECK-LABEL: vfsub_vv_nxv32bf16:194; CHECK: # %bb.0:195; CHECK-NEXT: addi sp, sp, -16196; CHECK-NEXT: .cfi_def_cfa_offset 16197; CHECK-NEXT: csrr a0, vlenb198; CHECK-NEXT: slli a0, a0, 3199; CHECK-NEXT: sub sp, sp, a0200; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb201; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma202; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v16203; CHECK-NEXT: addi a0, sp, 16204; CHECK-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill205; CHECK-NEXT: vfwcvtbf16.f.f.v v0, v8206; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v20207; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12208; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload209; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma210; CHECK-NEXT: vfsub.vv v0, v0, v8211; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma212; CHECK-NEXT: vfncvtbf16.f.f.w v8, v0213; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma214; CHECK-NEXT: vfsub.vv v16, v16, v24215; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma216; CHECK-NEXT: vfncvtbf16.f.f.w v12, v16217; CHECK-NEXT: csrr a0, vlenb218; CHECK-NEXT: slli a0, a0, 3219; CHECK-NEXT: add sp, sp, a0220; CHECK-NEXT: .cfi_def_cfa sp, 16221; CHECK-NEXT: addi sp, sp, 16222; CHECK-NEXT: .cfi_def_cfa_offset 0223; CHECK-NEXT: ret224 %vc = fsub <vscale x 32 x bfloat> %va, %vb225 ret <vscale x 32 x bfloat> %vc226}227 228define <vscale x 32 x bfloat> @vfsub_vf_nxv32bf16(<vscale x 32 x bfloat> %va, bfloat %b) {229; CHECK-LABEL: vfsub_vf_nxv32bf16:230; CHECK: # %bb.0:231; CHECK-NEXT: addi sp, sp, -16232; CHECK-NEXT: .cfi_def_cfa_offset 16233; CHECK-NEXT: csrr a0, vlenb234; CHECK-NEXT: slli a0, a0, 3235; CHECK-NEXT: sub sp, sp, a0236; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb237; CHECK-NEXT: fmv.x.h a0, fa0238; CHECK-NEXT: vsetvli a1, zero, e16, m4, ta, ma239; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8240; CHECK-NEXT: addi a1, sp, 16241; CHECK-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill242; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v12243; CHECK-NEXT: vsetvli a1, zero, e16, m8, ta, ma244; CHECK-NEXT: vmv.v.x v8, a0245; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma246; CHECK-NEXT: vfwcvtbf16.f.f.v v0, v8247; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12248; CHECK-NEXT: addi a0, sp, 16249; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload250; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma251; CHECK-NEXT: vfsub.vv v0, v8, v0252; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma253; CHECK-NEXT: vfncvtbf16.f.f.w v8, v0254; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma255; CHECK-NEXT: vfsub.vv v16, v24, v16256; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma257; CHECK-NEXT: vfncvtbf16.f.f.w v12, v16258; CHECK-NEXT: csrr a0, vlenb259; CHECK-NEXT: slli a0, a0, 3260; CHECK-NEXT: add sp, sp, a0261; CHECK-NEXT: .cfi_def_cfa sp, 16262; CHECK-NEXT: addi sp, sp, 16263; CHECK-NEXT: .cfi_def_cfa_offset 0264; CHECK-NEXT: ret265 %head = insertelement <vscale x 32 x bfloat> poison, bfloat %b, i32 0266 %splat = shufflevector <vscale x 32 x bfloat> %head, <vscale x 32 x bfloat> poison, <vscale x 32 x i32> zeroinitializer267 %vc = fsub <vscale x 32 x bfloat> %va, %splat268 ret <vscale x 32 x bfloat> %vc269}270 271define <vscale x 1 x half> @vfsub_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb) {272; ZVFH-LABEL: vfsub_vv_nxv1f16:273; ZVFH: # %bb.0:274; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma275; ZVFH-NEXT: vfsub.vv v8, v8, v9276; ZVFH-NEXT: ret277;278; ZVFHMIN-LABEL: vfsub_vv_nxv1f16:279; ZVFHMIN: # %bb.0:280; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma281; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9282; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8283; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma284; ZVFHMIN-NEXT: vfsub.vv v9, v9, v10285; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma286; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9287; ZVFHMIN-NEXT: ret288 %vc = fsub <vscale x 1 x half> %va, %vb289 ret <vscale x 1 x half> %vc290}291 292define <vscale x 1 x half> @vfsub_vf_nxv1f16(<vscale x 1 x half> %va, half %b) {293; ZVFH-LABEL: vfsub_vf_nxv1f16:294; ZVFH: # %bb.0:295; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma296; ZVFH-NEXT: vfsub.vf v8, v8, fa0297; ZVFH-NEXT: ret298;299; ZVFHMIN-LABEL: vfsub_vf_nxv1f16:300; ZVFHMIN: # %bb.0:301; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0302; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma303; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8304; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma305; ZVFHMIN-NEXT: vfsub.vf v9, v9, fa5306; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma307; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9308; ZVFHMIN-NEXT: ret309 %head = insertelement <vscale x 1 x half> poison, half %b, i32 0310 %splat = shufflevector <vscale x 1 x half> %head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer311 %vc = fsub <vscale x 1 x half> %va, %splat312 ret <vscale x 1 x half> %vc313}314 315define <vscale x 2 x half> @vfsub_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb) {316; ZVFH-LABEL: vfsub_vv_nxv2f16:317; ZVFH: # %bb.0:318; ZVFH-NEXT: vsetvli a0, zero, e16, mf2, ta, ma319; ZVFH-NEXT: vfsub.vv v8, v8, v9320; ZVFH-NEXT: ret321;322; ZVFHMIN-LABEL: vfsub_vv_nxv2f16:323; ZVFHMIN: # %bb.0:324; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma325; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9326; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8327; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma328; ZVFHMIN-NEXT: vfsub.vv v9, v9, v10329; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma330; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9331; ZVFHMIN-NEXT: ret332 %vc = fsub <vscale x 2 x half> %va, %vb333 ret <vscale x 2 x half> %vc334}335 336define <vscale x 2 x half> @vfsub_vf_nxv2f16(<vscale x 2 x half> %va, half %b) {337; ZVFH-LABEL: vfsub_vf_nxv2f16:338; ZVFH: # %bb.0:339; ZVFH-NEXT: vsetvli a0, zero, e16, mf2, ta, ma340; ZVFH-NEXT: vfsub.vf v8, v8, fa0341; ZVFH-NEXT: ret342;343; ZVFHMIN-LABEL: vfsub_vf_nxv2f16:344; ZVFHMIN: # %bb.0:345; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0346; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma347; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8348; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma349; ZVFHMIN-NEXT: vfsub.vf v9, v9, fa5350; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma351; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9352; ZVFHMIN-NEXT: ret353 %head = insertelement <vscale x 2 x half> poison, half %b, i32 0354 %splat = shufflevector <vscale x 2 x half> %head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer355 %vc = fsub <vscale x 2 x half> %va, %splat356 ret <vscale x 2 x half> %vc357}358 359define <vscale x 4 x half> @vfsub_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb) {360; ZVFH-LABEL: vfsub_vv_nxv4f16:361; ZVFH: # %bb.0:362; ZVFH-NEXT: vsetvli a0, zero, e16, m1, ta, ma363; ZVFH-NEXT: vfsub.vv v8, v8, v9364; ZVFH-NEXT: ret365;366; ZVFHMIN-LABEL: vfsub_vv_nxv4f16:367; ZVFHMIN: # %bb.0:368; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m1, ta, ma369; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9370; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8371; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma372; ZVFHMIN-NEXT: vfsub.vv v10, v12, v10373; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma374; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10375; ZVFHMIN-NEXT: ret376 %vc = fsub <vscale x 4 x half> %va, %vb377 ret <vscale x 4 x half> %vc378}379 380define <vscale x 4 x half> @vfsub_vf_nxv4f16(<vscale x 4 x half> %va, half %b) {381; ZVFH-LABEL: vfsub_vf_nxv4f16:382; ZVFH: # %bb.0:383; ZVFH-NEXT: vsetvli a0, zero, e16, m1, ta, ma384; ZVFH-NEXT: vfsub.vf v8, v8, fa0385; ZVFH-NEXT: ret386;387; ZVFHMIN-LABEL: vfsub_vf_nxv4f16:388; ZVFHMIN: # %bb.0:389; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0390; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m1, ta, ma391; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8392; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma393; ZVFHMIN-NEXT: vfsub.vf v10, v10, fa5394; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma395; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10396; ZVFHMIN-NEXT: ret397 %head = insertelement <vscale x 4 x half> poison, half %b, i32 0398 %splat = shufflevector <vscale x 4 x half> %head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer399 %vc = fsub <vscale x 4 x half> %va, %splat400 ret <vscale x 4 x half> %vc401}402 403define <vscale x 8 x half> @vfsub_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb) {404; ZVFH-LABEL: vfsub_vv_nxv8f16:405; ZVFH: # %bb.0:406; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma407; ZVFH-NEXT: vfsub.vv v8, v8, v10408; ZVFH-NEXT: ret409;410; ZVFHMIN-LABEL: vfsub_vv_nxv8f16:411; ZVFHMIN: # %bb.0:412; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma413; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10414; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8415; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma416; ZVFHMIN-NEXT: vfsub.vv v12, v16, v12417; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma418; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12419; ZVFHMIN-NEXT: ret420 %vc = fsub <vscale x 8 x half> %va, %vb421 ret <vscale x 8 x half> %vc422}423 424define <vscale x 8 x half> @vfsub_vf_nxv8f16(<vscale x 8 x half> %va, half %b) {425; ZVFH-LABEL: vfsub_vf_nxv8f16:426; ZVFH: # %bb.0:427; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma428; ZVFH-NEXT: vfsub.vf v8, v8, fa0429; ZVFH-NEXT: ret430;431; ZVFHMIN-LABEL: vfsub_vf_nxv8f16:432; ZVFHMIN: # %bb.0:433; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0434; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma435; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8436; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma437; ZVFHMIN-NEXT: vfsub.vf v12, v12, fa5438; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma439; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12440; ZVFHMIN-NEXT: ret441 %head = insertelement <vscale x 8 x half> poison, half %b, i32 0442 %splat = shufflevector <vscale x 8 x half> %head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer443 %vc = fsub <vscale x 8 x half> %va, %splat444 ret <vscale x 8 x half> %vc445}446 447define <vscale x 8 x half> @vfsub_fv_nxv8f16(<vscale x 8 x half> %va, half %b) {448; ZVFH-LABEL: vfsub_fv_nxv8f16:449; ZVFH: # %bb.0:450; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma451; ZVFH-NEXT: vfrsub.vf v8, v8, fa0452; ZVFH-NEXT: ret453;454; ZVFHMIN-LABEL: vfsub_fv_nxv8f16:455; ZVFHMIN: # %bb.0:456; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0457; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma458; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8459; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma460; ZVFHMIN-NEXT: vfrsub.vf v12, v12, fa5461; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma462; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12463; ZVFHMIN-NEXT: ret464 %head = insertelement <vscale x 8 x half> poison, half %b, i32 0465 %splat = shufflevector <vscale x 8 x half> %head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer466 %vc = fsub <vscale x 8 x half> %splat, %va467 ret <vscale x 8 x half> %vc468}469 470define <vscale x 16 x half> @vfsub_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb) {471; ZVFH-LABEL: vfsub_vv_nxv16f16:472; ZVFH: # %bb.0:473; ZVFH-NEXT: vsetvli a0, zero, e16, m4, ta, ma474; ZVFH-NEXT: vfsub.vv v8, v8, v12475; ZVFH-NEXT: ret476;477; ZVFHMIN-LABEL: vfsub_vv_nxv16f16:478; ZVFHMIN: # %bb.0:479; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma480; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12481; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8482; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma483; ZVFHMIN-NEXT: vfsub.vv v16, v24, v16484; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma485; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16486; ZVFHMIN-NEXT: ret487 %vc = fsub <vscale x 16 x half> %va, %vb488 ret <vscale x 16 x half> %vc489}490 491define <vscale x 16 x half> @vfsub_vf_nxv16f16(<vscale x 16 x half> %va, half %b) {492; ZVFH-LABEL: vfsub_vf_nxv16f16:493; ZVFH: # %bb.0:494; ZVFH-NEXT: vsetvli a0, zero, e16, m4, ta, ma495; ZVFH-NEXT: vfsub.vf v8, v8, fa0496; ZVFH-NEXT: ret497;498; ZVFHMIN-LABEL: vfsub_vf_nxv16f16:499; ZVFHMIN: # %bb.0:500; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0501; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma502; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8503; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma504; ZVFHMIN-NEXT: vfsub.vf v16, v16, fa5505; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma506; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16507; ZVFHMIN-NEXT: ret508 %head = insertelement <vscale x 16 x half> poison, half %b, i32 0509 %splat = shufflevector <vscale x 16 x half> %head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer510 %vc = fsub <vscale x 16 x half> %va, %splat511 ret <vscale x 16 x half> %vc512}513 514define <vscale x 32 x half> @vfsub_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb) {515; ZVFH-LABEL: vfsub_vv_nxv32f16:516; ZVFH: # %bb.0:517; ZVFH-NEXT: vsetvli a0, zero, e16, m8, ta, ma518; ZVFH-NEXT: vfsub.vv v8, v8, v16519; ZVFH-NEXT: ret520;521; ZVFHMIN-LABEL: vfsub_vv_nxv32f16:522; ZVFHMIN: # %bb.0:523; ZVFHMIN-NEXT: addi sp, sp, -16524; ZVFHMIN-NEXT: .cfi_def_cfa_offset 16525; ZVFHMIN-NEXT: csrr a0, vlenb526; ZVFHMIN-NEXT: slli a0, a0, 3527; ZVFHMIN-NEXT: sub sp, sp, a0528; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb529; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma530; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16531; ZVFHMIN-NEXT: addi a0, sp, 16532; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill533; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v8534; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20535; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12536; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload537; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma538; ZVFHMIN-NEXT: vfsub.vv v0, v0, v8539; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma540; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v0541; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma542; ZVFHMIN-NEXT: vfsub.vv v16, v16, v24543; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma544; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16545; ZVFHMIN-NEXT: csrr a0, vlenb546; ZVFHMIN-NEXT: slli a0, a0, 3547; ZVFHMIN-NEXT: add sp, sp, a0548; ZVFHMIN-NEXT: .cfi_def_cfa sp, 16549; ZVFHMIN-NEXT: addi sp, sp, 16550; ZVFHMIN-NEXT: .cfi_def_cfa_offset 0551; ZVFHMIN-NEXT: ret552 %vc = fsub <vscale x 32 x half> %va, %vb553 ret <vscale x 32 x half> %vc554}555 556define <vscale x 32 x half> @vfsub_vf_nxv32f16(<vscale x 32 x half> %va, half %b) {557; ZVFH-LABEL: vfsub_vf_nxv32f16:558; ZVFH: # %bb.0:559; ZVFH-NEXT: vsetvli a0, zero, e16, m8, ta, ma560; ZVFH-NEXT: vfsub.vf v8, v8, fa0561; ZVFH-NEXT: ret562;563; ZVFHMIN-LABEL: vfsub_vf_nxv32f16:564; ZVFHMIN: # %bb.0:565; ZVFHMIN-NEXT: addi sp, sp, -16566; ZVFHMIN-NEXT: .cfi_def_cfa_offset 16567; ZVFHMIN-NEXT: csrr a0, vlenb568; ZVFHMIN-NEXT: slli a0, a0, 3569; ZVFHMIN-NEXT: sub sp, sp, a0570; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb571; ZVFHMIN-NEXT: fmv.x.h a0, fa0572; ZVFHMIN-NEXT: vsetvli a1, zero, e16, m4, ta, ma573; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8574; ZVFHMIN-NEXT: addi a1, sp, 16575; ZVFHMIN-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill576; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12577; ZVFHMIN-NEXT: vsetvli a1, zero, e16, m8, ta, ma578; ZVFHMIN-NEXT: vmv.v.x v8, a0579; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma580; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v8581; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12582; ZVFHMIN-NEXT: addi a0, sp, 16583; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload584; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma585; ZVFHMIN-NEXT: vfsub.vv v0, v8, v0586; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma587; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v0588; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma589; ZVFHMIN-NEXT: vfsub.vv v16, v24, v16590; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma591; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16592; ZVFHMIN-NEXT: csrr a0, vlenb593; ZVFHMIN-NEXT: slli a0, a0, 3594; ZVFHMIN-NEXT: add sp, sp, a0595; ZVFHMIN-NEXT: .cfi_def_cfa sp, 16596; ZVFHMIN-NEXT: addi sp, sp, 16597; ZVFHMIN-NEXT: .cfi_def_cfa_offset 0598; ZVFHMIN-NEXT: ret599 %head = insertelement <vscale x 32 x half> poison, half %b, i32 0600 %splat = shufflevector <vscale x 32 x half> %head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer601 %vc = fsub <vscale x 32 x half> %va, %splat602 ret <vscale x 32 x half> %vc603}604 605define <vscale x 1 x float> @vfsub_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb) {606; CHECK-LABEL: vfsub_vv_nxv1f32:607; CHECK: # %bb.0:608; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma609; CHECK-NEXT: vfsub.vv v8, v8, v9610; CHECK-NEXT: ret611 %vc = fsub <vscale x 1 x float> %va, %vb612 ret <vscale x 1 x float> %vc613}614 615define <vscale x 1 x float> @vfsub_vf_nxv1f32(<vscale x 1 x float> %va, float %b) {616; CHECK-LABEL: vfsub_vf_nxv1f32:617; CHECK: # %bb.0:618; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma619; CHECK-NEXT: vfsub.vf v8, v8, fa0620; CHECK-NEXT: ret621 %head = insertelement <vscale x 1 x float> poison, float %b, i32 0622 %splat = shufflevector <vscale x 1 x float> %head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer623 %vc = fsub <vscale x 1 x float> %va, %splat624 ret <vscale x 1 x float> %vc625}626 627define <vscale x 2 x float> @vfsub_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb) {628; CHECK-LABEL: vfsub_vv_nxv2f32:629; CHECK: # %bb.0:630; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma631; CHECK-NEXT: vfsub.vv v8, v8, v9632; CHECK-NEXT: ret633 %vc = fsub <vscale x 2 x float> %va, %vb634 ret <vscale x 2 x float> %vc635}636 637define <vscale x 2 x float> @vfsub_vf_nxv2f32(<vscale x 2 x float> %va, float %b) {638; CHECK-LABEL: vfsub_vf_nxv2f32:639; CHECK: # %bb.0:640; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma641; CHECK-NEXT: vfsub.vf v8, v8, fa0642; CHECK-NEXT: ret643 %head = insertelement <vscale x 2 x float> poison, float %b, i32 0644 %splat = shufflevector <vscale x 2 x float> %head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer645 %vc = fsub <vscale x 2 x float> %va, %splat646 ret <vscale x 2 x float> %vc647}648 649define <vscale x 4 x float> @vfsub_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb) {650; CHECK-LABEL: vfsub_vv_nxv4f32:651; CHECK: # %bb.0:652; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma653; CHECK-NEXT: vfsub.vv v8, v8, v10654; CHECK-NEXT: ret655 %vc = fsub <vscale x 4 x float> %va, %vb656 ret <vscale x 4 x float> %vc657}658 659define <vscale x 4 x float> @vfsub_vf_nxv4f32(<vscale x 4 x float> %va, float %b) {660; CHECK-LABEL: vfsub_vf_nxv4f32:661; CHECK: # %bb.0:662; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma663; CHECK-NEXT: vfsub.vf v8, v8, fa0664; CHECK-NEXT: ret665 %head = insertelement <vscale x 4 x float> poison, float %b, i32 0666 %splat = shufflevector <vscale x 4 x float> %head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer667 %vc = fsub <vscale x 4 x float> %va, %splat668 ret <vscale x 4 x float> %vc669}670 671define <vscale x 8 x float> @vfsub_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb) {672; CHECK-LABEL: vfsub_vv_nxv8f32:673; CHECK: # %bb.0:674; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma675; CHECK-NEXT: vfsub.vv v8, v8, v12676; CHECK-NEXT: ret677 %vc = fsub <vscale x 8 x float> %va, %vb678 ret <vscale x 8 x float> %vc679}680 681define <vscale x 8 x float> @vfsub_vf_nxv8f32(<vscale x 8 x float> %va, float %b) {682; CHECK-LABEL: vfsub_vf_nxv8f32:683; CHECK: # %bb.0:684; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma685; CHECK-NEXT: vfsub.vf v8, v8, fa0686; CHECK-NEXT: ret687 %head = insertelement <vscale x 8 x float> poison, float %b, i32 0688 %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer689 %vc = fsub <vscale x 8 x float> %va, %splat690 ret <vscale x 8 x float> %vc691}692 693define <vscale x 8 x float> @vfsub_fv_nxv8f32(<vscale x 8 x float> %va, float %b) {694; CHECK-LABEL: vfsub_fv_nxv8f32:695; CHECK: # %bb.0:696; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma697; CHECK-NEXT: vfrsub.vf v8, v8, fa0698; CHECK-NEXT: ret699 %head = insertelement <vscale x 8 x float> poison, float %b, i32 0700 %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer701 %vc = fsub <vscale x 8 x float> %splat, %va702 ret <vscale x 8 x float> %vc703}704 705define <vscale x 16 x float> @vfsub_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb) {706; CHECK-LABEL: vfsub_vv_nxv16f32:707; CHECK: # %bb.0:708; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma709; CHECK-NEXT: vfsub.vv v8, v8, v16710; CHECK-NEXT: ret711 %vc = fsub <vscale x 16 x float> %va, %vb712 ret <vscale x 16 x float> %vc713}714 715define <vscale x 16 x float> @vfsub_vf_nxv16f32(<vscale x 16 x float> %va, float %b) {716; CHECK-LABEL: vfsub_vf_nxv16f32:717; CHECK: # %bb.0:718; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma719; CHECK-NEXT: vfsub.vf v8, v8, fa0720; CHECK-NEXT: ret721 %head = insertelement <vscale x 16 x float> poison, float %b, i32 0722 %splat = shufflevector <vscale x 16 x float> %head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer723 %vc = fsub <vscale x 16 x float> %va, %splat724 ret <vscale x 16 x float> %vc725}726 727define <vscale x 1 x double> @vfsub_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb) {728; CHECK-LABEL: vfsub_vv_nxv1f64:729; CHECK: # %bb.0:730; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma731; CHECK-NEXT: vfsub.vv v8, v8, v9732; CHECK-NEXT: ret733 %vc = fsub <vscale x 1 x double> %va, %vb734 ret <vscale x 1 x double> %vc735}736 737define <vscale x 1 x double> @vfsub_vf_nxv1f64(<vscale x 1 x double> %va, double %b) {738; CHECK-LABEL: vfsub_vf_nxv1f64:739; CHECK: # %bb.0:740; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma741; CHECK-NEXT: vfsub.vf v8, v8, fa0742; CHECK-NEXT: ret743 %head = insertelement <vscale x 1 x double> poison, double %b, i32 0744 %splat = shufflevector <vscale x 1 x double> %head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer745 %vc = fsub <vscale x 1 x double> %va, %splat746 ret <vscale x 1 x double> %vc747}748 749define <vscale x 2 x double> @vfsub_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb) {750; CHECK-LABEL: vfsub_vv_nxv2f64:751; CHECK: # %bb.0:752; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma753; CHECK-NEXT: vfsub.vv v8, v8, v10754; CHECK-NEXT: ret755 %vc = fsub <vscale x 2 x double> %va, %vb756 ret <vscale x 2 x double> %vc757}758 759define <vscale x 2 x double> @vfsub_vf_nxv2f64(<vscale x 2 x double> %va, double %b) {760; CHECK-LABEL: vfsub_vf_nxv2f64:761; CHECK: # %bb.0:762; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma763; CHECK-NEXT: vfsub.vf v8, v8, fa0764; CHECK-NEXT: ret765 %head = insertelement <vscale x 2 x double> poison, double %b, i32 0766 %splat = shufflevector <vscale x 2 x double> %head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer767 %vc = fsub <vscale x 2 x double> %va, %splat768 ret <vscale x 2 x double> %vc769}770 771define <vscale x 4 x double> @vfsub_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb) {772; CHECK-LABEL: vfsub_vv_nxv4f64:773; CHECK: # %bb.0:774; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma775; CHECK-NEXT: vfsub.vv v8, v8, v12776; CHECK-NEXT: ret777 %vc = fsub <vscale x 4 x double> %va, %vb778 ret <vscale x 4 x double> %vc779}780 781define <vscale x 4 x double> @vfsub_vf_nxv4f64(<vscale x 4 x double> %va, double %b) {782; CHECK-LABEL: vfsub_vf_nxv4f64:783; CHECK: # %bb.0:784; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma785; CHECK-NEXT: vfsub.vf v8, v8, fa0786; CHECK-NEXT: ret787 %head = insertelement <vscale x 4 x double> poison, double %b, i32 0788 %splat = shufflevector <vscale x 4 x double> %head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer789 %vc = fsub <vscale x 4 x double> %va, %splat790 ret <vscale x 4 x double> %vc791}792 793define <vscale x 8 x double> @vfsub_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb) {794; CHECK-LABEL: vfsub_vv_nxv8f64:795; CHECK: # %bb.0:796; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma797; CHECK-NEXT: vfsub.vv v8, v8, v16798; CHECK-NEXT: ret799 %vc = fsub <vscale x 8 x double> %va, %vb800 ret <vscale x 8 x double> %vc801}802 803define <vscale x 8 x double> @vfsub_vf_nxv8f64(<vscale x 8 x double> %va, double %b) {804; CHECK-LABEL: vfsub_vf_nxv8f64:805; CHECK: # %bb.0:806; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma807; CHECK-NEXT: vfsub.vf v8, v8, fa0808; CHECK-NEXT: ret809 %head = insertelement <vscale x 8 x double> poison, double %b, i32 0810 %splat = shufflevector <vscale x 8 x double> %head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer811 %vc = fsub <vscale x 8 x double> %va, %splat812 ret <vscale x 8 x double> %vc813}814 815define <vscale x 8 x double> @vfsub_fv_nxv8f64(<vscale x 8 x double> %va, double %b) {816; CHECK-LABEL: vfsub_fv_nxv8f64:817; CHECK: # %bb.0:818; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma819; CHECK-NEXT: vfrsub.vf v8, v8, fa0820; CHECK-NEXT: ret821 %head = insertelement <vscale x 8 x double> poison, double %b, i32 0822 %splat = shufflevector <vscale x 8 x double> %head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer823 %vc = fsub <vscale x 8 x double> %splat, %va824 ret <vscale x 8 x double> %vc825}826 827define <vscale x 8 x float> @vfsub_vv_mask_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x i1> %mask) {828; CHECK-LABEL: vfsub_vv_mask_nxv8f32:829; CHECK: # %bb.0:830; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, mu831; CHECK-NEXT: vfsub.vv v8, v8, v12, v0.t832; CHECK-NEXT: ret833 %vs = select <vscale x 8 x i1> %mask, <vscale x 8 x float> %vb, <vscale x 8 x float> splat (float 0.0)834 %vc = fsub fast <vscale x 8 x float> %va, %vs835 ret <vscale x 8 x float> %vc836}837 838define <vscale x 8 x float> @vfsub_vf_mask_nxv8f32(<vscale x 8 x float> %va, float %b, <vscale x 8 x i1> %mask) {839; CHECK-LABEL: vfsub_vf_mask_nxv8f32:840; CHECK: # %bb.0:841; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, mu842; CHECK-NEXT: vfsub.vf v8, v8, fa0, v0.t843; CHECK-NEXT: ret844 %head1 = insertelement <vscale x 8 x float> poison, float %b, i32 0845 %splat1 = shufflevector <vscale x 8 x float> %head1, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer846 %vs = select <vscale x 8 x i1> %mask, <vscale x 8 x float> %splat1, <vscale x 8 x float> splat (float 0.0)847 %vc = fsub fast <vscale x 8 x float> %va, %vs848 ret <vscale x 8 x float> %vc849}850