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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \3; RUN: -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \4; RUN: --check-prefixes=CHECK,ZVFH5; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \6; RUN: -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \7; RUN: --check-prefixes=CHECK,ZVFH8; RUN: llc -mtriple=riscv32 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \9; RUN: -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \10; RUN: --check-prefixes=CHECK,ZVFHMIN11; RUN: llc -mtriple=riscv64 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \12; RUN: -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \13; RUN: --check-prefixes=CHECK,ZVFHMIN14 15define <vscale x 1 x bfloat> @vfsub_vv_nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {16; CHECK-LABEL: vfsub_vv_nxv1bf16:17; CHECK: # %bb.0:18; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma19; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9, v0.t20; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8, v0.t21; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma22; CHECK-NEXT: vfsub.vv v9, v9, v10, v0.t23; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma24; CHECK-NEXT: vfncvtbf16.f.f.w v8, v9, v0.t25; CHECK-NEXT: ret26 %v = call <vscale x 1 x bfloat> @llvm.vp.fsub.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, <vscale x 1 x i1> %m, i32 %evl)27 ret <vscale x 1 x bfloat> %v28}29 30define <vscale x 1 x bfloat> @vfsub_vv_nxv1bf16_unmasked(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, i32 zeroext %evl) {31; CHECK-LABEL: vfsub_vv_nxv1bf16_unmasked:32; CHECK: # %bb.0:33; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma34; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v935; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v836; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma37; CHECK-NEXT: vfsub.vv v9, v9, v1038; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma39; CHECK-NEXT: vfncvtbf16.f.f.w v8, v940; CHECK-NEXT: ret41 %v = call <vscale x 1 x bfloat> @llvm.vp.fsub.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)42 ret <vscale x 1 x bfloat> %v43}44 45define <vscale x 1 x bfloat> @vfsub_vf_nxv1bf16(<vscale x 1 x bfloat> %va, bfloat %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {46; CHECK-LABEL: vfsub_vf_nxv1bf16:47; CHECK: # %bb.0:48; CHECK-NEXT: fmv.x.h a1, fa049; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma50; CHECK-NEXT: vmv.v.x v9, a151; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8, v0.t52; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v9, v0.t53; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma54; CHECK-NEXT: vfsub.vv v9, v10, v8, v0.t55; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma56; CHECK-NEXT: vfncvtbf16.f.f.w v8, v9, v0.t57; CHECK-NEXT: ret58 %elt.head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 059 %vb = shufflevector <vscale x 1 x bfloat> %elt.head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer60 %v = call <vscale x 1 x bfloat> @llvm.vp.fsub.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %vb, <vscale x 1 x i1> %m, i32 %evl)61 ret <vscale x 1 x bfloat> %v62}63 64define <vscale x 1 x bfloat> @vfsub_vf_nxv1bf16_unmasked(<vscale x 1 x bfloat> %va, bfloat %b, i32 zeroext %evl) {65; CHECK-LABEL: vfsub_vf_nxv1bf16_unmasked:66; CHECK: # %bb.0:67; CHECK-NEXT: fmv.x.h a1, fa068; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma69; CHECK-NEXT: vmv.v.x v9, a170; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v871; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v972; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma73; CHECK-NEXT: vfsub.vv v9, v10, v874; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma75; CHECK-NEXT: vfncvtbf16.f.f.w v8, v976; CHECK-NEXT: ret77 %elt.head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 078 %vb = shufflevector <vscale x 1 x bfloat> %elt.head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer79 %v = call <vscale x 1 x bfloat> @llvm.vp.fsub.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)80 ret <vscale x 1 x bfloat> %v81}82 83define <vscale x 2 x bfloat> @vfsub_vv_nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {84; CHECK-LABEL: vfsub_vv_nxv2bf16:85; CHECK: # %bb.0:86; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma87; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9, v0.t88; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8, v0.t89; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma90; CHECK-NEXT: vfsub.vv v9, v9, v10, v0.t91; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma92; CHECK-NEXT: vfncvtbf16.f.f.w v8, v9, v0.t93; CHECK-NEXT: ret94 %v = call <vscale x 2 x bfloat> @llvm.vp.fsub.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, <vscale x 2 x i1> %m, i32 %evl)95 ret <vscale x 2 x bfloat> %v96}97 98define <vscale x 2 x bfloat> @vfsub_vv_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, i32 zeroext %evl) {99; CHECK-LABEL: vfsub_vv_nxv2bf16_unmasked:100; CHECK: # %bb.0:101; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma102; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9103; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8104; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma105; CHECK-NEXT: vfsub.vv v9, v9, v10106; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma107; CHECK-NEXT: vfncvtbf16.f.f.w v8, v9108; CHECK-NEXT: ret109 %v = call <vscale x 2 x bfloat> @llvm.vp.fsub.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)110 ret <vscale x 2 x bfloat> %v111}112 113define <vscale x 2 x bfloat> @vfsub_vf_nxv2bf16(<vscale x 2 x bfloat> %va, bfloat %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {114; CHECK-LABEL: vfsub_vf_nxv2bf16:115; CHECK: # %bb.0:116; CHECK-NEXT: fmv.x.h a1, fa0117; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma118; CHECK-NEXT: vmv.v.x v9, a1119; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8, v0.t120; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v9, v0.t121; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma122; CHECK-NEXT: vfsub.vv v9, v10, v8, v0.t123; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma124; CHECK-NEXT: vfncvtbf16.f.f.w v8, v9, v0.t125; CHECK-NEXT: ret126 %elt.head = insertelement <vscale x 2 x bfloat> poison, bfloat %b, i32 0127 %vb = shufflevector <vscale x 2 x bfloat> %elt.head, <vscale x 2 x bfloat> poison, <vscale x 2 x i32> zeroinitializer128 %v = call <vscale x 2 x bfloat> @llvm.vp.fsub.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %vb, <vscale x 2 x i1> %m, i32 %evl)129 ret <vscale x 2 x bfloat> %v130}131 132define <vscale x 2 x bfloat> @vfsub_vf_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, bfloat %b, i32 zeroext %evl) {133; CHECK-LABEL: vfsub_vf_nxv2bf16_unmasked:134; CHECK: # %bb.0:135; CHECK-NEXT: fmv.x.h a1, fa0136; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma137; CHECK-NEXT: vmv.v.x v9, a1138; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8139; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v9140; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma141; CHECK-NEXT: vfsub.vv v9, v10, v8142; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma143; CHECK-NEXT: vfncvtbf16.f.f.w v8, v9144; CHECK-NEXT: ret145 %elt.head = insertelement <vscale x 2 x bfloat> poison, bfloat %b, i32 0146 %vb = shufflevector <vscale x 2 x bfloat> %elt.head, <vscale x 2 x bfloat> poison, <vscale x 2 x i32> zeroinitializer147 %v = call <vscale x 2 x bfloat> @llvm.vp.fsub.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)148 ret <vscale x 2 x bfloat> %v149}150 151define <vscale x 4 x bfloat> @vfsub_vv_nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {152; CHECK-LABEL: vfsub_vv_nxv4bf16:153; CHECK: # %bb.0:154; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma155; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9, v0.t156; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8, v0.t157; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma158; CHECK-NEXT: vfsub.vv v10, v12, v10, v0.t159; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma160; CHECK-NEXT: vfncvtbf16.f.f.w v8, v10, v0.t161; CHECK-NEXT: ret162 %v = call <vscale x 4 x bfloat> @llvm.vp.fsub.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, <vscale x 4 x i1> %m, i32 %evl)163 ret <vscale x 4 x bfloat> %v164}165 166define <vscale x 4 x bfloat> @vfsub_vv_nxv4bf16_unmasked(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, i32 zeroext %evl) {167; CHECK-LABEL: vfsub_vv_nxv4bf16_unmasked:168; CHECK: # %bb.0:169; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma170; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9171; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8172; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma173; CHECK-NEXT: vfsub.vv v10, v12, v10174; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma175; CHECK-NEXT: vfncvtbf16.f.f.w v8, v10176; CHECK-NEXT: ret177 %v = call <vscale x 4 x bfloat> @llvm.vp.fsub.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)178 ret <vscale x 4 x bfloat> %v179}180 181define <vscale x 4 x bfloat> @vfsub_vf_nxv4bf16(<vscale x 4 x bfloat> %va, bfloat %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {182; CHECK-LABEL: vfsub_vf_nxv4bf16:183; CHECK: # %bb.0:184; CHECK-NEXT: fmv.x.h a1, fa0185; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma186; CHECK-NEXT: vmv.v.x v12, a1187; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8, v0.t188; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v12, v0.t189; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma190; CHECK-NEXT: vfsub.vv v10, v10, v8, v0.t191; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma192; CHECK-NEXT: vfncvtbf16.f.f.w v8, v10, v0.t193; CHECK-NEXT: ret194 %elt.head = insertelement <vscale x 4 x bfloat> poison, bfloat %b, i32 0195 %vb = shufflevector <vscale x 4 x bfloat> %elt.head, <vscale x 4 x bfloat> poison, <vscale x 4 x i32> zeroinitializer196 %v = call <vscale x 4 x bfloat> @llvm.vp.fsub.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %vb, <vscale x 4 x i1> %m, i32 %evl)197 ret <vscale x 4 x bfloat> %v198}199 200define <vscale x 4 x bfloat> @vfsub_vf_nxv4bf16_unmasked(<vscale x 4 x bfloat> %va, bfloat %b, i32 zeroext %evl) {201; CHECK-LABEL: vfsub_vf_nxv4bf16_unmasked:202; CHECK: # %bb.0:203; CHECK-NEXT: fmv.x.h a1, fa0204; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma205; CHECK-NEXT: vmv.v.x v12, a1206; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8207; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v12208; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma209; CHECK-NEXT: vfsub.vv v10, v10, v8210; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma211; CHECK-NEXT: vfncvtbf16.f.f.w v8, v10212; CHECK-NEXT: ret213 %elt.head = insertelement <vscale x 4 x bfloat> poison, bfloat %b, i32 0214 %vb = shufflevector <vscale x 4 x bfloat> %elt.head, <vscale x 4 x bfloat> poison, <vscale x 4 x i32> zeroinitializer215 %v = call <vscale x 4 x bfloat> @llvm.vp.fsub.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)216 ret <vscale x 4 x bfloat> %v217}218 219define <vscale x 8 x bfloat> @vfsub_vv_nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {220; CHECK-LABEL: vfsub_vv_nxv8bf16:221; CHECK: # %bb.0:222; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma223; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v10, v0.t224; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8, v0.t225; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma226; CHECK-NEXT: vfsub.vv v12, v16, v12, v0.t227; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma228; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12, v0.t229; CHECK-NEXT: ret230 %v = call <vscale x 8 x bfloat> @llvm.vp.fsub.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, <vscale x 8 x i1> %m, i32 %evl)231 ret <vscale x 8 x bfloat> %v232}233 234define <vscale x 8 x bfloat> @vfsub_vv_nxv8bf16_unmasked(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, i32 zeroext %evl) {235; CHECK-LABEL: vfsub_vv_nxv8bf16_unmasked:236; CHECK: # %bb.0:237; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma238; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v10239; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8240; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma241; CHECK-NEXT: vfsub.vv v12, v16, v12242; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma243; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12244; CHECK-NEXT: ret245 %v = call <vscale x 8 x bfloat> @llvm.vp.fsub.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)246 ret <vscale x 8 x bfloat> %v247}248 249define <vscale x 8 x bfloat> @vfsub_vf_nxv8bf16(<vscale x 8 x bfloat> %va, bfloat %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {250; CHECK-LABEL: vfsub_vf_nxv8bf16:251; CHECK: # %bb.0:252; CHECK-NEXT: fmv.x.h a1, fa0253; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma254; CHECK-NEXT: vmv.v.x v16, a1255; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8, v0.t256; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v16, v0.t257; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma258; CHECK-NEXT: vfsub.vv v12, v12, v8, v0.t259; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma260; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12, v0.t261; CHECK-NEXT: ret262 %elt.head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0263 %vb = shufflevector <vscale x 8 x bfloat> %elt.head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer264 %v = call <vscale x 8 x bfloat> @llvm.vp.fsub.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %vb, <vscale x 8 x i1> %m, i32 %evl)265 ret <vscale x 8 x bfloat> %v266}267 268define <vscale x 8 x bfloat> @vfsub_vf_nxv8bf16_unmasked(<vscale x 8 x bfloat> %va, bfloat %b, i32 zeroext %evl) {269; CHECK-LABEL: vfsub_vf_nxv8bf16_unmasked:270; CHECK: # %bb.0:271; CHECK-NEXT: fmv.x.h a1, fa0272; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma273; CHECK-NEXT: vmv.v.x v16, a1274; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8275; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v16276; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma277; CHECK-NEXT: vfsub.vv v12, v12, v8278; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma279; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12280; CHECK-NEXT: ret281 %elt.head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0282 %vb = shufflevector <vscale x 8 x bfloat> %elt.head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer283 %v = call <vscale x 8 x bfloat> @llvm.vp.fsub.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)284 ret <vscale x 8 x bfloat> %v285}286 287define <vscale x 16 x bfloat> @vfsub_vv_nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {288; CHECK-LABEL: vfsub_vv_nxv16bf16:289; CHECK: # %bb.0:290; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma291; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t292; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v8, v0.t293; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma294; CHECK-NEXT: vfsub.vv v16, v24, v16, v0.t295; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma296; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t297; CHECK-NEXT: ret298 %v = call <vscale x 16 x bfloat> @llvm.vp.fsub.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, <vscale x 16 x i1> %m, i32 %evl)299 ret <vscale x 16 x bfloat> %v300}301 302define <vscale x 16 x bfloat> @vfsub_vv_nxv16bf16_unmasked(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, i32 zeroext %evl) {303; CHECK-LABEL: vfsub_vv_nxv16bf16_unmasked:304; CHECK: # %bb.0:305; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma306; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12307; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v8308; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma309; CHECK-NEXT: vfsub.vv v16, v24, v16310; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma311; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16312; CHECK-NEXT: ret313 %v = call <vscale x 16 x bfloat> @llvm.vp.fsub.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)314 ret <vscale x 16 x bfloat> %v315}316 317define <vscale x 16 x bfloat> @vfsub_vf_nxv16bf16(<vscale x 16 x bfloat> %va, bfloat %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {318; CHECK-LABEL: vfsub_vf_nxv16bf16:319; CHECK: # %bb.0:320; CHECK-NEXT: fmv.x.h a1, fa0321; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma322; CHECK-NEXT: vmv.v.x v24, a1323; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8, v0.t324; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v24, v0.t325; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma326; CHECK-NEXT: vfsub.vv v16, v16, v8, v0.t327; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma328; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t329; CHECK-NEXT: ret330 %elt.head = insertelement <vscale x 16 x bfloat> poison, bfloat %b, i32 0331 %vb = shufflevector <vscale x 16 x bfloat> %elt.head, <vscale x 16 x bfloat> poison, <vscale x 16 x i32> zeroinitializer332 %v = call <vscale x 16 x bfloat> @llvm.vp.fsub.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %vb, <vscale x 16 x i1> %m, i32 %evl)333 ret <vscale x 16 x bfloat> %v334}335 336define <vscale x 16 x bfloat> @vfsub_vf_nxv16bf16_unmasked(<vscale x 16 x bfloat> %va, bfloat %b, i32 zeroext %evl) {337; CHECK-LABEL: vfsub_vf_nxv16bf16_unmasked:338; CHECK: # %bb.0:339; CHECK-NEXT: fmv.x.h a1, fa0340; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma341; CHECK-NEXT: vmv.v.x v24, a1342; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8343; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v24344; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma345; CHECK-NEXT: vfsub.vv v16, v16, v8346; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma347; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16348; CHECK-NEXT: ret349 %elt.head = insertelement <vscale x 16 x bfloat> poison, bfloat %b, i32 0350 %vb = shufflevector <vscale x 16 x bfloat> %elt.head, <vscale x 16 x bfloat> poison, <vscale x 16 x i32> zeroinitializer351 %v = call <vscale x 16 x bfloat> @llvm.vp.fsub.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)352 ret <vscale x 16 x bfloat> %v353}354 355define <vscale x 32 x bfloat> @vfsub_vv_nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {356; CHECK-LABEL: vfsub_vv_nxv32bf16:357; CHECK: # %bb.0:358; CHECK-NEXT: addi sp, sp, -16359; CHECK-NEXT: .cfi_def_cfa_offset 16360; CHECK-NEXT: csrr a1, vlenb361; CHECK-NEXT: slli a1, a1, 3362; CHECK-NEXT: sub sp, sp, a1363; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb364; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma365; CHECK-NEXT: vmv1r.v v7, v0366; CHECK-NEXT: csrr a2, vlenb367; CHECK-NEXT: slli a1, a2, 1368; CHECK-NEXT: srli a2, a2, 2369; CHECK-NEXT: sub a3, a0, a1370; CHECK-NEXT: vslidedown.vx v0, v0, a2371; CHECK-NEXT: sltu a2, a0, a3372; CHECK-NEXT: addi a2, a2, -1373; CHECK-NEXT: and a2, a2, a3374; CHECK-NEXT: addi a3, sp, 16375; CHECK-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill376; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma377; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v20, v0.t378; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t379; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma380; CHECK-NEXT: vfsub.vv v16, v16, v24, v0.t381; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma382; CHECK-NEXT: vfncvtbf16.f.f.w v12, v16, v0.t383; CHECK-NEXT: bltu a0, a1, .LBB20_2384; CHECK-NEXT: # %bb.1:385; CHECK-NEXT: mv a0, a1386; CHECK-NEXT: .LBB20_2:387; CHECK-NEXT: vmv1r.v v0, v7388; CHECK-NEXT: addi a1, sp, 16389; CHECK-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload390; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma391; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v24, v0.t392; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v8, v0.t393; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma394; CHECK-NEXT: vfsub.vv v16, v24, v16, v0.t395; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma396; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t397; CHECK-NEXT: csrr a0, vlenb398; CHECK-NEXT: slli a0, a0, 3399; CHECK-NEXT: add sp, sp, a0400; CHECK-NEXT: .cfi_def_cfa sp, 16401; CHECK-NEXT: addi sp, sp, 16402; CHECK-NEXT: .cfi_def_cfa_offset 0403; CHECK-NEXT: ret404 %v = call <vscale x 32 x bfloat> @llvm.vp.fsub.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, <vscale x 32 x i1> %m, i32 %evl)405 ret <vscale x 32 x bfloat> %v406}407 408define <vscale x 32 x bfloat> @vfsub_vv_nxv32bf16_unmasked(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, i32 zeroext %evl) {409; CHECK-LABEL: vfsub_vv_nxv32bf16_unmasked:410; CHECK: # %bb.0:411; CHECK-NEXT: addi sp, sp, -16412; CHECK-NEXT: .cfi_def_cfa_offset 16413; CHECK-NEXT: csrr a1, vlenb414; CHECK-NEXT: slli a1, a1, 3415; CHECK-NEXT: sub sp, sp, a1416; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb417; CHECK-NEXT: csrr a2, vlenb418; CHECK-NEXT: vsetvli a1, zero, e8, m4, ta, ma419; CHECK-NEXT: vmset.m v24420; CHECK-NEXT: slli a1, a2, 1421; CHECK-NEXT: srli a2, a2, 2422; CHECK-NEXT: sub a3, a0, a1423; CHECK-NEXT: vsetvli a4, zero, e8, mf2, ta, ma424; CHECK-NEXT: vslidedown.vx v0, v24, a2425; CHECK-NEXT: sltu a2, a0, a3426; CHECK-NEXT: addi a2, a2, -1427; CHECK-NEXT: and a2, a2, a3428; CHECK-NEXT: addi a3, sp, 16429; CHECK-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill430; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma431; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v20, v0.t432; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t433; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma434; CHECK-NEXT: vfsub.vv v16, v16, v24, v0.t435; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma436; CHECK-NEXT: vfncvtbf16.f.f.w v12, v16, v0.t437; CHECK-NEXT: bltu a0, a1, .LBB21_2438; CHECK-NEXT: # %bb.1:439; CHECK-NEXT: mv a0, a1440; CHECK-NEXT: .LBB21_2:441; CHECK-NEXT: addi a1, sp, 16442; CHECK-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload443; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma444; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v24445; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v8446; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma447; CHECK-NEXT: vfsub.vv v16, v24, v16448; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma449; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16450; CHECK-NEXT: csrr a0, vlenb451; CHECK-NEXT: slli a0, a0, 3452; CHECK-NEXT: add sp, sp, a0453; CHECK-NEXT: .cfi_def_cfa sp, 16454; CHECK-NEXT: addi sp, sp, 16455; CHECK-NEXT: .cfi_def_cfa_offset 0456; CHECK-NEXT: ret457 %v = call <vscale x 32 x bfloat> @llvm.vp.fsub.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)458 ret <vscale x 32 x bfloat> %v459}460 461define <vscale x 32 x bfloat> @vfsub_vf_nxv32bf16(<vscale x 32 x bfloat> %va, bfloat %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {462; CHECK-LABEL: vfsub_vf_nxv32bf16:463; CHECK: # %bb.0:464; CHECK-NEXT: addi sp, sp, -16465; CHECK-NEXT: .cfi_def_cfa_offset 16466; CHECK-NEXT: csrr a1, vlenb467; CHECK-NEXT: slli a1, a1, 4468; CHECK-NEXT: sub sp, sp, a1469; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb470; CHECK-NEXT: vsetvli a1, zero, e16, m8, ta, ma471; CHECK-NEXT: vmv1r.v v7, v0472; CHECK-NEXT: fmv.x.h a1, fa0473; CHECK-NEXT: csrr a2, vlenb474; CHECK-NEXT: vmv.v.x v24, a1475; CHECK-NEXT: slli a1, a2, 1476; CHECK-NEXT: srli a2, a2, 2477; CHECK-NEXT: sub a3, a0, a1478; CHECK-NEXT: vsetvli a4, zero, e8, mf2, ta, ma479; CHECK-NEXT: vslidedown.vx v0, v0, a2480; CHECK-NEXT: sltu a2, a0, a3481; CHECK-NEXT: addi a2, a2, -1482; CHECK-NEXT: and a2, a2, a3483; CHECK-NEXT: csrr a3, vlenb484; CHECK-NEXT: slli a3, a3, 3485; CHECK-NEXT: add a3, sp, a3486; CHECK-NEXT: addi a3, a3, 16487; CHECK-NEXT: vs8r.v v24, (a3) # vscale x 64-byte Folded Spill488; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma489; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v28, v0.t490; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v12, v0.t491; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma492; CHECK-NEXT: vfsub.vv v16, v24, v16, v0.t493; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma494; CHECK-NEXT: vfncvtbf16.f.f.w v12, v16, v0.t495; CHECK-NEXT: bltu a0, a1, .LBB22_2496; CHECK-NEXT: # %bb.1:497; CHECK-NEXT: mv a0, a1498; CHECK-NEXT: .LBB22_2:499; CHECK-NEXT: vmv1r.v v0, v7500; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma501; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8, v0.t502; CHECK-NEXT: addi a0, sp, 16503; CHECK-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill504; CHECK-NEXT: csrr a0, vlenb505; CHECK-NEXT: slli a0, a0, 3506; CHECK-NEXT: add a0, sp, a0507; CHECK-NEXT: addi a0, a0, 16508; CHECK-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload509; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v16, v0.t510; CHECK-NEXT: addi a0, sp, 16511; CHECK-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload512; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma513; CHECK-NEXT: vfsub.vv v16, v16, v24, v0.t514; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma515; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t516; CHECK-NEXT: csrr a0, vlenb517; CHECK-NEXT: slli a0, a0, 4518; CHECK-NEXT: add sp, sp, a0519; CHECK-NEXT: .cfi_def_cfa sp, 16520; CHECK-NEXT: addi sp, sp, 16521; CHECK-NEXT: .cfi_def_cfa_offset 0522; CHECK-NEXT: ret523 %elt.head = insertelement <vscale x 32 x bfloat> poison, bfloat %b, i32 0524 %vb = shufflevector <vscale x 32 x bfloat> %elt.head, <vscale x 32 x bfloat> poison, <vscale x 32 x i32> zeroinitializer525 %v = call <vscale x 32 x bfloat> @llvm.vp.fsub.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %vb, <vscale x 32 x i1> %m, i32 %evl)526 ret <vscale x 32 x bfloat> %v527}528 529define <vscale x 32 x bfloat> @vfsub_vf_nxv32bf16_unmasked(<vscale x 32 x bfloat> %va, bfloat %b, i32 zeroext %evl) {530; CHECK-LABEL: vfsub_vf_nxv32bf16_unmasked:531; CHECK: # %bb.0:532; CHECK-NEXT: addi sp, sp, -16533; CHECK-NEXT: .cfi_def_cfa_offset 16534; CHECK-NEXT: csrr a1, vlenb535; CHECK-NEXT: slli a1, a1, 3536; CHECK-NEXT: sub sp, sp, a1537; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb538; CHECK-NEXT: fmv.x.h a1, fa0539; CHECK-NEXT: csrr a2, vlenb540; CHECK-NEXT: vsetvli a3, zero, e16, m8, ta, ma541; CHECK-NEXT: vmset.m v24542; CHECK-NEXT: vmv.v.x v16, a1543; CHECK-NEXT: slli a1, a2, 1544; CHECK-NEXT: srli a2, a2, 2545; CHECK-NEXT: sub a3, a0, a1546; CHECK-NEXT: vsetvli a4, zero, e8, mf2, ta, ma547; CHECK-NEXT: vslidedown.vx v0, v24, a2548; CHECK-NEXT: sltu a2, a0, a3549; CHECK-NEXT: addi a2, a2, -1550; CHECK-NEXT: and a2, a2, a3551; CHECK-NEXT: addi a3, sp, 16552; CHECK-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill553; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma554; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v20, v0.t555; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t556; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma557; CHECK-NEXT: vfsub.vv v16, v16, v24, v0.t558; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma559; CHECK-NEXT: vfncvtbf16.f.f.w v12, v16, v0.t560; CHECK-NEXT: bltu a0, a1, .LBB23_2561; CHECK-NEXT: # %bb.1:562; CHECK-NEXT: mv a0, a1563; CHECK-NEXT: .LBB23_2:564; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma565; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8566; CHECK-NEXT: addi a0, sp, 16567; CHECK-NEXT: vl8r.v v0, (a0) # vscale x 64-byte Folded Reload568; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v0569; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma570; CHECK-NEXT: vfsub.vv v16, v16, v24571; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma572; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16573; CHECK-NEXT: csrr a0, vlenb574; CHECK-NEXT: slli a0, a0, 3575; CHECK-NEXT: add sp, sp, a0576; CHECK-NEXT: .cfi_def_cfa sp, 16577; CHECK-NEXT: addi sp, sp, 16578; CHECK-NEXT: .cfi_def_cfa_offset 0579; CHECK-NEXT: ret580 %elt.head = insertelement <vscale x 32 x bfloat> poison, bfloat %b, i32 0581 %vb = shufflevector <vscale x 32 x bfloat> %elt.head, <vscale x 32 x bfloat> poison, <vscale x 32 x i32> zeroinitializer582 %v = call <vscale x 32 x bfloat> @llvm.vp.fsub.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)583 ret <vscale x 32 x bfloat> %v584}585 586define <vscale x 1 x half> @vfsub_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {587; ZVFH-LABEL: vfsub_vv_nxv1f16:588; ZVFH: # %bb.0:589; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma590; ZVFH-NEXT: vfsub.vv v8, v8, v9, v0.t591; ZVFH-NEXT: ret592;593; ZVFHMIN-LABEL: vfsub_vv_nxv1f16:594; ZVFHMIN: # %bb.0:595; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma596; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t597; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t598; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma599; ZVFHMIN-NEXT: vfsub.vv v9, v9, v10, v0.t600; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma601; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t602; ZVFHMIN-NEXT: ret603 %v = call <vscale x 1 x half> @llvm.vp.fsub.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)604 ret <vscale x 1 x half> %v605}606 607define <vscale x 1 x half> @vfsub_vv_nxv1f16_unmasked(<vscale x 1 x half> %va, <vscale x 1 x half> %b, i32 zeroext %evl) {608; ZVFH-LABEL: vfsub_vv_nxv1f16_unmasked:609; ZVFH: # %bb.0:610; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma611; ZVFH-NEXT: vfsub.vv v8, v8, v9612; ZVFH-NEXT: ret613;614; ZVFHMIN-LABEL: vfsub_vv_nxv1f16_unmasked:615; ZVFHMIN: # %bb.0:616; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma617; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9618; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8619; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma620; ZVFHMIN-NEXT: vfsub.vv v9, v9, v10621; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma622; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9623; ZVFHMIN-NEXT: ret624 %v = call <vscale x 1 x half> @llvm.vp.fsub.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)625 ret <vscale x 1 x half> %v626}627 628define <vscale x 1 x half> @vfsub_vf_nxv1f16(<vscale x 1 x half> %va, half %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {629; ZVFH-LABEL: vfsub_vf_nxv1f16:630; ZVFH: # %bb.0:631; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma632; ZVFH-NEXT: vfsub.vf v8, v8, fa0, v0.t633; ZVFH-NEXT: ret634;635; ZVFHMIN-LABEL: vfsub_vf_nxv1f16:636; ZVFHMIN: # %bb.0:637; ZVFHMIN-NEXT: fmv.x.h a1, fa0638; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma639; ZVFHMIN-NEXT: vmv.v.x v9, a1640; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t641; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9, v0.t642; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma643; ZVFHMIN-NEXT: vfsub.vv v9, v10, v8, v0.t644; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma645; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t646; ZVFHMIN-NEXT: ret647 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0648 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer649 %v = call <vscale x 1 x half> @llvm.vp.fsub.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)650 ret <vscale x 1 x half> %v651}652 653define <vscale x 1 x half> @vfsub_vf_nxv1f16_unmasked(<vscale x 1 x half> %va, half %b, i32 zeroext %evl) {654; ZVFH-LABEL: vfsub_vf_nxv1f16_unmasked:655; ZVFH: # %bb.0:656; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma657; ZVFH-NEXT: vfsub.vf v8, v8, fa0658; ZVFH-NEXT: ret659;660; ZVFHMIN-LABEL: vfsub_vf_nxv1f16_unmasked:661; ZVFHMIN: # %bb.0:662; ZVFHMIN-NEXT: fmv.x.h a1, fa0663; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma664; ZVFHMIN-NEXT: vmv.v.x v9, a1665; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8666; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9667; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma668; ZVFHMIN-NEXT: vfsub.vv v9, v10, v8669; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma670; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9671; ZVFHMIN-NEXT: ret672 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0673 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer674 %v = call <vscale x 1 x half> @llvm.vp.fsub.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)675 ret <vscale x 1 x half> %v676}677 678define <vscale x 2 x half> @vfsub_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {679; ZVFH-LABEL: vfsub_vv_nxv2f16:680; ZVFH: # %bb.0:681; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma682; ZVFH-NEXT: vfsub.vv v8, v8, v9, v0.t683; ZVFH-NEXT: ret684;685; ZVFHMIN-LABEL: vfsub_vv_nxv2f16:686; ZVFHMIN: # %bb.0:687; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma688; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t689; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t690; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma691; ZVFHMIN-NEXT: vfsub.vv v9, v9, v10, v0.t692; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma693; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t694; ZVFHMIN-NEXT: ret695 %v = call <vscale x 2 x half> @llvm.vp.fsub.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)696 ret <vscale x 2 x half> %v697}698 699define <vscale x 2 x half> @vfsub_vv_nxv2f16_unmasked(<vscale x 2 x half> %va, <vscale x 2 x half> %b, i32 zeroext %evl) {700; ZVFH-LABEL: vfsub_vv_nxv2f16_unmasked:701; ZVFH: # %bb.0:702; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma703; ZVFH-NEXT: vfsub.vv v8, v8, v9704; ZVFH-NEXT: ret705;706; ZVFHMIN-LABEL: vfsub_vv_nxv2f16_unmasked:707; ZVFHMIN: # %bb.0:708; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma709; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9710; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8711; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma712; ZVFHMIN-NEXT: vfsub.vv v9, v9, v10713; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma714; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9715; ZVFHMIN-NEXT: ret716 %v = call <vscale x 2 x half> @llvm.vp.fsub.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)717 ret <vscale x 2 x half> %v718}719 720define <vscale x 2 x half> @vfsub_vf_nxv2f16(<vscale x 2 x half> %va, half %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {721; ZVFH-LABEL: vfsub_vf_nxv2f16:722; ZVFH: # %bb.0:723; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma724; ZVFH-NEXT: vfsub.vf v8, v8, fa0, v0.t725; ZVFH-NEXT: ret726;727; ZVFHMIN-LABEL: vfsub_vf_nxv2f16:728; ZVFHMIN: # %bb.0:729; ZVFHMIN-NEXT: fmv.x.h a1, fa0730; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma731; ZVFHMIN-NEXT: vmv.v.x v9, a1732; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t733; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9, v0.t734; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma735; ZVFHMIN-NEXT: vfsub.vv v9, v10, v8, v0.t736; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma737; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t738; ZVFHMIN-NEXT: ret739 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0740 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer741 %v = call <vscale x 2 x half> @llvm.vp.fsub.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)742 ret <vscale x 2 x half> %v743}744 745define <vscale x 2 x half> @vfsub_vf_nxv2f16_unmasked(<vscale x 2 x half> %va, half %b, i32 zeroext %evl) {746; ZVFH-LABEL: vfsub_vf_nxv2f16_unmasked:747; ZVFH: # %bb.0:748; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma749; ZVFH-NEXT: vfsub.vf v8, v8, fa0750; ZVFH-NEXT: ret751;752; ZVFHMIN-LABEL: vfsub_vf_nxv2f16_unmasked:753; ZVFHMIN: # %bb.0:754; ZVFHMIN-NEXT: fmv.x.h a1, fa0755; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma756; ZVFHMIN-NEXT: vmv.v.x v9, a1757; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8758; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9759; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma760; ZVFHMIN-NEXT: vfsub.vv v9, v10, v8761; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma762; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9763; ZVFHMIN-NEXT: ret764 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0765 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer766 %v = call <vscale x 2 x half> @llvm.vp.fsub.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)767 ret <vscale x 2 x half> %v768}769 770define <vscale x 4 x half> @vfsub_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {771; ZVFH-LABEL: vfsub_vv_nxv4f16:772; ZVFH: # %bb.0:773; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma774; ZVFH-NEXT: vfsub.vv v8, v8, v9, v0.t775; ZVFH-NEXT: ret776;777; ZVFHMIN-LABEL: vfsub_vv_nxv4f16:778; ZVFHMIN: # %bb.0:779; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma780; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t781; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8, v0.t782; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma783; ZVFHMIN-NEXT: vfsub.vv v10, v12, v10, v0.t784; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma785; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10, v0.t786; ZVFHMIN-NEXT: ret787 %v = call <vscale x 4 x half> @llvm.vp.fsub.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)788 ret <vscale x 4 x half> %v789}790 791define <vscale x 4 x half> @vfsub_vv_nxv4f16_unmasked(<vscale x 4 x half> %va, <vscale x 4 x half> %b, i32 zeroext %evl) {792; ZVFH-LABEL: vfsub_vv_nxv4f16_unmasked:793; ZVFH: # %bb.0:794; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma795; ZVFH-NEXT: vfsub.vv v8, v8, v9796; ZVFH-NEXT: ret797;798; ZVFHMIN-LABEL: vfsub_vv_nxv4f16_unmasked:799; ZVFHMIN: # %bb.0:800; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma801; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9802; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8803; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma804; ZVFHMIN-NEXT: vfsub.vv v10, v12, v10805; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma806; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10807; ZVFHMIN-NEXT: ret808 %v = call <vscale x 4 x half> @llvm.vp.fsub.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)809 ret <vscale x 4 x half> %v810}811 812define <vscale x 4 x half> @vfsub_vf_nxv4f16(<vscale x 4 x half> %va, half %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {813; ZVFH-LABEL: vfsub_vf_nxv4f16:814; ZVFH: # %bb.0:815; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma816; ZVFH-NEXT: vfsub.vf v8, v8, fa0, v0.t817; ZVFH-NEXT: ret818;819; ZVFHMIN-LABEL: vfsub_vf_nxv4f16:820; ZVFHMIN: # %bb.0:821; ZVFHMIN-NEXT: fmv.x.h a1, fa0822; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma823; ZVFHMIN-NEXT: vmv.v.x v12, a1824; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t825; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v12, v0.t826; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma827; ZVFHMIN-NEXT: vfsub.vv v10, v10, v8, v0.t828; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma829; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10, v0.t830; ZVFHMIN-NEXT: ret831 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0832 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer833 %v = call <vscale x 4 x half> @llvm.vp.fsub.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)834 ret <vscale x 4 x half> %v835}836 837define <vscale x 4 x half> @vfsub_vf_nxv4f16_unmasked(<vscale x 4 x half> %va, half %b, i32 zeroext %evl) {838; ZVFH-LABEL: vfsub_vf_nxv4f16_unmasked:839; ZVFH: # %bb.0:840; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma841; ZVFH-NEXT: vfsub.vf v8, v8, fa0842; ZVFH-NEXT: ret843;844; ZVFHMIN-LABEL: vfsub_vf_nxv4f16_unmasked:845; ZVFHMIN: # %bb.0:846; ZVFHMIN-NEXT: fmv.x.h a1, fa0847; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma848; ZVFHMIN-NEXT: vmv.v.x v12, a1849; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8850; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v12851; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma852; ZVFHMIN-NEXT: vfsub.vv v10, v10, v8853; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma854; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10855; ZVFHMIN-NEXT: ret856 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0857 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer858 %v = call <vscale x 4 x half> @llvm.vp.fsub.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)859 ret <vscale x 4 x half> %v860}861 862define <vscale x 8 x half> @vfsub_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {863; ZVFH-LABEL: vfsub_vv_nxv8f16:864; ZVFH: # %bb.0:865; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma866; ZVFH-NEXT: vfsub.vv v8, v8, v10, v0.t867; ZVFH-NEXT: ret868;869; ZVFHMIN-LABEL: vfsub_vv_nxv8f16:870; ZVFHMIN: # %bb.0:871; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma872; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10, v0.t873; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t874; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma875; ZVFHMIN-NEXT: vfsub.vv v12, v16, v12, v0.t876; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma877; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t878; ZVFHMIN-NEXT: ret879 %v = call <vscale x 8 x half> @llvm.vp.fsub.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)880 ret <vscale x 8 x half> %v881}882 883define <vscale x 8 x half> @vfsub_vv_nxv8f16_unmasked(<vscale x 8 x half> %va, <vscale x 8 x half> %b, i32 zeroext %evl) {884; ZVFH-LABEL: vfsub_vv_nxv8f16_unmasked:885; ZVFH: # %bb.0:886; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma887; ZVFH-NEXT: vfsub.vv v8, v8, v10888; ZVFH-NEXT: ret889;890; ZVFHMIN-LABEL: vfsub_vv_nxv8f16_unmasked:891; ZVFHMIN: # %bb.0:892; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma893; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10894; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8895; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma896; ZVFHMIN-NEXT: vfsub.vv v12, v16, v12897; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma898; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12899; ZVFHMIN-NEXT: ret900 %v = call <vscale x 8 x half> @llvm.vp.fsub.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)901 ret <vscale x 8 x half> %v902}903 904define <vscale x 8 x half> @vfsub_vf_nxv8f16(<vscale x 8 x half> %va, half %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {905; ZVFH-LABEL: vfsub_vf_nxv8f16:906; ZVFH: # %bb.0:907; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma908; ZVFH-NEXT: vfsub.vf v8, v8, fa0, v0.t909; ZVFH-NEXT: ret910;911; ZVFHMIN-LABEL: vfsub_vf_nxv8f16:912; ZVFHMIN: # %bb.0:913; ZVFHMIN-NEXT: fmv.x.h a1, fa0914; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma915; ZVFHMIN-NEXT: vmv.v.x v16, a1916; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8, v0.t917; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t918; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma919; ZVFHMIN-NEXT: vfsub.vv v12, v12, v8, v0.t920; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma921; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t922; ZVFHMIN-NEXT: ret923 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0924 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer925 %v = call <vscale x 8 x half> @llvm.vp.fsub.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)926 ret <vscale x 8 x half> %v927}928 929define <vscale x 8 x half> @vfsub_vf_nxv8f16_unmasked(<vscale x 8 x half> %va, half %b, i32 zeroext %evl) {930; ZVFH-LABEL: vfsub_vf_nxv8f16_unmasked:931; ZVFH: # %bb.0:932; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma933; ZVFH-NEXT: vfsub.vf v8, v8, fa0934; ZVFH-NEXT: ret935;936; ZVFHMIN-LABEL: vfsub_vf_nxv8f16_unmasked:937; ZVFHMIN: # %bb.0:938; ZVFHMIN-NEXT: fmv.x.h a1, fa0939; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma940; ZVFHMIN-NEXT: vmv.v.x v16, a1941; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8942; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16943; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma944; ZVFHMIN-NEXT: vfsub.vv v12, v12, v8945; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma946; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12947; ZVFHMIN-NEXT: ret948 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0949 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer950 %v = call <vscale x 8 x half> @llvm.vp.fsub.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)951 ret <vscale x 8 x half> %v952}953 954define <vscale x 16 x half> @vfsub_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {955; ZVFH-LABEL: vfsub_vv_nxv16f16:956; ZVFH: # %bb.0:957; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma958; ZVFH-NEXT: vfsub.vv v8, v8, v12, v0.t959; ZVFH-NEXT: ret960;961; ZVFHMIN-LABEL: vfsub_vv_nxv16f16:962; ZVFHMIN: # %bb.0:963; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma964; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t965; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t966; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma967; ZVFHMIN-NEXT: vfsub.vv v16, v24, v16, v0.t968; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma969; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t970; ZVFHMIN-NEXT: ret971 %v = call <vscale x 16 x half> @llvm.vp.fsub.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 %evl)972 ret <vscale x 16 x half> %v973}974 975define <vscale x 16 x half> @vfsub_vv_nxv16f16_unmasked(<vscale x 16 x half> %va, <vscale x 16 x half> %b, i32 zeroext %evl) {976; ZVFH-LABEL: vfsub_vv_nxv16f16_unmasked:977; ZVFH: # %bb.0:978; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma979; ZVFH-NEXT: vfsub.vv v8, v8, v12980; ZVFH-NEXT: ret981;982; ZVFHMIN-LABEL: vfsub_vv_nxv16f16_unmasked:983; ZVFHMIN: # %bb.0:984; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma985; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12986; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8987; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma988; ZVFHMIN-NEXT: vfsub.vv v16, v24, v16989; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma990; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16991; ZVFHMIN-NEXT: ret992 %v = call <vscale x 16 x half> @llvm.vp.fsub.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)993 ret <vscale x 16 x half> %v994}995 996define <vscale x 16 x half> @vfsub_vf_nxv16f16(<vscale x 16 x half> %va, half %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {997; ZVFH-LABEL: vfsub_vf_nxv16f16:998; ZVFH: # %bb.0:999; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma1000; ZVFH-NEXT: vfsub.vf v8, v8, fa0, v0.t1001; ZVFH-NEXT: ret1002;1003; ZVFHMIN-LABEL: vfsub_vf_nxv16f16:1004; ZVFHMIN: # %bb.0:1005; ZVFHMIN-NEXT: fmv.x.h a1, fa01006; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma1007; ZVFHMIN-NEXT: vmv.v.x v24, a11008; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t1009; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v24, v0.t1010; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1011; ZVFHMIN-NEXT: vfsub.vv v16, v16, v8, v0.t1012; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1013; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t1014; ZVFHMIN-NEXT: ret1015 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 01016 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer1017 %v = call <vscale x 16 x half> @llvm.vp.fsub.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)1018 ret <vscale x 16 x half> %v1019}1020 1021define <vscale x 16 x half> @vfsub_vf_nxv16f16_unmasked(<vscale x 16 x half> %va, half %b, i32 zeroext %evl) {1022; ZVFH-LABEL: vfsub_vf_nxv16f16_unmasked:1023; ZVFH: # %bb.0:1024; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma1025; ZVFH-NEXT: vfsub.vf v8, v8, fa01026; ZVFH-NEXT: ret1027;1028; ZVFHMIN-LABEL: vfsub_vf_nxv16f16_unmasked:1029; ZVFHMIN: # %bb.0:1030; ZVFHMIN-NEXT: fmv.x.h a1, fa01031; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma1032; ZVFHMIN-NEXT: vmv.v.x v24, a11033; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v81034; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v241035; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1036; ZVFHMIN-NEXT: vfsub.vv v16, v16, v81037; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1038; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v161039; ZVFHMIN-NEXT: ret1040 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 01041 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer1042 %v = call <vscale x 16 x half> @llvm.vp.fsub.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)1043 ret <vscale x 16 x half> %v1044}1045 1046define <vscale x 32 x half> @vfsub_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {1047; ZVFH-LABEL: vfsub_vv_nxv32f16:1048; ZVFH: # %bb.0:1049; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma1050; ZVFH-NEXT: vfsub.vv v8, v8, v16, v0.t1051; ZVFH-NEXT: ret1052;1053; ZVFHMIN-LABEL: vfsub_vv_nxv32f16:1054; ZVFHMIN: # %bb.0:1055; ZVFHMIN-NEXT: addi sp, sp, -161056; ZVFHMIN-NEXT: .cfi_def_cfa_offset 161057; ZVFHMIN-NEXT: csrr a1, vlenb1058; ZVFHMIN-NEXT: slli a1, a1, 31059; ZVFHMIN-NEXT: sub sp, sp, a11060; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb1061; ZVFHMIN-NEXT: vsetvli a1, zero, e8, mf2, ta, ma1062; ZVFHMIN-NEXT: vmv1r.v v7, v01063; ZVFHMIN-NEXT: csrr a2, vlenb1064; ZVFHMIN-NEXT: slli a1, a2, 11065; ZVFHMIN-NEXT: srli a2, a2, 21066; ZVFHMIN-NEXT: sub a3, a0, a11067; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a21068; ZVFHMIN-NEXT: sltu a2, a0, a31069; ZVFHMIN-NEXT: addi a2, a2, -11070; ZVFHMIN-NEXT: and a2, a2, a31071; ZVFHMIN-NEXT: addi a3, sp, 161072; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill1073; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma1074; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t1075; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t1076; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1077; ZVFHMIN-NEXT: vfsub.vv v16, v16, v24, v0.t1078; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1079; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16, v0.t1080; ZVFHMIN-NEXT: bltu a0, a1, .LBB44_21081; ZVFHMIN-NEXT: # %bb.1:1082; ZVFHMIN-NEXT: mv a0, a11083; ZVFHMIN-NEXT: .LBB44_2:1084; ZVFHMIN-NEXT: vmv1r.v v0, v71085; ZVFHMIN-NEXT: addi a1, sp, 161086; ZVFHMIN-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload1087; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma1088; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v24, v0.t1089; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t1090; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1091; ZVFHMIN-NEXT: vfsub.vv v16, v24, v16, v0.t1092; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1093; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t1094; ZVFHMIN-NEXT: csrr a0, vlenb1095; ZVFHMIN-NEXT: slli a0, a0, 31096; ZVFHMIN-NEXT: add sp, sp, a01097; ZVFHMIN-NEXT: .cfi_def_cfa sp, 161098; ZVFHMIN-NEXT: addi sp, sp, 161099; ZVFHMIN-NEXT: .cfi_def_cfa_offset 01100; ZVFHMIN-NEXT: ret1101 %v = call <vscale x 32 x half> @llvm.vp.fsub.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x i1> %m, i32 %evl)1102 ret <vscale x 32 x half> %v1103}1104 1105define <vscale x 32 x half> @vfsub_vv_nxv32f16_unmasked(<vscale x 32 x half> %va, <vscale x 32 x half> %b, i32 zeroext %evl) {1106; ZVFH-LABEL: vfsub_vv_nxv32f16_unmasked:1107; ZVFH: # %bb.0:1108; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma1109; ZVFH-NEXT: vfsub.vv v8, v8, v161110; ZVFH-NEXT: ret1111;1112; ZVFHMIN-LABEL: vfsub_vv_nxv32f16_unmasked:1113; ZVFHMIN: # %bb.0:1114; ZVFHMIN-NEXT: addi sp, sp, -161115; ZVFHMIN-NEXT: .cfi_def_cfa_offset 161116; ZVFHMIN-NEXT: csrr a1, vlenb1117; ZVFHMIN-NEXT: slli a1, a1, 31118; ZVFHMIN-NEXT: sub sp, sp, a11119; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb1120; ZVFHMIN-NEXT: csrr a2, vlenb1121; ZVFHMIN-NEXT: vsetvli a1, zero, e8, m4, ta, ma1122; ZVFHMIN-NEXT: vmset.m v241123; ZVFHMIN-NEXT: slli a1, a2, 11124; ZVFHMIN-NEXT: srli a2, a2, 21125; ZVFHMIN-NEXT: sub a3, a0, a11126; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma1127; ZVFHMIN-NEXT: vslidedown.vx v0, v24, a21128; ZVFHMIN-NEXT: sltu a2, a0, a31129; ZVFHMIN-NEXT: addi a2, a2, -11130; ZVFHMIN-NEXT: and a2, a2, a31131; ZVFHMIN-NEXT: addi a3, sp, 161132; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill1133; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma1134; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t1135; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t1136; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1137; ZVFHMIN-NEXT: vfsub.vv v16, v16, v24, v0.t1138; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1139; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16, v0.t1140; ZVFHMIN-NEXT: bltu a0, a1, .LBB45_21141; ZVFHMIN-NEXT: # %bb.1:1142; ZVFHMIN-NEXT: mv a0, a11143; ZVFHMIN-NEXT: .LBB45_2:1144; ZVFHMIN-NEXT: addi a1, sp, 161145; ZVFHMIN-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload1146; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma1147; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v241148; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v81149; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1150; ZVFHMIN-NEXT: vfsub.vv v16, v24, v161151; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1152; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v161153; ZVFHMIN-NEXT: csrr a0, vlenb1154; ZVFHMIN-NEXT: slli a0, a0, 31155; ZVFHMIN-NEXT: add sp, sp, a01156; ZVFHMIN-NEXT: .cfi_def_cfa sp, 161157; ZVFHMIN-NEXT: addi sp, sp, 161158; ZVFHMIN-NEXT: .cfi_def_cfa_offset 01159; ZVFHMIN-NEXT: ret1160 %v = call <vscale x 32 x half> @llvm.vp.fsub.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)1161 ret <vscale x 32 x half> %v1162}1163 1164define <vscale x 32 x half> @vfsub_vf_nxv32f16(<vscale x 32 x half> %va, half %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {1165; ZVFH-LABEL: vfsub_vf_nxv32f16:1166; ZVFH: # %bb.0:1167; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma1168; ZVFH-NEXT: vfsub.vf v8, v8, fa0, v0.t1169; ZVFH-NEXT: ret1170;1171; ZVFHMIN-LABEL: vfsub_vf_nxv32f16:1172; ZVFHMIN: # %bb.0:1173; ZVFHMIN-NEXT: addi sp, sp, -161174; ZVFHMIN-NEXT: .cfi_def_cfa_offset 161175; ZVFHMIN-NEXT: csrr a1, vlenb1176; ZVFHMIN-NEXT: slli a1, a1, 41177; ZVFHMIN-NEXT: sub sp, sp, a11178; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb1179; ZVFHMIN-NEXT: vsetvli a1, zero, e16, m8, ta, ma1180; ZVFHMIN-NEXT: vmv1r.v v7, v01181; ZVFHMIN-NEXT: fmv.x.h a1, fa01182; ZVFHMIN-NEXT: csrr a2, vlenb1183; ZVFHMIN-NEXT: vmv.v.x v24, a11184; ZVFHMIN-NEXT: slli a1, a2, 11185; ZVFHMIN-NEXT: srli a2, a2, 21186; ZVFHMIN-NEXT: sub a3, a0, a11187; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma1188; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a21189; ZVFHMIN-NEXT: sltu a2, a0, a31190; ZVFHMIN-NEXT: addi a2, a2, -11191; ZVFHMIN-NEXT: and a2, a2, a31192; ZVFHMIN-NEXT: csrr a3, vlenb1193; ZVFHMIN-NEXT: slli a3, a3, 31194; ZVFHMIN-NEXT: add a3, sp, a31195; ZVFHMIN-NEXT: addi a3, a3, 161196; ZVFHMIN-NEXT: vs8r.v v24, (a3) # vscale x 64-byte Folded Spill1197; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma1198; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v28, v0.t1199; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t1200; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1201; ZVFHMIN-NEXT: vfsub.vv v16, v24, v16, v0.t1202; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1203; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16, v0.t1204; ZVFHMIN-NEXT: bltu a0, a1, .LBB46_21205; ZVFHMIN-NEXT: # %bb.1:1206; ZVFHMIN-NEXT: mv a0, a11207; ZVFHMIN-NEXT: .LBB46_2:1208; ZVFHMIN-NEXT: vmv1r.v v0, v71209; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma1210; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t1211; ZVFHMIN-NEXT: addi a0, sp, 161212; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill1213; ZVFHMIN-NEXT: csrr a0, vlenb1214; ZVFHMIN-NEXT: slli a0, a0, 31215; ZVFHMIN-NEXT: add a0, sp, a01216; ZVFHMIN-NEXT: addi a0, a0, 161217; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1218; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t1219; ZVFHMIN-NEXT: addi a0, sp, 161220; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1221; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1222; ZVFHMIN-NEXT: vfsub.vv v16, v16, v24, v0.t1223; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1224; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t1225; ZVFHMIN-NEXT: csrr a0, vlenb1226; ZVFHMIN-NEXT: slli a0, a0, 41227; ZVFHMIN-NEXT: add sp, sp, a01228; ZVFHMIN-NEXT: .cfi_def_cfa sp, 161229; ZVFHMIN-NEXT: addi sp, sp, 161230; ZVFHMIN-NEXT: .cfi_def_cfa_offset 01231; ZVFHMIN-NEXT: ret1232 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 01233 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer1234 %v = call <vscale x 32 x half> @llvm.vp.fsub.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x i1> %m, i32 %evl)1235 ret <vscale x 32 x half> %v1236}1237 1238define <vscale x 32 x half> @vfsub_vf_nxv32f16_unmasked(<vscale x 32 x half> %va, half %b, i32 zeroext %evl) {1239; ZVFH-LABEL: vfsub_vf_nxv32f16_unmasked:1240; ZVFH: # %bb.0:1241; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma1242; ZVFH-NEXT: vfsub.vf v8, v8, fa01243; ZVFH-NEXT: ret1244;1245; ZVFHMIN-LABEL: vfsub_vf_nxv32f16_unmasked:1246; ZVFHMIN: # %bb.0:1247; ZVFHMIN-NEXT: addi sp, sp, -161248; ZVFHMIN-NEXT: .cfi_def_cfa_offset 161249; ZVFHMIN-NEXT: csrr a1, vlenb1250; ZVFHMIN-NEXT: slli a1, a1, 31251; ZVFHMIN-NEXT: sub sp, sp, a11252; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb1253; ZVFHMIN-NEXT: fmv.x.h a1, fa01254; ZVFHMIN-NEXT: csrr a2, vlenb1255; ZVFHMIN-NEXT: vsetvli a3, zero, e16, m8, ta, ma1256; ZVFHMIN-NEXT: vmset.m v241257; ZVFHMIN-NEXT: vmv.v.x v16, a11258; ZVFHMIN-NEXT: slli a1, a2, 11259; ZVFHMIN-NEXT: srli a2, a2, 21260; ZVFHMIN-NEXT: sub a3, a0, a11261; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma1262; ZVFHMIN-NEXT: vslidedown.vx v0, v24, a21263; ZVFHMIN-NEXT: sltu a2, a0, a31264; ZVFHMIN-NEXT: addi a2, a2, -11265; ZVFHMIN-NEXT: and a2, a2, a31266; ZVFHMIN-NEXT: addi a3, sp, 161267; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill1268; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma1269; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t1270; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t1271; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1272; ZVFHMIN-NEXT: vfsub.vv v16, v16, v24, v0.t1273; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1274; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16, v0.t1275; ZVFHMIN-NEXT: bltu a0, a1, .LBB47_21276; ZVFHMIN-NEXT: # %bb.1:1277; ZVFHMIN-NEXT: mv a0, a11278; ZVFHMIN-NEXT: .LBB47_2:1279; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma1280; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v81281; ZVFHMIN-NEXT: addi a0, sp, 161282; ZVFHMIN-NEXT: vl8r.v v0, (a0) # vscale x 64-byte Folded Reload1283; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v01284; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1285; ZVFHMIN-NEXT: vfsub.vv v16, v16, v241286; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1287; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v161288; ZVFHMIN-NEXT: csrr a0, vlenb1289; ZVFHMIN-NEXT: slli a0, a0, 31290; ZVFHMIN-NEXT: add sp, sp, a01291; ZVFHMIN-NEXT: .cfi_def_cfa sp, 161292; ZVFHMIN-NEXT: addi sp, sp, 161293; ZVFHMIN-NEXT: .cfi_def_cfa_offset 01294; ZVFHMIN-NEXT: ret1295 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 01296 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer1297 %v = call <vscale x 32 x half> @llvm.vp.fsub.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)1298 ret <vscale x 32 x half> %v1299}1300 1301define <vscale x 1 x float> @vfsub_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1302; CHECK-LABEL: vfsub_vv_nxv1f32:1303; CHECK: # %bb.0:1304; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma1305; CHECK-NEXT: vfsub.vv v8, v8, v9, v0.t1306; CHECK-NEXT: ret1307 %v = call <vscale x 1 x float> @llvm.vp.fsub.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 %evl)1308 ret <vscale x 1 x float> %v1309}1310 1311define <vscale x 1 x float> @vfsub_vv_nxv1f32_unmasked(<vscale x 1 x float> %va, <vscale x 1 x float> %b, i32 zeroext %evl) {1312; CHECK-LABEL: vfsub_vv_nxv1f32_unmasked:1313; CHECK: # %bb.0:1314; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma1315; CHECK-NEXT: vfsub.vv v8, v8, v91316; CHECK-NEXT: ret1317 %v = call <vscale x 1 x float> @llvm.vp.fsub.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)1318 ret <vscale x 1 x float> %v1319}1320 1321define <vscale x 1 x float> @vfsub_vf_nxv1f32(<vscale x 1 x float> %va, float %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1322; CHECK-LABEL: vfsub_vf_nxv1f32:1323; CHECK: # %bb.0:1324; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma1325; CHECK-NEXT: vfsub.vf v8, v8, fa0, v0.t1326; CHECK-NEXT: ret1327 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 01328 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer1329 %v = call <vscale x 1 x float> @llvm.vp.fsub.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)1330 ret <vscale x 1 x float> %v1331}1332 1333define <vscale x 1 x float> @vfsub_vf_nxv1f32_unmasked(<vscale x 1 x float> %va, float %b, i32 zeroext %evl) {1334; CHECK-LABEL: vfsub_vf_nxv1f32_unmasked:1335; CHECK: # %bb.0:1336; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma1337; CHECK-NEXT: vfsub.vf v8, v8, fa01338; CHECK-NEXT: ret1339 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 01340 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer1341 %v = call <vscale x 1 x float> @llvm.vp.fsub.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)1342 ret <vscale x 1 x float> %v1343}1344 1345define <vscale x 2 x float> @vfsub_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1346; CHECK-LABEL: vfsub_vv_nxv2f32:1347; CHECK: # %bb.0:1348; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma1349; CHECK-NEXT: vfsub.vv v8, v8, v9, v0.t1350; CHECK-NEXT: ret1351 %v = call <vscale x 2 x float> @llvm.vp.fsub.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 %evl)1352 ret <vscale x 2 x float> %v1353}1354 1355define <vscale x 2 x float> @vfsub_vv_nxv2f32_unmasked(<vscale x 2 x float> %va, <vscale x 2 x float> %b, i32 zeroext %evl) {1356; CHECK-LABEL: vfsub_vv_nxv2f32_unmasked:1357; CHECK: # %bb.0:1358; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma1359; CHECK-NEXT: vfsub.vv v8, v8, v91360; CHECK-NEXT: ret1361 %v = call <vscale x 2 x float> @llvm.vp.fsub.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)1362 ret <vscale x 2 x float> %v1363}1364 1365define <vscale x 2 x float> @vfsub_vf_nxv2f32(<vscale x 2 x float> %va, float %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1366; CHECK-LABEL: vfsub_vf_nxv2f32:1367; CHECK: # %bb.0:1368; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma1369; CHECK-NEXT: vfsub.vf v8, v8, fa0, v0.t1370; CHECK-NEXT: ret1371 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 01372 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer1373 %v = call <vscale x 2 x float> @llvm.vp.fsub.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)1374 ret <vscale x 2 x float> %v1375}1376 1377define <vscale x 2 x float> @vfsub_vf_nxv2f32_unmasked(<vscale x 2 x float> %va, float %b, i32 zeroext %evl) {1378; CHECK-LABEL: vfsub_vf_nxv2f32_unmasked:1379; CHECK: # %bb.0:1380; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma1381; CHECK-NEXT: vfsub.vf v8, v8, fa01382; CHECK-NEXT: ret1383 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 01384 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer1385 %v = call <vscale x 2 x float> @llvm.vp.fsub.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)1386 ret <vscale x 2 x float> %v1387}1388 1389define <vscale x 4 x float> @vfsub_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1390; CHECK-LABEL: vfsub_vv_nxv4f32:1391; CHECK: # %bb.0:1392; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1393; CHECK-NEXT: vfsub.vv v8, v8, v10, v0.t1394; CHECK-NEXT: ret1395 %v = call <vscale x 4 x float> @llvm.vp.fsub.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 %evl)1396 ret <vscale x 4 x float> %v1397}1398 1399define <vscale x 4 x float> @vfsub_vv_nxv4f32_unmasked(<vscale x 4 x float> %va, <vscale x 4 x float> %b, i32 zeroext %evl) {1400; CHECK-LABEL: vfsub_vv_nxv4f32_unmasked:1401; CHECK: # %bb.0:1402; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1403; CHECK-NEXT: vfsub.vv v8, v8, v101404; CHECK-NEXT: ret1405 %v = call <vscale x 4 x float> @llvm.vp.fsub.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)1406 ret <vscale x 4 x float> %v1407}1408 1409define <vscale x 4 x float> @vfsub_vf_nxv4f32(<vscale x 4 x float> %va, float %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1410; CHECK-LABEL: vfsub_vf_nxv4f32:1411; CHECK: # %bb.0:1412; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1413; CHECK-NEXT: vfsub.vf v8, v8, fa0, v0.t1414; CHECK-NEXT: ret1415 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 01416 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer1417 %v = call <vscale x 4 x float> @llvm.vp.fsub.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)1418 ret <vscale x 4 x float> %v1419}1420 1421define <vscale x 4 x float> @vfsub_vf_nxv4f32_unmasked(<vscale x 4 x float> %va, float %b, i32 zeroext %evl) {1422; CHECK-LABEL: vfsub_vf_nxv4f32_unmasked:1423; CHECK: # %bb.0:1424; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1425; CHECK-NEXT: vfsub.vf v8, v8, fa01426; CHECK-NEXT: ret1427 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 01428 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer1429 %v = call <vscale x 4 x float> @llvm.vp.fsub.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)1430 ret <vscale x 4 x float> %v1431}1432 1433define <vscale x 8 x float> @vfsub_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1434; CHECK-LABEL: vfsub_vv_nxv8f32:1435; CHECK: # %bb.0:1436; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1437; CHECK-NEXT: vfsub.vv v8, v8, v12, v0.t1438; CHECK-NEXT: ret1439 %v = call <vscale x 8 x float> @llvm.vp.fsub.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 %evl)1440 ret <vscale x 8 x float> %v1441}1442 1443define <vscale x 8 x float> @vfsub_vv_nxv8f32_unmasked(<vscale x 8 x float> %va, <vscale x 8 x float> %b, i32 zeroext %evl) {1444; CHECK-LABEL: vfsub_vv_nxv8f32_unmasked:1445; CHECK: # %bb.0:1446; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1447; CHECK-NEXT: vfsub.vv v8, v8, v121448; CHECK-NEXT: ret1449 %v = call <vscale x 8 x float> @llvm.vp.fsub.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)1450 ret <vscale x 8 x float> %v1451}1452 1453define <vscale x 8 x float> @vfsub_vf_nxv8f32(<vscale x 8 x float> %va, float %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1454; CHECK-LABEL: vfsub_vf_nxv8f32:1455; CHECK: # %bb.0:1456; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1457; CHECK-NEXT: vfsub.vf v8, v8, fa0, v0.t1458; CHECK-NEXT: ret1459 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 01460 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer1461 %v = call <vscale x 8 x float> @llvm.vp.fsub.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)1462 ret <vscale x 8 x float> %v1463}1464 1465define <vscale x 8 x float> @vfsub_vf_nxv8f32_unmasked(<vscale x 8 x float> %va, float %b, i32 zeroext %evl) {1466; CHECK-LABEL: vfsub_vf_nxv8f32_unmasked:1467; CHECK: # %bb.0:1468; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1469; CHECK-NEXT: vfsub.vf v8, v8, fa01470; CHECK-NEXT: ret1471 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 01472 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer1473 %v = call <vscale x 8 x float> @llvm.vp.fsub.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)1474 ret <vscale x 8 x float> %v1475}1476 1477define <vscale x 16 x float> @vfsub_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {1478; CHECK-LABEL: vfsub_vv_nxv16f32:1479; CHECK: # %bb.0:1480; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1481; CHECK-NEXT: vfsub.vv v8, v8, v16, v0.t1482; CHECK-NEXT: ret1483 %v = call <vscale x 16 x float> @llvm.vp.fsub.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x i1> %m, i32 %evl)1484 ret <vscale x 16 x float> %v1485}1486 1487define <vscale x 16 x float> @vfsub_vv_nxv16f32_unmasked(<vscale x 16 x float> %va, <vscale x 16 x float> %b, i32 zeroext %evl) {1488; CHECK-LABEL: vfsub_vv_nxv16f32_unmasked:1489; CHECK: # %bb.0:1490; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1491; CHECK-NEXT: vfsub.vv v8, v8, v161492; CHECK-NEXT: ret1493 %v = call <vscale x 16 x float> @llvm.vp.fsub.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)1494 ret <vscale x 16 x float> %v1495}1496 1497define <vscale x 16 x float> @vfsub_vf_nxv16f32(<vscale x 16 x float> %va, float %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {1498; CHECK-LABEL: vfsub_vf_nxv16f32:1499; CHECK: # %bb.0:1500; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1501; CHECK-NEXT: vfsub.vf v8, v8, fa0, v0.t1502; CHECK-NEXT: ret1503 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 01504 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer1505 %v = call <vscale x 16 x float> @llvm.vp.fsub.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x i1> %m, i32 %evl)1506 ret <vscale x 16 x float> %v1507}1508 1509define <vscale x 16 x float> @vfsub_vf_nxv16f32_unmasked(<vscale x 16 x float> %va, float %b, i32 zeroext %evl) {1510; CHECK-LABEL: vfsub_vf_nxv16f32_unmasked:1511; CHECK: # %bb.0:1512; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1513; CHECK-NEXT: vfsub.vf v8, v8, fa01514; CHECK-NEXT: ret1515 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 01516 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer1517 %v = call <vscale x 16 x float> @llvm.vp.fsub.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)1518 ret <vscale x 16 x float> %v1519}1520 1521define <vscale x 1 x double> @vfsub_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1522; CHECK-LABEL: vfsub_vv_nxv1f64:1523; CHECK: # %bb.0:1524; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1525; CHECK-NEXT: vfsub.vv v8, v8, v9, v0.t1526; CHECK-NEXT: ret1527 %v = call <vscale x 1 x double> @llvm.vp.fsub.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %evl)1528 ret <vscale x 1 x double> %v1529}1530 1531define <vscale x 1 x double> @vfsub_vv_nxv1f64_unmasked(<vscale x 1 x double> %va, <vscale x 1 x double> %b, i32 zeroext %evl) {1532; CHECK-LABEL: vfsub_vv_nxv1f64_unmasked:1533; CHECK: # %bb.0:1534; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1535; CHECK-NEXT: vfsub.vv v8, v8, v91536; CHECK-NEXT: ret1537 %v = call <vscale x 1 x double> @llvm.vp.fsub.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)1538 ret <vscale x 1 x double> %v1539}1540 1541define <vscale x 1 x double> @vfsub_vf_nxv1f64(<vscale x 1 x double> %va, double %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1542; CHECK-LABEL: vfsub_vf_nxv1f64:1543; CHECK: # %bb.0:1544; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1545; CHECK-NEXT: vfsub.vf v8, v8, fa0, v0.t1546; CHECK-NEXT: ret1547 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 01548 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer1549 %v = call <vscale x 1 x double> @llvm.vp.fsub.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x i1> %m, i32 %evl)1550 ret <vscale x 1 x double> %v1551}1552 1553define <vscale x 1 x double> @vfsub_vf_nxv1f64_unmasked(<vscale x 1 x double> %va, double %b, i32 zeroext %evl) {1554; CHECK-LABEL: vfsub_vf_nxv1f64_unmasked:1555; CHECK: # %bb.0:1556; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1557; CHECK-NEXT: vfsub.vf v8, v8, fa01558; CHECK-NEXT: ret1559 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 01560 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer1561 %v = call <vscale x 1 x double> @llvm.vp.fsub.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)1562 ret <vscale x 1 x double> %v1563}1564 1565define <vscale x 2 x double> @vfsub_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1566; CHECK-LABEL: vfsub_vv_nxv2f64:1567; CHECK: # %bb.0:1568; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1569; CHECK-NEXT: vfsub.vv v8, v8, v10, v0.t1570; CHECK-NEXT: ret1571 %v = call <vscale x 2 x double> @llvm.vp.fsub.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x i1> %m, i32 %evl)1572 ret <vscale x 2 x double> %v1573}1574 1575define <vscale x 2 x double> @vfsub_vv_nxv2f64_unmasked(<vscale x 2 x double> %va, <vscale x 2 x double> %b, i32 zeroext %evl) {1576; CHECK-LABEL: vfsub_vv_nxv2f64_unmasked:1577; CHECK: # %bb.0:1578; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1579; CHECK-NEXT: vfsub.vv v8, v8, v101580; CHECK-NEXT: ret1581 %v = call <vscale x 2 x double> @llvm.vp.fsub.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)1582 ret <vscale x 2 x double> %v1583}1584 1585define <vscale x 2 x double> @vfsub_vf_nxv2f64(<vscale x 2 x double> %va, double %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1586; CHECK-LABEL: vfsub_vf_nxv2f64:1587; CHECK: # %bb.0:1588; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1589; CHECK-NEXT: vfsub.vf v8, v8, fa0, v0.t1590; CHECK-NEXT: ret1591 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 01592 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer1593 %v = call <vscale x 2 x double> @llvm.vp.fsub.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x i1> %m, i32 %evl)1594 ret <vscale x 2 x double> %v1595}1596 1597define <vscale x 2 x double> @vfsub_vf_nxv2f64_unmasked(<vscale x 2 x double> %va, double %b, i32 zeroext %evl) {1598; CHECK-LABEL: vfsub_vf_nxv2f64_unmasked:1599; CHECK: # %bb.0:1600; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1601; CHECK-NEXT: vfsub.vf v8, v8, fa01602; CHECK-NEXT: ret1603 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 01604 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer1605 %v = call <vscale x 2 x double> @llvm.vp.fsub.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)1606 ret <vscale x 2 x double> %v1607}1608 1609define <vscale x 4 x double> @vfsub_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1610; CHECK-LABEL: vfsub_vv_nxv4f64:1611; CHECK: # %bb.0:1612; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1613; CHECK-NEXT: vfsub.vv v8, v8, v12, v0.t1614; CHECK-NEXT: ret1615 %v = call <vscale x 4 x double> @llvm.vp.fsub.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x i1> %m, i32 %evl)1616 ret <vscale x 4 x double> %v1617}1618 1619define <vscale x 4 x double> @vfsub_vv_nxv4f64_unmasked(<vscale x 4 x double> %va, <vscale x 4 x double> %b, i32 zeroext %evl) {1620; CHECK-LABEL: vfsub_vv_nxv4f64_unmasked:1621; CHECK: # %bb.0:1622; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1623; CHECK-NEXT: vfsub.vv v8, v8, v121624; CHECK-NEXT: ret1625 %v = call <vscale x 4 x double> @llvm.vp.fsub.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)1626 ret <vscale x 4 x double> %v1627}1628 1629define <vscale x 4 x double> @vfsub_vf_nxv4f64(<vscale x 4 x double> %va, double %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1630; CHECK-LABEL: vfsub_vf_nxv4f64:1631; CHECK: # %bb.0:1632; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1633; CHECK-NEXT: vfsub.vf v8, v8, fa0, v0.t1634; CHECK-NEXT: ret1635 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 01636 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer1637 %v = call <vscale x 4 x double> @llvm.vp.fsub.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x i1> %m, i32 %evl)1638 ret <vscale x 4 x double> %v1639}1640 1641define <vscale x 4 x double> @vfsub_vf_nxv4f64_unmasked(<vscale x 4 x double> %va, double %b, i32 zeroext %evl) {1642; CHECK-LABEL: vfsub_vf_nxv4f64_unmasked:1643; CHECK: # %bb.0:1644; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1645; CHECK-NEXT: vfsub.vf v8, v8, fa01646; CHECK-NEXT: ret1647 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 01648 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer1649 %v = call <vscale x 4 x double> @llvm.vp.fsub.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)1650 ret <vscale x 4 x double> %v1651}1652 1653define <vscale x 7 x double> @vfsub_vv_nxv7f64(<vscale x 7 x double> %va, <vscale x 7 x double> %b, <vscale x 7 x i1> %m, i32 zeroext %evl) {1654; CHECK-LABEL: vfsub_vv_nxv7f64:1655; CHECK: # %bb.0:1656; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1657; CHECK-NEXT: vfsub.vv v8, v8, v16, v0.t1658; CHECK-NEXT: ret1659 %v = call <vscale x 7 x double> @llvm.vp.fsub.nxv7f64(<vscale x 7 x double> %va, <vscale x 7 x double> %b, <vscale x 7 x i1> %m, i32 %evl)1660 ret <vscale x 7 x double> %v1661}1662 1663define <vscale x 8 x double> @vfsub_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1664; CHECK-LABEL: vfsub_vv_nxv8f64:1665; CHECK: # %bb.0:1666; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1667; CHECK-NEXT: vfsub.vv v8, v8, v16, v0.t1668; CHECK-NEXT: ret1669 %v = call <vscale x 8 x double> @llvm.vp.fsub.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x i1> %m, i32 %evl)1670 ret <vscale x 8 x double> %v1671}1672 1673define <vscale x 8 x double> @vfsub_vv_nxv8f64_unmasked(<vscale x 8 x double> %va, <vscale x 8 x double> %b, i32 zeroext %evl) {1674; CHECK-LABEL: vfsub_vv_nxv8f64_unmasked:1675; CHECK: # %bb.0:1676; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1677; CHECK-NEXT: vfsub.vv v8, v8, v161678; CHECK-NEXT: ret1679 %v = call <vscale x 8 x double> @llvm.vp.fsub.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)1680 ret <vscale x 8 x double> %v1681}1682 1683define <vscale x 8 x double> @vfsub_vf_nxv8f64(<vscale x 8 x double> %va, double %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1684; CHECK-LABEL: vfsub_vf_nxv8f64:1685; CHECK: # %bb.0:1686; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1687; CHECK-NEXT: vfsub.vf v8, v8, fa0, v0.t1688; CHECK-NEXT: ret1689 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 01690 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer1691 %v = call <vscale x 8 x double> @llvm.vp.fsub.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x i1> %m, i32 %evl)1692 ret <vscale x 8 x double> %v1693}1694 1695define <vscale x 8 x double> @vfsub_vf_nxv8f64_unmasked(<vscale x 8 x double> %va, double %b, i32 zeroext %evl) {1696; CHECK-LABEL: vfsub_vf_nxv8f64_unmasked:1697; CHECK: # %bb.0:1698; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1699; CHECK-NEXT: vfsub.vf v8, v8, fa01700; CHECK-NEXT: ret1701 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 01702 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer1703 %v = call <vscale x 8 x double> @llvm.vp.fsub.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)1704 ret <vscale x 8 x double> %v1705}1706