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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=riscv64 -mattr=+v,+zvfh,+zvfbfmin | FileCheck %s --check-prefixes=CHECK,ZVFH3; RUN: llc < %s -mtriple=riscv64 -mattr=+v,+zvfhmin,+zvfbfmin | FileCheck %s --check-prefixes=CHECK,ZVFHMIN4 5define <vscale x 2 x float> @vfwadd_same_operand_nxv2bf16(<vscale x 2 x bfloat> %arg, i32 signext %vl) {6; CHECK-LABEL: vfwadd_same_operand_nxv2bf16:7; CHECK: # %bb.0: # %bb8; CHECK-NEXT: slli a0, a0, 329; CHECK-NEXT: srli a0, a0, 3210; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma11; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v812; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma13; CHECK-NEXT: vfadd.vv v8, v9, v914; CHECK-NEXT: ret15bb:16 %tmp = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2bf16(<vscale x 2 x bfloat> %arg, <vscale x 2 x i1> splat (i1 true), i32 %vl)17 %tmp2 = call <vscale x 2 x float> @llvm.vp.fadd.nxv2f32(<vscale x 2 x float> %tmp, <vscale x 2 x float> %tmp, <vscale x 2 x i1> splat (i1 true), i32 %vl)18 ret <vscale x 2 x float> %tmp219}20 21; Make sure we don't widen vfmadd.vv -> vfwmaccvbf16.vv if there's other22; unwidenable uses23define <vscale x 2 x float> @vfwadd_same_operand_nxv2bf16_multiuse(<vscale x 2 x bfloat> %arg, <vscale x 2 x float> %acc, i32 signext %vl, ptr %p) {24; CHECK-LABEL: vfwadd_same_operand_nxv2bf16_multiuse:25; CHECK: # %bb.0: # %bb26; CHECK-NEXT: slli a0, a0, 3227; CHECK-NEXT: srli a0, a0, 3228; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma29; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v830; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma31; CHECK-NEXT: vfadd.vv v8, v10, v1032; CHECK-NEXT: vfmadd.vv v10, v10, v933; CHECK-NEXT: vs1r.v v10, (a1)34; CHECK-NEXT: ret35bb:36 %tmp = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2bf16(<vscale x 2 x bfloat> %arg, <vscale x 2 x i1> splat (i1 true), i32 %vl)37 %tmp2 = call <vscale x 2 x float> @llvm.vp.fadd.nxv2f32(<vscale x 2 x float> %tmp, <vscale x 2 x float> %tmp, <vscale x 2 x i1> splat (i1 true), i32 %vl)38 %tmp3 = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %tmp, <vscale x 2 x float> %tmp, <vscale x 2 x float> %acc, <vscale x 2 x i1> splat (i1 true), i32 %vl)39 store <vscale x 2 x float> %tmp3, ptr %p40 ret <vscale x 2 x float> %tmp241}42 43define <vscale x 2 x float> @vfwadd_same_operand(<vscale x 2 x half> %arg, i32 signext %vl) {44; ZVFH-LABEL: vfwadd_same_operand:45; ZVFH: # %bb.0: # %bb46; ZVFH-NEXT: slli a0, a0, 3247; ZVFH-NEXT: srli a0, a0, 3248; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma49; ZVFH-NEXT: vfwadd.vv v9, v8, v850; ZVFH-NEXT: vmv1r.v v8, v951; ZVFH-NEXT: ret52;53; ZVFHMIN-LABEL: vfwadd_same_operand:54; ZVFHMIN: # %bb.0: # %bb55; ZVFHMIN-NEXT: slli a0, a0, 3256; ZVFHMIN-NEXT: srli a0, a0, 3257; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma58; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v859; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma60; ZVFHMIN-NEXT: vfadd.vv v8, v9, v961; ZVFHMIN-NEXT: ret62bb:63 %tmp = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %arg, <vscale x 2 x i1> splat (i1 true), i32 %vl)64 %tmp2 = call <vscale x 2 x float> @llvm.vp.fadd.nxv2f32(<vscale x 2 x float> %tmp, <vscale x 2 x float> %tmp, <vscale x 2 x i1> splat (i1 true), i32 %vl)65 ret <vscale x 2 x float> %tmp266}67 68define <vscale x 2 x float> @vfwadd_tu(<vscale x 2 x half> %arg, <vscale x 2 x float> %arg1, i32 signext %arg2) {69; ZVFH-LABEL: vfwadd_tu:70; ZVFH: # %bb.0: # %bb71; ZVFH-NEXT: slli a0, a0, 3272; ZVFH-NEXT: srli a0, a0, 3273; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, tu, ma74; ZVFH-NEXT: vfwadd.wv v9, v9, v875; ZVFH-NEXT: vmv1r.v v8, v976; ZVFH-NEXT: ret77;78; ZVFHMIN-LABEL: vfwadd_tu:79; ZVFHMIN: # %bb.0: # %bb80; ZVFHMIN-NEXT: slli a0, a0, 3281; ZVFHMIN-NEXT: srli a0, a0, 3282; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma83; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v884; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, tu, ma85; ZVFHMIN-NEXT: vfadd.vv v9, v9, v1086; ZVFHMIN-NEXT: vmv1r.v v8, v987; ZVFHMIN-NEXT: ret88bb:89 %tmp = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %arg, <vscale x 2 x i1> splat (i1 true), i32 %arg2)90 %tmp3 = call <vscale x 2 x float> @llvm.vp.fadd.nxv2f32(<vscale x 2 x float> %arg1, <vscale x 2 x float> %tmp, <vscale x 2 x i1> splat (i1 true), i32 %arg2)91 %tmp4 = call <vscale x 2 x float> @llvm.vp.merge.nxv2f32(<vscale x 2 x i1> splat (i1 true), <vscale x 2 x float> %tmp3, <vscale x 2 x float> %arg1, i32 %arg2)92 ret <vscale x 2 x float> %tmp493}94 95