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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d \3; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH4; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=lp64d \5; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH6; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=ilp32d \7; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN8; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=lp64d \9; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN10 11define <vscale x 1 x float> @vfmacc_vv_nxv1f32(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {12; ZVFH-LABEL: vfmacc_vv_nxv1f32:13; ZVFH:       # %bb.0:14; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma15; ZVFH-NEXT:    vfwmacc.vv v10, v8, v9, v0.t16; ZVFH-NEXT:    vmv1r.v v8, v1017; ZVFH-NEXT:    ret18;19; ZVFHMIN-LABEL: vfmacc_vv_nxv1f32:20; ZVFHMIN:       # %bb.0:21; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma22; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t23; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t24; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma25; ZVFHMIN-NEXT:    vfmadd.vv v8, v11, v10, v0.t26; ZVFHMIN-NEXT:    ret27  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)28  %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)29  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x float> %bext, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)30  ret <vscale x 1 x float> %v31}32 33define <vscale x 1 x float> @vfmacc_vv_nxv1f32_unmasked(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {34; ZVFH-LABEL: vfmacc_vv_nxv1f32_unmasked:35; ZVFH:       # %bb.0:36; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma37; ZVFH-NEXT:    vfwmacc.vv v10, v8, v938; ZVFH-NEXT:    vmv1r.v v8, v1039; ZVFH-NEXT:    ret40;41; ZVFHMIN-LABEL: vfmacc_vv_nxv1f32_unmasked:42; ZVFHMIN:       # %bb.0:43; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma44; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v845; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v946; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma47; ZVFHMIN-NEXT:    vfmadd.vv v8, v11, v1048; ZVFHMIN-NEXT:    ret49  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)50  %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)51  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x float> %bext, <vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)52  ret <vscale x 1 x float> %v53}54 55define <vscale x 1 x float> @vfmacc_vv_nxv1f32_tu(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {56; ZVFH-LABEL: vfmacc_vv_nxv1f32_tu:57; ZVFH:       # %bb.0:58; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, tu, mu59; ZVFH-NEXT:    vfwmacc.vv v10, v8, v9, v0.t60; ZVFH-NEXT:    vmv1r.v v8, v1061; ZVFH-NEXT:    ret62;63; ZVFHMIN-LABEL: vfmacc_vv_nxv1f32_tu:64; ZVFHMIN:       # %bb.0:65; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma66; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v867; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v968; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, tu, mu69; ZVFHMIN-NEXT:    vfmacc.vv v10, v11, v8, v0.t70; ZVFHMIN-NEXT:    vmv1r.v v8, v1071; ZVFHMIN-NEXT:    ret72  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)73  %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)74  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x float> %bext, <vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)75  %u = call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> %m, <vscale x 1 x float> %v, <vscale x 1 x float> %c, i32 %evl)76  ret <vscale x 1 x float> %u77}78 79; FIXME: Support this case?80define <vscale x 1 x float> @vfmacc_vv_nxv1f32_masked__tu(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {81; ZVFH-LABEL: vfmacc_vv_nxv1f32_masked__tu:82; ZVFH:       # %bb.0:83; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, tu, mu84; ZVFH-NEXT:    vfwmacc.vv v10, v8, v9, v0.t85; ZVFH-NEXT:    vmv1r.v v8, v1086; ZVFH-NEXT:    ret87;88; ZVFHMIN-LABEL: vfmacc_vv_nxv1f32_masked__tu:89; ZVFHMIN:       # %bb.0:90; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma91; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t92; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t93; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma94; ZVFHMIN-NEXT:    vfmadd.vv v8, v11, v10, v0.t95; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, tu, ma96; ZVFHMIN-NEXT:    vmerge.vvm v10, v10, v8, v097; ZVFHMIN-NEXT:    vmv1r.v v8, v1098; ZVFHMIN-NEXT:    ret99  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)100  %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)101  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x float> %bext, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)102  %u = call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> %m, <vscale x 1 x float> %v, <vscale x 1 x float> %c, i32 %evl)103  ret <vscale x 1 x float> %u104}105 106define <vscale x 1 x float> @vfmacc_vv_nxv1f32_unmasked_tu(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {107; ZVFH-LABEL: vfmacc_vv_nxv1f32_unmasked_tu:108; ZVFH:       # %bb.0:109; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, tu, ma110; ZVFH-NEXT:    vfwmacc.vv v10, v8, v9111; ZVFH-NEXT:    vmv1r.v v8, v10112; ZVFH-NEXT:    ret113;114; ZVFHMIN-LABEL: vfmacc_vv_nxv1f32_unmasked_tu:115; ZVFHMIN:       # %bb.0:116; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma117; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8118; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9119; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, tu, ma120; ZVFHMIN-NEXT:    vfmacc.vv v10, v11, v8121; ZVFHMIN-NEXT:    vmv1r.v v8, v10122; ZVFHMIN-NEXT:    ret123  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)124  %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)125  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x float> %bext, <vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)126  %u = call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x float> %v, <vscale x 1 x float> %c, i32 %evl)127  ret <vscale x 1 x float> %u128}129 130define <vscale x 1 x float> @vfmacc_vf_nxv1f32(<vscale x 1 x half> %va, half %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {131; ZVFH-LABEL: vfmacc_vf_nxv1f32:132; ZVFH:       # %bb.0:133; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma134; ZVFH-NEXT:    vfwmacc.vf v9, fa0, v8, v0.t135; ZVFH-NEXT:    vmv1r.v v8, v9136; ZVFH-NEXT:    ret137;138; ZVFHMIN-LABEL: vfmacc_vf_nxv1f32:139; ZVFHMIN:       # %bb.0:140; ZVFHMIN-NEXT:    fmv.x.h a1, fa0141; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma142; ZVFHMIN-NEXT:    vmv.v.x v10, a1143; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t144; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10, v0.t145; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma146; ZVFHMIN-NEXT:    vfmadd.vv v8, v11, v9, v0.t147; ZVFHMIN-NEXT:    ret148  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0149  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer150  %vaext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> %m, i32 %evl)151  %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)152  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vaext, <vscale x 1 x float> %vbext, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)153  ret <vscale x 1 x float> %v154}155 156define <vscale x 1 x float> @vfmacc_vf_nxv1f32_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {157; ZVFH-LABEL: vfmacc_vf_nxv1f32_commute:158; ZVFH:       # %bb.0:159; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma160; ZVFH-NEXT:    vfwmacc.vf v9, fa0, v8, v0.t161; ZVFH-NEXT:    vmv1r.v v8, v9162; ZVFH-NEXT:    ret163;164; ZVFHMIN-LABEL: vfmacc_vf_nxv1f32_commute:165; ZVFHMIN:       # %bb.0:166; ZVFHMIN-NEXT:    fmv.x.h a1, fa0167; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma168; ZVFHMIN-NEXT:    vmv.v.x v11, a1169; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t170; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v11, v0.t171; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma172; ZVFHMIN-NEXT:    vfmadd.vv v10, v8, v9, v0.t173; ZVFHMIN-NEXT:    vmv1r.v v8, v10174; ZVFHMIN-NEXT:    ret175  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0176  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer177  %vaext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> %m, i32 %evl)178  %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)179  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vbext, <vscale x 1 x float> %vaext, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)180  ret <vscale x 1 x float> %v181}182 183define <vscale x 1 x float> @vfmacc_vf_nxv1f32_unmasked(<vscale x 1 x half> %va, half %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {184; ZVFH-LABEL: vfmacc_vf_nxv1f32_unmasked:185; ZVFH:       # %bb.0:186; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma187; ZVFH-NEXT:    vfwmacc.vf v9, fa0, v8188; ZVFH-NEXT:    vmv1r.v v8, v9189; ZVFH-NEXT:    ret190;191; ZVFHMIN-LABEL: vfmacc_vf_nxv1f32_unmasked:192; ZVFHMIN:       # %bb.0:193; ZVFHMIN-NEXT:    fmv.x.h a1, fa0194; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma195; ZVFHMIN-NEXT:    vmv.v.x v10, a1196; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8197; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10198; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma199; ZVFHMIN-NEXT:    vfmadd.vv v8, v11, v9200; ZVFHMIN-NEXT:    ret201  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0202  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer203  %vaext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> splat (i1 -1), i32 %evl)204  %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)205  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vaext, <vscale x 1 x float> %vbext, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)206  ret <vscale x 1 x float> %v207}208 209define <vscale x 1 x float> @vfmacc_vf_nxv1f32_tu(<vscale x 1 x half> %va, half %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {210; ZVFH-LABEL: vfmacc_vf_nxv1f32_tu:211; ZVFH:       # %bb.0:212; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, tu, mu213; ZVFH-NEXT:    vfwmacc.vf v9, fa0, v8, v0.t214; ZVFH-NEXT:    vmv1r.v v8, v9215; ZVFH-NEXT:    ret216;217; ZVFHMIN-LABEL: vfmacc_vf_nxv1f32_tu:218; ZVFHMIN:       # %bb.0:219; ZVFHMIN-NEXT:    fmv.x.h a1, fa0220; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma221; ZVFHMIN-NEXT:    vmv.v.x v10, a1222; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8223; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10224; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, tu, mu225; ZVFHMIN-NEXT:    vfmacc.vv v9, v11, v8, v0.t226; ZVFHMIN-NEXT:    vmv1r.v v8, v9227; ZVFHMIN-NEXT:    ret228  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0229  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer230  %vaext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> splat (i1 -1), i32 %evl)231  %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)232  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vaext, <vscale x 1 x float> %vbext, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)233  %u = call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> %m, <vscale x 1 x float> %v, <vscale x 1 x float> %vc, i32 %evl)234  ret <vscale x 1 x float> %u235}236 237define <vscale x 1 x float> @vfmacc_vf_nxv1f32_commute_tu(<vscale x 1 x half> %va, half %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {238; ZVFH-LABEL: vfmacc_vf_nxv1f32_commute_tu:239; ZVFH:       # %bb.0:240; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, tu, mu241; ZVFH-NEXT:    vfwmacc.vf v9, fa0, v8, v0.t242; ZVFH-NEXT:    vmv1r.v v8, v9243; ZVFH-NEXT:    ret244;245; ZVFHMIN-LABEL: vfmacc_vf_nxv1f32_commute_tu:246; ZVFHMIN:       # %bb.0:247; ZVFHMIN-NEXT:    fmv.x.h a1, fa0248; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma249; ZVFHMIN-NEXT:    vmv.v.x v10, a1250; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8251; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10252; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, tu, mu253; ZVFHMIN-NEXT:    vfmacc.vv v9, v8, v11, v0.t254; ZVFHMIN-NEXT:    vmv1r.v v8, v9255; ZVFHMIN-NEXT:    ret256  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0257  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer258  %vaext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> splat (i1 -1), i32 %evl)259  %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)260  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vbext, <vscale x 1 x float> %vaext, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)261  %u = call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> %m, <vscale x 1 x float> %v, <vscale x 1 x float> %vc, i32 %evl)262  ret <vscale x 1 x float> %u263}264 265define <vscale x 1 x float> @vfmacc_vf_nxv1f32_unmasked_tu(<vscale x 1 x half> %va, half %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {266; ZVFH-LABEL: vfmacc_vf_nxv1f32_unmasked_tu:267; ZVFH:       # %bb.0:268; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, tu, ma269; ZVFH-NEXT:    vfwmacc.vf v9, fa0, v8270; ZVFH-NEXT:    vmv1r.v v8, v9271; ZVFH-NEXT:    ret272;273; ZVFHMIN-LABEL: vfmacc_vf_nxv1f32_unmasked_tu:274; ZVFHMIN:       # %bb.0:275; ZVFHMIN-NEXT:    fmv.x.h a1, fa0276; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma277; ZVFHMIN-NEXT:    vmv.v.x v10, a1278; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8279; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10280; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, tu, ma281; ZVFHMIN-NEXT:    vfmacc.vv v9, v11, v8282; ZVFHMIN-NEXT:    vmv1r.v v8, v9283; ZVFHMIN-NEXT:    ret284  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0285  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer286  %vaext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> splat (i1 -1), i32 %evl)287  %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)288  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vaext, <vscale x 1 x float> %vbext, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)289  %u = call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x float> %v, <vscale x 1 x float> %vc, i32 %evl)290  ret <vscale x 1 x float> %u291}292 293define <vscale x 2 x float> @vfmacc_vv_nxv2f32(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {294; ZVFH-LABEL: vfmacc_vv_nxv2f32:295; ZVFH:       # %bb.0:296; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma297; ZVFH-NEXT:    vfwmacc.vv v10, v8, v9, v0.t298; ZVFH-NEXT:    vmv1r.v v8, v10299; ZVFH-NEXT:    ret300;301; ZVFHMIN-LABEL: vfmacc_vv_nxv2f32:302; ZVFHMIN:       # %bb.0:303; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma304; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t305; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t306; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma307; ZVFHMIN-NEXT:    vfmadd.vv v8, v11, v10, v0.t308; ZVFHMIN-NEXT:    ret309  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)310  %bext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)311  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x float> %bext, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)312  ret <vscale x 2 x float> %v313}314 315define <vscale x 2 x float> @vfmacc_vv_nxv2f32_unmasked(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {316; ZVFH-LABEL: vfmacc_vv_nxv2f32_unmasked:317; ZVFH:       # %bb.0:318; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma319; ZVFH-NEXT:    vfwmacc.vv v10, v8, v9320; ZVFH-NEXT:    vmv1r.v v8, v10321; ZVFH-NEXT:    ret322;323; ZVFHMIN-LABEL: vfmacc_vv_nxv2f32_unmasked:324; ZVFHMIN:       # %bb.0:325; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma326; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8327; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9328; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma329; ZVFHMIN-NEXT:    vfmadd.vv v8, v11, v10330; ZVFHMIN-NEXT:    ret331  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)332  %bext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)333  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x float> %bext, <vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)334  ret <vscale x 2 x float> %v335}336 337define <vscale x 2 x float> @vfmacc_vf_nxv2f32(<vscale x 2 x half> %va, half %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {338; ZVFH-LABEL: vfmacc_vf_nxv2f32:339; ZVFH:       # %bb.0:340; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma341; ZVFH-NEXT:    vfwmacc.vf v9, fa0, v8, v0.t342; ZVFH-NEXT:    vmv1r.v v8, v9343; ZVFH-NEXT:    ret344;345; ZVFHMIN-LABEL: vfmacc_vf_nxv2f32:346; ZVFHMIN:       # %bb.0:347; ZVFHMIN-NEXT:    fmv.x.h a1, fa0348; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma349; ZVFHMIN-NEXT:    vmv.v.x v10, a1350; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t351; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10, v0.t352; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma353; ZVFHMIN-NEXT:    vfmadd.vv v8, v11, v9, v0.t354; ZVFHMIN-NEXT:    ret355  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0356  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer357  %vaext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)358  %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)359  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vaext, <vscale x 2 x float> %vbext, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)360  ret <vscale x 2 x float> %v361}362 363define <vscale x 2 x float> @vfmacc_vf_nxv2f32_unmasked(<vscale x 2 x half> %va, half %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {364; ZVFH-LABEL: vfmacc_vf_nxv2f32_unmasked:365; ZVFH:       # %bb.0:366; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma367; ZVFH-NEXT:    vfwmacc.vf v9, fa0, v8368; ZVFH-NEXT:    vmv1r.v v8, v9369; ZVFH-NEXT:    ret370;371; ZVFHMIN-LABEL: vfmacc_vf_nxv2f32_unmasked:372; ZVFHMIN:       # %bb.0:373; ZVFHMIN-NEXT:    fmv.x.h a1, fa0374; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma375; ZVFHMIN-NEXT:    vmv.v.x v10, a1376; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8377; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10378; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma379; ZVFHMIN-NEXT:    vfmadd.vv v8, v11, v9380; ZVFHMIN-NEXT:    ret381  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0382  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer383  %vaext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 -1), i32 %evl)384  %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)385  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vaext, <vscale x 2 x float> %vbext, <vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 -1), i32 %evl)386  ret <vscale x 2 x float> %v387}388 389define <vscale x 4 x float> @vfmacc_vv_nxv4f32(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {390; ZVFH-LABEL: vfmacc_vv_nxv4f32:391; ZVFH:       # %bb.0:392; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma393; ZVFH-NEXT:    vfwmacc.vv v10, v8, v9, v0.t394; ZVFH-NEXT:    vmv2r.v v8, v10395; ZVFH-NEXT:    ret396;397; ZVFHMIN-LABEL: vfmacc_vv_nxv4f32:398; ZVFHMIN:       # %bb.0:399; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma400; ZVFHMIN-NEXT:    vmv1r.v v12, v9401; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t402; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v12, v0.t403; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma404; ZVFHMIN-NEXT:    vfmadd.vv v8, v14, v10, v0.t405; ZVFHMIN-NEXT:    ret406  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)407  %bext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)408  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x float> %bext, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)409  ret <vscale x 4 x float> %v410}411 412define <vscale x 4 x float> @vfmacc_vv_nxv4f32_unmasked(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {413; ZVFH-LABEL: vfmacc_vv_nxv4f32_unmasked:414; ZVFH:       # %bb.0:415; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma416; ZVFH-NEXT:    vfwmacc.vv v10, v8, v9417; ZVFH-NEXT:    vmv2r.v v8, v10418; ZVFH-NEXT:    ret419;420; ZVFHMIN-LABEL: vfmacc_vv_nxv4f32_unmasked:421; ZVFHMIN:       # %bb.0:422; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma423; ZVFHMIN-NEXT:    vmv1r.v v12, v9424; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8425; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v12426; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma427; ZVFHMIN-NEXT:    vfmadd.vv v8, v14, v10428; ZVFHMIN-NEXT:    ret429  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)430  %bext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)431  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x float> %bext, <vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)432  ret <vscale x 4 x float> %v433}434 435define <vscale x 4 x float> @vfmacc_vf_nxv4f32(<vscale x 4 x half> %va, half %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {436; ZVFH-LABEL: vfmacc_vf_nxv4f32:437; ZVFH:       # %bb.0:438; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma439; ZVFH-NEXT:    vfwmacc.vf v10, fa0, v8, v0.t440; ZVFH-NEXT:    vmv2r.v v8, v10441; ZVFH-NEXT:    ret442;443; ZVFHMIN-LABEL: vfmacc_vf_nxv4f32:444; ZVFHMIN:       # %bb.0:445; ZVFHMIN-NEXT:    fmv.x.h a1, fa0446; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma447; ZVFHMIN-NEXT:    vmv.v.x v14, a1448; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t449; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v14, v0.t450; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma451; ZVFHMIN-NEXT:    vfmadd.vv v8, v12, v10, v0.t452; ZVFHMIN-NEXT:    ret453  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0454  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer455  %vaext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> %m, i32 %evl)456  %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)457  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vaext, <vscale x 4 x float> %vbext, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)458  ret <vscale x 4 x float> %v459}460 461define <vscale x 4 x float> @vfmacc_vf_nxv4f32_unmasked(<vscale x 4 x half> %va, half %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {462; ZVFH-LABEL: vfmacc_vf_nxv4f32_unmasked:463; ZVFH:       # %bb.0:464; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma465; ZVFH-NEXT:    vfwmacc.vf v10, fa0, v8466; ZVFH-NEXT:    vmv2r.v v8, v10467; ZVFH-NEXT:    ret468;469; ZVFHMIN-LABEL: vfmacc_vf_nxv4f32_unmasked:470; ZVFHMIN:       # %bb.0:471; ZVFHMIN-NEXT:    fmv.x.h a1, fa0472; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma473; ZVFHMIN-NEXT:    vmv.v.x v14, a1474; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8475; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v14476; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma477; ZVFHMIN-NEXT:    vfmadd.vv v8, v12, v10478; ZVFHMIN-NEXT:    ret479  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0480  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer481  %vaext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> splat (i1 -1), i32 %evl)482  %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)483  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vaext, <vscale x 4 x float> %vbext, <vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 -1), i32 %evl)484  ret <vscale x 4 x float> %v485}486 487define <vscale x 8 x float> @vfmacc_vv_nxv8f32(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {488; ZVFH-LABEL: vfmacc_vv_nxv8f32:489; ZVFH:       # %bb.0:490; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma491; ZVFH-NEXT:    vfwmacc.vv v12, v8, v10, v0.t492; ZVFH-NEXT:    vmv4r.v v8, v12493; ZVFH-NEXT:    ret494;495; ZVFHMIN-LABEL: vfmacc_vv_nxv8f32:496; ZVFHMIN:       # %bb.0:497; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma498; ZVFHMIN-NEXT:    vmv2r.v v16, v10499; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t500; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16, v0.t501; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma502; ZVFHMIN-NEXT:    vfmadd.vv v8, v20, v12, v0.t503; ZVFHMIN-NEXT:    ret504  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)505  %bext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)506  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x float> %bext, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)507  ret <vscale x 8 x float> %v508}509 510define <vscale x 8 x float> @vfmacc_vv_nxv8f32_unmasked(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {511; ZVFH-LABEL: vfmacc_vv_nxv8f32_unmasked:512; ZVFH:       # %bb.0:513; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma514; ZVFH-NEXT:    vfwmacc.vv v12, v8, v10515; ZVFH-NEXT:    vmv4r.v v8, v12516; ZVFH-NEXT:    ret517;518; ZVFHMIN-LABEL: vfmacc_vv_nxv8f32_unmasked:519; ZVFHMIN:       # %bb.0:520; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma521; ZVFHMIN-NEXT:    vmv2r.v v16, v10522; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8523; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16524; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma525; ZVFHMIN-NEXT:    vfmadd.vv v8, v20, v12526; ZVFHMIN-NEXT:    ret527  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)528  %bext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)529  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x float> %bext, <vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)530  ret <vscale x 8 x float> %v531}532 533define <vscale x 8 x float> @vfmacc_vf_nxv8f32(<vscale x 8 x half> %va, half %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {534; ZVFH-LABEL: vfmacc_vf_nxv8f32:535; ZVFH:       # %bb.0:536; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma537; ZVFH-NEXT:    vfwmacc.vf v12, fa0, v8, v0.t538; ZVFH-NEXT:    vmv4r.v v8, v12539; ZVFH-NEXT:    ret540;541; ZVFHMIN-LABEL: vfmacc_vf_nxv8f32:542; ZVFHMIN:       # %bb.0:543; ZVFHMIN-NEXT:    fmv.x.h a1, fa0544; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma545; ZVFHMIN-NEXT:    vmv.v.x v20, a1546; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t547; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t548; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma549; ZVFHMIN-NEXT:    vfmadd.vv v8, v16, v12, v0.t550; ZVFHMIN-NEXT:    ret551  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0552  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer553  %vaext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> %m, i32 %evl)554  %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)555  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vaext, <vscale x 8 x float> %vbext, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)556  ret <vscale x 8 x float> %v557}558 559define <vscale x 8 x float> @vfmacc_vf_nxv8f32_unmasked(<vscale x 8 x half> %va, half %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {560; ZVFH-LABEL: vfmacc_vf_nxv8f32_unmasked:561; ZVFH:       # %bb.0:562; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma563; ZVFH-NEXT:    vfwmacc.vf v12, fa0, v8564; ZVFH-NEXT:    vmv4r.v v8, v12565; ZVFH-NEXT:    ret566;567; ZVFHMIN-LABEL: vfmacc_vf_nxv8f32_unmasked:568; ZVFHMIN:       # %bb.0:569; ZVFHMIN-NEXT:    fmv.x.h a1, fa0570; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma571; ZVFHMIN-NEXT:    vmv.v.x v20, a1572; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8573; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20574; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma575; ZVFHMIN-NEXT:    vfmadd.vv v8, v16, v12576; ZVFHMIN-NEXT:    ret577  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0578  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer579  %vaext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> splat (i1 -1), i32 %evl)580  %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)581  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vaext, <vscale x 8 x float> %vbext, <vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 -1), i32 %evl)582  ret <vscale x 8 x float> %v583}584 585define <vscale x 16 x float> @vfmacc_vv_nxv16f32(<vscale x 16 x half> %a, <vscale x 16 x half> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {586; ZVFH-LABEL: vfmacc_vv_nxv16f32:587; ZVFH:       # %bb.0:588; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma589; ZVFH-NEXT:    vfwmacc.vv v16, v8, v12, v0.t590; ZVFH-NEXT:    vmv8r.v v8, v16591; ZVFH-NEXT:    ret592;593; ZVFHMIN-LABEL: vfmacc_vv_nxv16f32:594; ZVFHMIN:       # %bb.0:595; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma596; ZVFHMIN-NEXT:    vmv4r.v v4, v12597; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t598; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v4, v0.t599; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma600; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16, v0.t601; ZVFHMIN-NEXT:    ret602  %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> %m, i32 %evl)603  %bext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 %evl)604  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x float> %bext, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)605  ret <vscale x 16 x float> %v606}607 608define <vscale x 16 x float> @vfmacc_vv_nxv16f32_unmasked(<vscale x 16 x half> %a, <vscale x 16 x half> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {609; ZVFH-LABEL: vfmacc_vv_nxv16f32_unmasked:610; ZVFH:       # %bb.0:611; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma612; ZVFH-NEXT:    vfwmacc.vv v16, v8, v12613; ZVFH-NEXT:    vmv8r.v v8, v16614; ZVFH-NEXT:    ret615;616; ZVFHMIN-LABEL: vfmacc_vv_nxv16f32_unmasked:617; ZVFHMIN:       # %bb.0:618; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma619; ZVFHMIN-NEXT:    vmv4r.v v24, v12620; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8621; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24622; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma623; ZVFHMIN-NEXT:    vfmadd.vv v8, v0, v16624; ZVFHMIN-NEXT:    ret625  %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> splat (i1 -1), i32 %evl)626  %bext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)627  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x float> %bext, <vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)628  ret <vscale x 16 x float> %v629}630 631define <vscale x 16 x float> @vfmacc_vf_nxv16f32(<vscale x 16 x half> %va, half %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {632; ZVFH-LABEL: vfmacc_vf_nxv16f32:633; ZVFH:       # %bb.0:634; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma635; ZVFH-NEXT:    vfwmacc.vf v16, fa0, v8, v0.t636; ZVFH-NEXT:    vmv8r.v v8, v16637; ZVFH-NEXT:    ret638;639; ZVFHMIN-LABEL: vfmacc_vf_nxv16f32:640; ZVFHMIN:       # %bb.0:641; ZVFHMIN-NEXT:    fmv.x.h a1, fa0642; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma643; ZVFHMIN-NEXT:    vmv.v.x v4, a1644; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t645; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v4, v0.t646; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma647; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16, v0.t648; ZVFHMIN-NEXT:    ret649  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0650  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer651  %vaext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> %m, i32 %evl)652  %vbext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)653  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vaext, <vscale x 16 x float> %vbext, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)654  ret <vscale x 16 x float> %v655}656 657define <vscale x 16 x float> @vfmacc_vf_nxv16f32_unmasked(<vscale x 16 x half> %va, half %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {658; ZVFH-LABEL: vfmacc_vf_nxv16f32_unmasked:659; ZVFH:       # %bb.0:660; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma661; ZVFH-NEXT:    vfwmacc.vf v16, fa0, v8662; ZVFH-NEXT:    vmv8r.v v8, v16663; ZVFH-NEXT:    ret664;665; ZVFHMIN-LABEL: vfmacc_vf_nxv16f32_unmasked:666; ZVFHMIN:       # %bb.0:667; ZVFHMIN-NEXT:    fmv.x.h a1, fa0668; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma669; ZVFHMIN-NEXT:    vmv.v.x v4, a1670; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8671; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v4672; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma673; ZVFHMIN-NEXT:    vfmadd.vv v8, v24, v16674; ZVFHMIN-NEXT:    ret675  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0676  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer677  %vaext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> splat (i1 -1), i32 %evl)678  %vbext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)679  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vaext, <vscale x 16 x float> %vbext, <vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 -1), i32 %evl)680  ret <vscale x 16 x float> %v681}682 683define <vscale x 1 x double> @vfmacc_vv_nxv1f64(<vscale x 1 x float> %a, <vscale x 1 x float> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {684; CHECK-LABEL: vfmacc_vv_nxv1f64:685; CHECK:       # %bb.0:686; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma687; CHECK-NEXT:    vfwmacc.vv v10, v8, v9, v0.t688; CHECK-NEXT:    vmv1r.v v8, v10689; CHECK-NEXT:    ret690  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> %m, i32 %evl)691  %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 %evl)692  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x double> %bext, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)693  ret <vscale x 1 x double> %v694}695 696define <vscale x 1 x double> @vfmacc_vv_nxv1f64_unmasked(<vscale x 1 x float> %a, <vscale x 1 x float> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {697; CHECK-LABEL: vfmacc_vv_nxv1f64_unmasked:698; CHECK:       # %bb.0:699; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma700; CHECK-NEXT:    vfwmacc.vv v10, v8, v9701; CHECK-NEXT:    vmv1r.v v8, v10702; CHECK-NEXT:    ret703  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)704  %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)705  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x double> %bext, <vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)706  ret <vscale x 1 x double> %v707}708 709define <vscale x 1 x double> @vfmacc_vf_nxv1f64(<vscale x 1 x float> %va, float %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {710; CHECK-LABEL: vfmacc_vf_nxv1f64:711; CHECK:       # %bb.0:712; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma713; CHECK-NEXT:    vfwmacc.vf v9, fa0, v8, v0.t714; CHECK-NEXT:    vmv1r.v v8, v9715; CHECK-NEXT:    ret716  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0717  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer718  %vaext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> %m, i32 %evl)719  %vbext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)720  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vaext, <vscale x 1 x double> %vbext, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)721  ret <vscale x 1 x double> %v722}723 724define <vscale x 1 x double> @vfmacc_vf_nxv1f64_unmasked(<vscale x 1 x float> %va, float %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {725; CHECK-LABEL: vfmacc_vf_nxv1f64_unmasked:726; CHECK:       # %bb.0:727; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma728; CHECK-NEXT:    vfwmacc.vf v9, fa0, v8729; CHECK-NEXT:    vmv1r.v v8, v9730; CHECK-NEXT:    ret731  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0732  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer733  %vaext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> splat (i1 -1), i32 %evl)734  %vbext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)735  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vaext, <vscale x 1 x double> %vbext, <vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)736  ret <vscale x 1 x double> %v737}738 739define <vscale x 2 x double> @vfmacc_vv_nxv2f64(<vscale x 2 x float> %a, <vscale x 2 x float> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {740; CHECK-LABEL: vfmacc_vv_nxv2f64:741; CHECK:       # %bb.0:742; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma743; CHECK-NEXT:    vfwmacc.vv v10, v8, v9, v0.t744; CHECK-NEXT:    vmv2r.v v8, v10745; CHECK-NEXT:    ret746  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %evl)747  %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 %evl)748  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x double> %bext, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)749  ret <vscale x 2 x double> %v750}751 752define <vscale x 2 x double> @vfmacc_vv_nxv2f64_unmasked(<vscale x 2 x float> %a, <vscale x 2 x float> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {753; CHECK-LABEL: vfmacc_vv_nxv2f64_unmasked:754; CHECK:       # %bb.0:755; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma756; CHECK-NEXT:    vfwmacc.vv v10, v8, v9757; CHECK-NEXT:    vmv2r.v v8, v10758; CHECK-NEXT:    ret759  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)760  %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)761  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x double> %bext, <vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)762  ret <vscale x 2 x double> %v763}764 765define <vscale x 2 x double> @vfmacc_vf_nxv2f64(<vscale x 2 x float> %va, float %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {766; CHECK-LABEL: vfmacc_vf_nxv2f64:767; CHECK:       # %bb.0:768; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma769; CHECK-NEXT:    vfwmacc.vf v10, fa0, v8, v0.t770; CHECK-NEXT:    vmv2r.v v8, v10771; CHECK-NEXT:    ret772  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0773  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer774  %vaext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)775  %vbext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)776  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vaext, <vscale x 2 x double> %vbext, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)777  ret <vscale x 2 x double> %v778}779 780define <vscale x 2 x double> @vfmacc_vf_nxv2f64_unmasked(<vscale x 2 x float> %va, float %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {781; CHECK-LABEL: vfmacc_vf_nxv2f64_unmasked:782; CHECK:       # %bb.0:783; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma784; CHECK-NEXT:    vfwmacc.vf v10, fa0, v8785; CHECK-NEXT:    vmv2r.v v8, v10786; CHECK-NEXT:    ret787  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0788  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer789  %vaext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 -1), i32 %evl)790  %vbext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)791  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vaext, <vscale x 2 x double> %vbext, <vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 -1), i32 %evl)792  ret <vscale x 2 x double> %v793}794 795define <vscale x 4 x double> @vfmacc_vv_nxv4f64(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {796; CHECK-LABEL: vfmacc_vv_nxv4f64:797; CHECK:       # %bb.0:798; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma799; CHECK-NEXT:    vfwmacc.vv v12, v8, v10, v0.t800; CHECK-NEXT:    vmv4r.v v8, v12801; CHECK-NEXT:    ret802  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> %m, i32 %evl)803  %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 %evl)804  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x double> %bext, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)805  ret <vscale x 4 x double> %v806}807 808define <vscale x 4 x double> @vfmacc_vv_nxv4f64_unmasked(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {809; CHECK-LABEL: vfmacc_vv_nxv4f64_unmasked:810; CHECK:       # %bb.0:811; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma812; CHECK-NEXT:    vfwmacc.vv v12, v8, v10813; CHECK-NEXT:    vmv4r.v v8, v12814; CHECK-NEXT:    ret815  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)816  %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)817  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x double> %bext, <vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)818  ret <vscale x 4 x double> %v819}820 821define <vscale x 4 x double> @vfmacc_vf_nxv4f64(<vscale x 4 x float> %va, float %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {822; CHECK-LABEL: vfmacc_vf_nxv4f64:823; CHECK:       # %bb.0:824; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma825; CHECK-NEXT:    vfwmacc.vf v12, fa0, v8, v0.t826; CHECK-NEXT:    vmv4r.v v8, v12827; CHECK-NEXT:    ret828  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0829  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer830  %vaext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> %m, i32 %evl)831  %vbext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)832  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vaext, <vscale x 4 x double> %vbext, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)833  ret <vscale x 4 x double> %v834}835 836define <vscale x 4 x double> @vfmacc_vf_nxv4f64_unmasked(<vscale x 4 x float> %va, float %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {837; CHECK-LABEL: vfmacc_vf_nxv4f64_unmasked:838; CHECK:       # %bb.0:839; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma840; CHECK-NEXT:    vfwmacc.vf v12, fa0, v8841; CHECK-NEXT:    vmv4r.v v8, v12842; CHECK-NEXT:    ret843  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0844  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer845  %vaext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> splat (i1 -1), i32 %evl)846  %vbext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)847  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vaext, <vscale x 4 x double> %vbext, <vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 -1), i32 %evl)848  ret <vscale x 4 x double> %v849}850 851define <vscale x 8 x double> @vfmacc_vv_nxv8f64(<vscale x 8 x float> %a, <vscale x 8 x float> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {852; CHECK-LABEL: vfmacc_vv_nxv8f64:853; CHECK:       # %bb.0:854; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma855; CHECK-NEXT:    vfwmacc.vv v16, v8, v12, v0.t856; CHECK-NEXT:    vmv8r.v v8, v16857; CHECK-NEXT:    ret858  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> %m, i32 %evl)859  %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 %evl)860  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x double> %bext, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)861  ret <vscale x 8 x double> %v862}863 864define <vscale x 8 x double> @vfmacc_vv_nxv8f64_unmasked(<vscale x 8 x float> %a, <vscale x 8 x float> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {865; CHECK-LABEL: vfmacc_vv_nxv8f64_unmasked:866; CHECK:       # %bb.0:867; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma868; CHECK-NEXT:    vfwmacc.vv v16, v8, v12869; CHECK-NEXT:    vmv8r.v v8, v16870; CHECK-NEXT:    ret871  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)872  %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)873  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x double> %bext, <vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)874  ret <vscale x 8 x double> %v875}876 877define <vscale x 8 x double> @vfmacc_vf_nxv8f64(<vscale x 8 x float> %va, float %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {878; CHECK-LABEL: vfmacc_vf_nxv8f64:879; CHECK:       # %bb.0:880; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma881; CHECK-NEXT:    vfwmacc.vf v16, fa0, v8, v0.t882; CHECK-NEXT:    vmv8r.v v8, v16883; CHECK-NEXT:    ret884  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0885  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer886  %vaext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> %m, i32 %evl)887  %vbext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)888  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vaext, <vscale x 8 x double> %vbext, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)889  ret <vscale x 8 x double> %v890}891 892define <vscale x 8 x double> @vfmacc_vf_nxv8f64_unmasked(<vscale x 8 x float> %va, float %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {893; CHECK-LABEL: vfmacc_vf_nxv8f64_unmasked:894; CHECK:       # %bb.0:895; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma896; CHECK-NEXT:    vfwmacc.vf v16, fa0, v8897; CHECK-NEXT:    vmv8r.v v8, v16898; CHECK-NEXT:    ret899  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0900  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer901  %vaext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> splat (i1 -1), i32 %evl)902  %vbext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)903  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vaext, <vscale x 8 x double> %vbext, <vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 -1), i32 %evl)904  ret <vscale x 8 x double> %v905}906 907define <vscale x 1 x double> @vfmacc_vv_nxv1f64_nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {908; CHECK-LABEL: vfmacc_vv_nxv1f64_nxv1f16:909; CHECK:       # %bb.0:910; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma911; CHECK-NEXT:    vfwcvt.f.f.v v11, v8, v0.t912; CHECK-NEXT:    vfwcvt.f.f.v v8, v9, v0.t913; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma914; CHECK-NEXT:    vfwmacc.vv v10, v11, v8, v0.t915; CHECK-NEXT:    vmv1r.v v8, v10916; CHECK-NEXT:    ret917  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)918  %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)919  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x double> %bext, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)920  ret <vscale x 1 x double> %v921}922 923define <vscale x 1 x double> @vfmacc_vv_nxv1f64_nxv1f16_unmasked(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {924; CHECK-LABEL: vfmacc_vv_nxv1f64_nxv1f16_unmasked:925; CHECK:       # %bb.0:926; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma927; CHECK-NEXT:    vfwcvt.f.f.v v11, v8928; CHECK-NEXT:    vfwcvt.f.f.v v8, v9929; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma930; CHECK-NEXT:    vfwmacc.vv v10, v11, v8931; CHECK-NEXT:    vmv1r.v v8, v10932; CHECK-NEXT:    ret933  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)934  %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)935  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x double> %bext, <vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)936  ret <vscale x 1 x double> %v937}938 939define <vscale x 2 x double> @vfmacc_vv_nxv2f64_nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {940; CHECK-LABEL: vfmacc_vv_nxv2f64_nxv2f16:941; CHECK:       # %bb.0:942; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma943; CHECK-NEXT:    vfwcvt.f.f.v v12, v8, v0.t944; CHECK-NEXT:    vfwcvt.f.f.v v8, v9, v0.t945; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma946; CHECK-NEXT:    vfwmacc.vv v10, v12, v8, v0.t947; CHECK-NEXT:    vmv2r.v v8, v10948; CHECK-NEXT:    ret949  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)950  %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)951  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x double> %bext, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)952  ret <vscale x 2 x double> %v953}954 955define <vscale x 2 x double> @vfmacc_vv_nxv2f64_nxv2f16_unmasked(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {956; CHECK-LABEL: vfmacc_vv_nxv2f64_nxv2f16_unmasked:957; CHECK:       # %bb.0:958; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma959; CHECK-NEXT:    vfwcvt.f.f.v v12, v8960; CHECK-NEXT:    vfwcvt.f.f.v v8, v9961; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma962; CHECK-NEXT:    vfwmacc.vv v10, v12, v8963; CHECK-NEXT:    vmv2r.v v8, v10964; CHECK-NEXT:    ret965  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)966  %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)967  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x double> %bext, <vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)968  ret <vscale x 2 x double> %v969}970 971define <vscale x 4 x double> @vfmacc_vv_nxv4f64_nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {972; CHECK-LABEL: vfmacc_vv_nxv4f64_nxv4f16:973; CHECK:       # %bb.0:974; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma975; CHECK-NEXT:    vfwcvt.f.f.v v10, v8, v0.t976; CHECK-NEXT:    vfwcvt.f.f.v v16, v9, v0.t977; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, ma978; CHECK-NEXT:    vfwmacc.vv v12, v10, v16, v0.t979; CHECK-NEXT:    vmv4r.v v8, v12980; CHECK-NEXT:    ret981  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)982  %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)983  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x double> %bext, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)984  ret <vscale x 4 x double> %v985}986 987define <vscale x 4 x double> @vfmacc_vv_nxv4f64_nxv4f16_unmasked(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {988; CHECK-LABEL: vfmacc_vv_nxv4f64_nxv4f16_unmasked:989; CHECK:       # %bb.0:990; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma991; CHECK-NEXT:    vfwcvt.f.f.v v10, v8992; CHECK-NEXT:    vfwcvt.f.f.v v16, v9993; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, ma994; CHECK-NEXT:    vfwmacc.vv v12, v10, v16995; CHECK-NEXT:    vmv4r.v v8, v12996; CHECK-NEXT:    ret997  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)998  %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)999  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x double> %bext, <vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1000  ret <vscale x 4 x double> %v1001}1002 1003define <vscale x 8 x double> @vfmacc_vv_nxv8f64_nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {1004; CHECK-LABEL: vfmacc_vv_nxv8f64_nxv8f16:1005; CHECK:       # %bb.0:1006; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma1007; CHECK-NEXT:    vfwcvt.f.f.v v12, v8, v0.t1008; CHECK-NEXT:    vfwcvt.f.f.v v24, v10, v0.t1009; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1010; CHECK-NEXT:    vfwmacc.vv v16, v12, v24, v0.t1011; CHECK-NEXT:    vmv8r.v v8, v161012; CHECK-NEXT:    ret1013  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)1014  %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)1015  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x double> %bext, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)1016  ret <vscale x 8 x double> %v1017}1018 1019define <vscale x 8 x double> @vfmacc_vv_nxv8f64_nxv8f16_unmasked(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {1020; CHECK-LABEL: vfmacc_vv_nxv8f64_nxv8f16_unmasked:1021; CHECK:       # %bb.0:1022; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma1023; CHECK-NEXT:    vfwcvt.f.f.v v12, v81024; CHECK-NEXT:    vfwcvt.f.f.v v24, v101025; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1026; CHECK-NEXT:    vfwmacc.vv v16, v12, v241027; CHECK-NEXT:    vmv8r.v v8, v161028; CHECK-NEXT:    ret1029  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1030  %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1031  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x double> %bext, <vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1032  ret <vscale x 8 x double> %v1033}1034 1035define <vscale x 1 x float> @vfmacc_squared_nxv1f32(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {1036; ZVFH-LABEL: vfmacc_squared_nxv1f32:1037; ZVFH:       # %bb.0:1038; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma1039; ZVFH-NEXT:    vfwmacc.vv v10, v8, v8, v0.t1040; ZVFH-NEXT:    vmv1r.v v8, v101041; ZVFH-NEXT:    ret1042;1043; ZVFHMIN-LABEL: vfmacc_squared_nxv1f32:1044; ZVFHMIN:       # %bb.0:1045; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma1046; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8, v0.t1047; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma1048; ZVFHMIN-NEXT:    vfmadd.vv v9, v9, v10, v0.t1049; ZVFHMIN-NEXT:    vmv1r.v v8, v91050; ZVFHMIN-NEXT:    ret1051  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)1052  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x float> %aext, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)1053  ret <vscale x 1 x float> %v1054}1055 1056define <vscale x 1 x float> @vfmacc_squared_nxv1f32_unmasked(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {1057; ZVFH-LABEL: vfmacc_squared_nxv1f32_unmasked:1058; ZVFH:       # %bb.0:1059; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma1060; ZVFH-NEXT:    vfwmacc.vv v10, v8, v81061; ZVFH-NEXT:    vmv1r.v v8, v101062; ZVFH-NEXT:    ret1063;1064; ZVFHMIN-LABEL: vfmacc_squared_nxv1f32_unmasked:1065; ZVFHMIN:       # %bb.0:1066; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma1067; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v81068; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma1069; ZVFHMIN-NEXT:    vfmadd.vv v9, v9, v101070; ZVFHMIN-NEXT:    vmv1r.v v8, v91071; ZVFHMIN-NEXT:    ret1072  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1073  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x float> %aext, <vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1074  ret <vscale x 1 x float> %v1075}1076