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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v -target-abi=ilp32d \3; RUN: -verify-machineinstrs < %s | FileCheck %s4; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v -target-abi=lp64d \5; RUN: -verify-machineinstrs < %s | FileCheck %s6 7define <vscale x 1 x double> @vfwmul_vv_nxv1f64(<vscale x 1 x float> %va, <vscale x 1 x float> %vb) {8; CHECK-LABEL: vfwmul_vv_nxv1f64:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma11; CHECK-NEXT: vfwmul.vv v10, v8, v912; CHECK-NEXT: vmv1r.v v8, v1013; CHECK-NEXT: ret14 %vc = fpext <vscale x 1 x float> %va to <vscale x 1 x double>15 %vd = fpext <vscale x 1 x float> %vb to <vscale x 1 x double>16 %ve = fmul <vscale x 1 x double> %vc, %vd17 ret <vscale x 1 x double> %ve18}19 20define <vscale x 1 x double> @vfwmul_vf_nxv1f64(<vscale x 1 x float> %va, float %b) {21; CHECK-LABEL: vfwmul_vf_nxv1f64:22; CHECK: # %bb.0:23; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma24; CHECK-NEXT: vfwmul.vf v9, v8, fa025; CHECK-NEXT: vmv1r.v v8, v926; CHECK-NEXT: ret27 %head = insertelement <vscale x 1 x float> poison, float %b, i32 028 %splat = shufflevector <vscale x 1 x float> %head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer29 %vc = fpext <vscale x 1 x float> %va to <vscale x 1 x double>30 %vd = fpext <vscale x 1 x float> %splat to <vscale x 1 x double>31 %ve = fmul <vscale x 1 x double> %vc, %vd32 ret <vscale x 1 x double> %ve33}34 35define <vscale x 1 x double> @vfwmul_vf_nxv1f64_2(<vscale x 1 x float> %va, float %b) {36; CHECK-LABEL: vfwmul_vf_nxv1f64_2:37; CHECK: # %bb.0:38; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma39; CHECK-NEXT: vfwmul.vf v9, v8, fa040; CHECK-NEXT: vmv1r.v v8, v941; CHECK-NEXT: ret42 %fpext = fpext float %b to double43 %head = insertelement <vscale x 1 x double> poison, double %fpext, i32 044 %splat = shufflevector <vscale x 1 x double> %head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer45 %vc = fpext <vscale x 1 x float> %va to <vscale x 1 x double>46 %ve = fmul <vscale x 1 x double> %vc, %splat47 ret <vscale x 1 x double> %ve48}49 50define <vscale x 2 x double> @vfwmul_vv_nxv2f64(<vscale x 2 x float> %va, <vscale x 2 x float> %vb) {51; CHECK-LABEL: vfwmul_vv_nxv2f64:52; CHECK: # %bb.0:53; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma54; CHECK-NEXT: vmv1r.v v10, v955; CHECK-NEXT: vmv1r.v v11, v856; CHECK-NEXT: vfwmul.vv v8, v11, v1057; CHECK-NEXT: ret58 %vc = fpext <vscale x 2 x float> %va to <vscale x 2 x double>59 %vd = fpext <vscale x 2 x float> %vb to <vscale x 2 x double>60 %ve = fmul <vscale x 2 x double> %vc, %vd61 ret <vscale x 2 x double> %ve62}63 64define <vscale x 2 x double> @vfwmul_vf_nxv2f64(<vscale x 2 x float> %va, float %b) {65; CHECK-LABEL: vfwmul_vf_nxv2f64:66; CHECK: # %bb.0:67; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma68; CHECK-NEXT: vmv1r.v v10, v869; CHECK-NEXT: vfwmul.vf v8, v10, fa070; CHECK-NEXT: ret71 %head = insertelement <vscale x 2 x float> poison, float %b, i32 072 %splat = shufflevector <vscale x 2 x float> %head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer73 %vc = fpext <vscale x 2 x float> %va to <vscale x 2 x double>74 %vd = fpext <vscale x 2 x float> %splat to <vscale x 2 x double>75 %ve = fmul <vscale x 2 x double> %vc, %vd76 ret <vscale x 2 x double> %ve77}78 79define <vscale x 2 x double> @vfwmul_vf_nxv2f64_2(<vscale x 2 x float> %va, float %b) {80; CHECK-LABEL: vfwmul_vf_nxv2f64_2:81; CHECK: # %bb.0:82; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma83; CHECK-NEXT: vmv1r.v v10, v884; CHECK-NEXT: vfwmul.vf v8, v10, fa085; CHECK-NEXT: ret86 %fpext = fpext float %b to double87 %head = insertelement <vscale x 2 x double> poison, double %fpext, i32 088 %splat = shufflevector <vscale x 2 x double> %head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer89 %vc = fpext <vscale x 2 x float> %va to <vscale x 2 x double>90 %ve = fmul <vscale x 2 x double> %vc, %splat91 ret <vscale x 2 x double> %ve92}93 94define <vscale x 4 x double> @vfwmul_vv_nxv4f64(<vscale x 4 x float> %va, <vscale x 4 x float> %vb) {95; CHECK-LABEL: vfwmul_vv_nxv4f64:96; CHECK: # %bb.0:97; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma98; CHECK-NEXT: vmv2r.v v12, v1099; CHECK-NEXT: vmv2r.v v14, v8100; CHECK-NEXT: vfwmul.vv v8, v14, v12101; CHECK-NEXT: ret102 %vc = fpext <vscale x 4 x float> %va to <vscale x 4 x double>103 %vd = fpext <vscale x 4 x float> %vb to <vscale x 4 x double>104 %ve = fmul <vscale x 4 x double> %vc, %vd105 ret <vscale x 4 x double> %ve106}107 108define <vscale x 4 x double> @vfwmul_vf_nxv4f64(<vscale x 4 x float> %va, float %b) {109; CHECK-LABEL: vfwmul_vf_nxv4f64:110; CHECK: # %bb.0:111; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma112; CHECK-NEXT: vmv2r.v v12, v8113; CHECK-NEXT: vfwmul.vf v8, v12, fa0114; CHECK-NEXT: ret115 %head = insertelement <vscale x 4 x float> poison, float %b, i32 0116 %splat = shufflevector <vscale x 4 x float> %head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer117 %vc = fpext <vscale x 4 x float> %va to <vscale x 4 x double>118 %vd = fpext <vscale x 4 x float> %splat to <vscale x 4 x double>119 %ve = fmul <vscale x 4 x double> %vc, %vd120 ret <vscale x 4 x double> %ve121}122 123define <vscale x 4 x double> @vfwmul_vf_nxv4f64_2(<vscale x 4 x float> %va, float %b) {124; CHECK-LABEL: vfwmul_vf_nxv4f64_2:125; CHECK: # %bb.0:126; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma127; CHECK-NEXT: vmv2r.v v12, v8128; CHECK-NEXT: vfwmul.vf v8, v12, fa0129; CHECK-NEXT: ret130 %fpext = fpext float %b to double131 %head = insertelement <vscale x 4 x double> poison, double %fpext, i32 0132 %splat = shufflevector <vscale x 4 x double> %head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer133 %vc = fpext <vscale x 4 x float> %va to <vscale x 4 x double>134 %ve = fmul <vscale x 4 x double> %vc, %splat135 ret <vscale x 4 x double> %ve136}137 138define <vscale x 8 x double> @vfwmul_vv_nxv8f64(<vscale x 8 x float> %va, <vscale x 8 x float> %vb) {139; CHECK-LABEL: vfwmul_vv_nxv8f64:140; CHECK: # %bb.0:141; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma142; CHECK-NEXT: vmv4r.v v16, v12143; CHECK-NEXT: vmv4r.v v20, v8144; CHECK-NEXT: vfwmul.vv v8, v20, v16145; CHECK-NEXT: ret146 %vc = fpext <vscale x 8 x float> %va to <vscale x 8 x double>147 %vd = fpext <vscale x 8 x float> %vb to <vscale x 8 x double>148 %ve = fmul <vscale x 8 x double> %vc, %vd149 ret <vscale x 8 x double> %ve150}151 152define <vscale x 8 x double> @vfwmul_vf_nxv8f64(<vscale x 8 x float> %va, float %b) {153; CHECK-LABEL: vfwmul_vf_nxv8f64:154; CHECK: # %bb.0:155; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma156; CHECK-NEXT: vmv4r.v v16, v8157; CHECK-NEXT: vfwmul.vf v8, v16, fa0158; CHECK-NEXT: ret159 %head = insertelement <vscale x 8 x float> poison, float %b, i32 0160 %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer161 %vc = fpext <vscale x 8 x float> %va to <vscale x 8 x double>162 %vd = fpext <vscale x 8 x float> %splat to <vscale x 8 x double>163 %ve = fmul <vscale x 8 x double> %vc, %vd164 ret <vscale x 8 x double> %ve165}166 167define <vscale x 8 x double> @vfwmul_vf_nxv8f64_2(<vscale x 8 x float> %va, float %b) {168; CHECK-LABEL: vfwmul_vf_nxv8f64_2:169; CHECK: # %bb.0:170; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma171; CHECK-NEXT: vmv4r.v v16, v8172; CHECK-NEXT: vfwmul.vf v8, v16, fa0173; CHECK-NEXT: ret174 %fpext = fpext float %b to double175 %head = insertelement <vscale x 8 x double> poison, double %fpext, i32 0176 %splat = shufflevector <vscale x 8 x double> %head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer177 %vc = fpext <vscale x 8 x float> %va to <vscale x 8 x double>178 %ve = fmul <vscale x 8 x double> %vc, %splat179 ret <vscale x 8 x double> %ve180}181 182define <vscale x 1 x double> @vfwmul_vv_nxv1f64_same_op(<vscale x 1 x float> %va) {183; CHECK-LABEL: vfwmul_vv_nxv1f64_same_op:184; CHECK: # %bb.0:185; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma186; CHECK-NEXT: vfwmul.vv v9, v8, v8187; CHECK-NEXT: vmv1r.v v8, v9188; CHECK-NEXT: ret189 %vb = fpext <vscale x 1 x float> %va to <vscale x 1 x double>190 %vc = fmul <vscale x 1 x double> %vb, %vb191 ret <vscale x 1 x double> %vc192}193