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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d \3; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH4; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=lp64d \5; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH6; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=ilp32d \7; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN8; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=lp64d \9; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN10 11define <vscale x 1 x float> @vfnmacc_vv_nxv1f32(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {12; ZVFH-LABEL: vfnmacc_vv_nxv1f32:13; ZVFH:       # %bb.0:14; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma15; ZVFH-NEXT:    vfwnmacc.vv v10, v8, v9, v0.t16; ZVFH-NEXT:    vmv1r.v v8, v1017; ZVFH-NEXT:    ret18;19; ZVFHMIN-LABEL: vfnmacc_vv_nxv1f32:20; ZVFHMIN:       # %bb.0:21; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma22; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t23; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t24; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma25; ZVFHMIN-NEXT:    vfnmadd.vv v8, v11, v10, v0.t26; ZVFHMIN-NEXT:    ret27  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)28  %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)29  %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> %m, i32 %evl)30  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)31  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %bext, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)32  ret <vscale x 1 x float> %v33}34 35define <vscale x 1 x float> @vfnmacc_vv_nxv1f32_unmasked(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {36; ZVFH-LABEL: vfnmacc_vv_nxv1f32_unmasked:37; ZVFH:       # %bb.0:38; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma39; ZVFH-NEXT:    vfwnmacc.vv v10, v8, v940; ZVFH-NEXT:    vmv1r.v v8, v1041; ZVFH-NEXT:    ret42;43; ZVFHMIN-LABEL: vfnmacc_vv_nxv1f32_unmasked:44; ZVFHMIN:       # %bb.0:45; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma46; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v847; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v948; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma49; ZVFHMIN-NEXT:    vfnmadd.vv v8, v11, v1050; ZVFHMIN-NEXT:    ret51  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)52  %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)53  %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)54  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)55  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %bext, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)56  ret <vscale x 1 x float> %v57}58 59define <vscale x 1 x float> @vfnmacc_vf_nxv1f32(<vscale x 1 x half> %a, half %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {60; ZVFH-LABEL: vfnmacc_vf_nxv1f32:61; ZVFH:       # %bb.0:62; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma63; ZVFH-NEXT:    vfwnmacc.vf v9, fa0, v8, v0.t64; ZVFH-NEXT:    vmv1r.v v8, v965; ZVFH-NEXT:    ret66;67; ZVFHMIN-LABEL: vfnmacc_vf_nxv1f32:68; ZVFHMIN:       # %bb.0:69; ZVFHMIN-NEXT:    fmv.x.h a1, fa070; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma71; ZVFHMIN-NEXT:    vmv.v.x v10, a172; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t73; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10, v0.t74; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma75; ZVFHMIN-NEXT:    vfnmadd.vv v8, v11, v9, v0.t76; ZVFHMIN-NEXT:    ret77  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 078  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer79  %splat = insertelement <vscale x 1 x i1> poison, i1 -1, i32 080  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)81  %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)82  %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> %m, i32 %evl)83  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)84  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %vbext, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)85  ret <vscale x 1 x float> %v86}87 88define <vscale x 1 x float> @vfnmacc_vf_nxv1f32_commute(<vscale x 1 x half> %a, half %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {89; ZVFH-LABEL: vfnmacc_vf_nxv1f32_commute:90; ZVFH:       # %bb.0:91; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma92; ZVFH-NEXT:    vfwnmacc.vf v9, fa0, v8, v0.t93; ZVFH-NEXT:    vmv1r.v v8, v994; ZVFH-NEXT:    ret95;96; ZVFHMIN-LABEL: vfnmacc_vf_nxv1f32_commute:97; ZVFHMIN:       # %bb.0:98; ZVFHMIN-NEXT:    fmv.x.h a1, fa099; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma100; ZVFHMIN-NEXT:    vmv.v.x v11, a1101; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t102; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v11, v0.t103; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma104; ZVFHMIN-NEXT:    vfnmadd.vv v10, v8, v9, v0.t105; ZVFHMIN-NEXT:    vmv1r.v v8, v10106; ZVFHMIN-NEXT:    ret107  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0108  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer109  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)110  %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)111  %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> %m, i32 %evl)112  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)113  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vbext, <vscale x 1 x float> %nega, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)114  ret <vscale x 1 x float> %v115}116 117define <vscale x 1 x float> @vfnmacc_vf_nxv1f32_unmasked(<vscale x 1 x half> %a, half %b, <vscale x 1 x float> %c, i32 zeroext %evl) {118; ZVFH-LABEL: vfnmacc_vf_nxv1f32_unmasked:119; ZVFH:       # %bb.0:120; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma121; ZVFH-NEXT:    vfwnmacc.vf v9, fa0, v8122; ZVFH-NEXT:    vmv1r.v v8, v9123; ZVFH-NEXT:    ret124;125; ZVFHMIN-LABEL: vfnmacc_vf_nxv1f32_unmasked:126; ZVFHMIN:       # %bb.0:127; ZVFHMIN-NEXT:    fmv.x.h a1, fa0128; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma129; ZVFHMIN-NEXT:    vmv.v.x v10, a1130; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8131; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10132; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma133; ZVFHMIN-NEXT:    vfnmadd.vv v8, v11, v9134; ZVFHMIN-NEXT:    ret135  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0136  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer137  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)138  %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)139  %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)140  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)141  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %vbext, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)142  ret <vscale x 1 x float> %v143}144 145define <vscale x 2 x float> @vfnmacc_vv_nxv2f32(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {146; ZVFH-LABEL: vfnmacc_vv_nxv2f32:147; ZVFH:       # %bb.0:148; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma149; ZVFH-NEXT:    vfwnmacc.vv v10, v8, v9, v0.t150; ZVFH-NEXT:    vmv1r.v v8, v10151; ZVFH-NEXT:    ret152;153; ZVFHMIN-LABEL: vfnmacc_vv_nxv2f32:154; ZVFHMIN:       # %bb.0:155; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma156; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t157; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t158; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma159; ZVFHMIN-NEXT:    vfnmadd.vv v8, v11, v10, v0.t160; ZVFHMIN-NEXT:    ret161  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)162  %bext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)163  %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> %m, i32 %evl)164  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)165  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %bext, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)166  ret <vscale x 2 x float> %v167}168 169define <vscale x 2 x float> @vfnmacc_vv_nxv2f32_unmasked(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {170; ZVFH-LABEL: vfnmacc_vv_nxv2f32_unmasked:171; ZVFH:       # %bb.0:172; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma173; ZVFH-NEXT:    vfwnmacc.vv v10, v8, v9174; ZVFH-NEXT:    vmv1r.v v8, v10175; ZVFH-NEXT:    ret176;177; ZVFHMIN-LABEL: vfnmacc_vv_nxv2f32_unmasked:178; ZVFHMIN:       # %bb.0:179; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma180; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8181; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9182; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma183; ZVFHMIN-NEXT:    vfnmadd.vv v8, v11, v10184; ZVFHMIN-NEXT:    ret185  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)186  %bext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)187  %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)188  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)189  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %bext, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 -1), i32 %evl)190  ret <vscale x 2 x float> %v191}192 193define <vscale x 2 x float> @vfnmacc_vf_nxv2f32(<vscale x 2 x half> %a, half %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {194; ZVFH-LABEL: vfnmacc_vf_nxv2f32:195; ZVFH:       # %bb.0:196; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma197; ZVFH-NEXT:    vfwnmacc.vf v9, fa0, v8, v0.t198; ZVFH-NEXT:    vmv1r.v v8, v9199; ZVFH-NEXT:    ret200;201; ZVFHMIN-LABEL: vfnmacc_vf_nxv2f32:202; ZVFHMIN:       # %bb.0:203; ZVFHMIN-NEXT:    fmv.x.h a1, fa0204; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma205; ZVFHMIN-NEXT:    vmv.v.x v10, a1206; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t207; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10, v0.t208; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma209; ZVFHMIN-NEXT:    vfnmadd.vv v8, v11, v9, v0.t210; ZVFHMIN-NEXT:    ret211  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0212  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer213  %splat = insertelement <vscale x 2 x i1> poison, i1 -1, i32 0214  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)215  %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)216  %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> %m, i32 %evl)217  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)218  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %vbext, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)219  ret <vscale x 2 x float> %v220}221 222define <vscale x 2 x float> @vfnmacc_vf_nxv2f32_commute(<vscale x 2 x half> %a, half %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {223; ZVFH-LABEL: vfnmacc_vf_nxv2f32_commute:224; ZVFH:       # %bb.0:225; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma226; ZVFH-NEXT:    vfwnmacc.vf v9, fa0, v8, v0.t227; ZVFH-NEXT:    vmv1r.v v8, v9228; ZVFH-NEXT:    ret229;230; ZVFHMIN-LABEL: vfnmacc_vf_nxv2f32_commute:231; ZVFHMIN:       # %bb.0:232; ZVFHMIN-NEXT:    fmv.x.h a1, fa0233; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma234; ZVFHMIN-NEXT:    vmv.v.x v11, a1235; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t236; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v11, v0.t237; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma238; ZVFHMIN-NEXT:    vfnmadd.vv v10, v8, v9, v0.t239; ZVFHMIN-NEXT:    vmv.v.v v8, v10240; ZVFHMIN-NEXT:    ret241  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0242  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer243  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)244  %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)245  %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> %m, i32 %evl)246  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)247  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vbext, <vscale x 2 x float> %nega, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)248  ret <vscale x 2 x float> %v249}250 251define <vscale x 2 x float> @vfnmacc_vf_nxv2f32_unmasked(<vscale x 2 x half> %a, half %b, <vscale x 2 x float> %c, i32 zeroext %evl) {252; ZVFH-LABEL: vfnmacc_vf_nxv2f32_unmasked:253; ZVFH:       # %bb.0:254; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma255; ZVFH-NEXT:    vfwnmacc.vf v9, fa0, v8256; ZVFH-NEXT:    vmv1r.v v8, v9257; ZVFH-NEXT:    ret258;259; ZVFHMIN-LABEL: vfnmacc_vf_nxv2f32_unmasked:260; ZVFHMIN:       # %bb.0:261; ZVFHMIN-NEXT:    fmv.x.h a1, fa0262; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma263; ZVFHMIN-NEXT:    vmv.v.x v10, a1264; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8265; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10266; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma267; ZVFHMIN-NEXT:    vfnmadd.vv v8, v11, v9268; ZVFHMIN-NEXT:    ret269  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0270  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer271  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)272  %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)273  %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)274  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)275  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %vbext, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 -1), i32 %evl)276  ret <vscale x 2 x float> %v277}278 279define <vscale x 4 x float> @vfnmacc_vv_nxv4f32(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {280; ZVFH-LABEL: vfnmacc_vv_nxv4f32:281; ZVFH:       # %bb.0:282; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma283; ZVFH-NEXT:    vfwnmacc.vv v10, v8, v9, v0.t284; ZVFH-NEXT:    vmv2r.v v8, v10285; ZVFH-NEXT:    ret286;287; ZVFHMIN-LABEL: vfnmacc_vv_nxv4f32:288; ZVFHMIN:       # %bb.0:289; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma290; ZVFHMIN-NEXT:    vmv1r.v v12, v9291; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t292; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v12, v0.t293; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma294; ZVFHMIN-NEXT:    vfnmadd.vv v8, v14, v10, v0.t295; ZVFHMIN-NEXT:    ret296  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)297  %bext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)298  %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> %m, i32 %evl)299  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)300  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %bext, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)301  ret <vscale x 4 x float> %v302}303 304define <vscale x 4 x float> @vfnmacc_vv_nxv4f32_unmasked(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {305; ZVFH-LABEL: vfnmacc_vv_nxv4f32_unmasked:306; ZVFH:       # %bb.0:307; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma308; ZVFH-NEXT:    vfwnmacc.vv v10, v8, v9309; ZVFH-NEXT:    vmv2r.v v8, v10310; ZVFH-NEXT:    ret311;312; ZVFHMIN-LABEL: vfnmacc_vv_nxv4f32_unmasked:313; ZVFHMIN:       # %bb.0:314; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma315; ZVFHMIN-NEXT:    vmv1r.v v12, v9316; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8317; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v12318; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma319; ZVFHMIN-NEXT:    vfnmadd.vv v8, v14, v10320; ZVFHMIN-NEXT:    ret321  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)322  %bext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)323  %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)324  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)325  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %bext, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 -1), i32 %evl)326  ret <vscale x 4 x float> %v327}328 329define <vscale x 4 x float> @vfnmacc_vf_nxv4f32(<vscale x 4 x half> %a, half %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {330; ZVFH-LABEL: vfnmacc_vf_nxv4f32:331; ZVFH:       # %bb.0:332; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma333; ZVFH-NEXT:    vfwnmacc.vf v10, fa0, v8, v0.t334; ZVFH-NEXT:    vmv2r.v v8, v10335; ZVFH-NEXT:    ret336;337; ZVFHMIN-LABEL: vfnmacc_vf_nxv4f32:338; ZVFHMIN:       # %bb.0:339; ZVFHMIN-NEXT:    fmv.x.h a1, fa0340; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma341; ZVFHMIN-NEXT:    vmv.v.x v14, a1342; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t343; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v14, v0.t344; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma345; ZVFHMIN-NEXT:    vfnmadd.vv v8, v12, v10, v0.t346; ZVFHMIN-NEXT:    ret347  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0348  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer349  %splat = insertelement <vscale x 4 x i1> poison, i1 -1, i32 0350  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)351  %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)352  %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> %m, i32 %evl)353  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)354  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %vbext, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)355  ret <vscale x 4 x float> %v356}357 358define <vscale x 4 x float> @vfnmacc_vf_nxv4f32_commute(<vscale x 4 x half> %a, half %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {359; ZVFH-LABEL: vfnmacc_vf_nxv4f32_commute:360; ZVFH:       # %bb.0:361; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma362; ZVFH-NEXT:    vfwnmacc.vf v10, fa0, v8, v0.t363; ZVFH-NEXT:    vmv2r.v v8, v10364; ZVFH-NEXT:    ret365;366; ZVFHMIN-LABEL: vfnmacc_vf_nxv4f32_commute:367; ZVFHMIN:       # %bb.0:368; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma369; ZVFHMIN-NEXT:    vmv1r.v v12, v8370; ZVFHMIN-NEXT:    fmv.x.h a0, fa0371; ZVFHMIN-NEXT:    vmv.v.x v14, a0372; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v12, v0.t373; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v14, v0.t374; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma375; ZVFHMIN-NEXT:    vfnmadd.vv v8, v12, v10, v0.t376; ZVFHMIN-NEXT:    ret377  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0378  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer379  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)380  %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)381  %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> %m, i32 %evl)382  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)383  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vbext, <vscale x 4 x float> %nega, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)384  ret <vscale x 4 x float> %v385}386 387define <vscale x 4 x float> @vfnmacc_vf_nxv4f32_unmasked(<vscale x 4 x half> %a, half %b, <vscale x 4 x float> %c, i32 zeroext %evl) {388; ZVFH-LABEL: vfnmacc_vf_nxv4f32_unmasked:389; ZVFH:       # %bb.0:390; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma391; ZVFH-NEXT:    vfwnmacc.vf v10, fa0, v8392; ZVFH-NEXT:    vmv2r.v v8, v10393; ZVFH-NEXT:    ret394;395; ZVFHMIN-LABEL: vfnmacc_vf_nxv4f32_unmasked:396; ZVFHMIN:       # %bb.0:397; ZVFHMIN-NEXT:    fmv.x.h a1, fa0398; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma399; ZVFHMIN-NEXT:    vmv.v.x v14, a1400; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8401; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v14402; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma403; ZVFHMIN-NEXT:    vfnmadd.vv v8, v12, v10404; ZVFHMIN-NEXT:    ret405  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0406  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer407  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)408  %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)409  %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)410  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)411  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %vbext, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 -1), i32 %evl)412  ret <vscale x 4 x float> %v413}414 415define <vscale x 8 x float> @vfnmacc_vv_nxv8f32(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {416; ZVFH-LABEL: vfnmacc_vv_nxv8f32:417; ZVFH:       # %bb.0:418; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma419; ZVFH-NEXT:    vfwnmacc.vv v12, v8, v10, v0.t420; ZVFH-NEXT:    vmv4r.v v8, v12421; ZVFH-NEXT:    ret422;423; ZVFHMIN-LABEL: vfnmacc_vv_nxv8f32:424; ZVFHMIN:       # %bb.0:425; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma426; ZVFHMIN-NEXT:    vmv2r.v v16, v10427; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t428; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16, v0.t429; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma430; ZVFHMIN-NEXT:    vfnmadd.vv v8, v20, v12, v0.t431; ZVFHMIN-NEXT:    ret432  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)433  %bext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)434  %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> %m, i32 %evl)435  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)436  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %bext, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)437  ret <vscale x 8 x float> %v438}439 440define <vscale x 8 x float> @vfnmacc_vv_nxv8f32_unmasked(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {441; ZVFH-LABEL: vfnmacc_vv_nxv8f32_unmasked:442; ZVFH:       # %bb.0:443; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma444; ZVFH-NEXT:    vfwnmacc.vv v12, v8, v10445; ZVFH-NEXT:    vmv4r.v v8, v12446; ZVFH-NEXT:    ret447;448; ZVFHMIN-LABEL: vfnmacc_vv_nxv8f32_unmasked:449; ZVFHMIN:       # %bb.0:450; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma451; ZVFHMIN-NEXT:    vmv2r.v v16, v10452; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8453; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16454; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma455; ZVFHMIN-NEXT:    vfnmadd.vv v8, v20, v12456; ZVFHMIN-NEXT:    ret457  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)458  %bext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)459  %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)460  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)461  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %bext, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 -1), i32 %evl)462  ret <vscale x 8 x float> %v463}464 465define <vscale x 8 x float> @vfnmacc_vf_nxv8f32(<vscale x 8 x half> %a, half %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {466; ZVFH-LABEL: vfnmacc_vf_nxv8f32:467; ZVFH:       # %bb.0:468; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma469; ZVFH-NEXT:    vfwnmacc.vf v12, fa0, v8, v0.t470; ZVFH-NEXT:    vmv4r.v v8, v12471; ZVFH-NEXT:    ret472;473; ZVFHMIN-LABEL: vfnmacc_vf_nxv8f32:474; ZVFHMIN:       # %bb.0:475; ZVFHMIN-NEXT:    fmv.x.h a1, fa0476; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma477; ZVFHMIN-NEXT:    vmv.v.x v20, a1478; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t479; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20, v0.t480; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma481; ZVFHMIN-NEXT:    vfnmadd.vv v8, v16, v12, v0.t482; ZVFHMIN-NEXT:    ret483  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0484  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer485  %splat = insertelement <vscale x 8 x i1> poison, i1 -1, i32 0486  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)487  %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)488  %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> %m, i32 %evl)489  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)490  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %vbext, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)491  ret <vscale x 8 x float> %v492}493 494define <vscale x 8 x float> @vfnmacc_vf_nxv8f32_commute(<vscale x 8 x half> %a, half %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {495; ZVFH-LABEL: vfnmacc_vf_nxv8f32_commute:496; ZVFH:       # %bb.0:497; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma498; ZVFH-NEXT:    vfwnmacc.vf v12, fa0, v8, v0.t499; ZVFH-NEXT:    vmv4r.v v8, v12500; ZVFH-NEXT:    ret501;502; ZVFHMIN-LABEL: vfnmacc_vf_nxv8f32_commute:503; ZVFHMIN:       # %bb.0:504; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma505; ZVFHMIN-NEXT:    vmv2r.v v16, v8506; ZVFHMIN-NEXT:    fmv.x.h a0, fa0507; ZVFHMIN-NEXT:    vmv.v.x v20, a0508; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16, v0.t509; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v20, v0.t510; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma511; ZVFHMIN-NEXT:    vfnmadd.vv v8, v16, v12, v0.t512; ZVFHMIN-NEXT:    ret513  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0514  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer515  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)516  %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)517  %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> %m, i32 %evl)518  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)519  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vbext, <vscale x 8 x float> %nega, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)520  ret <vscale x 8 x float> %v521}522 523define <vscale x 8 x float> @vfnmacc_vf_nxv8f32_unmasked(<vscale x 8 x half> %a, half %b, <vscale x 8 x float> %c, i32 zeroext %evl) {524; ZVFH-LABEL: vfnmacc_vf_nxv8f32_unmasked:525; ZVFH:       # %bb.0:526; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma527; ZVFH-NEXT:    vfwnmacc.vf v12, fa0, v8528; ZVFH-NEXT:    vmv4r.v v8, v12529; ZVFH-NEXT:    ret530;531; ZVFHMIN-LABEL: vfnmacc_vf_nxv8f32_unmasked:532; ZVFHMIN:       # %bb.0:533; ZVFHMIN-NEXT:    fmv.x.h a1, fa0534; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma535; ZVFHMIN-NEXT:    vmv.v.x v20, a1536; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8537; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v20538; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma539; ZVFHMIN-NEXT:    vfnmadd.vv v8, v16, v12540; ZVFHMIN-NEXT:    ret541  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0542  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer543  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)544  %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)545  %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)546  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)547  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %vbext, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 -1), i32 %evl)548  ret <vscale x 8 x float> %v549}550 551define <vscale x 16 x float> @vfnmacc_vv_nxv16f32(<vscale x 16 x half> %a, <vscale x 16 x half> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {552; ZVFH-LABEL: vfnmacc_vv_nxv16f32:553; ZVFH:       # %bb.0:554; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma555; ZVFH-NEXT:    vfwnmacc.vv v16, v8, v12, v0.t556; ZVFH-NEXT:    vmv8r.v v8, v16557; ZVFH-NEXT:    ret558;559; ZVFHMIN-LABEL: vfnmacc_vv_nxv16f32:560; ZVFHMIN:       # %bb.0:561; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma562; ZVFHMIN-NEXT:    vmv4r.v v4, v12563; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t564; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v4, v0.t565; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma566; ZVFHMIN-NEXT:    vfnmadd.vv v8, v24, v16, v0.t567; ZVFHMIN-NEXT:    ret568  %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> %m, i32 %evl)569  %bext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 %evl)570  %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> %m, i32 %evl)571  %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)572  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %bext, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)573  ret <vscale x 16 x float> %v574}575 576define <vscale x 16 x float> @vfnmacc_vv_nxv16f32_unmasked(<vscale x 16 x half> %a, <vscale x 16 x half> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {577; ZVFH-LABEL: vfnmacc_vv_nxv16f32_unmasked:578; ZVFH:       # %bb.0:579; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma580; ZVFH-NEXT:    vfwnmacc.vv v16, v8, v12581; ZVFH-NEXT:    vmv8r.v v8, v16582; ZVFH-NEXT:    ret583;584; ZVFHMIN-LABEL: vfnmacc_vv_nxv16f32_unmasked:585; ZVFHMIN:       # %bb.0:586; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma587; ZVFHMIN-NEXT:    vmv4r.v v24, v12588; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8589; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24590; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma591; ZVFHMIN-NEXT:    vfnmadd.vv v8, v0, v16592; ZVFHMIN-NEXT:    ret593  %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> splat (i1 -1), i32 %evl)594  %bext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)595  %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> splat (i1 -1), i32 %evl)596  %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)597  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %bext, <vscale x 16 x float> %negc, <vscale x 16 x i1> splat (i1 -1), i32 %evl)598  ret <vscale x 16 x float> %v599}600 601define <vscale x 16 x float> @vfnmacc_vf_nxv16f32(<vscale x 16 x half> %a, half %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {602; ZVFH-LABEL: vfnmacc_vf_nxv16f32:603; ZVFH:       # %bb.0:604; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma605; ZVFH-NEXT:    vfwnmacc.vf v16, fa0, v8, v0.t606; ZVFH-NEXT:    vmv8r.v v8, v16607; ZVFH-NEXT:    ret608;609; ZVFHMIN-LABEL: vfnmacc_vf_nxv16f32:610; ZVFHMIN:       # %bb.0:611; ZVFHMIN-NEXT:    fmv.x.h a1, fa0612; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma613; ZVFHMIN-NEXT:    vmv.v.x v4, a1614; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t615; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v4, v0.t616; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma617; ZVFHMIN-NEXT:    vfnmadd.vv v8, v24, v16, v0.t618; ZVFHMIN-NEXT:    ret619  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0620  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer621  %splat = insertelement <vscale x 16 x i1> poison, i1 -1, i32 0622  %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> %m, i32 %evl)623  %vbext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)624  %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> %m, i32 %evl)625  %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)626  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %vbext, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)627  ret <vscale x 16 x float> %v628}629 630define <vscale x 16 x float> @vfnmacc_vf_nxv16f32_commute(<vscale x 16 x half> %a, half %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {631; ZVFH-LABEL: vfnmacc_vf_nxv16f32_commute:632; ZVFH:       # %bb.0:633; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma634; ZVFH-NEXT:    vfwnmacc.vf v16, fa0, v8, v0.t635; ZVFH-NEXT:    vmv8r.v v8, v16636; ZVFH-NEXT:    ret637;638; ZVFHMIN-LABEL: vfnmacc_vf_nxv16f32_commute:639; ZVFHMIN:       # %bb.0:640; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma641; ZVFHMIN-NEXT:    vmv4r.v v24, v8642; ZVFHMIN-NEXT:    fmv.x.h a0, fa0643; ZVFHMIN-NEXT:    vmv.v.x v4, a0644; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24, v0.t645; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v4, v0.t646; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma647; ZVFHMIN-NEXT:    vfnmadd.vv v8, v24, v16, v0.t648; ZVFHMIN-NEXT:    ret649  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0650  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer651  %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> %m, i32 %evl)652  %vbext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)653  %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> %m, i32 %evl)654  %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)655  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vbext, <vscale x 16 x float> %nega, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)656  ret <vscale x 16 x float> %v657}658 659define <vscale x 16 x float> @vfnmacc_vf_nxv16f32_unmasked(<vscale x 16 x half> %a, half %b, <vscale x 16 x float> %c, i32 zeroext %evl) {660; ZVFH-LABEL: vfnmacc_vf_nxv16f32_unmasked:661; ZVFH:       # %bb.0:662; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma663; ZVFH-NEXT:    vfwnmacc.vf v16, fa0, v8664; ZVFH-NEXT:    vmv8r.v v8, v16665; ZVFH-NEXT:    ret666;667; ZVFHMIN-LABEL: vfnmacc_vf_nxv16f32_unmasked:668; ZVFHMIN:       # %bb.0:669; ZVFHMIN-NEXT:    fmv.x.h a1, fa0670; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma671; ZVFHMIN-NEXT:    vmv.v.x v4, a1672; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8673; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v4674; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma675; ZVFHMIN-NEXT:    vfnmadd.vv v8, v24, v16676; ZVFHMIN-NEXT:    ret677  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0678  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer679  %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> splat (i1 -1), i32 %evl)680  %vbext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)681  %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> splat (i1 -1), i32 %evl)682  %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)683  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %vbext, <vscale x 16 x float> %negc, <vscale x 16 x i1> splat (i1 -1), i32 %evl)684  ret <vscale x 16 x float> %v685}686 687define <vscale x 1 x double> @vfnmacc_vv_nxv1f64(<vscale x 1 x float> %a, <vscale x 1 x float> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {688; CHECK-LABEL: vfnmacc_vv_nxv1f64:689; CHECK:       # %bb.0:690; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma691; CHECK-NEXT:    vfwnmacc.vv v10, v8, v9, v0.t692; CHECK-NEXT:    vmv1r.v v8, v10693; CHECK-NEXT:    ret694  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> %m, i32 %evl)695  %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 %evl)696  %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> %m, i32 %evl)697  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)698  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %bext, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)699  ret <vscale x 1 x double> %v700}701 702define <vscale x 1 x double> @vfnmacc_vv_nxv1f64_unmasked(<vscale x 1 x float> %a, <vscale x 1 x float> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {703; CHECK-LABEL: vfnmacc_vv_nxv1f64_unmasked:704; CHECK:       # %bb.0:705; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma706; CHECK-NEXT:    vfwnmacc.vv v10, v8, v9707; CHECK-NEXT:    vmv1r.v v8, v10708; CHECK-NEXT:    ret709  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)710  %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)711  %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)712  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)713  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %bext, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)714  ret <vscale x 1 x double> %v715}716 717define <vscale x 1 x double> @vfnmacc_vf_nxv1f64(<vscale x 1 x float> %a, float %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {718; CHECK-LABEL: vfnmacc_vf_nxv1f64:719; CHECK:       # %bb.0:720; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma721; CHECK-NEXT:    vfwnmacc.vf v9, fa0, v8, v0.t722; CHECK-NEXT:    vmv1r.v v8, v9723; CHECK-NEXT:    ret724  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0725  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer726  %splat = insertelement <vscale x 1 x i1> poison, i1 -1, i32 0727  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> %m, i32 %evl)728  %vbext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)729  %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> %m, i32 %evl)730  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)731  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %vbext, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)732  ret <vscale x 1 x double> %v733}734 735define <vscale x 1 x double> @vfnmacc_vf_nxv1f64_commute(<vscale x 1 x float> %a, float %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {736; CHECK-LABEL: vfnmacc_vf_nxv1f64_commute:737; CHECK:       # %bb.0:738; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma739; CHECK-NEXT:    vfwnmacc.vf v9, fa0, v8, v0.t740; CHECK-NEXT:    vmv1r.v v8, v9741; CHECK-NEXT:    ret742  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0743  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer744  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> %m, i32 %evl)745  %vbext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)746  %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> %m, i32 %evl)747  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)748  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vbext, <vscale x 1 x double> %nega, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)749  ret <vscale x 1 x double> %v750}751 752define <vscale x 1 x double> @vfnmacc_vf_nxv1f64_unmasked(<vscale x 1 x float> %a, float %b, <vscale x 1 x double> %c, i32 zeroext %evl) {753; CHECK-LABEL: vfnmacc_vf_nxv1f64_unmasked:754; CHECK:       # %bb.0:755; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma756; CHECK-NEXT:    vfwnmacc.vf v9, fa0, v8757; CHECK-NEXT:    vmv1r.v v8, v9758; CHECK-NEXT:    ret759  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0760  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer761  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)762  %vbext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)763  %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)764  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)765  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %vbext, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)766  ret <vscale x 1 x double> %v767}768 769define <vscale x 2 x double> @vfnmacc_vv_nxv2f64(<vscale x 2 x float> %a, <vscale x 2 x float> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {770; CHECK-LABEL: vfnmacc_vv_nxv2f64:771; CHECK:       # %bb.0:772; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma773; CHECK-NEXT:    vfwnmacc.vv v10, v8, v9, v0.t774; CHECK-NEXT:    vmv2r.v v8, v10775; CHECK-NEXT:    ret776  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %evl)777  %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 %evl)778  %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> %m, i32 %evl)779  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)780  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %bext, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)781  ret <vscale x 2 x double> %v782}783 784define <vscale x 2 x double> @vfnmacc_vv_nxv2f64_unmasked(<vscale x 2 x float> %a, <vscale x 2 x float> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {785; CHECK-LABEL: vfnmacc_vv_nxv2f64_unmasked:786; CHECK:       # %bb.0:787; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma788; CHECK-NEXT:    vfwnmacc.vv v10, v8, v9789; CHECK-NEXT:    vmv2r.v v8, v10790; CHECK-NEXT:    ret791  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)792  %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)793  %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)794  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)795  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %bext, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 -1), i32 %evl)796  ret <vscale x 2 x double> %v797}798 799define <vscale x 2 x double> @vfnmacc_vf_nxv2f64(<vscale x 2 x float> %a, float %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {800; CHECK-LABEL: vfnmacc_vf_nxv2f64:801; CHECK:       # %bb.0:802; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma803; CHECK-NEXT:    vfwnmacc.vf v10, fa0, v8, v0.t804; CHECK-NEXT:    vmv2r.v v8, v10805; CHECK-NEXT:    ret806  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0807  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer808  %splat = insertelement <vscale x 2 x i1> poison, i1 -1, i32 0809  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %evl)810  %vbext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)811  %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> %m, i32 %evl)812  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)813  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %vbext, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)814  ret <vscale x 2 x double> %v815}816 817define <vscale x 2 x double> @vfnmacc_vf_nxv2f64_commute(<vscale x 2 x float> %a, float %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {818; CHECK-LABEL: vfnmacc_vf_nxv2f64_commute:819; CHECK:       # %bb.0:820; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma821; CHECK-NEXT:    vfwnmacc.vf v10, fa0, v8, v0.t822; CHECK-NEXT:    vmv2r.v v8, v10823; CHECK-NEXT:    ret824  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0825  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer826  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %evl)827  %vbext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)828  %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> %m, i32 %evl)829  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)830  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vbext, <vscale x 2 x double> %nega, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)831  ret <vscale x 2 x double> %v832}833 834define <vscale x 2 x double> @vfnmacc_vf_nxv2f64_unmasked(<vscale x 2 x float> %a, float %b, <vscale x 2 x double> %c, i32 zeroext %evl) {835; CHECK-LABEL: vfnmacc_vf_nxv2f64_unmasked:836; CHECK:       # %bb.0:837; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma838; CHECK-NEXT:    vfwnmacc.vf v10, fa0, v8839; CHECK-NEXT:    vmv2r.v v8, v10840; CHECK-NEXT:    ret841  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0842  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer843  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)844  %vbext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)845  %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)846  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)847  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %vbext, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 -1), i32 %evl)848  ret <vscale x 2 x double> %v849}850 851define <vscale x 4 x double> @vfnmacc_vv_nxv4f64(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {852; CHECK-LABEL: vfnmacc_vv_nxv4f64:853; CHECK:       # %bb.0:854; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma855; CHECK-NEXT:    vfwnmacc.vv v12, v8, v10, v0.t856; CHECK-NEXT:    vmv4r.v v8, v12857; CHECK-NEXT:    ret858  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> %m, i32 %evl)859  %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 %evl)860  %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> %m, i32 %evl)861  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)862  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %bext, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)863  ret <vscale x 4 x double> %v864}865 866define <vscale x 4 x double> @vfnmacc_vv_nxv4f64_unmasked(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {867; CHECK-LABEL: vfnmacc_vv_nxv4f64_unmasked:868; CHECK:       # %bb.0:869; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma870; CHECK-NEXT:    vfwnmacc.vv v12, v8, v10871; CHECK-NEXT:    vmv4r.v v8, v12872; CHECK-NEXT:    ret873  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)874  %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)875  %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)876  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)877  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %bext, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 -1), i32 %evl)878  ret <vscale x 4 x double> %v879}880 881define <vscale x 4 x double> @vfnmacc_vf_nxv4f64(<vscale x 4 x float> %a, float %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {882; CHECK-LABEL: vfnmacc_vf_nxv4f64:883; CHECK:       # %bb.0:884; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma885; CHECK-NEXT:    vfwnmacc.vf v12, fa0, v8, v0.t886; CHECK-NEXT:    vmv4r.v v8, v12887; CHECK-NEXT:    ret888  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0889  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer890  %splat = insertelement <vscale x 4 x i1> poison, i1 -1, i32 0891  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> %m, i32 %evl)892  %vbext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)893  %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> %m, i32 %evl)894  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)895  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %vbext, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)896  ret <vscale x 4 x double> %v897}898 899define <vscale x 4 x double> @vfnmacc_vf_nxv4f64_commute(<vscale x 4 x float> %a, float %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {900; CHECK-LABEL: vfnmacc_vf_nxv4f64_commute:901; CHECK:       # %bb.0:902; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma903; CHECK-NEXT:    vfwnmacc.vf v12, fa0, v8, v0.t904; CHECK-NEXT:    vmv4r.v v8, v12905; CHECK-NEXT:    ret906  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0907  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer908  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> %m, i32 %evl)909  %vbext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)910  %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> %m, i32 %evl)911  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)912  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vbext, <vscale x 4 x double> %nega, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)913  ret <vscale x 4 x double> %v914}915 916define <vscale x 4 x double> @vfnmacc_vf_nxv4f64_unmasked(<vscale x 4 x float> %a, float %b, <vscale x 4 x double> %c, i32 zeroext %evl) {917; CHECK-LABEL: vfnmacc_vf_nxv4f64_unmasked:918; CHECK:       # %bb.0:919; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma920; CHECK-NEXT:    vfwnmacc.vf v12, fa0, v8921; CHECK-NEXT:    vmv4r.v v8, v12922; CHECK-NEXT:    ret923  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0924  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer925  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)926  %vbext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)927  %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)928  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)929  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %vbext, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 -1), i32 %evl)930  ret <vscale x 4 x double> %v931}932 933define <vscale x 8 x double> @vfnmacc_vv_nxv8f64(<vscale x 8 x float> %a, <vscale x 8 x float> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {934; CHECK-LABEL: vfnmacc_vv_nxv8f64:935; CHECK:       # %bb.0:936; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma937; CHECK-NEXT:    vfwnmacc.vv v16, v8, v12, v0.t938; CHECK-NEXT:    vmv8r.v v8, v16939; CHECK-NEXT:    ret940  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> %m, i32 %evl)941  %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 %evl)942  %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> %m, i32 %evl)943  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)944  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %bext, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)945  ret <vscale x 8 x double> %v946}947 948define <vscale x 8 x double> @vfnmacc_vv_nxv8f64_unmasked(<vscale x 8 x float> %a, <vscale x 8 x float> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {949; CHECK-LABEL: vfnmacc_vv_nxv8f64_unmasked:950; CHECK:       # %bb.0:951; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma952; CHECK-NEXT:    vfwnmacc.vv v16, v8, v12953; CHECK-NEXT:    vmv8r.v v8, v16954; CHECK-NEXT:    ret955  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)956  %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)957  %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)958  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)959  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %bext, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 -1), i32 %evl)960  ret <vscale x 8 x double> %v961}962 963define <vscale x 8 x double> @vfnmacc_vf_nxv8f64(<vscale x 8 x float> %a, float %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {964; CHECK-LABEL: vfnmacc_vf_nxv8f64:965; CHECK:       # %bb.0:966; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma967; CHECK-NEXT:    vfwnmacc.vf v16, fa0, v8, v0.t968; CHECK-NEXT:    vmv8r.v v8, v16969; CHECK-NEXT:    ret970  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0971  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer972  %splat = insertelement <vscale x 8 x i1> poison, i1 -1, i32 0973  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> %m, i32 %evl)974  %vbext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)975  %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> %m, i32 %evl)976  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)977  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %vbext, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)978  ret <vscale x 8 x double> %v979}980 981define <vscale x 8 x double> @vfnmacc_vf_nxv8f64_commute(<vscale x 8 x float> %a, float %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {982; CHECK-LABEL: vfnmacc_vf_nxv8f64_commute:983; CHECK:       # %bb.0:984; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma985; CHECK-NEXT:    vfwnmacc.vf v16, fa0, v8, v0.t986; CHECK-NEXT:    vmv8r.v v8, v16987; CHECK-NEXT:    ret988  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0989  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer990  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> %m, i32 %evl)991  %vbext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)992  %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> %m, i32 %evl)993  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)994  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vbext, <vscale x 8 x double> %nega, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)995  ret <vscale x 8 x double> %v996}997 998define <vscale x 8 x double> @vfnmacc_vf_nxv8f64_unmasked(<vscale x 8 x float> %a, float %b, <vscale x 8 x double> %c, i32 zeroext %evl) {999; CHECK-LABEL: vfnmacc_vf_nxv8f64_unmasked:1000; CHECK:       # %bb.0:1001; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1002; CHECK-NEXT:    vfwnmacc.vf v16, fa0, v81003; CHECK-NEXT:    vmv8r.v v8, v161004; CHECK-NEXT:    ret1005  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 01006  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer1007  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1008  %vbext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1009  %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1010  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1011  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %vbext, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1012  ret <vscale x 8 x double> %v1013}1014 1015define <vscale x 1 x double> @vfnmacc_vv_nxv1f64_nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {1016; CHECK-LABEL: vfnmacc_vv_nxv1f64_nxv1f16:1017; CHECK:       # %bb.0:1018; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma1019; CHECK-NEXT:    vfwcvt.f.f.v v11, v8, v0.t1020; CHECK-NEXT:    vfwcvt.f.f.v v8, v9, v0.t1021; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma1022; CHECK-NEXT:    vfwnmacc.vv v10, v11, v8, v0.t1023; CHECK-NEXT:    vmv1r.v v8, v101024; CHECK-NEXT:    ret1025  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)1026  %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)1027  %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> %m, i32 %evl)1028  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)1029  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %bext, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)1030  ret <vscale x 1 x double> %v1031}1032 1033define <vscale x 1 x double> @vfnmacc_vv_nxv1f64_nxv1f16_unmasked(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {1034; CHECK-LABEL: vfnmacc_vv_nxv1f64_nxv1f16_unmasked:1035; CHECK:       # %bb.0:1036; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma1037; CHECK-NEXT:    vfwcvt.f.f.v v11, v81038; CHECK-NEXT:    vfwcvt.f.f.v v8, v91039; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma1040; CHECK-NEXT:    vfwnmacc.vv v10, v11, v81041; CHECK-NEXT:    vmv1r.v v8, v101042; CHECK-NEXT:    ret1043  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1044  %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1045  %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1046  %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1047  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %bext, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1048  ret <vscale x 1 x double> %v1049}1050 1051define <vscale x 2 x double> @vfnmacc_vv_nxv2f64_nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {1052; CHECK-LABEL: vfnmacc_vv_nxv2f64_nxv2f16:1053; CHECK:       # %bb.0:1054; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma1055; CHECK-NEXT:    vfwcvt.f.f.v v12, v8, v0.t1056; CHECK-NEXT:    vfwcvt.f.f.v v8, v9, v0.t1057; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma1058; CHECK-NEXT:    vfwnmacc.vv v10, v12, v8, v0.t1059; CHECK-NEXT:    vmv2r.v v8, v101060; CHECK-NEXT:    ret1061  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)1062  %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)1063  %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> %m, i32 %evl)1064  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)1065  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %bext, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)1066  ret <vscale x 2 x double> %v1067}1068 1069define <vscale x 2 x double> @vfnmacc_vv_nxv2f64_nxv2f16_unmasked(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {1070; CHECK-LABEL: vfnmacc_vv_nxv2f64_nxv2f16_unmasked:1071; CHECK:       # %bb.0:1072; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma1073; CHECK-NEXT:    vfwcvt.f.f.v v12, v81074; CHECK-NEXT:    vfwcvt.f.f.v v8, v91075; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma1076; CHECK-NEXT:    vfwnmacc.vv v10, v12, v81077; CHECK-NEXT:    vmv2r.v v8, v101078; CHECK-NEXT:    ret1079  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1080  %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1081  %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1082  %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1083  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %bext, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1084  ret <vscale x 2 x double> %v1085}1086 1087define <vscale x 4 x double> @vfnmacc_vv_nxv4f64_nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {1088; CHECK-LABEL: vfnmacc_vv_nxv4f64_nxv4f16:1089; CHECK:       # %bb.0:1090; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1091; CHECK-NEXT:    vfwcvt.f.f.v v10, v8, v0.t1092; CHECK-NEXT:    vfwcvt.f.f.v v16, v9, v0.t1093; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, ma1094; CHECK-NEXT:    vfwnmacc.vv v12, v10, v16, v0.t1095; CHECK-NEXT:    vmv4r.v v8, v121096; CHECK-NEXT:    ret1097  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)1098  %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)1099  %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> %m, i32 %evl)1100  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)1101  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %bext, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)1102  ret <vscale x 4 x double> %v1103}1104 1105define <vscale x 4 x double> @vfnmacc_vv_nxv4f64_nxv4f16_unmasked(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {1106; CHECK-LABEL: vfnmacc_vv_nxv4f64_nxv4f16_unmasked:1107; CHECK:       # %bb.0:1108; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1109; CHECK-NEXT:    vfwcvt.f.f.v v10, v81110; CHECK-NEXT:    vfwcvt.f.f.v v16, v91111; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, ma1112; CHECK-NEXT:    vfwnmacc.vv v12, v10, v161113; CHECK-NEXT:    vmv4r.v v8, v121114; CHECK-NEXT:    ret1115  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1116  %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1117  %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1118  %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1119  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %bext, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1120  ret <vscale x 4 x double> %v1121}1122 1123define <vscale x 8 x double> @vfnmacc_vv_nxv8f64_nxv4f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {1124; CHECK-LABEL: vfnmacc_vv_nxv8f64_nxv4f16:1125; CHECK:       # %bb.0:1126; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma1127; CHECK-NEXT:    vfwcvt.f.f.v v12, v8, v0.t1128; CHECK-NEXT:    vfwcvt.f.f.v v24, v10, v0.t1129; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1130; CHECK-NEXT:    vfwnmacc.vv v16, v12, v24, v0.t1131; CHECK-NEXT:    vmv8r.v v8, v161132; CHECK-NEXT:    ret1133  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)1134  %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)1135  %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> %m, i32 %evl)1136  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)1137  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %bext, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)1138  ret <vscale x 8 x double> %v1139}1140 1141define <vscale x 8 x double> @vfnmacc_vv_nxv8f64_nxv4f16_unmasked(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {1142; CHECK-LABEL: vfnmacc_vv_nxv8f64_nxv4f16_unmasked:1143; CHECK:       # %bb.0:1144; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma1145; CHECK-NEXT:    vfwcvt.f.f.v v12, v81146; CHECK-NEXT:    vfwcvt.f.f.v v24, v101147; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1148; CHECK-NEXT:    vfwnmacc.vv v16, v12, v241149; CHECK-NEXT:    vmv8r.v v8, v161150; CHECK-NEXT:    ret1151  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1152  %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1153  %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1154  %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1155  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %bext, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1156  ret <vscale x 8 x double> %v1157}1158