brintos

brintos / llvm-project-archived public Read only

0
0
Text · 118.3 KiB · fe5b8b9 Raw
1910 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v,+m -target-abi=ilp32d \3; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v,+m -target-abi=lp64d \5; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV646 7define <vscale x 1 x i8> @vmadd_vv_nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %b, <vscale x 1 x i8> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vmadd_vv_nxv1i8:9; CHECK:       # %bb.0:10; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, tu, mu11; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t12; CHECK-NEXT:    ret13  %x = call <vscale x 1 x i8> @llvm.vp.mul.nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)14  %y = call <vscale x 1 x i8> @llvm.vp.add.nxv1i8(<vscale x 1 x i8> %x, <vscale x 1 x i8> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)15  %u = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> %m, <vscale x 1 x i8> %y, <vscale x 1 x i8> %a, i32 %evl)16  ret <vscale x 1 x i8> %u17}18 19define <vscale x 1 x i8> @vmadd_vv_nxv1i8_unmasked(<vscale x 1 x i8> %a, <vscale x 1 x i8> %b, <vscale x 1 x i8> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {20; CHECK-LABEL: vmadd_vv_nxv1i8_unmasked:21; CHECK:       # %bb.0:22; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, tu, ma23; CHECK-NEXT:    vmadd.vv v8, v9, v1024; CHECK-NEXT:    ret25  %x = call <vscale x 1 x i8> @llvm.vp.mul.nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)26  %y = call <vscale x 1 x i8> @llvm.vp.add.nxv1i8(<vscale x 1 x i8> %x, <vscale x 1 x i8> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)27  %u = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i8> %y, <vscale x 1 x i8> %a, i32 %evl)28  ret <vscale x 1 x i8> %u29}30 31define <vscale x 1 x i8> @vmadd_vx_nxv1i8(<vscale x 1 x i8> %a, i8 %b, <vscale x 1 x i8> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {32; CHECK-LABEL: vmadd_vx_nxv1i8:33; CHECK:       # %bb.0:34; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, tu, mu35; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t36; CHECK-NEXT:    ret37  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 038  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer39  %x = call <vscale x 1 x i8> @llvm.vp.mul.nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)40  %y = call <vscale x 1 x i8> @llvm.vp.add.nxv1i8(<vscale x 1 x i8> %x, <vscale x 1 x i8> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)41  %u = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> %m, <vscale x 1 x i8> %y, <vscale x 1 x i8> %a, i32 %evl)42  ret <vscale x 1 x i8> %u43}44 45define <vscale x 1 x i8> @vmadd_vx_nxv1i8_unmasked(<vscale x 1 x i8> %a, i8 %b, <vscale x 1 x i8> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {46; CHECK-LABEL: vmadd_vx_nxv1i8_unmasked:47; CHECK:       # %bb.0:48; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, tu, ma49; CHECK-NEXT:    vmadd.vx v8, a0, v950; CHECK-NEXT:    ret51  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 052  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer53  %x = call <vscale x 1 x i8> @llvm.vp.mul.nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)54  %y = call <vscale x 1 x i8> @llvm.vp.add.nxv1i8(<vscale x 1 x i8> %x, <vscale x 1 x i8> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)55  %u = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i8> %y, <vscale x 1 x i8> %a, i32 %evl)56  ret <vscale x 1 x i8> %u57}58 59define <vscale x 1 x i8> @vmadd_vv_nxv1i8_ta(<vscale x 1 x i8> %a, <vscale x 1 x i8> %b, <vscale x 1 x i8> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {60; CHECK-LABEL: vmadd_vv_nxv1i8_ta:61; CHECK:       # %bb.0:62; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, mu63; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t64; CHECK-NEXT:    ret65  %x = call <vscale x 1 x i8> @llvm.vp.mul.nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)66  %y = call <vscale x 1 x i8> @llvm.vp.add.nxv1i8(<vscale x 1 x i8> %x, <vscale x 1 x i8> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)67  %u = call <vscale x 1 x i8> @llvm.vp.select.nxv1i8(<vscale x 1 x i1> %m, <vscale x 1 x i8> %y, <vscale x 1 x i8> %a, i32 %evl)68  ret <vscale x 1 x i8> %u69}70 71define <vscale x 1 x i8> @vmadd_vx_nxv1i8_ta(<vscale x 1 x i8> %a, i8 %b, <vscale x 1 x i8> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {72; CHECK-LABEL: vmadd_vx_nxv1i8_ta:73; CHECK:       # %bb.0:74; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, mu75; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t76; CHECK-NEXT:    ret77  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 078  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer79  %x = call <vscale x 1 x i8> @llvm.vp.mul.nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)80  %y = call <vscale x 1 x i8> @llvm.vp.add.nxv1i8(<vscale x 1 x i8> %x, <vscale x 1 x i8> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)81  %u = call <vscale x 1 x i8> @llvm.vp.select.nxv1i8(<vscale x 1 x i1> %m, <vscale x 1 x i8> %y, <vscale x 1 x i8> %a, i32 %evl)82  ret <vscale x 1 x i8> %u83}84 85define <vscale x 2 x i8> @vmadd_vv_nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %b, <vscale x 2 x i8> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {86; CHECK-LABEL: vmadd_vv_nxv2i8:87; CHECK:       # %bb.0:88; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, tu, mu89; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t90; CHECK-NEXT:    ret91  %x = call <vscale x 2 x i8> @llvm.vp.mul.nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)92  %y = call <vscale x 2 x i8> @llvm.vp.add.nxv2i8(<vscale x 2 x i8> %x, <vscale x 2 x i8> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)93  %u = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> %m, <vscale x 2 x i8> %y, <vscale x 2 x i8> %a, i32 %evl)94  ret <vscale x 2 x i8> %u95}96 97define <vscale x 2 x i8> @vmadd_vv_nxv2i8_unmasked(<vscale x 2 x i8> %a, <vscale x 2 x i8> %b, <vscale x 2 x i8> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {98; CHECK-LABEL: vmadd_vv_nxv2i8_unmasked:99; CHECK:       # %bb.0:100; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, tu, ma101; CHECK-NEXT:    vmadd.vv v8, v9, v10102; CHECK-NEXT:    ret103  %x = call <vscale x 2 x i8> @llvm.vp.mul.nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)104  %y = call <vscale x 2 x i8> @llvm.vp.add.nxv2i8(<vscale x 2 x i8> %x, <vscale x 2 x i8> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)105  %u = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i8> %y, <vscale x 2 x i8> %a, i32 %evl)106  ret <vscale x 2 x i8> %u107}108 109define <vscale x 2 x i8> @vmadd_vx_nxv2i8(<vscale x 2 x i8> %a, i8 %b, <vscale x 2 x i8> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {110; CHECK-LABEL: vmadd_vx_nxv2i8:111; CHECK:       # %bb.0:112; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, tu, mu113; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t114; CHECK-NEXT:    ret115  %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0116  %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer117  %x = call <vscale x 2 x i8> @llvm.vp.mul.nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)118  %y = call <vscale x 2 x i8> @llvm.vp.add.nxv2i8(<vscale x 2 x i8> %x, <vscale x 2 x i8> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)119  %u = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> %m, <vscale x 2 x i8> %y, <vscale x 2 x i8> %a, i32 %evl)120  ret <vscale x 2 x i8> %u121}122 123define <vscale x 2 x i8> @vmadd_vx_nxv2i8_unmasked(<vscale x 2 x i8> %a, i8 %b, <vscale x 2 x i8> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {124; CHECK-LABEL: vmadd_vx_nxv2i8_unmasked:125; CHECK:       # %bb.0:126; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, tu, ma127; CHECK-NEXT:    vmadd.vx v8, a0, v9128; CHECK-NEXT:    ret129  %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0130  %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer131  %x = call <vscale x 2 x i8> @llvm.vp.mul.nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)132  %y = call <vscale x 2 x i8> @llvm.vp.add.nxv2i8(<vscale x 2 x i8> %x, <vscale x 2 x i8> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)133  %u = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i8> %y, <vscale x 2 x i8> %a, i32 %evl)134  ret <vscale x 2 x i8> %u135}136 137define <vscale x 2 x i8> @vmadd_vv_nxv2i8_ta(<vscale x 2 x i8> %a, <vscale x 2 x i8> %b, <vscale x 2 x i8> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {138; CHECK-LABEL: vmadd_vv_nxv2i8_ta:139; CHECK:       # %bb.0:140; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, ta, mu141; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t142; CHECK-NEXT:    ret143  %x = call <vscale x 2 x i8> @llvm.vp.mul.nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)144  %y = call <vscale x 2 x i8> @llvm.vp.add.nxv2i8(<vscale x 2 x i8> %x, <vscale x 2 x i8> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)145  %u = call <vscale x 2 x i8> @llvm.vp.select.nxv2i8(<vscale x 2 x i1> %m, <vscale x 2 x i8> %y, <vscale x 2 x i8> %a, i32 %evl)146  ret <vscale x 2 x i8> %u147}148 149define <vscale x 2 x i8> @vmadd_vx_nxv2i8_ta(<vscale x 2 x i8> %a, i8 %b, <vscale x 2 x i8> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {150; CHECK-LABEL: vmadd_vx_nxv2i8_ta:151; CHECK:       # %bb.0:152; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, mu153; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t154; CHECK-NEXT:    ret155  %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0156  %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer157  %x = call <vscale x 2 x i8> @llvm.vp.mul.nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)158  %y = call <vscale x 2 x i8> @llvm.vp.add.nxv2i8(<vscale x 2 x i8> %x, <vscale x 2 x i8> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)159  %u = call <vscale x 2 x i8> @llvm.vp.select.nxv2i8(<vscale x 2 x i1> %m, <vscale x 2 x i8> %y, <vscale x 2 x i8> %a, i32 %evl)160  ret <vscale x 2 x i8> %u161}162 163define <vscale x 4 x i8> @vmadd_vv_nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %b, <vscale x 4 x i8> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {164; CHECK-LABEL: vmadd_vv_nxv4i8:165; CHECK:       # %bb.0:166; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, tu, mu167; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t168; CHECK-NEXT:    ret169  %x = call <vscale x 4 x i8> @llvm.vp.mul.nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)170  %y = call <vscale x 4 x i8> @llvm.vp.add.nxv4i8(<vscale x 4 x i8> %x, <vscale x 4 x i8> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)171  %u = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> %m, <vscale x 4 x i8> %y, <vscale x 4 x i8> %a, i32 %evl)172  ret <vscale x 4 x i8> %u173}174 175define <vscale x 4 x i8> @vmadd_vv_nxv4i8_unmasked(<vscale x 4 x i8> %a, <vscale x 4 x i8> %b, <vscale x 4 x i8> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {176; CHECK-LABEL: vmadd_vv_nxv4i8_unmasked:177; CHECK:       # %bb.0:178; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, tu, ma179; CHECK-NEXT:    vmadd.vv v8, v9, v10180; CHECK-NEXT:    ret181  %x = call <vscale x 4 x i8> @llvm.vp.mul.nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)182  %y = call <vscale x 4 x i8> @llvm.vp.add.nxv4i8(<vscale x 4 x i8> %x, <vscale x 4 x i8> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)183  %u = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i8> %y, <vscale x 4 x i8> %a, i32 %evl)184  ret <vscale x 4 x i8> %u185}186 187define <vscale x 4 x i8> @vmadd_vx_nxv4i8(<vscale x 4 x i8> %a, i8 %b, <vscale x 4 x i8> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {188; CHECK-LABEL: vmadd_vx_nxv4i8:189; CHECK:       # %bb.0:190; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, tu, mu191; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t192; CHECK-NEXT:    ret193  %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0194  %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer195  %x = call <vscale x 4 x i8> @llvm.vp.mul.nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)196  %y = call <vscale x 4 x i8> @llvm.vp.add.nxv4i8(<vscale x 4 x i8> %x, <vscale x 4 x i8> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)197  %u = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> %m, <vscale x 4 x i8> %y, <vscale x 4 x i8> %a, i32 %evl)198  ret <vscale x 4 x i8> %u199}200 201define <vscale x 4 x i8> @vmadd_vx_nxv4i8_unmasked(<vscale x 4 x i8> %a, i8 %b, <vscale x 4 x i8> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {202; CHECK-LABEL: vmadd_vx_nxv4i8_unmasked:203; CHECK:       # %bb.0:204; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, tu, ma205; CHECK-NEXT:    vmadd.vx v8, a0, v9206; CHECK-NEXT:    ret207  %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0208  %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer209  %x = call <vscale x 4 x i8> @llvm.vp.mul.nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)210  %y = call <vscale x 4 x i8> @llvm.vp.add.nxv4i8(<vscale x 4 x i8> %x, <vscale x 4 x i8> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)211  %u = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i8> %y, <vscale x 4 x i8> %a, i32 %evl)212  ret <vscale x 4 x i8> %u213}214 215define <vscale x 4 x i8> @vmadd_vv_nxv4i8_ta(<vscale x 4 x i8> %a, <vscale x 4 x i8> %b, <vscale x 4 x i8> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {216; CHECK-LABEL: vmadd_vv_nxv4i8_ta:217; CHECK:       # %bb.0:218; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, mu219; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t220; CHECK-NEXT:    ret221  %x = call <vscale x 4 x i8> @llvm.vp.mul.nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)222  %y = call <vscale x 4 x i8> @llvm.vp.add.nxv4i8(<vscale x 4 x i8> %x, <vscale x 4 x i8> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)223  %u = call <vscale x 4 x i8> @llvm.vp.select.nxv4i8(<vscale x 4 x i1> %m, <vscale x 4 x i8> %y, <vscale x 4 x i8> %a, i32 %evl)224  ret <vscale x 4 x i8> %u225}226 227define <vscale x 4 x i8> @vmadd_vx_nxv4i8_ta(<vscale x 4 x i8> %a, i8 %b, <vscale x 4 x i8> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {228; CHECK-LABEL: vmadd_vx_nxv4i8_ta:229; CHECK:       # %bb.0:230; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, mu231; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t232; CHECK-NEXT:    ret233  %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0234  %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer235  %x = call <vscale x 4 x i8> @llvm.vp.mul.nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)236  %y = call <vscale x 4 x i8> @llvm.vp.add.nxv4i8(<vscale x 4 x i8> %x, <vscale x 4 x i8> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)237  %u = call <vscale x 4 x i8> @llvm.vp.select.nxv4i8(<vscale x 4 x i1> %m, <vscale x 4 x i8> %y, <vscale x 4 x i8> %a, i32 %evl)238  ret <vscale x 4 x i8> %u239}240 241define <vscale x 8 x i8> @vmadd_vv_nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i8> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {242; CHECK-LABEL: vmadd_vv_nxv8i8:243; CHECK:       # %bb.0:244; CHECK-NEXT:    vsetvli zero, a0, e8, m1, tu, mu245; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t246; CHECK-NEXT:    ret247  %x = call <vscale x 8 x i8> @llvm.vp.mul.nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)248  %y = call <vscale x 8 x i8> @llvm.vp.add.nxv8i8(<vscale x 8 x i8> %x, <vscale x 8 x i8> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)249  %u = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> %m, <vscale x 8 x i8> %y, <vscale x 8 x i8> %a, i32 %evl)250  ret <vscale x 8 x i8> %u251}252 253define <vscale x 8 x i8> @vmadd_vv_nxv8i8_unmasked(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i8> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {254; CHECK-LABEL: vmadd_vv_nxv8i8_unmasked:255; CHECK:       # %bb.0:256; CHECK-NEXT:    vsetvli zero, a0, e8, m1, tu, ma257; CHECK-NEXT:    vmadd.vv v8, v9, v10258; CHECK-NEXT:    ret259  %x = call <vscale x 8 x i8> @llvm.vp.mul.nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)260  %y = call <vscale x 8 x i8> @llvm.vp.add.nxv8i8(<vscale x 8 x i8> %x, <vscale x 8 x i8> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)261  %u = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i8> %y, <vscale x 8 x i8> %a, i32 %evl)262  ret <vscale x 8 x i8> %u263}264 265define <vscale x 8 x i8> @vmadd_vx_nxv8i8(<vscale x 8 x i8> %a, i8 %b, <vscale x 8 x i8> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {266; CHECK-LABEL: vmadd_vx_nxv8i8:267; CHECK:       # %bb.0:268; CHECK-NEXT:    vsetvli zero, a1, e8, m1, tu, mu269; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t270; CHECK-NEXT:    ret271  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0272  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer273  %x = call <vscale x 8 x i8> @llvm.vp.mul.nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)274  %y = call <vscale x 8 x i8> @llvm.vp.add.nxv8i8(<vscale x 8 x i8> %x, <vscale x 8 x i8> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)275  %u = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> %m, <vscale x 8 x i8> %y, <vscale x 8 x i8> %a, i32 %evl)276  ret <vscale x 8 x i8> %u277}278 279define <vscale x 8 x i8> @vmadd_vx_nxv8i8_unmasked(<vscale x 8 x i8> %a, i8 %b, <vscale x 8 x i8> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {280; CHECK-LABEL: vmadd_vx_nxv8i8_unmasked:281; CHECK:       # %bb.0:282; CHECK-NEXT:    vsetvli zero, a1, e8, m1, tu, ma283; CHECK-NEXT:    vmadd.vx v8, a0, v9284; CHECK-NEXT:    ret285  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0286  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer287  %x = call <vscale x 8 x i8> @llvm.vp.mul.nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)288  %y = call <vscale x 8 x i8> @llvm.vp.add.nxv8i8(<vscale x 8 x i8> %x, <vscale x 8 x i8> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)289  %u = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i8> %y, <vscale x 8 x i8> %a, i32 %evl)290  ret <vscale x 8 x i8> %u291}292 293define <vscale x 8 x i8> @vmadd_vv_nxv8i8_ta(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i8> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {294; CHECK-LABEL: vmadd_vv_nxv8i8_ta:295; CHECK:       # %bb.0:296; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, mu297; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t298; CHECK-NEXT:    ret299  %x = call <vscale x 8 x i8> @llvm.vp.mul.nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)300  %y = call <vscale x 8 x i8> @llvm.vp.add.nxv8i8(<vscale x 8 x i8> %x, <vscale x 8 x i8> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)301  %u = call <vscale x 8 x i8> @llvm.vp.select.nxv8i8(<vscale x 8 x i1> %m, <vscale x 8 x i8> %y, <vscale x 8 x i8> %a, i32 %evl)302  ret <vscale x 8 x i8> %u303}304 305define <vscale x 8 x i8> @vmadd_vx_nxv8i8_ta(<vscale x 8 x i8> %a, i8 %b, <vscale x 8 x i8> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {306; CHECK-LABEL: vmadd_vx_nxv8i8_ta:307; CHECK:       # %bb.0:308; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, mu309; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t310; CHECK-NEXT:    ret311  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0312  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer313  %x = call <vscale x 8 x i8> @llvm.vp.mul.nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)314  %y = call <vscale x 8 x i8> @llvm.vp.add.nxv8i8(<vscale x 8 x i8> %x, <vscale x 8 x i8> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)315  %u = call <vscale x 8 x i8> @llvm.vp.select.nxv8i8(<vscale x 8 x i1> %m, <vscale x 8 x i8> %y, <vscale x 8 x i8> %a, i32 %evl)316  ret <vscale x 8 x i8> %u317}318 319define <vscale x 16 x i8> @vmadd_vv_nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {320; CHECK-LABEL: vmadd_vv_nxv16i8:321; CHECK:       # %bb.0:322; CHECK-NEXT:    vsetvli zero, a0, e8, m2, tu, mu323; CHECK-NEXT:    vmadd.vv v8, v10, v12, v0.t324; CHECK-NEXT:    ret325  %x = call <vscale x 16 x i8> @llvm.vp.mul.nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)326  %y = call <vscale x 16 x i8> @llvm.vp.add.nxv16i8(<vscale x 16 x i8> %x, <vscale x 16 x i8> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)327  %u = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> %m, <vscale x 16 x i8> %y, <vscale x 16 x i8> %a, i32 %evl)328  ret <vscale x 16 x i8> %u329}330 331define <vscale x 16 x i8> @vmadd_vv_nxv16i8_unmasked(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {332; CHECK-LABEL: vmadd_vv_nxv16i8_unmasked:333; CHECK:       # %bb.0:334; CHECK-NEXT:    vsetvli zero, a0, e8, m2, tu, ma335; CHECK-NEXT:    vmadd.vv v8, v10, v12336; CHECK-NEXT:    ret337  %x = call <vscale x 16 x i8> @llvm.vp.mul.nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)338  %y = call <vscale x 16 x i8> @llvm.vp.add.nxv16i8(<vscale x 16 x i8> %x, <vscale x 16 x i8> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)339  %u = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> splat (i1 -1), <vscale x 16 x i8> %y, <vscale x 16 x i8> %a, i32 %evl)340  ret <vscale x 16 x i8> %u341}342 343define <vscale x 16 x i8> @vmadd_vx_nxv16i8(<vscale x 16 x i8> %a, i8 %b, <vscale x 16 x i8> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {344; CHECK-LABEL: vmadd_vx_nxv16i8:345; CHECK:       # %bb.0:346; CHECK-NEXT:    vsetvli zero, a1, e8, m2, tu, mu347; CHECK-NEXT:    vmadd.vx v8, a0, v10, v0.t348; CHECK-NEXT:    ret349  %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0350  %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer351  %x = call <vscale x 16 x i8> @llvm.vp.mul.nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)352  %y = call <vscale x 16 x i8> @llvm.vp.add.nxv16i8(<vscale x 16 x i8> %x, <vscale x 16 x i8> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)353  %u = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> %m, <vscale x 16 x i8> %y, <vscale x 16 x i8> %a, i32 %evl)354  ret <vscale x 16 x i8> %u355}356 357define <vscale x 16 x i8> @vmadd_vx_nxv16i8_unmasked(<vscale x 16 x i8> %a, i8 %b, <vscale x 16 x i8> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {358; CHECK-LABEL: vmadd_vx_nxv16i8_unmasked:359; CHECK:       # %bb.0:360; CHECK-NEXT:    vsetvli zero, a1, e8, m2, tu, ma361; CHECK-NEXT:    vmadd.vx v8, a0, v10362; CHECK-NEXT:    ret363  %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0364  %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer365  %x = call <vscale x 16 x i8> @llvm.vp.mul.nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)366  %y = call <vscale x 16 x i8> @llvm.vp.add.nxv16i8(<vscale x 16 x i8> %x, <vscale x 16 x i8> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)367  %u = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> splat (i1 -1), <vscale x 16 x i8> %y, <vscale x 16 x i8> %a, i32 %evl)368  ret <vscale x 16 x i8> %u369}370 371define <vscale x 16 x i8> @vmadd_vv_nxv16i8_ta(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {372; CHECK-LABEL: vmadd_vv_nxv16i8_ta:373; CHECK:       # %bb.0:374; CHECK-NEXT:    vsetvli zero, a0, e8, m2, ta, mu375; CHECK-NEXT:    vmadd.vv v8, v10, v12, v0.t376; CHECK-NEXT:    ret377  %x = call <vscale x 16 x i8> @llvm.vp.mul.nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)378  %y = call <vscale x 16 x i8> @llvm.vp.add.nxv16i8(<vscale x 16 x i8> %x, <vscale x 16 x i8> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)379  %u = call <vscale x 16 x i8> @llvm.vp.select.nxv16i8(<vscale x 16 x i1> %m, <vscale x 16 x i8> %y, <vscale x 16 x i8> %a, i32 %evl)380  ret <vscale x 16 x i8> %u381}382 383define <vscale x 16 x i8> @vmadd_vx_nxv16i8_ta(<vscale x 16 x i8> %a, i8 %b, <vscale x 16 x i8> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {384; CHECK-LABEL: vmadd_vx_nxv16i8_ta:385; CHECK:       # %bb.0:386; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, mu387; CHECK-NEXT:    vmadd.vx v8, a0, v10, v0.t388; CHECK-NEXT:    ret389  %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0390  %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer391  %x = call <vscale x 16 x i8> @llvm.vp.mul.nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)392  %y = call <vscale x 16 x i8> @llvm.vp.add.nxv16i8(<vscale x 16 x i8> %x, <vscale x 16 x i8> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)393  %u = call <vscale x 16 x i8> @llvm.vp.select.nxv16i8(<vscale x 16 x i1> %m, <vscale x 16 x i8> %y, <vscale x 16 x i8> %a, i32 %evl)394  ret <vscale x 16 x i8> %u395}396 397define <vscale x 32 x i8> @vmadd_vv_nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %b, <vscale x 32 x i8> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {398; CHECK-LABEL: vmadd_vv_nxv32i8:399; CHECK:       # %bb.0:400; CHECK-NEXT:    vsetvli zero, a0, e8, m4, tu, mu401; CHECK-NEXT:    vmadd.vv v8, v12, v16, v0.t402; CHECK-NEXT:    ret403  %x = call <vscale x 32 x i8> @llvm.vp.mul.nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %b, <vscale x 32 x i1> splat (i1 -1), i32 %evl)404  %y = call <vscale x 32 x i8> @llvm.vp.add.nxv32i8(<vscale x 32 x i8> %x, <vscale x 32 x i8> %c, <vscale x 32 x i1> splat (i1 -1), i32 %evl)405  %u = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> %m, <vscale x 32 x i8> %y, <vscale x 32 x i8> %a, i32 %evl)406  ret <vscale x 32 x i8> %u407}408 409define <vscale x 32 x i8> @vmadd_vv_nxv32i8_unmasked(<vscale x 32 x i8> %a, <vscale x 32 x i8> %b, <vscale x 32 x i8> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {410; CHECK-LABEL: vmadd_vv_nxv32i8_unmasked:411; CHECK:       # %bb.0:412; CHECK-NEXT:    vsetvli zero, a0, e8, m4, tu, ma413; CHECK-NEXT:    vmadd.vv v8, v12, v16414; CHECK-NEXT:    ret415  %x = call <vscale x 32 x i8> @llvm.vp.mul.nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %b, <vscale x 32 x i1> splat (i1 -1), i32 %evl)416  %y = call <vscale x 32 x i8> @llvm.vp.add.nxv32i8(<vscale x 32 x i8> %x, <vscale x 32 x i8> %c, <vscale x 32 x i1> splat (i1 -1), i32 %evl)417  %u = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> splat (i1 -1), <vscale x 32 x i8> %y, <vscale x 32 x i8> %a, i32 %evl)418  ret <vscale x 32 x i8> %u419}420 421define <vscale x 32 x i8> @vmadd_vx_nxv32i8(<vscale x 32 x i8> %a, i8 %b, <vscale x 32 x i8> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {422; CHECK-LABEL: vmadd_vx_nxv32i8:423; CHECK:       # %bb.0:424; CHECK-NEXT:    vsetvli zero, a1, e8, m4, tu, mu425; CHECK-NEXT:    vmadd.vx v8, a0, v12, v0.t426; CHECK-NEXT:    ret427  %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0428  %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer429  %x = call <vscale x 32 x i8> @llvm.vp.mul.nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %vb, <vscale x 32 x i1> splat (i1 -1), i32 %evl)430  %y = call <vscale x 32 x i8> @llvm.vp.add.nxv32i8(<vscale x 32 x i8> %x, <vscale x 32 x i8> %c, <vscale x 32 x i1> splat (i1 -1), i32 %evl)431  %u = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> %m, <vscale x 32 x i8> %y, <vscale x 32 x i8> %a, i32 %evl)432  ret <vscale x 32 x i8> %u433}434 435define <vscale x 32 x i8> @vmadd_vx_nxv32i8_unmasked(<vscale x 32 x i8> %a, i8 %b, <vscale x 32 x i8> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {436; CHECK-LABEL: vmadd_vx_nxv32i8_unmasked:437; CHECK:       # %bb.0:438; CHECK-NEXT:    vsetvli zero, a1, e8, m4, tu, ma439; CHECK-NEXT:    vmadd.vx v8, a0, v12440; CHECK-NEXT:    ret441  %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0442  %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer443  %x = call <vscale x 32 x i8> @llvm.vp.mul.nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %vb, <vscale x 32 x i1> splat (i1 -1), i32 %evl)444  %y = call <vscale x 32 x i8> @llvm.vp.add.nxv32i8(<vscale x 32 x i8> %x, <vscale x 32 x i8> %c, <vscale x 32 x i1> splat (i1 -1), i32 %evl)445  %u = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> splat (i1 -1), <vscale x 32 x i8> %y, <vscale x 32 x i8> %a, i32 %evl)446  ret <vscale x 32 x i8> %u447}448 449define <vscale x 32 x i8> @vmadd_vv_nxv32i8_ta(<vscale x 32 x i8> %a, <vscale x 32 x i8> %b, <vscale x 32 x i8> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {450; CHECK-LABEL: vmadd_vv_nxv32i8_ta:451; CHECK:       # %bb.0:452; CHECK-NEXT:    vsetvli zero, a0, e8, m4, ta, mu453; CHECK-NEXT:    vmadd.vv v8, v12, v16, v0.t454; CHECK-NEXT:    ret455  %x = call <vscale x 32 x i8> @llvm.vp.mul.nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %b, <vscale x 32 x i1> splat (i1 -1), i32 %evl)456  %y = call <vscale x 32 x i8> @llvm.vp.add.nxv32i8(<vscale x 32 x i8> %x, <vscale x 32 x i8> %c, <vscale x 32 x i1> splat (i1 -1), i32 %evl)457  %u = call <vscale x 32 x i8> @llvm.vp.select.nxv32i8(<vscale x 32 x i1> %m, <vscale x 32 x i8> %y, <vscale x 32 x i8> %a, i32 %evl)458  ret <vscale x 32 x i8> %u459}460 461define <vscale x 32 x i8> @vmadd_vx_nxv32i8_ta(<vscale x 32 x i8> %a, i8 %b, <vscale x 32 x i8> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {462; CHECK-LABEL: vmadd_vx_nxv32i8_ta:463; CHECK:       # %bb.0:464; CHECK-NEXT:    vsetvli zero, a1, e8, m4, ta, mu465; CHECK-NEXT:    vmadd.vx v8, a0, v12, v0.t466; CHECK-NEXT:    ret467  %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0468  %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer469  %x = call <vscale x 32 x i8> @llvm.vp.mul.nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %vb, <vscale x 32 x i1> splat (i1 -1), i32 %evl)470  %y = call <vscale x 32 x i8> @llvm.vp.add.nxv32i8(<vscale x 32 x i8> %x, <vscale x 32 x i8> %c, <vscale x 32 x i1> splat (i1 -1), i32 %evl)471  %u = call <vscale x 32 x i8> @llvm.vp.select.nxv32i8(<vscale x 32 x i1> %m, <vscale x 32 x i8> %y, <vscale x 32 x i8> %a, i32 %evl)472  ret <vscale x 32 x i8> %u473}474 475define <vscale x 64 x i8> @vmadd_vv_nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b, <vscale x 64 x i8> %c,  <vscale x 64 x i1> %m, i32 zeroext %evl) {476; CHECK-LABEL: vmadd_vv_nxv64i8:477; CHECK:       # %bb.0:478; CHECK-NEXT:    vl8r.v v24, (a0)479; CHECK-NEXT:    vsetvli zero, a1, e8, m8, tu, mu480; CHECK-NEXT:    vmadd.vv v8, v16, v24, v0.t481; CHECK-NEXT:    ret482  %x = call <vscale x 64 x i8> @llvm.vp.mul.nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b, <vscale x 64 x i1> splat (i1 -1), i32 %evl)483  %y = call <vscale x 64 x i8> @llvm.vp.add.nxv64i8(<vscale x 64 x i8> %x, <vscale x 64 x i8> %c, <vscale x 64 x i1> splat (i1 -1), i32 %evl)484  %u = call <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1> %m, <vscale x 64 x i8> %y, <vscale x 64 x i8> %a, i32 %evl)485  ret <vscale x 64 x i8> %u486}487 488define <vscale x 64 x i8> @vmadd_vv_nxv64i8_unmasked(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b, <vscale x 64 x i8> %c,  <vscale x 64 x i1> %m, i32 zeroext %evl) {489; CHECK-LABEL: vmadd_vv_nxv64i8_unmasked:490; CHECK:       # %bb.0:491; CHECK-NEXT:    vl8r.v v24, (a0)492; CHECK-NEXT:    vsetvli zero, a1, e8, m8, tu, ma493; CHECK-NEXT:    vmadd.vv v8, v16, v24494; CHECK-NEXT:    ret495  %x = call <vscale x 64 x i8> @llvm.vp.mul.nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b, <vscale x 64 x i1> splat (i1 -1), i32 %evl)496  %y = call <vscale x 64 x i8> @llvm.vp.add.nxv64i8(<vscale x 64 x i8> %x, <vscale x 64 x i8> %c, <vscale x 64 x i1> splat (i1 -1), i32 %evl)497  %u = call <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1> splat (i1 -1), <vscale x 64 x i8> %y, <vscale x 64 x i8> %a, i32 %evl)498  ret <vscale x 64 x i8> %u499}500 501define <vscale x 64 x i8> @vmadd_vx_nxv64i8(<vscale x 64 x i8> %a, i8 %b, <vscale x 64 x i8> %c,  <vscale x 64 x i1> %m, i32 zeroext %evl) {502; CHECK-LABEL: vmadd_vx_nxv64i8:503; CHECK:       # %bb.0:504; CHECK-NEXT:    vsetvli zero, a1, e8, m8, tu, mu505; CHECK-NEXT:    vmadd.vx v8, a0, v16, v0.t506; CHECK-NEXT:    ret507  %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0508  %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer509  %x = call <vscale x 64 x i8> @llvm.vp.mul.nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %vb, <vscale x 64 x i1> splat (i1 -1), i32 %evl)510  %y = call <vscale x 64 x i8> @llvm.vp.add.nxv64i8(<vscale x 64 x i8> %x, <vscale x 64 x i8> %c, <vscale x 64 x i1> splat (i1 -1), i32 %evl)511  %u = call <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1> %m, <vscale x 64 x i8> %y, <vscale x 64 x i8> %a, i32 %evl)512  ret <vscale x 64 x i8> %u513}514 515define <vscale x 64 x i8> @vmadd_vx_nxv64i8_unmasked(<vscale x 64 x i8> %a, i8 %b, <vscale x 64 x i8> %c,  <vscale x 64 x i1> %m, i32 zeroext %evl) {516; CHECK-LABEL: vmadd_vx_nxv64i8_unmasked:517; CHECK:       # %bb.0:518; CHECK-NEXT:    vsetvli zero, a1, e8, m8, tu, ma519; CHECK-NEXT:    vmadd.vx v8, a0, v16520; CHECK-NEXT:    ret521  %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0522  %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer523  %x = call <vscale x 64 x i8> @llvm.vp.mul.nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %vb, <vscale x 64 x i1> splat (i1 -1), i32 %evl)524  %y = call <vscale x 64 x i8> @llvm.vp.add.nxv64i8(<vscale x 64 x i8> %x, <vscale x 64 x i8> %c, <vscale x 64 x i1> splat (i1 -1), i32 %evl)525  %u = call <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1> splat (i1 -1), <vscale x 64 x i8> %y, <vscale x 64 x i8> %a, i32 %evl)526  ret <vscale x 64 x i8> %u527}528 529define <vscale x 64 x i8> @vmadd_vv_nxv64i8_ta(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b, <vscale x 64 x i8> %c,  <vscale x 64 x i1> %m, i32 zeroext %evl) {530; CHECK-LABEL: vmadd_vv_nxv64i8_ta:531; CHECK:       # %bb.0:532; CHECK-NEXT:    vl8r.v v24, (a0)533; CHECK-NEXT:    vsetvli zero, a1, e8, m8, ta, mu534; CHECK-NEXT:    vmadd.vv v8, v16, v24, v0.t535; CHECK-NEXT:    ret536  %x = call <vscale x 64 x i8> @llvm.vp.mul.nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b, <vscale x 64 x i1> splat (i1 -1), i32 %evl)537  %y = call <vscale x 64 x i8> @llvm.vp.add.nxv64i8(<vscale x 64 x i8> %x, <vscale x 64 x i8> %c, <vscale x 64 x i1> splat (i1 -1), i32 %evl)538  %u = call <vscale x 64 x i8> @llvm.vp.select.nxv64i8(<vscale x 64 x i1> %m, <vscale x 64 x i8> %y, <vscale x 64 x i8> %a, i32 %evl)539  ret <vscale x 64 x i8> %u540}541 542define <vscale x 64 x i8> @vmadd_vx_nxv64i8_ta(<vscale x 64 x i8> %a, i8 %b, <vscale x 64 x i8> %c,  <vscale x 64 x i1> %m, i32 zeroext %evl) {543; CHECK-LABEL: vmadd_vx_nxv64i8_ta:544; CHECK:       # %bb.0:545; CHECK-NEXT:    vsetvli zero, a1, e8, m8, ta, mu546; CHECK-NEXT:    vmadd.vx v8, a0, v16, v0.t547; CHECK-NEXT:    ret548  %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0549  %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer550  %x = call <vscale x 64 x i8> @llvm.vp.mul.nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %vb, <vscale x 64 x i1> splat (i1 -1), i32 %evl)551  %y = call <vscale x 64 x i8> @llvm.vp.add.nxv64i8(<vscale x 64 x i8> %x, <vscale x 64 x i8> %c, <vscale x 64 x i1> splat (i1 -1), i32 %evl)552  %u = call <vscale x 64 x i8> @llvm.vp.select.nxv64i8(<vscale x 64 x i1> %m, <vscale x 64 x i8> %y, <vscale x 64 x i8> %a, i32 %evl)553  ret <vscale x 64 x i8> %u554}555 556define <vscale x 1 x i16> @vmadd_vv_nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %b, <vscale x 1 x i16> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {557; CHECK-LABEL: vmadd_vv_nxv1i16:558; CHECK:       # %bb.0:559; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, tu, mu560; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t561; CHECK-NEXT:    ret562  %x = call <vscale x 1 x i16> @llvm.vp.mul.nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)563  %y = call <vscale x 1 x i16> @llvm.vp.add.nxv1i16(<vscale x 1 x i16> %x, <vscale x 1 x i16> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)564  %u = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> %m, <vscale x 1 x i16> %y, <vscale x 1 x i16> %a, i32 %evl)565  ret <vscale x 1 x i16> %u566}567 568define <vscale x 1 x i16> @vmadd_vv_nxv1i16_unmasked(<vscale x 1 x i16> %a, <vscale x 1 x i16> %b, <vscale x 1 x i16> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {569; CHECK-LABEL: vmadd_vv_nxv1i16_unmasked:570; CHECK:       # %bb.0:571; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, tu, ma572; CHECK-NEXT:    vmadd.vv v8, v9, v10573; CHECK-NEXT:    ret574  %x = call <vscale x 1 x i16> @llvm.vp.mul.nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)575  %y = call <vscale x 1 x i16> @llvm.vp.add.nxv1i16(<vscale x 1 x i16> %x, <vscale x 1 x i16> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)576  %u = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i16> %y, <vscale x 1 x i16> %a, i32 %evl)577  ret <vscale x 1 x i16> %u578}579 580define <vscale x 1 x i16> @vmadd_vx_nxv1i16(<vscale x 1 x i16> %a, i16 %b, <vscale x 1 x i16> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {581; CHECK-LABEL: vmadd_vx_nxv1i16:582; CHECK:       # %bb.0:583; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, tu, mu584; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t585; CHECK-NEXT:    ret586  %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0587  %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer588  %x = call <vscale x 1 x i16> @llvm.vp.mul.nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)589  %y = call <vscale x 1 x i16> @llvm.vp.add.nxv1i16(<vscale x 1 x i16> %x, <vscale x 1 x i16> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)590  %u = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> %m, <vscale x 1 x i16> %y, <vscale x 1 x i16> %a, i32 %evl)591  ret <vscale x 1 x i16> %u592}593 594define <vscale x 1 x i16> @vmadd_vx_nxv1i16_unmasked(<vscale x 1 x i16> %a, i16 %b, <vscale x 1 x i16> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {595; CHECK-LABEL: vmadd_vx_nxv1i16_unmasked:596; CHECK:       # %bb.0:597; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, tu, ma598; CHECK-NEXT:    vmadd.vx v8, a0, v9599; CHECK-NEXT:    ret600  %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0601  %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer602  %x = call <vscale x 1 x i16> @llvm.vp.mul.nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)603  %y = call <vscale x 1 x i16> @llvm.vp.add.nxv1i16(<vscale x 1 x i16> %x, <vscale x 1 x i16> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)604  %u = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i16> %y, <vscale x 1 x i16> %a, i32 %evl)605  ret <vscale x 1 x i16> %u606}607 608define <vscale x 1 x i16> @vmadd_vv_nxv1i16_ta(<vscale x 1 x i16> %a, <vscale x 1 x i16> %b, <vscale x 1 x i16> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {609; CHECK-LABEL: vmadd_vv_nxv1i16_ta:610; CHECK:       # %bb.0:611; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, mu612; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t613; CHECK-NEXT:    ret614  %x = call <vscale x 1 x i16> @llvm.vp.mul.nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)615  %y = call <vscale x 1 x i16> @llvm.vp.add.nxv1i16(<vscale x 1 x i16> %x, <vscale x 1 x i16> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)616  %u = call <vscale x 1 x i16> @llvm.vp.select.nxv1i16(<vscale x 1 x i1> %m, <vscale x 1 x i16> %y, <vscale x 1 x i16> %a, i32 %evl)617  ret <vscale x 1 x i16> %u618}619 620define <vscale x 1 x i16> @vmadd_vx_nxv1i16_ta(<vscale x 1 x i16> %a, i16 %b, <vscale x 1 x i16> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {621; CHECK-LABEL: vmadd_vx_nxv1i16_ta:622; CHECK:       # %bb.0:623; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, mu624; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t625; CHECK-NEXT:    ret626  %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0627  %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer628  %x = call <vscale x 1 x i16> @llvm.vp.mul.nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)629  %y = call <vscale x 1 x i16> @llvm.vp.add.nxv1i16(<vscale x 1 x i16> %x, <vscale x 1 x i16> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)630  %u = call <vscale x 1 x i16> @llvm.vp.select.nxv1i16(<vscale x 1 x i1> %m, <vscale x 1 x i16> %y, <vscale x 1 x i16> %a, i32 %evl)631  ret <vscale x 1 x i16> %u632}633 634define <vscale x 2 x i16> @vmadd_vv_nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, <vscale x 2 x i16> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {635; CHECK-LABEL: vmadd_vv_nxv2i16:636; CHECK:       # %bb.0:637; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, tu, mu638; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t639; CHECK-NEXT:    ret640  %x = call <vscale x 2 x i16> @llvm.vp.mul.nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)641  %y = call <vscale x 2 x i16> @llvm.vp.add.nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)642  %u = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> %m, <vscale x 2 x i16> %y, <vscale x 2 x i16> %a, i32 %evl)643  ret <vscale x 2 x i16> %u644}645 646define <vscale x 2 x i16> @vmadd_vv_nxv2i16_unmasked(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, <vscale x 2 x i16> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {647; CHECK-LABEL: vmadd_vv_nxv2i16_unmasked:648; CHECK:       # %bb.0:649; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, tu, ma650; CHECK-NEXT:    vmadd.vv v8, v9, v10651; CHECK-NEXT:    ret652  %x = call <vscale x 2 x i16> @llvm.vp.mul.nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)653  %y = call <vscale x 2 x i16> @llvm.vp.add.nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)654  %u = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i16> %y, <vscale x 2 x i16> %a, i32 %evl)655  ret <vscale x 2 x i16> %u656}657 658define <vscale x 2 x i16> @vmadd_vx_nxv2i16(<vscale x 2 x i16> %a, i16 %b, <vscale x 2 x i16> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {659; CHECK-LABEL: vmadd_vx_nxv2i16:660; CHECK:       # %bb.0:661; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, tu, mu662; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t663; CHECK-NEXT:    ret664  %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0665  %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer666  %x = call <vscale x 2 x i16> @llvm.vp.mul.nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)667  %y = call <vscale x 2 x i16> @llvm.vp.add.nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)668  %u = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> %m, <vscale x 2 x i16> %y, <vscale x 2 x i16> %a, i32 %evl)669  ret <vscale x 2 x i16> %u670}671 672define <vscale x 2 x i16> @vmadd_vx_nxv2i16_unmasked(<vscale x 2 x i16> %a, i16 %b, <vscale x 2 x i16> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {673; CHECK-LABEL: vmadd_vx_nxv2i16_unmasked:674; CHECK:       # %bb.0:675; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, tu, ma676; CHECK-NEXT:    vmadd.vx v8, a0, v9677; CHECK-NEXT:    ret678  %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0679  %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer680  %x = call <vscale x 2 x i16> @llvm.vp.mul.nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)681  %y = call <vscale x 2 x i16> @llvm.vp.add.nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)682  %u = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i16> %y, <vscale x 2 x i16> %a, i32 %evl)683  ret <vscale x 2 x i16> %u684}685 686define <vscale x 2 x i16> @vmadd_vv_nxv2i16_ta(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, <vscale x 2 x i16> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {687; CHECK-LABEL: vmadd_vv_nxv2i16_ta:688; CHECK:       # %bb.0:689; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, mu690; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t691; CHECK-NEXT:    ret692  %x = call <vscale x 2 x i16> @llvm.vp.mul.nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)693  %y = call <vscale x 2 x i16> @llvm.vp.add.nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)694  %u = call <vscale x 2 x i16> @llvm.vp.select.nxv2i16(<vscale x 2 x i1> %m, <vscale x 2 x i16> %y, <vscale x 2 x i16> %a, i32 %evl)695  ret <vscale x 2 x i16> %u696}697 698define <vscale x 2 x i16> @vmadd_vx_nxv2i16_ta(<vscale x 2 x i16> %a, i16 %b, <vscale x 2 x i16> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {699; CHECK-LABEL: vmadd_vx_nxv2i16_ta:700; CHECK:       # %bb.0:701; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, mu702; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t703; CHECK-NEXT:    ret704  %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0705  %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer706  %x = call <vscale x 2 x i16> @llvm.vp.mul.nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)707  %y = call <vscale x 2 x i16> @llvm.vp.add.nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)708  %u = call <vscale x 2 x i16> @llvm.vp.select.nxv2i16(<vscale x 2 x i1> %m, <vscale x 2 x i16> %y, <vscale x 2 x i16> %a, i32 %evl)709  ret <vscale x 2 x i16> %u710}711 712define <vscale x 4 x i16> @vmadd_vv_nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b, <vscale x 4 x i16> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {713; CHECK-LABEL: vmadd_vv_nxv4i16:714; CHECK:       # %bb.0:715; CHECK-NEXT:    vsetvli zero, a0, e16, m1, tu, mu716; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t717; CHECK-NEXT:    ret718  %x = call <vscale x 4 x i16> @llvm.vp.mul.nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)719  %y = call <vscale x 4 x i16> @llvm.vp.add.nxv4i16(<vscale x 4 x i16> %x, <vscale x 4 x i16> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)720  %u = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> %m, <vscale x 4 x i16> %y, <vscale x 4 x i16> %a, i32 %evl)721  ret <vscale x 4 x i16> %u722}723 724define <vscale x 4 x i16> @vmadd_vv_nxv4i16_unmasked(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b, <vscale x 4 x i16> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {725; CHECK-LABEL: vmadd_vv_nxv4i16_unmasked:726; CHECK:       # %bb.0:727; CHECK-NEXT:    vsetvli zero, a0, e16, m1, tu, ma728; CHECK-NEXT:    vmadd.vv v8, v9, v10729; CHECK-NEXT:    ret730  %x = call <vscale x 4 x i16> @llvm.vp.mul.nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)731  %y = call <vscale x 4 x i16> @llvm.vp.add.nxv4i16(<vscale x 4 x i16> %x, <vscale x 4 x i16> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)732  %u = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i16> %y, <vscale x 4 x i16> %a, i32 %evl)733  ret <vscale x 4 x i16> %u734}735 736define <vscale x 4 x i16> @vmadd_vx_nxv4i16(<vscale x 4 x i16> %a, i16 %b, <vscale x 4 x i16> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {737; CHECK-LABEL: vmadd_vx_nxv4i16:738; CHECK:       # %bb.0:739; CHECK-NEXT:    vsetvli zero, a1, e16, m1, tu, mu740; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t741; CHECK-NEXT:    ret742  %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0743  %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer744  %x = call <vscale x 4 x i16> @llvm.vp.mul.nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)745  %y = call <vscale x 4 x i16> @llvm.vp.add.nxv4i16(<vscale x 4 x i16> %x, <vscale x 4 x i16> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)746  %u = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> %m, <vscale x 4 x i16> %y, <vscale x 4 x i16> %a, i32 %evl)747  ret <vscale x 4 x i16> %u748}749 750define <vscale x 4 x i16> @vmadd_vx_nxv4i16_unmasked(<vscale x 4 x i16> %a, i16 %b, <vscale x 4 x i16> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {751; CHECK-LABEL: vmadd_vx_nxv4i16_unmasked:752; CHECK:       # %bb.0:753; CHECK-NEXT:    vsetvli zero, a1, e16, m1, tu, ma754; CHECK-NEXT:    vmadd.vx v8, a0, v9755; CHECK-NEXT:    ret756  %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0757  %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer758  %x = call <vscale x 4 x i16> @llvm.vp.mul.nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)759  %y = call <vscale x 4 x i16> @llvm.vp.add.nxv4i16(<vscale x 4 x i16> %x, <vscale x 4 x i16> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)760  %u = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i16> %y, <vscale x 4 x i16> %a, i32 %evl)761  ret <vscale x 4 x i16> %u762}763 764define <vscale x 4 x i16> @vmadd_vv_nxv4i16_ta(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b, <vscale x 4 x i16> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {765; CHECK-LABEL: vmadd_vv_nxv4i16_ta:766; CHECK:       # %bb.0:767; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, mu768; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t769; CHECK-NEXT:    ret770  %x = call <vscale x 4 x i16> @llvm.vp.mul.nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)771  %y = call <vscale x 4 x i16> @llvm.vp.add.nxv4i16(<vscale x 4 x i16> %x, <vscale x 4 x i16> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)772  %u = call <vscale x 4 x i16> @llvm.vp.select.nxv4i16(<vscale x 4 x i1> %m, <vscale x 4 x i16> %y, <vscale x 4 x i16> %a, i32 %evl)773  ret <vscale x 4 x i16> %u774}775 776define <vscale x 4 x i16> @vmadd_vx_nxv4i16_ta(<vscale x 4 x i16> %a, i16 %b, <vscale x 4 x i16> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {777; CHECK-LABEL: vmadd_vx_nxv4i16_ta:778; CHECK:       # %bb.0:779; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, mu780; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t781; CHECK-NEXT:    ret782  %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0783  %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer784  %x = call <vscale x 4 x i16> @llvm.vp.mul.nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)785  %y = call <vscale x 4 x i16> @llvm.vp.add.nxv4i16(<vscale x 4 x i16> %x, <vscale x 4 x i16> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)786  %u = call <vscale x 4 x i16> @llvm.vp.select.nxv4i16(<vscale x 4 x i1> %m, <vscale x 4 x i16> %y, <vscale x 4 x i16> %a, i32 %evl)787  ret <vscale x 4 x i16> %u788}789 790define <vscale x 8 x i16> @vmadd_vv_nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b, <vscale x 8 x i16> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {791; CHECK-LABEL: vmadd_vv_nxv8i16:792; CHECK:       # %bb.0:793; CHECK-NEXT:    vsetvli zero, a0, e16, m2, tu, mu794; CHECK-NEXT:    vmadd.vv v8, v10, v12, v0.t795; CHECK-NEXT:    ret796  %x = call <vscale x 8 x i16> @llvm.vp.mul.nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)797  %y = call <vscale x 8 x i16> @llvm.vp.add.nxv8i16(<vscale x 8 x i16> %x, <vscale x 8 x i16> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)798  %u = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> %m, <vscale x 8 x i16> %y, <vscale x 8 x i16> %a, i32 %evl)799  ret <vscale x 8 x i16> %u800}801 802define <vscale x 8 x i16> @vmadd_vv_nxv8i16_unmasked(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b, <vscale x 8 x i16> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {803; CHECK-LABEL: vmadd_vv_nxv8i16_unmasked:804; CHECK:       # %bb.0:805; CHECK-NEXT:    vsetvli zero, a0, e16, m2, tu, ma806; CHECK-NEXT:    vmadd.vv v8, v10, v12807; CHECK-NEXT:    ret808  %x = call <vscale x 8 x i16> @llvm.vp.mul.nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)809  %y = call <vscale x 8 x i16> @llvm.vp.add.nxv8i16(<vscale x 8 x i16> %x, <vscale x 8 x i16> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)810  %u = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i16> %y, <vscale x 8 x i16> %a, i32 %evl)811  ret <vscale x 8 x i16> %u812}813 814define <vscale x 8 x i16> @vmadd_vx_nxv8i16(<vscale x 8 x i16> %a, i16 %b, <vscale x 8 x i16> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {815; CHECK-LABEL: vmadd_vx_nxv8i16:816; CHECK:       # %bb.0:817; CHECK-NEXT:    vsetvli zero, a1, e16, m2, tu, mu818; CHECK-NEXT:    vmadd.vx v8, a0, v10, v0.t819; CHECK-NEXT:    ret820  %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0821  %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer822  %x = call <vscale x 8 x i16> @llvm.vp.mul.nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)823  %y = call <vscale x 8 x i16> @llvm.vp.add.nxv8i16(<vscale x 8 x i16> %x, <vscale x 8 x i16> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)824  %u = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> %m, <vscale x 8 x i16> %y, <vscale x 8 x i16> %a, i32 %evl)825  ret <vscale x 8 x i16> %u826}827 828define <vscale x 8 x i16> @vmadd_vx_nxv8i16_unmasked(<vscale x 8 x i16> %a, i16 %b, <vscale x 8 x i16> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {829; CHECK-LABEL: vmadd_vx_nxv8i16_unmasked:830; CHECK:       # %bb.0:831; CHECK-NEXT:    vsetvli zero, a1, e16, m2, tu, ma832; CHECK-NEXT:    vmadd.vx v8, a0, v10833; CHECK-NEXT:    ret834  %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0835  %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer836  %x = call <vscale x 8 x i16> @llvm.vp.mul.nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)837  %y = call <vscale x 8 x i16> @llvm.vp.add.nxv8i16(<vscale x 8 x i16> %x, <vscale x 8 x i16> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)838  %u = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i16> %y, <vscale x 8 x i16> %a, i32 %evl)839  ret <vscale x 8 x i16> %u840}841 842define <vscale x 8 x i16> @vmadd_vv_nxv8i16_ta(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b, <vscale x 8 x i16> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {843; CHECK-LABEL: vmadd_vv_nxv8i16_ta:844; CHECK:       # %bb.0:845; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, mu846; CHECK-NEXT:    vmadd.vv v8, v10, v12, v0.t847; CHECK-NEXT:    ret848  %x = call <vscale x 8 x i16> @llvm.vp.mul.nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)849  %y = call <vscale x 8 x i16> @llvm.vp.add.nxv8i16(<vscale x 8 x i16> %x, <vscale x 8 x i16> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)850  %u = call <vscale x 8 x i16> @llvm.vp.select.nxv8i16(<vscale x 8 x i1> %m, <vscale x 8 x i16> %y, <vscale x 8 x i16> %a, i32 %evl)851  ret <vscale x 8 x i16> %u852}853 854define <vscale x 8 x i16> @vmadd_vx_nxv8i16_ta(<vscale x 8 x i16> %a, i16 %b, <vscale x 8 x i16> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {855; CHECK-LABEL: vmadd_vx_nxv8i16_ta:856; CHECK:       # %bb.0:857; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, mu858; CHECK-NEXT:    vmadd.vx v8, a0, v10, v0.t859; CHECK-NEXT:    ret860  %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0861  %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer862  %x = call <vscale x 8 x i16> @llvm.vp.mul.nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)863  %y = call <vscale x 8 x i16> @llvm.vp.add.nxv8i16(<vscale x 8 x i16> %x, <vscale x 8 x i16> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)864  %u = call <vscale x 8 x i16> @llvm.vp.select.nxv8i16(<vscale x 8 x i1> %m, <vscale x 8 x i16> %y, <vscale x 8 x i16> %a, i32 %evl)865  ret <vscale x 8 x i16> %u866}867 868define <vscale x 16 x i16> @vmadd_vv_nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %b, <vscale x 16 x i16> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {869; CHECK-LABEL: vmadd_vv_nxv16i16:870; CHECK:       # %bb.0:871; CHECK-NEXT:    vsetvli zero, a0, e16, m4, tu, mu872; CHECK-NEXT:    vmadd.vv v8, v12, v16, v0.t873; CHECK-NEXT:    ret874  %x = call <vscale x 16 x i16> @llvm.vp.mul.nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)875  %y = call <vscale x 16 x i16> @llvm.vp.add.nxv16i16(<vscale x 16 x i16> %x, <vscale x 16 x i16> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)876  %u = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> %m, <vscale x 16 x i16> %y, <vscale x 16 x i16> %a, i32 %evl)877  ret <vscale x 16 x i16> %u878}879 880define <vscale x 16 x i16> @vmadd_vv_nxv16i16_unmasked(<vscale x 16 x i16> %a, <vscale x 16 x i16> %b, <vscale x 16 x i16> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {881; CHECK-LABEL: vmadd_vv_nxv16i16_unmasked:882; CHECK:       # %bb.0:883; CHECK-NEXT:    vsetvli zero, a0, e16, m4, tu, ma884; CHECK-NEXT:    vmadd.vv v8, v12, v16885; CHECK-NEXT:    ret886  %x = call <vscale x 16 x i16> @llvm.vp.mul.nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)887  %y = call <vscale x 16 x i16> @llvm.vp.add.nxv16i16(<vscale x 16 x i16> %x, <vscale x 16 x i16> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)888  %u = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> splat (i1 -1), <vscale x 16 x i16> %y, <vscale x 16 x i16> %a, i32 %evl)889  ret <vscale x 16 x i16> %u890}891 892define <vscale x 16 x i16> @vmadd_vx_nxv16i16(<vscale x 16 x i16> %a, i16 %b, <vscale x 16 x i16> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {893; CHECK-LABEL: vmadd_vx_nxv16i16:894; CHECK:       # %bb.0:895; CHECK-NEXT:    vsetvli zero, a1, e16, m4, tu, mu896; CHECK-NEXT:    vmadd.vx v8, a0, v12, v0.t897; CHECK-NEXT:    ret898  %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0899  %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer900  %x = call <vscale x 16 x i16> @llvm.vp.mul.nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)901  %y = call <vscale x 16 x i16> @llvm.vp.add.nxv16i16(<vscale x 16 x i16> %x, <vscale x 16 x i16> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)902  %u = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> %m, <vscale x 16 x i16> %y, <vscale x 16 x i16> %a, i32 %evl)903  ret <vscale x 16 x i16> %u904}905 906define <vscale x 16 x i16> @vmadd_vx_nxv16i16_unmasked(<vscale x 16 x i16> %a, i16 %b, <vscale x 16 x i16> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {907; CHECK-LABEL: vmadd_vx_nxv16i16_unmasked:908; CHECK:       # %bb.0:909; CHECK-NEXT:    vsetvli zero, a1, e16, m4, tu, ma910; CHECK-NEXT:    vmadd.vx v8, a0, v12911; CHECK-NEXT:    ret912  %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0913  %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer914  %x = call <vscale x 16 x i16> @llvm.vp.mul.nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)915  %y = call <vscale x 16 x i16> @llvm.vp.add.nxv16i16(<vscale x 16 x i16> %x, <vscale x 16 x i16> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)916  %u = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> splat (i1 -1), <vscale x 16 x i16> %y, <vscale x 16 x i16> %a, i32 %evl)917  ret <vscale x 16 x i16> %u918}919 920define <vscale x 16 x i16> @vmadd_vv_nxv16i16_ta(<vscale x 16 x i16> %a, <vscale x 16 x i16> %b, <vscale x 16 x i16> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {921; CHECK-LABEL: vmadd_vv_nxv16i16_ta:922; CHECK:       # %bb.0:923; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, mu924; CHECK-NEXT:    vmadd.vv v8, v12, v16, v0.t925; CHECK-NEXT:    ret926  %x = call <vscale x 16 x i16> @llvm.vp.mul.nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)927  %y = call <vscale x 16 x i16> @llvm.vp.add.nxv16i16(<vscale x 16 x i16> %x, <vscale x 16 x i16> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)928  %u = call <vscale x 16 x i16> @llvm.vp.select.nxv16i16(<vscale x 16 x i1> %m, <vscale x 16 x i16> %y, <vscale x 16 x i16> %a, i32 %evl)929  ret <vscale x 16 x i16> %u930}931 932define <vscale x 16 x i16> @vmadd_vx_nxv16i16_ta(<vscale x 16 x i16> %a, i16 %b, <vscale x 16 x i16> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {933; CHECK-LABEL: vmadd_vx_nxv16i16_ta:934; CHECK:       # %bb.0:935; CHECK-NEXT:    vsetvli zero, a1, e16, m4, ta, mu936; CHECK-NEXT:    vmadd.vx v8, a0, v12, v0.t937; CHECK-NEXT:    ret938  %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0939  %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer940  %x = call <vscale x 16 x i16> @llvm.vp.mul.nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)941  %y = call <vscale x 16 x i16> @llvm.vp.add.nxv16i16(<vscale x 16 x i16> %x, <vscale x 16 x i16> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)942  %u = call <vscale x 16 x i16> @llvm.vp.select.nxv16i16(<vscale x 16 x i1> %m, <vscale x 16 x i16> %y, <vscale x 16 x i16> %a, i32 %evl)943  ret <vscale x 16 x i16> %u944}945 946define <vscale x 32 x i16> @vmadd_vv_nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b, <vscale x 32 x i16> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {947; CHECK-LABEL: vmadd_vv_nxv32i16:948; CHECK:       # %bb.0:949; CHECK-NEXT:    vl8re16.v v24, (a0)950; CHECK-NEXT:    vsetvli zero, a1, e16, m8, tu, mu951; CHECK-NEXT:    vmadd.vv v8, v16, v24, v0.t952; CHECK-NEXT:    ret953  %x = call <vscale x 32 x i16> @llvm.vp.mul.nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b, <vscale x 32 x i1> splat (i1 -1), i32 %evl)954  %y = call <vscale x 32 x i16> @llvm.vp.add.nxv32i16(<vscale x 32 x i16> %x, <vscale x 32 x i16> %c, <vscale x 32 x i1> splat (i1 -1), i32 %evl)955  %u = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> %m, <vscale x 32 x i16> %y, <vscale x 32 x i16> %a, i32 %evl)956  ret <vscale x 32 x i16> %u957}958 959define <vscale x 32 x i16> @vmadd_vv_nxv32i16_unmasked(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b, <vscale x 32 x i16> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {960; CHECK-LABEL: vmadd_vv_nxv32i16_unmasked:961; CHECK:       # %bb.0:962; CHECK-NEXT:    vl8re16.v v24, (a0)963; CHECK-NEXT:    vsetvli zero, a1, e16, m8, tu, ma964; CHECK-NEXT:    vmadd.vv v8, v16, v24965; CHECK-NEXT:    ret966  %x = call <vscale x 32 x i16> @llvm.vp.mul.nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b, <vscale x 32 x i1> splat (i1 -1), i32 %evl)967  %y = call <vscale x 32 x i16> @llvm.vp.add.nxv32i16(<vscale x 32 x i16> %x, <vscale x 32 x i16> %c, <vscale x 32 x i1> splat (i1 -1), i32 %evl)968  %u = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> splat (i1 -1), <vscale x 32 x i16> %y, <vscale x 32 x i16> %a, i32 %evl)969  ret <vscale x 32 x i16> %u970}971 972define <vscale x 32 x i16> @vmadd_vx_nxv32i16(<vscale x 32 x i16> %a, i16 %b, <vscale x 32 x i16> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {973; CHECK-LABEL: vmadd_vx_nxv32i16:974; CHECK:       # %bb.0:975; CHECK-NEXT:    vsetvli zero, a1, e16, m8, tu, mu976; CHECK-NEXT:    vmadd.vx v8, a0, v16, v0.t977; CHECK-NEXT:    ret978  %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0979  %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer980  %x = call <vscale x 32 x i16> @llvm.vp.mul.nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %vb, <vscale x 32 x i1> splat (i1 -1), i32 %evl)981  %y = call <vscale x 32 x i16> @llvm.vp.add.nxv32i16(<vscale x 32 x i16> %x, <vscale x 32 x i16> %c, <vscale x 32 x i1> splat (i1 -1), i32 %evl)982  %u = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> %m, <vscale x 32 x i16> %y, <vscale x 32 x i16> %a, i32 %evl)983  ret <vscale x 32 x i16> %u984}985 986define <vscale x 32 x i16> @vmadd_vx_nxv32i16_unmasked(<vscale x 32 x i16> %a, i16 %b, <vscale x 32 x i16> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {987; CHECK-LABEL: vmadd_vx_nxv32i16_unmasked:988; CHECK:       # %bb.0:989; CHECK-NEXT:    vsetvli zero, a1, e16, m8, tu, ma990; CHECK-NEXT:    vmadd.vx v8, a0, v16991; CHECK-NEXT:    ret992  %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0993  %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer994  %x = call <vscale x 32 x i16> @llvm.vp.mul.nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %vb, <vscale x 32 x i1> splat (i1 -1), i32 %evl)995  %y = call <vscale x 32 x i16> @llvm.vp.add.nxv32i16(<vscale x 32 x i16> %x, <vscale x 32 x i16> %c, <vscale x 32 x i1> splat (i1 -1), i32 %evl)996  %u = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> splat (i1 -1), <vscale x 32 x i16> %y, <vscale x 32 x i16> %a, i32 %evl)997  ret <vscale x 32 x i16> %u998}999 1000define <vscale x 32 x i16> @vmadd_vv_nxv32i16_ta(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b, <vscale x 32 x i16> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {1001; CHECK-LABEL: vmadd_vv_nxv32i16_ta:1002; CHECK:       # %bb.0:1003; CHECK-NEXT:    vl8re16.v v24, (a0)1004; CHECK-NEXT:    vsetvli zero, a1, e16, m8, ta, mu1005; CHECK-NEXT:    vmadd.vv v8, v16, v24, v0.t1006; CHECK-NEXT:    ret1007  %x = call <vscale x 32 x i16> @llvm.vp.mul.nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1008  %y = call <vscale x 32 x i16> @llvm.vp.add.nxv32i16(<vscale x 32 x i16> %x, <vscale x 32 x i16> %c, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1009  %u = call <vscale x 32 x i16> @llvm.vp.select.nxv32i16(<vscale x 32 x i1> %m, <vscale x 32 x i16> %y, <vscale x 32 x i16> %a, i32 %evl)1010  ret <vscale x 32 x i16> %u1011}1012 1013define <vscale x 32 x i16> @vmadd_vx_nxv32i16_ta(<vscale x 32 x i16> %a, i16 %b, <vscale x 32 x i16> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {1014; CHECK-LABEL: vmadd_vx_nxv32i16_ta:1015; CHECK:       # %bb.0:1016; CHECK-NEXT:    vsetvli zero, a1, e16, m8, ta, mu1017; CHECK-NEXT:    vmadd.vx v8, a0, v16, v0.t1018; CHECK-NEXT:    ret1019  %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 01020  %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer1021  %x = call <vscale x 32 x i16> @llvm.vp.mul.nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %vb, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1022  %y = call <vscale x 32 x i16> @llvm.vp.add.nxv32i16(<vscale x 32 x i16> %x, <vscale x 32 x i16> %c, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1023  %u = call <vscale x 32 x i16> @llvm.vp.select.nxv32i16(<vscale x 32 x i1> %m, <vscale x 32 x i16> %y, <vscale x 32 x i16> %a, i32 %evl)1024  ret <vscale x 32 x i16> %u1025}1026 1027define <vscale x 1 x i32> @vmadd_vv_nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i32> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1028; CHECK-LABEL: vmadd_vv_nxv1i32:1029; CHECK:       # %bb.0:1030; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, tu, mu1031; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t1032; CHECK-NEXT:    ret1033  %x = call <vscale x 1 x i32> @llvm.vp.mul.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1034  %y = call <vscale x 1 x i32> @llvm.vp.add.nxv1i32(<vscale x 1 x i32> %x, <vscale x 1 x i32> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1035  %u = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> %m, <vscale x 1 x i32> %y, <vscale x 1 x i32> %a, i32 %evl)1036  ret <vscale x 1 x i32> %u1037}1038 1039define <vscale x 1 x i32> @vmadd_vv_nxv1i32_unmasked(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i32> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1040; CHECK-LABEL: vmadd_vv_nxv1i32_unmasked:1041; CHECK:       # %bb.0:1042; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, tu, ma1043; CHECK-NEXT:    vmadd.vv v8, v9, v101044; CHECK-NEXT:    ret1045  %x = call <vscale x 1 x i32> @llvm.vp.mul.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1046  %y = call <vscale x 1 x i32> @llvm.vp.add.nxv1i32(<vscale x 1 x i32> %x, <vscale x 1 x i32> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1047  %u = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i32> %y, <vscale x 1 x i32> %a, i32 %evl)1048  ret <vscale x 1 x i32> %u1049}1050 1051define <vscale x 1 x i32> @vmadd_vx_nxv1i32(<vscale x 1 x i32> %a, i32 %b, <vscale x 1 x i32> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1052; CHECK-LABEL: vmadd_vx_nxv1i32:1053; CHECK:       # %bb.0:1054; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, tu, mu1055; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t1056; CHECK-NEXT:    ret1057  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01058  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1059  %x = call <vscale x 1 x i32> @llvm.vp.mul.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1060  %y = call <vscale x 1 x i32> @llvm.vp.add.nxv1i32(<vscale x 1 x i32> %x, <vscale x 1 x i32> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1061  %u = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> %m, <vscale x 1 x i32> %y, <vscale x 1 x i32> %a, i32 %evl)1062  ret <vscale x 1 x i32> %u1063}1064 1065define <vscale x 1 x i32> @vmadd_vx_nxv1i32_unmasked(<vscale x 1 x i32> %a, i32 %b, <vscale x 1 x i32> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1066; CHECK-LABEL: vmadd_vx_nxv1i32_unmasked:1067; CHECK:       # %bb.0:1068; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, tu, ma1069; CHECK-NEXT:    vmadd.vx v8, a0, v91070; CHECK-NEXT:    ret1071  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01072  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1073  %x = call <vscale x 1 x i32> @llvm.vp.mul.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1074  %y = call <vscale x 1 x i32> @llvm.vp.add.nxv1i32(<vscale x 1 x i32> %x, <vscale x 1 x i32> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1075  %u = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i32> %y, <vscale x 1 x i32> %a, i32 %evl)1076  ret <vscale x 1 x i32> %u1077}1078 1079define <vscale x 1 x i32> @vmadd_vv_nxv1i32_ta(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i32> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1080; CHECK-LABEL: vmadd_vv_nxv1i32_ta:1081; CHECK:       # %bb.0:1082; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, mu1083; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t1084; CHECK-NEXT:    ret1085  %x = call <vscale x 1 x i32> @llvm.vp.mul.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1086  %y = call <vscale x 1 x i32> @llvm.vp.add.nxv1i32(<vscale x 1 x i32> %x, <vscale x 1 x i32> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1087  %u = call <vscale x 1 x i32> @llvm.vp.select.nxv1i32(<vscale x 1 x i1> %m, <vscale x 1 x i32> %y, <vscale x 1 x i32> %a, i32 %evl)1088  ret <vscale x 1 x i32> %u1089}1090 1091define <vscale x 1 x i32> @vmadd_vx_nxv1i32_ta(<vscale x 1 x i32> %a, i32 %b, <vscale x 1 x i32> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1092; CHECK-LABEL: vmadd_vx_nxv1i32_ta:1093; CHECK:       # %bb.0:1094; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, mu1095; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t1096; CHECK-NEXT:    ret1097  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01098  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1099  %x = call <vscale x 1 x i32> @llvm.vp.mul.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1100  %y = call <vscale x 1 x i32> @llvm.vp.add.nxv1i32(<vscale x 1 x i32> %x, <vscale x 1 x i32> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1101  %u = call <vscale x 1 x i32> @llvm.vp.select.nxv1i32(<vscale x 1 x i1> %m, <vscale x 1 x i32> %y, <vscale x 1 x i32> %a, i32 %evl)1102  ret <vscale x 1 x i32> %u1103}1104 1105define <vscale x 2 x i32> @vmadd_vv_nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b, <vscale x 2 x i32> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1106; CHECK-LABEL: vmadd_vv_nxv2i32:1107; CHECK:       # %bb.0:1108; CHECK-NEXT:    vsetvli zero, a0, e32, m1, tu, mu1109; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t1110; CHECK-NEXT:    ret1111  %x = call <vscale x 2 x i32> @llvm.vp.mul.nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1112  %y = call <vscale x 2 x i32> @llvm.vp.add.nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1113  %u = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> %m, <vscale x 2 x i32> %y, <vscale x 2 x i32> %a, i32 %evl)1114  ret <vscale x 2 x i32> %u1115}1116 1117define <vscale x 2 x i32> @vmadd_vv_nxv2i32_unmasked(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b, <vscale x 2 x i32> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1118; CHECK-LABEL: vmadd_vv_nxv2i32_unmasked:1119; CHECK:       # %bb.0:1120; CHECK-NEXT:    vsetvli zero, a0, e32, m1, tu, ma1121; CHECK-NEXT:    vmadd.vv v8, v9, v101122; CHECK-NEXT:    ret1123  %x = call <vscale x 2 x i32> @llvm.vp.mul.nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1124  %y = call <vscale x 2 x i32> @llvm.vp.add.nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1125  %u = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i32> %y, <vscale x 2 x i32> %a, i32 %evl)1126  ret <vscale x 2 x i32> %u1127}1128 1129define <vscale x 2 x i32> @vmadd_vx_nxv2i32(<vscale x 2 x i32> %a, i32 %b, <vscale x 2 x i32> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1130; CHECK-LABEL: vmadd_vx_nxv2i32:1131; CHECK:       # %bb.0:1132; CHECK-NEXT:    vsetvli zero, a1, e32, m1, tu, mu1133; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t1134; CHECK-NEXT:    ret1135  %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 01136  %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer1137  %x = call <vscale x 2 x i32> @llvm.vp.mul.nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1138  %y = call <vscale x 2 x i32> @llvm.vp.add.nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1139  %u = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> %m, <vscale x 2 x i32> %y, <vscale x 2 x i32> %a, i32 %evl)1140  ret <vscale x 2 x i32> %u1141}1142 1143define <vscale x 2 x i32> @vmadd_vx_nxv2i32_unmasked(<vscale x 2 x i32> %a, i32 %b, <vscale x 2 x i32> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1144; CHECK-LABEL: vmadd_vx_nxv2i32_unmasked:1145; CHECK:       # %bb.0:1146; CHECK-NEXT:    vsetvli zero, a1, e32, m1, tu, ma1147; CHECK-NEXT:    vmadd.vx v8, a0, v91148; CHECK-NEXT:    ret1149  %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 01150  %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer1151  %x = call <vscale x 2 x i32> @llvm.vp.mul.nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1152  %y = call <vscale x 2 x i32> @llvm.vp.add.nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1153  %u = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i32> %y, <vscale x 2 x i32> %a, i32 %evl)1154  ret <vscale x 2 x i32> %u1155}1156 1157define <vscale x 2 x i32> @vmadd_vv_nxv2i32_ta(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b, <vscale x 2 x i32> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1158; CHECK-LABEL: vmadd_vv_nxv2i32_ta:1159; CHECK:       # %bb.0:1160; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, mu1161; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t1162; CHECK-NEXT:    ret1163  %x = call <vscale x 2 x i32> @llvm.vp.mul.nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1164  %y = call <vscale x 2 x i32> @llvm.vp.add.nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1165  %u = call <vscale x 2 x i32> @llvm.vp.select.nxv2i32(<vscale x 2 x i1> %m, <vscale x 2 x i32> %y, <vscale x 2 x i32> %a, i32 %evl)1166  ret <vscale x 2 x i32> %u1167}1168 1169define <vscale x 2 x i32> @vmadd_vx_nxv2i32_ta(<vscale x 2 x i32> %a, i32 %b, <vscale x 2 x i32> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1170; CHECK-LABEL: vmadd_vx_nxv2i32_ta:1171; CHECK:       # %bb.0:1172; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, mu1173; CHECK-NEXT:    vmadd.vx v8, a0, v9, v0.t1174; CHECK-NEXT:    ret1175  %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 01176  %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer1177  %x = call <vscale x 2 x i32> @llvm.vp.mul.nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1178  %y = call <vscale x 2 x i32> @llvm.vp.add.nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1179  %u = call <vscale x 2 x i32> @llvm.vp.select.nxv2i32(<vscale x 2 x i1> %m, <vscale x 2 x i32> %y, <vscale x 2 x i32> %a, i32 %evl)1180  ret <vscale x 2 x i32> %u1181}1182 1183define <vscale x 4 x i32> @vmadd_vv_nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1184; CHECK-LABEL: vmadd_vv_nxv4i32:1185; CHECK:       # %bb.0:1186; CHECK-NEXT:    vsetvli zero, a0, e32, m2, tu, mu1187; CHECK-NEXT:    vmadd.vv v8, v10, v12, v0.t1188; CHECK-NEXT:    ret1189  %x = call <vscale x 4 x i32> @llvm.vp.mul.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1190  %y = call <vscale x 4 x i32> @llvm.vp.add.nxv4i32(<vscale x 4 x i32> %x, <vscale x 4 x i32> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1191  %u = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> %m, <vscale x 4 x i32> %y, <vscale x 4 x i32> %a, i32 %evl)1192  ret <vscale x 4 x i32> %u1193}1194 1195define <vscale x 4 x i32> @vmadd_vv_nxv4i32_unmasked(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1196; CHECK-LABEL: vmadd_vv_nxv4i32_unmasked:1197; CHECK:       # %bb.0:1198; CHECK-NEXT:    vsetvli zero, a0, e32, m2, tu, ma1199; CHECK-NEXT:    vmadd.vv v8, v10, v121200; CHECK-NEXT:    ret1201  %x = call <vscale x 4 x i32> @llvm.vp.mul.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1202  %y = call <vscale x 4 x i32> @llvm.vp.add.nxv4i32(<vscale x 4 x i32> %x, <vscale x 4 x i32> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1203  %u = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i32> %y, <vscale x 4 x i32> %a, i32 %evl)1204  ret <vscale x 4 x i32> %u1205}1206 1207define <vscale x 4 x i32> @vmadd_vx_nxv4i32(<vscale x 4 x i32> %a, i32 %b, <vscale x 4 x i32> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1208; CHECK-LABEL: vmadd_vx_nxv4i32:1209; CHECK:       # %bb.0:1210; CHECK-NEXT:    vsetvli zero, a1, e32, m2, tu, mu1211; CHECK-NEXT:    vmadd.vx v8, a0, v10, v0.t1212; CHECK-NEXT:    ret1213  %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 01214  %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer1215  %x = call <vscale x 4 x i32> @llvm.vp.mul.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1216  %y = call <vscale x 4 x i32> @llvm.vp.add.nxv4i32(<vscale x 4 x i32> %x, <vscale x 4 x i32> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1217  %u = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> %m, <vscale x 4 x i32> %y, <vscale x 4 x i32> %a, i32 %evl)1218  ret <vscale x 4 x i32> %u1219}1220 1221define <vscale x 4 x i32> @vmadd_vx_nxv4i32_unmasked(<vscale x 4 x i32> %a, i32 %b, <vscale x 4 x i32> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1222; CHECK-LABEL: vmadd_vx_nxv4i32_unmasked:1223; CHECK:       # %bb.0:1224; CHECK-NEXT:    vsetvli zero, a1, e32, m2, tu, ma1225; CHECK-NEXT:    vmadd.vx v8, a0, v101226; CHECK-NEXT:    ret1227  %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 01228  %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer1229  %x = call <vscale x 4 x i32> @llvm.vp.mul.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1230  %y = call <vscale x 4 x i32> @llvm.vp.add.nxv4i32(<vscale x 4 x i32> %x, <vscale x 4 x i32> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1231  %u = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i32> %y, <vscale x 4 x i32> %a, i32 %evl)1232  ret <vscale x 4 x i32> %u1233}1234 1235define <vscale x 4 x i32> @vmadd_vv_nxv4i32_ta(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1236; CHECK-LABEL: vmadd_vv_nxv4i32_ta:1237; CHECK:       # %bb.0:1238; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, mu1239; CHECK-NEXT:    vmadd.vv v8, v10, v12, v0.t1240; CHECK-NEXT:    ret1241  %x = call <vscale x 4 x i32> @llvm.vp.mul.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1242  %y = call <vscale x 4 x i32> @llvm.vp.add.nxv4i32(<vscale x 4 x i32> %x, <vscale x 4 x i32> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1243  %u = call <vscale x 4 x i32> @llvm.vp.select.nxv4i32(<vscale x 4 x i1> %m, <vscale x 4 x i32> %y, <vscale x 4 x i32> %a, i32 %evl)1244  ret <vscale x 4 x i32> %u1245}1246 1247define <vscale x 4 x i32> @vmadd_vx_nxv4i32_ta(<vscale x 4 x i32> %a, i32 %b, <vscale x 4 x i32> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1248; CHECK-LABEL: vmadd_vx_nxv4i32_ta:1249; CHECK:       # %bb.0:1250; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, mu1251; CHECK-NEXT:    vmadd.vx v8, a0, v10, v0.t1252; CHECK-NEXT:    ret1253  %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 01254  %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer1255  %x = call <vscale x 4 x i32> @llvm.vp.mul.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1256  %y = call <vscale x 4 x i32> @llvm.vp.add.nxv4i32(<vscale x 4 x i32> %x, <vscale x 4 x i32> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1257  %u = call <vscale x 4 x i32> @llvm.vp.select.nxv4i32(<vscale x 4 x i1> %m, <vscale x 4 x i32> %y, <vscale x 4 x i32> %a, i32 %evl)1258  ret <vscale x 4 x i32> %u1259}1260 1261define <vscale x 8 x i32> @vmadd_vv_nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %b, <vscale x 8 x i32> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1262; CHECK-LABEL: vmadd_vv_nxv8i32:1263; CHECK:       # %bb.0:1264; CHECK-NEXT:    vsetvli zero, a0, e32, m4, tu, mu1265; CHECK-NEXT:    vmadd.vv v8, v12, v16, v0.t1266; CHECK-NEXT:    ret1267  %x = call <vscale x 8 x i32> @llvm.vp.mul.nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1268  %y = call <vscale x 8 x i32> @llvm.vp.add.nxv8i32(<vscale x 8 x i32> %x, <vscale x 8 x i32> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1269  %u = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> %m, <vscale x 8 x i32> %y, <vscale x 8 x i32> %a, i32 %evl)1270  ret <vscale x 8 x i32> %u1271}1272 1273define <vscale x 8 x i32> @vmadd_vv_nxv8i32_unmasked(<vscale x 8 x i32> %a, <vscale x 8 x i32> %b, <vscale x 8 x i32> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1274; CHECK-LABEL: vmadd_vv_nxv8i32_unmasked:1275; CHECK:       # %bb.0:1276; CHECK-NEXT:    vsetvli zero, a0, e32, m4, tu, ma1277; CHECK-NEXT:    vmadd.vv v8, v12, v161278; CHECK-NEXT:    ret1279  %x = call <vscale x 8 x i32> @llvm.vp.mul.nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1280  %y = call <vscale x 8 x i32> @llvm.vp.add.nxv8i32(<vscale x 8 x i32> %x, <vscale x 8 x i32> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1281  %u = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i32> %y, <vscale x 8 x i32> %a, i32 %evl)1282  ret <vscale x 8 x i32> %u1283}1284 1285define <vscale x 8 x i32> @vmadd_vx_nxv8i32(<vscale x 8 x i32> %a, i32 %b, <vscale x 8 x i32> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1286; CHECK-LABEL: vmadd_vx_nxv8i32:1287; CHECK:       # %bb.0:1288; CHECK-NEXT:    vsetvli zero, a1, e32, m4, tu, mu1289; CHECK-NEXT:    vmadd.vx v8, a0, v12, v0.t1290; CHECK-NEXT:    ret1291  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01292  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1293  %x = call <vscale x 8 x i32> @llvm.vp.mul.nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1294  %y = call <vscale x 8 x i32> @llvm.vp.add.nxv8i32(<vscale x 8 x i32> %x, <vscale x 8 x i32> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1295  %u = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> %m, <vscale x 8 x i32> %y, <vscale x 8 x i32> %a, i32 %evl)1296  ret <vscale x 8 x i32> %u1297}1298 1299define <vscale x 8 x i32> @vmadd_vx_nxv8i32_unmasked(<vscale x 8 x i32> %a, i32 %b, <vscale x 8 x i32> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1300; CHECK-LABEL: vmadd_vx_nxv8i32_unmasked:1301; CHECK:       # %bb.0:1302; CHECK-NEXT:    vsetvli zero, a1, e32, m4, tu, ma1303; CHECK-NEXT:    vmadd.vx v8, a0, v121304; CHECK-NEXT:    ret1305  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01306  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1307  %x = call <vscale x 8 x i32> @llvm.vp.mul.nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1308  %y = call <vscale x 8 x i32> @llvm.vp.add.nxv8i32(<vscale x 8 x i32> %x, <vscale x 8 x i32> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1309  %u = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i32> %y, <vscale x 8 x i32> %a, i32 %evl)1310  ret <vscale x 8 x i32> %u1311}1312 1313define <vscale x 8 x i32> @vmadd_vv_nxv8i32_ta(<vscale x 8 x i32> %a, <vscale x 8 x i32> %b, <vscale x 8 x i32> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1314; CHECK-LABEL: vmadd_vv_nxv8i32_ta:1315; CHECK:       # %bb.0:1316; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, mu1317; CHECK-NEXT:    vmadd.vv v8, v12, v16, v0.t1318; CHECK-NEXT:    ret1319  %x = call <vscale x 8 x i32> @llvm.vp.mul.nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1320  %y = call <vscale x 8 x i32> @llvm.vp.add.nxv8i32(<vscale x 8 x i32> %x, <vscale x 8 x i32> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1321  %u = call <vscale x 8 x i32> @llvm.vp.select.nxv8i32(<vscale x 8 x i1> %m, <vscale x 8 x i32> %y, <vscale x 8 x i32> %a, i32 %evl)1322  ret <vscale x 8 x i32> %u1323}1324 1325define <vscale x 8 x i32> @vmadd_vx_nxv8i32_ta(<vscale x 8 x i32> %a, i32 %b, <vscale x 8 x i32> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1326; CHECK-LABEL: vmadd_vx_nxv8i32_ta:1327; CHECK:       # %bb.0:1328; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, mu1329; CHECK-NEXT:    vmadd.vx v8, a0, v12, v0.t1330; CHECK-NEXT:    ret1331  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01332  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1333  %x = call <vscale x 8 x i32> @llvm.vp.mul.nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1334  %y = call <vscale x 8 x i32> @llvm.vp.add.nxv8i32(<vscale x 8 x i32> %x, <vscale x 8 x i32> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1335  %u = call <vscale x 8 x i32> @llvm.vp.select.nxv8i32(<vscale x 8 x i1> %m, <vscale x 8 x i32> %y, <vscale x 8 x i32> %a, i32 %evl)1336  ret <vscale x 8 x i32> %u1337}1338 1339define <vscale x 16 x i32> @vmadd_vv_nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b, <vscale x 16 x i32> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {1340; CHECK-LABEL: vmadd_vv_nxv16i32:1341; CHECK:       # %bb.0:1342; CHECK-NEXT:    vl8re32.v v24, (a0)1343; CHECK-NEXT:    vsetvli zero, a1, e32, m8, tu, mu1344; CHECK-NEXT:    vmadd.vv v8, v16, v24, v0.t1345; CHECK-NEXT:    ret1346  %x = call <vscale x 16 x i32> @llvm.vp.mul.nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1347  %y = call <vscale x 16 x i32> @llvm.vp.add.nxv16i32(<vscale x 16 x i32> %x, <vscale x 16 x i32> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1348  %u = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> %m, <vscale x 16 x i32> %y, <vscale x 16 x i32> %a, i32 %evl)1349  ret <vscale x 16 x i32> %u1350}1351 1352define <vscale x 16 x i32> @vmadd_vv_nxv16i32_unmasked(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b, <vscale x 16 x i32> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {1353; CHECK-LABEL: vmadd_vv_nxv16i32_unmasked:1354; CHECK:       # %bb.0:1355; CHECK-NEXT:    vl8re32.v v24, (a0)1356; CHECK-NEXT:    vsetvli zero, a1, e32, m8, tu, ma1357; CHECK-NEXT:    vmadd.vv v8, v16, v241358; CHECK-NEXT:    ret1359  %x = call <vscale x 16 x i32> @llvm.vp.mul.nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1360  %y = call <vscale x 16 x i32> @llvm.vp.add.nxv16i32(<vscale x 16 x i32> %x, <vscale x 16 x i32> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1361  %u = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> splat (i1 -1), <vscale x 16 x i32> %y, <vscale x 16 x i32> %a, i32 %evl)1362  ret <vscale x 16 x i32> %u1363}1364 1365define <vscale x 16 x i32> @vmadd_vx_nxv16i32(<vscale x 16 x i32> %a, i32 %b, <vscale x 16 x i32> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {1366; CHECK-LABEL: vmadd_vx_nxv16i32:1367; CHECK:       # %bb.0:1368; CHECK-NEXT:    vsetvli zero, a1, e32, m8, tu, mu1369; CHECK-NEXT:    vmadd.vx v8, a0, v16, v0.t1370; CHECK-NEXT:    ret1371  %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 01372  %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer1373  %x = call <vscale x 16 x i32> @llvm.vp.mul.nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1374  %y = call <vscale x 16 x i32> @llvm.vp.add.nxv16i32(<vscale x 16 x i32> %x, <vscale x 16 x i32> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1375  %u = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> %m, <vscale x 16 x i32> %y, <vscale x 16 x i32> %a, i32 %evl)1376  ret <vscale x 16 x i32> %u1377}1378 1379define <vscale x 16 x i32> @vmadd_vx_nxv16i32_unmasked(<vscale x 16 x i32> %a, i32 %b, <vscale x 16 x i32> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {1380; CHECK-LABEL: vmadd_vx_nxv16i32_unmasked:1381; CHECK:       # %bb.0:1382; CHECK-NEXT:    vsetvli zero, a1, e32, m8, tu, ma1383; CHECK-NEXT:    vmadd.vx v8, a0, v161384; CHECK-NEXT:    ret1385  %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 01386  %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer1387  %x = call <vscale x 16 x i32> @llvm.vp.mul.nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1388  %y = call <vscale x 16 x i32> @llvm.vp.add.nxv16i32(<vscale x 16 x i32> %x, <vscale x 16 x i32> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1389  %u = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> splat (i1 -1), <vscale x 16 x i32> %y, <vscale x 16 x i32> %a, i32 %evl)1390  ret <vscale x 16 x i32> %u1391}1392 1393define <vscale x 16 x i32> @vmadd_vv_nxv16i32_ta(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b, <vscale x 16 x i32> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {1394; CHECK-LABEL: vmadd_vv_nxv16i32_ta:1395; CHECK:       # %bb.0:1396; CHECK-NEXT:    vl8re32.v v24, (a0)1397; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, mu1398; CHECK-NEXT:    vmadd.vv v8, v16, v24, v0.t1399; CHECK-NEXT:    ret1400  %x = call <vscale x 16 x i32> @llvm.vp.mul.nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1401  %y = call <vscale x 16 x i32> @llvm.vp.add.nxv16i32(<vscale x 16 x i32> %x, <vscale x 16 x i32> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1402  %u = call <vscale x 16 x i32> @llvm.vp.select.nxv16i32(<vscale x 16 x i1> %m, <vscale x 16 x i32> %y, <vscale x 16 x i32> %a, i32 %evl)1403  ret <vscale x 16 x i32> %u1404}1405 1406define <vscale x 16 x i32> @vmadd_vx_nxv16i32_ta(<vscale x 16 x i32> %a, i32 %b, <vscale x 16 x i32> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {1407; CHECK-LABEL: vmadd_vx_nxv16i32_ta:1408; CHECK:       # %bb.0:1409; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, mu1410; CHECK-NEXT:    vmadd.vx v8, a0, v16, v0.t1411; CHECK-NEXT:    ret1412  %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 01413  %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer1414  %x = call <vscale x 16 x i32> @llvm.vp.mul.nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1415  %y = call <vscale x 16 x i32> @llvm.vp.add.nxv16i32(<vscale x 16 x i32> %x, <vscale x 16 x i32> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1416  %u = call <vscale x 16 x i32> @llvm.vp.select.nxv16i32(<vscale x 16 x i1> %m, <vscale x 16 x i32> %y, <vscale x 16 x i32> %a, i32 %evl)1417  ret <vscale x 16 x i32> %u1418}1419 1420define <vscale x 1 x i64> @vmadd_vv_nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 1 x i64> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1421; CHECK-LABEL: vmadd_vv_nxv1i64:1422; CHECK:       # %bb.0:1423; CHECK-NEXT:    vsetvli zero, a0, e64, m1, tu, mu1424; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t1425; CHECK-NEXT:    ret1426  %x = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1427  %y = call <vscale x 1 x i64> @llvm.vp.add.nxv1i64(<vscale x 1 x i64> %x, <vscale x 1 x i64> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1428  %u = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> %m, <vscale x 1 x i64> %y, <vscale x 1 x i64> %a, i32 %evl)1429  ret <vscale x 1 x i64> %u1430}1431 1432define <vscale x 1 x i64> @vmadd_vv_nxv1i64_unmasked(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 1 x i64> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1433; CHECK-LABEL: vmadd_vv_nxv1i64_unmasked:1434; CHECK:       # %bb.0:1435; CHECK-NEXT:    vsetvli zero, a0, e64, m1, tu, ma1436; CHECK-NEXT:    vmadd.vv v8, v9, v101437; CHECK-NEXT:    ret1438  %x = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1439  %y = call <vscale x 1 x i64> @llvm.vp.add.nxv1i64(<vscale x 1 x i64> %x, <vscale x 1 x i64> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1440  %u = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i64> %y, <vscale x 1 x i64> %a, i32 %evl)1441  ret <vscale x 1 x i64> %u1442}1443 1444define <vscale x 1 x i64> @vmadd_vx_nxv1i64(<vscale x 1 x i64> %a, i64 %b, <vscale x 1 x i64> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1445; RV32-LABEL: vmadd_vx_nxv1i64:1446; RV32:       # %bb.0:1447; RV32-NEXT:    addi sp, sp, -161448; RV32-NEXT:    .cfi_def_cfa_offset 161449; RV32-NEXT:    sw a0, 8(sp)1450; RV32-NEXT:    sw a1, 12(sp)1451; RV32-NEXT:    addi a0, sp, 81452; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma1453; RV32-NEXT:    vlse64.v v10, (a0), zero1454; RV32-NEXT:    vsetvli zero, zero, e64, m1, tu, mu1455; RV32-NEXT:    vmadd.vv v8, v10, v9, v0.t1456; RV32-NEXT:    addi sp, sp, 161457; RV32-NEXT:    .cfi_def_cfa_offset 01458; RV32-NEXT:    ret1459;1460; RV64-LABEL: vmadd_vx_nxv1i64:1461; RV64:       # %bb.0:1462; RV64-NEXT:    vsetvli zero, a1, e64, m1, tu, mu1463; RV64-NEXT:    vmadd.vx v8, a0, v9, v0.t1464; RV64-NEXT:    ret1465  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01466  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1467  %x = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1468  %y = call <vscale x 1 x i64> @llvm.vp.add.nxv1i64(<vscale x 1 x i64> %x, <vscale x 1 x i64> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1469  %u = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> %m, <vscale x 1 x i64> %y, <vscale x 1 x i64> %a, i32 %evl)1470  ret <vscale x 1 x i64> %u1471}1472 1473define <vscale x 1 x i64> @vmadd_vx_nxv1i64_unmasked(<vscale x 1 x i64> %a, i64 %b, <vscale x 1 x i64> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1474; RV32-LABEL: vmadd_vx_nxv1i64_unmasked:1475; RV32:       # %bb.0:1476; RV32-NEXT:    addi sp, sp, -161477; RV32-NEXT:    .cfi_def_cfa_offset 161478; RV32-NEXT:    sw a0, 8(sp)1479; RV32-NEXT:    sw a1, 12(sp)1480; RV32-NEXT:    addi a0, sp, 81481; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma1482; RV32-NEXT:    vlse64.v v10, (a0), zero1483; RV32-NEXT:    vsetvli zero, zero, e64, m1, tu, ma1484; RV32-NEXT:    vmadd.vv v8, v10, v91485; RV32-NEXT:    addi sp, sp, 161486; RV32-NEXT:    .cfi_def_cfa_offset 01487; RV32-NEXT:    ret1488;1489; RV64-LABEL: vmadd_vx_nxv1i64_unmasked:1490; RV64:       # %bb.0:1491; RV64-NEXT:    vsetvli zero, a1, e64, m1, tu, ma1492; RV64-NEXT:    vmadd.vx v8, a0, v91493; RV64-NEXT:    ret1494  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01495  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1496  %x = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1497  %y = call <vscale x 1 x i64> @llvm.vp.add.nxv1i64(<vscale x 1 x i64> %x, <vscale x 1 x i64> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1498  %u = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i64> %y, <vscale x 1 x i64> %a, i32 %evl)1499  ret <vscale x 1 x i64> %u1500}1501 1502define <vscale x 1 x i64> @vmadd_vv_nxv1i64_ta(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 1 x i64> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1503; CHECK-LABEL: vmadd_vv_nxv1i64_ta:1504; CHECK:       # %bb.0:1505; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, mu1506; CHECK-NEXT:    vmadd.vv v8, v9, v10, v0.t1507; CHECK-NEXT:    ret1508  %x = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1509  %y = call <vscale x 1 x i64> @llvm.vp.add.nxv1i64(<vscale x 1 x i64> %x, <vscale x 1 x i64> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1510  %u = call <vscale x 1 x i64> @llvm.vp.select.nxv1i64(<vscale x 1 x i1> %m, <vscale x 1 x i64> %y, <vscale x 1 x i64> %a, i32 %evl)1511  ret <vscale x 1 x i64> %u1512}1513 1514define <vscale x 1 x i64> @vmadd_vx_nxv1i64_ta(<vscale x 1 x i64> %a, i64 %b, <vscale x 1 x i64> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1515; RV32-LABEL: vmadd_vx_nxv1i64_ta:1516; RV32:       # %bb.0:1517; RV32-NEXT:    addi sp, sp, -161518; RV32-NEXT:    .cfi_def_cfa_offset 161519; RV32-NEXT:    sw a0, 8(sp)1520; RV32-NEXT:    sw a1, 12(sp)1521; RV32-NEXT:    addi a0, sp, 81522; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, mu1523; RV32-NEXT:    vlse64.v v10, (a0), zero1524; RV32-NEXT:    vmadd.vv v8, v10, v9, v0.t1525; RV32-NEXT:    addi sp, sp, 161526; RV32-NEXT:    .cfi_def_cfa_offset 01527; RV32-NEXT:    ret1528;1529; RV64-LABEL: vmadd_vx_nxv1i64_ta:1530; RV64:       # %bb.0:1531; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, mu1532; RV64-NEXT:    vmadd.vx v8, a0, v9, v0.t1533; RV64-NEXT:    ret1534  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01535  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1536  %x = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1537  %y = call <vscale x 1 x i64> @llvm.vp.add.nxv1i64(<vscale x 1 x i64> %x, <vscale x 1 x i64> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1538  %u = call <vscale x 1 x i64> @llvm.vp.select.nxv1i64(<vscale x 1 x i1> %m, <vscale x 1 x i64> %y, <vscale x 1 x i64> %a, i32 %evl)1539  ret <vscale x 1 x i64> %u1540}1541 1542define <vscale x 2 x i64> @vmadd_vv_nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i64> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1543; CHECK-LABEL: vmadd_vv_nxv2i64:1544; CHECK:       # %bb.0:1545; CHECK-NEXT:    vsetvli zero, a0, e64, m2, tu, mu1546; CHECK-NEXT:    vmadd.vv v8, v10, v12, v0.t1547; CHECK-NEXT:    ret1548  %x = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1549  %y = call <vscale x 2 x i64> @llvm.vp.add.nxv2i64(<vscale x 2 x i64> %x, <vscale x 2 x i64> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1550  %u = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> %m, <vscale x 2 x i64> %y, <vscale x 2 x i64> %a, i32 %evl)1551  ret <vscale x 2 x i64> %u1552}1553 1554define <vscale x 2 x i64> @vmadd_vv_nxv2i64_unmasked(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i64> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1555; CHECK-LABEL: vmadd_vv_nxv2i64_unmasked:1556; CHECK:       # %bb.0:1557; CHECK-NEXT:    vsetvli zero, a0, e64, m2, tu, ma1558; CHECK-NEXT:    vmadd.vv v8, v10, v121559; CHECK-NEXT:    ret1560  %x = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1561  %y = call <vscale x 2 x i64> @llvm.vp.add.nxv2i64(<vscale x 2 x i64> %x, <vscale x 2 x i64> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1562  %u = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i64> %y, <vscale x 2 x i64> %a, i32 %evl)1563  ret <vscale x 2 x i64> %u1564}1565 1566define <vscale x 2 x i64> @vmadd_vx_nxv2i64(<vscale x 2 x i64> %a, i64 %b, <vscale x 2 x i64> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1567; RV32-LABEL: vmadd_vx_nxv2i64:1568; RV32:       # %bb.0:1569; RV32-NEXT:    addi sp, sp, -161570; RV32-NEXT:    .cfi_def_cfa_offset 161571; RV32-NEXT:    sw a0, 8(sp)1572; RV32-NEXT:    sw a1, 12(sp)1573; RV32-NEXT:    addi a0, sp, 81574; RV32-NEXT:    vsetvli zero, a2, e64, m2, ta, ma1575; RV32-NEXT:    vlse64.v v12, (a0), zero1576; RV32-NEXT:    vsetvli zero, zero, e64, m2, tu, mu1577; RV32-NEXT:    vmadd.vv v8, v12, v10, v0.t1578; RV32-NEXT:    addi sp, sp, 161579; RV32-NEXT:    .cfi_def_cfa_offset 01580; RV32-NEXT:    ret1581;1582; RV64-LABEL: vmadd_vx_nxv2i64:1583; RV64:       # %bb.0:1584; RV64-NEXT:    vsetvli zero, a1, e64, m2, tu, mu1585; RV64-NEXT:    vmadd.vx v8, a0, v10, v0.t1586; RV64-NEXT:    ret1587  %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01588  %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1589  %x = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1590  %y = call <vscale x 2 x i64> @llvm.vp.add.nxv2i64(<vscale x 2 x i64> %x, <vscale x 2 x i64> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1591  %u = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> %m, <vscale x 2 x i64> %y, <vscale x 2 x i64> %a, i32 %evl)1592  ret <vscale x 2 x i64> %u1593}1594 1595define <vscale x 2 x i64> @vmadd_vx_nxv2i64_unmasked(<vscale x 2 x i64> %a, i64 %b, <vscale x 2 x i64> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1596; RV32-LABEL: vmadd_vx_nxv2i64_unmasked:1597; RV32:       # %bb.0:1598; RV32-NEXT:    addi sp, sp, -161599; RV32-NEXT:    .cfi_def_cfa_offset 161600; RV32-NEXT:    sw a0, 8(sp)1601; RV32-NEXT:    sw a1, 12(sp)1602; RV32-NEXT:    addi a0, sp, 81603; RV32-NEXT:    vsetvli zero, a2, e64, m2, ta, ma1604; RV32-NEXT:    vlse64.v v12, (a0), zero1605; RV32-NEXT:    vsetvli zero, zero, e64, m2, tu, ma1606; RV32-NEXT:    vmadd.vv v8, v12, v101607; RV32-NEXT:    addi sp, sp, 161608; RV32-NEXT:    .cfi_def_cfa_offset 01609; RV32-NEXT:    ret1610;1611; RV64-LABEL: vmadd_vx_nxv2i64_unmasked:1612; RV64:       # %bb.0:1613; RV64-NEXT:    vsetvli zero, a1, e64, m2, tu, ma1614; RV64-NEXT:    vmadd.vx v8, a0, v101615; RV64-NEXT:    ret1616  %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01617  %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1618  %x = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1619  %y = call <vscale x 2 x i64> @llvm.vp.add.nxv2i64(<vscale x 2 x i64> %x, <vscale x 2 x i64> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1620  %u = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i64> %y, <vscale x 2 x i64> %a, i32 %evl)1621  ret <vscale x 2 x i64> %u1622}1623 1624define <vscale x 2 x i64> @vmadd_vv_nxv2i64_ta(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i64> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1625; CHECK-LABEL: vmadd_vv_nxv2i64_ta:1626; CHECK:       # %bb.0:1627; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, mu1628; CHECK-NEXT:    vmadd.vv v8, v10, v12, v0.t1629; CHECK-NEXT:    ret1630  %x = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1631  %y = call <vscale x 2 x i64> @llvm.vp.add.nxv2i64(<vscale x 2 x i64> %x, <vscale x 2 x i64> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1632  %u = call <vscale x 2 x i64> @llvm.vp.select.nxv2i64(<vscale x 2 x i1> %m, <vscale x 2 x i64> %y, <vscale x 2 x i64> %a, i32 %evl)1633  ret <vscale x 2 x i64> %u1634}1635 1636define <vscale x 2 x i64> @vmadd_vx_nxv2i64_ta(<vscale x 2 x i64> %a, i64 %b, <vscale x 2 x i64> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1637; RV32-LABEL: vmadd_vx_nxv2i64_ta:1638; RV32:       # %bb.0:1639; RV32-NEXT:    addi sp, sp, -161640; RV32-NEXT:    .cfi_def_cfa_offset 161641; RV32-NEXT:    sw a0, 8(sp)1642; RV32-NEXT:    sw a1, 12(sp)1643; RV32-NEXT:    addi a0, sp, 81644; RV32-NEXT:    vsetvli zero, a2, e64, m2, ta, mu1645; RV32-NEXT:    vlse64.v v12, (a0), zero1646; RV32-NEXT:    vmadd.vv v8, v12, v10, v0.t1647; RV32-NEXT:    addi sp, sp, 161648; RV32-NEXT:    .cfi_def_cfa_offset 01649; RV32-NEXT:    ret1650;1651; RV64-LABEL: vmadd_vx_nxv2i64_ta:1652; RV64:       # %bb.0:1653; RV64-NEXT:    vsetvli zero, a1, e64, m2, ta, mu1654; RV64-NEXT:    vmadd.vx v8, a0, v10, v0.t1655; RV64-NEXT:    ret1656  %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01657  %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1658  %x = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1659  %y = call <vscale x 2 x i64> @llvm.vp.add.nxv2i64(<vscale x 2 x i64> %x, <vscale x 2 x i64> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1660  %u = call <vscale x 2 x i64> @llvm.vp.select.nxv2i64(<vscale x 2 x i1> %m, <vscale x 2 x i64> %y, <vscale x 2 x i64> %a, i32 %evl)1661  ret <vscale x 2 x i64> %u1662}1663 1664define <vscale x 4 x i64> @vmadd_vv_nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %b, <vscale x 4 x i64> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1665; CHECK-LABEL: vmadd_vv_nxv4i64:1666; CHECK:       # %bb.0:1667; CHECK-NEXT:    vsetvli zero, a0, e64, m4, tu, mu1668; CHECK-NEXT:    vmadd.vv v8, v12, v16, v0.t1669; CHECK-NEXT:    ret1670  %x = call <vscale x 4 x i64> @llvm.vp.mul.nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1671  %y = call <vscale x 4 x i64> @llvm.vp.add.nxv4i64(<vscale x 4 x i64> %x, <vscale x 4 x i64> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1672  %u = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> %m, <vscale x 4 x i64> %y, <vscale x 4 x i64> %a, i32 %evl)1673  ret <vscale x 4 x i64> %u1674}1675 1676define <vscale x 4 x i64> @vmadd_vv_nxv4i64_unmasked(<vscale x 4 x i64> %a, <vscale x 4 x i64> %b, <vscale x 4 x i64> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1677; CHECK-LABEL: vmadd_vv_nxv4i64_unmasked:1678; CHECK:       # %bb.0:1679; CHECK-NEXT:    vsetvli zero, a0, e64, m4, tu, ma1680; CHECK-NEXT:    vmadd.vv v8, v12, v161681; CHECK-NEXT:    ret1682  %x = call <vscale x 4 x i64> @llvm.vp.mul.nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1683  %y = call <vscale x 4 x i64> @llvm.vp.add.nxv4i64(<vscale x 4 x i64> %x, <vscale x 4 x i64> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1684  %u = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i64> %y, <vscale x 4 x i64> %a, i32 %evl)1685  ret <vscale x 4 x i64> %u1686}1687 1688define <vscale x 4 x i64> @vmadd_vx_nxv4i64(<vscale x 4 x i64> %a, i64 %b, <vscale x 4 x i64> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1689; RV32-LABEL: vmadd_vx_nxv4i64:1690; RV32:       # %bb.0:1691; RV32-NEXT:    addi sp, sp, -161692; RV32-NEXT:    .cfi_def_cfa_offset 161693; RV32-NEXT:    sw a0, 8(sp)1694; RV32-NEXT:    sw a1, 12(sp)1695; RV32-NEXT:    addi a0, sp, 81696; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma1697; RV32-NEXT:    vlse64.v v16, (a0), zero1698; RV32-NEXT:    vsetvli zero, zero, e64, m4, tu, mu1699; RV32-NEXT:    vmadd.vv v8, v16, v12, v0.t1700; RV32-NEXT:    addi sp, sp, 161701; RV32-NEXT:    .cfi_def_cfa_offset 01702; RV32-NEXT:    ret1703;1704; RV64-LABEL: vmadd_vx_nxv4i64:1705; RV64:       # %bb.0:1706; RV64-NEXT:    vsetvli zero, a1, e64, m4, tu, mu1707; RV64-NEXT:    vmadd.vx v8, a0, v12, v0.t1708; RV64-NEXT:    ret1709  %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01710  %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1711  %x = call <vscale x 4 x i64> @llvm.vp.mul.nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1712  %y = call <vscale x 4 x i64> @llvm.vp.add.nxv4i64(<vscale x 4 x i64> %x, <vscale x 4 x i64> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1713  %u = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> %m, <vscale x 4 x i64> %y, <vscale x 4 x i64> %a, i32 %evl)1714  ret <vscale x 4 x i64> %u1715}1716 1717define <vscale x 4 x i64> @vmadd_vx_nxv4i64_unmasked(<vscale x 4 x i64> %a, i64 %b, <vscale x 4 x i64> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1718; RV32-LABEL: vmadd_vx_nxv4i64_unmasked:1719; RV32:       # %bb.0:1720; RV32-NEXT:    addi sp, sp, -161721; RV32-NEXT:    .cfi_def_cfa_offset 161722; RV32-NEXT:    sw a0, 8(sp)1723; RV32-NEXT:    sw a1, 12(sp)1724; RV32-NEXT:    addi a0, sp, 81725; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma1726; RV32-NEXT:    vlse64.v v16, (a0), zero1727; RV32-NEXT:    vsetvli zero, zero, e64, m4, tu, ma1728; RV32-NEXT:    vmadd.vv v8, v16, v121729; RV32-NEXT:    addi sp, sp, 161730; RV32-NEXT:    .cfi_def_cfa_offset 01731; RV32-NEXT:    ret1732;1733; RV64-LABEL: vmadd_vx_nxv4i64_unmasked:1734; RV64:       # %bb.0:1735; RV64-NEXT:    vsetvli zero, a1, e64, m4, tu, ma1736; RV64-NEXT:    vmadd.vx v8, a0, v121737; RV64-NEXT:    ret1738  %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01739  %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1740  %x = call <vscale x 4 x i64> @llvm.vp.mul.nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1741  %y = call <vscale x 4 x i64> @llvm.vp.add.nxv4i64(<vscale x 4 x i64> %x, <vscale x 4 x i64> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1742  %u = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i64> %y, <vscale x 4 x i64> %a, i32 %evl)1743  ret <vscale x 4 x i64> %u1744}1745 1746define <vscale x 4 x i64> @vmadd_vv_nxv4i64_ta(<vscale x 4 x i64> %a, <vscale x 4 x i64> %b, <vscale x 4 x i64> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1747; CHECK-LABEL: vmadd_vv_nxv4i64_ta:1748; CHECK:       # %bb.0:1749; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, mu1750; CHECK-NEXT:    vmadd.vv v8, v12, v16, v0.t1751; CHECK-NEXT:    ret1752  %x = call <vscale x 4 x i64> @llvm.vp.mul.nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1753  %y = call <vscale x 4 x i64> @llvm.vp.add.nxv4i64(<vscale x 4 x i64> %x, <vscale x 4 x i64> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1754  %u = call <vscale x 4 x i64> @llvm.vp.select.nxv4i64(<vscale x 4 x i1> %m, <vscale x 4 x i64> %y, <vscale x 4 x i64> %a, i32 %evl)1755  ret <vscale x 4 x i64> %u1756}1757 1758define <vscale x 4 x i64> @vmadd_vx_nxv4i64_ta(<vscale x 4 x i64> %a, i64 %b, <vscale x 4 x i64> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1759; RV32-LABEL: vmadd_vx_nxv4i64_ta:1760; RV32:       # %bb.0:1761; RV32-NEXT:    addi sp, sp, -161762; RV32-NEXT:    .cfi_def_cfa_offset 161763; RV32-NEXT:    sw a0, 8(sp)1764; RV32-NEXT:    sw a1, 12(sp)1765; RV32-NEXT:    addi a0, sp, 81766; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, mu1767; RV32-NEXT:    vlse64.v v16, (a0), zero1768; RV32-NEXT:    vmadd.vv v8, v16, v12, v0.t1769; RV32-NEXT:    addi sp, sp, 161770; RV32-NEXT:    .cfi_def_cfa_offset 01771; RV32-NEXT:    ret1772;1773; RV64-LABEL: vmadd_vx_nxv4i64_ta:1774; RV64:       # %bb.0:1775; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, mu1776; RV64-NEXT:    vmadd.vx v8, a0, v12, v0.t1777; RV64-NEXT:    ret1778  %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01779  %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1780  %x = call <vscale x 4 x i64> @llvm.vp.mul.nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1781  %y = call <vscale x 4 x i64> @llvm.vp.add.nxv4i64(<vscale x 4 x i64> %x, <vscale x 4 x i64> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1782  %u = call <vscale x 4 x i64> @llvm.vp.select.nxv4i64(<vscale x 4 x i1> %m, <vscale x 4 x i64> %y, <vscale x 4 x i64> %a, i32 %evl)1783  ret <vscale x 4 x i64> %u1784}1785 1786define <vscale x 8 x i64> @vmadd_vv_nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b, <vscale x 8 x i64> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1787; CHECK-LABEL: vmadd_vv_nxv8i64:1788; CHECK:       # %bb.0:1789; CHECK-NEXT:    vl8re64.v v24, (a0)1790; CHECK-NEXT:    vsetvli zero, a1, e64, m8, tu, mu1791; CHECK-NEXT:    vmadd.vv v8, v16, v24, v0.t1792; CHECK-NEXT:    ret1793  %x = call <vscale x 8 x i64> @llvm.vp.mul.nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1794  %y = call <vscale x 8 x i64> @llvm.vp.add.nxv8i64(<vscale x 8 x i64> %x, <vscale x 8 x i64> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1795  %u = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> %m, <vscale x 8 x i64> %y, <vscale x 8 x i64> %a, i32 %evl)1796  ret <vscale x 8 x i64> %u1797}1798 1799define <vscale x 8 x i64> @vmadd_vv_nxv8i64_unmasked(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b, <vscale x 8 x i64> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1800; CHECK-LABEL: vmadd_vv_nxv8i64_unmasked:1801; CHECK:       # %bb.0:1802; CHECK-NEXT:    vl8re64.v v24, (a0)1803; CHECK-NEXT:    vsetvli zero, a1, e64, m8, tu, ma1804; CHECK-NEXT:    vmadd.vv v8, v16, v241805; CHECK-NEXT:    ret1806  %x = call <vscale x 8 x i64> @llvm.vp.mul.nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1807  %y = call <vscale x 8 x i64> @llvm.vp.add.nxv8i64(<vscale x 8 x i64> %x, <vscale x 8 x i64> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1808  %u = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i64> %y, <vscale x 8 x i64> %a, i32 %evl)1809  ret <vscale x 8 x i64> %u1810}1811 1812define <vscale x 8 x i64> @vmadd_vx_nxv8i64(<vscale x 8 x i64> %a, i64 %b, <vscale x 8 x i64> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1813; RV32-LABEL: vmadd_vx_nxv8i64:1814; RV32:       # %bb.0:1815; RV32-NEXT:    addi sp, sp, -161816; RV32-NEXT:    .cfi_def_cfa_offset 161817; RV32-NEXT:    sw a0, 8(sp)1818; RV32-NEXT:    sw a1, 12(sp)1819; RV32-NEXT:    addi a0, sp, 81820; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma1821; RV32-NEXT:    vlse64.v v24, (a0), zero1822; RV32-NEXT:    vsetvli zero, zero, e64, m8, tu, mu1823; RV32-NEXT:    vmadd.vv v8, v24, v16, v0.t1824; RV32-NEXT:    addi sp, sp, 161825; RV32-NEXT:    .cfi_def_cfa_offset 01826; RV32-NEXT:    ret1827;1828; RV64-LABEL: vmadd_vx_nxv8i64:1829; RV64:       # %bb.0:1830; RV64-NEXT:    vsetvli zero, a1, e64, m8, tu, mu1831; RV64-NEXT:    vmadd.vx v8, a0, v16, v0.t1832; RV64-NEXT:    ret1833  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01834  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1835  %x = call <vscale x 8 x i64> @llvm.vp.mul.nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1836  %y = call <vscale x 8 x i64> @llvm.vp.add.nxv8i64(<vscale x 8 x i64> %x, <vscale x 8 x i64> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1837  %u = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> %m, <vscale x 8 x i64> %y, <vscale x 8 x i64> %a, i32 %evl)1838  ret <vscale x 8 x i64> %u1839}1840 1841define <vscale x 8 x i64> @vmadd_vx_nxv8i64_unmasked(<vscale x 8 x i64> %a, i64 %b, <vscale x 8 x i64> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1842; RV32-LABEL: vmadd_vx_nxv8i64_unmasked:1843; RV32:       # %bb.0:1844; RV32-NEXT:    addi sp, sp, -161845; RV32-NEXT:    .cfi_def_cfa_offset 161846; RV32-NEXT:    sw a0, 8(sp)1847; RV32-NEXT:    sw a1, 12(sp)1848; RV32-NEXT:    addi a0, sp, 81849; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma1850; RV32-NEXT:    vlse64.v v24, (a0), zero1851; RV32-NEXT:    vsetvli zero, zero, e64, m8, tu, ma1852; RV32-NEXT:    vmadd.vv v8, v24, v161853; RV32-NEXT:    addi sp, sp, 161854; RV32-NEXT:    .cfi_def_cfa_offset 01855; RV32-NEXT:    ret1856;1857; RV64-LABEL: vmadd_vx_nxv8i64_unmasked:1858; RV64:       # %bb.0:1859; RV64-NEXT:    vsetvli zero, a1, e64, m8, tu, ma1860; RV64-NEXT:    vmadd.vx v8, a0, v161861; RV64-NEXT:    ret1862  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01863  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1864  %x = call <vscale x 8 x i64> @llvm.vp.mul.nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1865  %y = call <vscale x 8 x i64> @llvm.vp.add.nxv8i64(<vscale x 8 x i64> %x, <vscale x 8 x i64> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1866  %u = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i64> %y, <vscale x 8 x i64> %a, i32 %evl)1867  ret <vscale x 8 x i64> %u1868}1869 1870define <vscale x 8 x i64> @vmadd_vv_nxv8i64_ta(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b, <vscale x 8 x i64> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1871; CHECK-LABEL: vmadd_vv_nxv8i64_ta:1872; CHECK:       # %bb.0:1873; CHECK-NEXT:    vl8re64.v v24, (a0)1874; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu1875; CHECK-NEXT:    vmadd.vv v8, v16, v24, v0.t1876; CHECK-NEXT:    ret1877  %x = call <vscale x 8 x i64> @llvm.vp.mul.nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1878  %y = call <vscale x 8 x i64> @llvm.vp.add.nxv8i64(<vscale x 8 x i64> %x, <vscale x 8 x i64> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1879  %u = call <vscale x 8 x i64> @llvm.vp.select.nxv8i64(<vscale x 8 x i1> %m, <vscale x 8 x i64> %y, <vscale x 8 x i64> %a, i32 %evl)1880  ret <vscale x 8 x i64> %u1881}1882 1883define <vscale x 8 x i64> @vmadd_vx_nxv8i64_ta(<vscale x 8 x i64> %a, i64 %b, <vscale x 8 x i64> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1884; RV32-LABEL: vmadd_vx_nxv8i64_ta:1885; RV32:       # %bb.0:1886; RV32-NEXT:    addi sp, sp, -161887; RV32-NEXT:    .cfi_def_cfa_offset 161888; RV32-NEXT:    sw a0, 8(sp)1889; RV32-NEXT:    sw a1, 12(sp)1890; RV32-NEXT:    addi a0, sp, 81891; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, mu1892; RV32-NEXT:    vlse64.v v24, (a0), zero1893; RV32-NEXT:    vmadd.vv v8, v24, v16, v0.t1894; RV32-NEXT:    addi sp, sp, 161895; RV32-NEXT:    .cfi_def_cfa_offset 01896; RV32-NEXT:    ret1897;1898; RV64-LABEL: vmadd_vx_nxv8i64_ta:1899; RV64:       # %bb.0:1900; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, mu1901; RV64-NEXT:    vmadd.vx v8, a0, v16, v0.t1902; RV64-NEXT:    ret1903  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01904  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1905  %x = call <vscale x 8 x i64> @llvm.vp.mul.nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1906  %y = call <vscale x 8 x i64> @llvm.vp.add.nxv8i64(<vscale x 8 x i64> %x, <vscale x 8 x i64> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1907  %u = call <vscale x 8 x i64> @llvm.vp.select.nxv8i64(<vscale x 8 x i1> %m, <vscale x 8 x i64> %y, <vscale x 8 x i64> %a, i32 %evl)1908  ret <vscale x 8 x i64> %u1909}1910