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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV323; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV644 5define <vscale x 1 x i8> @vmax_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb) {6; CHECK-LABEL: vmax_vv_nxv1i8:7; CHECK: # %bb.0:8; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma9; CHECK-NEXT: vmax.vv v8, v8, v910; CHECK-NEXT: ret11 %cmp = icmp sgt <vscale x 1 x i8> %va, %vb12 %vc = select <vscale x 1 x i1> %cmp, <vscale x 1 x i8> %va, <vscale x 1 x i8> %vb13 ret <vscale x 1 x i8> %vc14}15 16define <vscale x 1 x i8> @vmax_vx_nxv1i8(<vscale x 1 x i8> %va, i8 signext %b) {17; CHECK-LABEL: vmax_vx_nxv1i8:18; CHECK: # %bb.0:19; CHECK-NEXT: vsetvli a1, zero, e8, mf8, ta, ma20; CHECK-NEXT: vmax.vx v8, v8, a021; CHECK-NEXT: ret22 %head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 023 %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer24 %cmp = icmp sgt <vscale x 1 x i8> %va, %splat25 %vc = select <vscale x 1 x i1> %cmp, <vscale x 1 x i8> %va, <vscale x 1 x i8> %splat26 ret <vscale x 1 x i8> %vc27}28 29define <vscale x 1 x i8> @vmax_vi_nxv1i8_0(<vscale x 1 x i8> %va) {30; CHECK-LABEL: vmax_vi_nxv1i8_0:31; CHECK: # %bb.0:32; CHECK-NEXT: li a0, -333; CHECK-NEXT: vsetvli a1, zero, e8, mf8, ta, ma34; CHECK-NEXT: vmax.vx v8, v8, a035; CHECK-NEXT: ret36 %cmp = icmp sgt <vscale x 1 x i8> %va, splat (i8 -3)37 %vc = select <vscale x 1 x i1> %cmp, <vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 -3)38 ret <vscale x 1 x i8> %vc39}40 41define <vscale x 2 x i8> @vmax_vv_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb) {42; CHECK-LABEL: vmax_vv_nxv2i8:43; CHECK: # %bb.0:44; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma45; CHECK-NEXT: vmax.vv v8, v8, v946; CHECK-NEXT: ret47 %cmp = icmp sgt <vscale x 2 x i8> %va, %vb48 %vc = select <vscale x 2 x i1> %cmp, <vscale x 2 x i8> %va, <vscale x 2 x i8> %vb49 ret <vscale x 2 x i8> %vc50}51 52define <vscale x 2 x i8> @vmax_vx_nxv2i8(<vscale x 2 x i8> %va, i8 signext %b) {53; CHECK-LABEL: vmax_vx_nxv2i8:54; CHECK: # %bb.0:55; CHECK-NEXT: vsetvli a1, zero, e8, mf4, ta, ma56; CHECK-NEXT: vmax.vx v8, v8, a057; CHECK-NEXT: ret58 %head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 059 %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer60 %cmp = icmp sgt <vscale x 2 x i8> %va, %splat61 %vc = select <vscale x 2 x i1> %cmp, <vscale x 2 x i8> %va, <vscale x 2 x i8> %splat62 ret <vscale x 2 x i8> %vc63}64 65define <vscale x 2 x i8> @vmax_vi_nxv2i8_0(<vscale x 2 x i8> %va) {66; CHECK-LABEL: vmax_vi_nxv2i8_0:67; CHECK: # %bb.0:68; CHECK-NEXT: li a0, -369; CHECK-NEXT: vsetvli a1, zero, e8, mf4, ta, ma70; CHECK-NEXT: vmax.vx v8, v8, a071; CHECK-NEXT: ret72 %cmp = icmp sgt <vscale x 2 x i8> %va, splat (i8 -3)73 %vc = select <vscale x 2 x i1> %cmp, <vscale x 2 x i8> %va, <vscale x 2 x i8> splat (i8 -3)74 ret <vscale x 2 x i8> %vc75}76 77define <vscale x 4 x i8> @vmax_vv_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb) {78; CHECK-LABEL: vmax_vv_nxv4i8:79; CHECK: # %bb.0:80; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma81; CHECK-NEXT: vmax.vv v8, v8, v982; CHECK-NEXT: ret83 %cmp = icmp sgt <vscale x 4 x i8> %va, %vb84 %vc = select <vscale x 4 x i1> %cmp, <vscale x 4 x i8> %va, <vscale x 4 x i8> %vb85 ret <vscale x 4 x i8> %vc86}87 88define <vscale x 4 x i8> @vmax_vx_nxv4i8(<vscale x 4 x i8> %va, i8 signext %b) {89; CHECK-LABEL: vmax_vx_nxv4i8:90; CHECK: # %bb.0:91; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma92; CHECK-NEXT: vmax.vx v8, v8, a093; CHECK-NEXT: ret94 %head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 095 %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer96 %cmp = icmp sgt <vscale x 4 x i8> %va, %splat97 %vc = select <vscale x 4 x i1> %cmp, <vscale x 4 x i8> %va, <vscale x 4 x i8> %splat98 ret <vscale x 4 x i8> %vc99}100 101define <vscale x 4 x i8> @vmax_vi_nxv4i8_0(<vscale x 4 x i8> %va) {102; CHECK-LABEL: vmax_vi_nxv4i8_0:103; CHECK: # %bb.0:104; CHECK-NEXT: li a0, -3105; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma106; CHECK-NEXT: vmax.vx v8, v8, a0107; CHECK-NEXT: ret108 %cmp = icmp sgt <vscale x 4 x i8> %va, splat (i8 -3)109 %vc = select <vscale x 4 x i1> %cmp, <vscale x 4 x i8> %va, <vscale x 4 x i8> splat (i8 -3)110 ret <vscale x 4 x i8> %vc111}112 113define <vscale x 8 x i8> @vmax_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb) {114; CHECK-LABEL: vmax_vv_nxv8i8:115; CHECK: # %bb.0:116; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma117; CHECK-NEXT: vmax.vv v8, v8, v9118; CHECK-NEXT: ret119 %cmp = icmp sgt <vscale x 8 x i8> %va, %vb120 %vc = select <vscale x 8 x i1> %cmp, <vscale x 8 x i8> %va, <vscale x 8 x i8> %vb121 ret <vscale x 8 x i8> %vc122}123 124define <vscale x 8 x i8> @vmax_vx_nxv8i8(<vscale x 8 x i8> %va, i8 signext %b) {125; CHECK-LABEL: vmax_vx_nxv8i8:126; CHECK: # %bb.0:127; CHECK-NEXT: vsetvli a1, zero, e8, m1, ta, ma128; CHECK-NEXT: vmax.vx v8, v8, a0129; CHECK-NEXT: ret130 %head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0131 %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer132 %cmp = icmp sgt <vscale x 8 x i8> %va, %splat133 %vc = select <vscale x 8 x i1> %cmp, <vscale x 8 x i8> %va, <vscale x 8 x i8> %splat134 ret <vscale x 8 x i8> %vc135}136 137define <vscale x 8 x i8> @vmax_vi_nxv8i8_0(<vscale x 8 x i8> %va) {138; CHECK-LABEL: vmax_vi_nxv8i8_0:139; CHECK: # %bb.0:140; CHECK-NEXT: li a0, -3141; CHECK-NEXT: vsetvli a1, zero, e8, m1, ta, ma142; CHECK-NEXT: vmax.vx v8, v8, a0143; CHECK-NEXT: ret144 %cmp = icmp sgt <vscale x 8 x i8> %va, splat (i8 -3)145 %vc = select <vscale x 8 x i1> %cmp, <vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 -3)146 ret <vscale x 8 x i8> %vc147}148 149define <vscale x 16 x i8> @vmax_vv_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb) {150; CHECK-LABEL: vmax_vv_nxv16i8:151; CHECK: # %bb.0:152; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma153; CHECK-NEXT: vmax.vv v8, v8, v10154; CHECK-NEXT: ret155 %cmp = icmp sgt <vscale x 16 x i8> %va, %vb156 %vc = select <vscale x 16 x i1> %cmp, <vscale x 16 x i8> %va, <vscale x 16 x i8> %vb157 ret <vscale x 16 x i8> %vc158}159 160define <vscale x 16 x i8> @vmax_vx_nxv16i8(<vscale x 16 x i8> %va, i8 signext %b) {161; CHECK-LABEL: vmax_vx_nxv16i8:162; CHECK: # %bb.0:163; CHECK-NEXT: vsetvli a1, zero, e8, m2, ta, ma164; CHECK-NEXT: vmax.vx v8, v8, a0165; CHECK-NEXT: ret166 %head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0167 %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer168 %cmp = icmp sgt <vscale x 16 x i8> %va, %splat169 %vc = select <vscale x 16 x i1> %cmp, <vscale x 16 x i8> %va, <vscale x 16 x i8> %splat170 ret <vscale x 16 x i8> %vc171}172 173define <vscale x 16 x i8> @vmax_vi_nxv16i8_0(<vscale x 16 x i8> %va) {174; CHECK-LABEL: vmax_vi_nxv16i8_0:175; CHECK: # %bb.0:176; CHECK-NEXT: li a0, -3177; CHECK-NEXT: vsetvli a1, zero, e8, m2, ta, ma178; CHECK-NEXT: vmax.vx v8, v8, a0179; CHECK-NEXT: ret180 %cmp = icmp sgt <vscale x 16 x i8> %va, splat (i8 -3)181 %vc = select <vscale x 16 x i1> %cmp, <vscale x 16 x i8> %va, <vscale x 16 x i8> splat (i8 -3)182 ret <vscale x 16 x i8> %vc183}184 185define <vscale x 32 x i8> @vmax_vv_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb) {186; CHECK-LABEL: vmax_vv_nxv32i8:187; CHECK: # %bb.0:188; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma189; CHECK-NEXT: vmax.vv v8, v8, v12190; CHECK-NEXT: ret191 %cmp = icmp sgt <vscale x 32 x i8> %va, %vb192 %vc = select <vscale x 32 x i1> %cmp, <vscale x 32 x i8> %va, <vscale x 32 x i8> %vb193 ret <vscale x 32 x i8> %vc194}195 196define <vscale x 32 x i8> @vmax_vx_nxv32i8(<vscale x 32 x i8> %va, i8 signext %b) {197; CHECK-LABEL: vmax_vx_nxv32i8:198; CHECK: # %bb.0:199; CHECK-NEXT: vsetvli a1, zero, e8, m4, ta, ma200; CHECK-NEXT: vmax.vx v8, v8, a0201; CHECK-NEXT: ret202 %head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0203 %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer204 %cmp = icmp sgt <vscale x 32 x i8> %va, %splat205 %vc = select <vscale x 32 x i1> %cmp, <vscale x 32 x i8> %va, <vscale x 32 x i8> %splat206 ret <vscale x 32 x i8> %vc207}208 209define <vscale x 32 x i8> @vmax_vi_nxv32i8_0(<vscale x 32 x i8> %va) {210; CHECK-LABEL: vmax_vi_nxv32i8_0:211; CHECK: # %bb.0:212; CHECK-NEXT: li a0, -3213; CHECK-NEXT: vsetvli a1, zero, e8, m4, ta, ma214; CHECK-NEXT: vmax.vx v8, v8, a0215; CHECK-NEXT: ret216 %cmp = icmp sgt <vscale x 32 x i8> %va, splat (i8 -3)217 %vc = select <vscale x 32 x i1> %cmp, <vscale x 32 x i8> %va, <vscale x 32 x i8> splat (i8 -3)218 ret <vscale x 32 x i8> %vc219}220 221define <vscale x 64 x i8> @vmax_vv_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb) {222; CHECK-LABEL: vmax_vv_nxv64i8:223; CHECK: # %bb.0:224; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma225; CHECK-NEXT: vmax.vv v8, v8, v16226; CHECK-NEXT: ret227 %cmp = icmp sgt <vscale x 64 x i8> %va, %vb228 %vc = select <vscale x 64 x i1> %cmp, <vscale x 64 x i8> %va, <vscale x 64 x i8> %vb229 ret <vscale x 64 x i8> %vc230}231 232define <vscale x 64 x i8> @vmax_vx_nxv64i8(<vscale x 64 x i8> %va, i8 signext %b) {233; CHECK-LABEL: vmax_vx_nxv64i8:234; CHECK: # %bb.0:235; CHECK-NEXT: vsetvli a1, zero, e8, m8, ta, ma236; CHECK-NEXT: vmax.vx v8, v8, a0237; CHECK-NEXT: ret238 %head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0239 %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer240 %cmp = icmp sgt <vscale x 64 x i8> %va, %splat241 %vc = select <vscale x 64 x i1> %cmp, <vscale x 64 x i8> %va, <vscale x 64 x i8> %splat242 ret <vscale x 64 x i8> %vc243}244 245define <vscale x 64 x i8> @vmax_vi_nxv64i8_0(<vscale x 64 x i8> %va) {246; CHECK-LABEL: vmax_vi_nxv64i8_0:247; CHECK: # %bb.0:248; CHECK-NEXT: li a0, -3249; CHECK-NEXT: vsetvli a1, zero, e8, m8, ta, ma250; CHECK-NEXT: vmax.vx v8, v8, a0251; CHECK-NEXT: ret252 %cmp = icmp sgt <vscale x 64 x i8> %va, splat (i8 -3)253 %vc = select <vscale x 64 x i1> %cmp, <vscale x 64 x i8> %va, <vscale x 64 x i8> splat (i8 -3)254 ret <vscale x 64 x i8> %vc255}256 257define <vscale x 1 x i16> @vmax_vv_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb) {258; CHECK-LABEL: vmax_vv_nxv1i16:259; CHECK: # %bb.0:260; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma261; CHECK-NEXT: vmax.vv v8, v8, v9262; CHECK-NEXT: ret263 %cmp = icmp sgt <vscale x 1 x i16> %va, %vb264 %vc = select <vscale x 1 x i1> %cmp, <vscale x 1 x i16> %va, <vscale x 1 x i16> %vb265 ret <vscale x 1 x i16> %vc266}267 268define <vscale x 1 x i16> @vmax_vx_nxv1i16(<vscale x 1 x i16> %va, i16 signext %b) {269; CHECK-LABEL: vmax_vx_nxv1i16:270; CHECK: # %bb.0:271; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, ma272; CHECK-NEXT: vmax.vx v8, v8, a0273; CHECK-NEXT: ret274 %head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0275 %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer276 %cmp = icmp sgt <vscale x 1 x i16> %va, %splat277 %vc = select <vscale x 1 x i1> %cmp, <vscale x 1 x i16> %va, <vscale x 1 x i16> %splat278 ret <vscale x 1 x i16> %vc279}280 281define <vscale x 1 x i16> @vmax_vi_nxv1i16_0(<vscale x 1 x i16> %va) {282; CHECK-LABEL: vmax_vi_nxv1i16_0:283; CHECK: # %bb.0:284; CHECK-NEXT: li a0, -3285; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, ma286; CHECK-NEXT: vmax.vx v8, v8, a0287; CHECK-NEXT: ret288 %cmp = icmp sgt <vscale x 1 x i16> %va, splat (i16 -3)289 %vc = select <vscale x 1 x i1> %cmp, <vscale x 1 x i16> %va, <vscale x 1 x i16> splat (i16 -3)290 ret <vscale x 1 x i16> %vc291}292 293define <vscale x 2 x i16> @vmax_vv_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb) {294; CHECK-LABEL: vmax_vv_nxv2i16:295; CHECK: # %bb.0:296; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma297; CHECK-NEXT: vmax.vv v8, v8, v9298; CHECK-NEXT: ret299 %cmp = icmp sgt <vscale x 2 x i16> %va, %vb300 %vc = select <vscale x 2 x i1> %cmp, <vscale x 2 x i16> %va, <vscale x 2 x i16> %vb301 ret <vscale x 2 x i16> %vc302}303 304define <vscale x 2 x i16> @vmax_vx_nxv2i16(<vscale x 2 x i16> %va, i16 signext %b) {305; CHECK-LABEL: vmax_vx_nxv2i16:306; CHECK: # %bb.0:307; CHECK-NEXT: vsetvli a1, zero, e16, mf2, ta, ma308; CHECK-NEXT: vmax.vx v8, v8, a0309; CHECK-NEXT: ret310 %head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0311 %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer312 %cmp = icmp sgt <vscale x 2 x i16> %va, %splat313 %vc = select <vscale x 2 x i1> %cmp, <vscale x 2 x i16> %va, <vscale x 2 x i16> %splat314 ret <vscale x 2 x i16> %vc315}316 317define <vscale x 2 x i16> @vmax_vi_nxv2i16_0(<vscale x 2 x i16> %va) {318; CHECK-LABEL: vmax_vi_nxv2i16_0:319; CHECK: # %bb.0:320; CHECK-NEXT: li a0, -3321; CHECK-NEXT: vsetvli a1, zero, e16, mf2, ta, ma322; CHECK-NEXT: vmax.vx v8, v8, a0323; CHECK-NEXT: ret324 %cmp = icmp sgt <vscale x 2 x i16> %va, splat (i16 -3)325 %vc = select <vscale x 2 x i1> %cmp, <vscale x 2 x i16> %va, <vscale x 2 x i16> splat (i16 -3)326 ret <vscale x 2 x i16> %vc327}328 329define <vscale x 4 x i16> @vmax_vv_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb) {330; CHECK-LABEL: vmax_vv_nxv4i16:331; CHECK: # %bb.0:332; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma333; CHECK-NEXT: vmax.vv v8, v8, v9334; CHECK-NEXT: ret335 %cmp = icmp sgt <vscale x 4 x i16> %va, %vb336 %vc = select <vscale x 4 x i1> %cmp, <vscale x 4 x i16> %va, <vscale x 4 x i16> %vb337 ret <vscale x 4 x i16> %vc338}339 340define <vscale x 4 x i16> @vmax_vx_nxv4i16(<vscale x 4 x i16> %va, i16 signext %b) {341; CHECK-LABEL: vmax_vx_nxv4i16:342; CHECK: # %bb.0:343; CHECK-NEXT: vsetvli a1, zero, e16, m1, ta, ma344; CHECK-NEXT: vmax.vx v8, v8, a0345; CHECK-NEXT: ret346 %head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0347 %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer348 %cmp = icmp sgt <vscale x 4 x i16> %va, %splat349 %vc = select <vscale x 4 x i1> %cmp, <vscale x 4 x i16> %va, <vscale x 4 x i16> %splat350 ret <vscale x 4 x i16> %vc351}352 353define <vscale x 4 x i16> @vmax_vi_nxv4i16_0(<vscale x 4 x i16> %va) {354; CHECK-LABEL: vmax_vi_nxv4i16_0:355; CHECK: # %bb.0:356; CHECK-NEXT: li a0, -3357; CHECK-NEXT: vsetvli a1, zero, e16, m1, ta, ma358; CHECK-NEXT: vmax.vx v8, v8, a0359; CHECK-NEXT: ret360 %cmp = icmp sgt <vscale x 4 x i16> %va, splat (i16 -3)361 %vc = select <vscale x 4 x i1> %cmp, <vscale x 4 x i16> %va, <vscale x 4 x i16> splat (i16 -3)362 ret <vscale x 4 x i16> %vc363}364 365define <vscale x 8 x i16> @vmax_vv_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb) {366; CHECK-LABEL: vmax_vv_nxv8i16:367; CHECK: # %bb.0:368; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma369; CHECK-NEXT: vmax.vv v8, v8, v10370; CHECK-NEXT: ret371 %cmp = icmp sgt <vscale x 8 x i16> %va, %vb372 %vc = select <vscale x 8 x i1> %cmp, <vscale x 8 x i16> %va, <vscale x 8 x i16> %vb373 ret <vscale x 8 x i16> %vc374}375 376define <vscale x 8 x i16> @vmax_vx_nxv8i16(<vscale x 8 x i16> %va, i16 signext %b) {377; CHECK-LABEL: vmax_vx_nxv8i16:378; CHECK: # %bb.0:379; CHECK-NEXT: vsetvli a1, zero, e16, m2, ta, ma380; CHECK-NEXT: vmax.vx v8, v8, a0381; CHECK-NEXT: ret382 %head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0383 %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer384 %cmp = icmp sgt <vscale x 8 x i16> %va, %splat385 %vc = select <vscale x 8 x i1> %cmp, <vscale x 8 x i16> %va, <vscale x 8 x i16> %splat386 ret <vscale x 8 x i16> %vc387}388 389define <vscale x 8 x i16> @vmax_vi_nxv8i16_0(<vscale x 8 x i16> %va) {390; CHECK-LABEL: vmax_vi_nxv8i16_0:391; CHECK: # %bb.0:392; CHECK-NEXT: li a0, -3393; CHECK-NEXT: vsetvli a1, zero, e16, m2, ta, ma394; CHECK-NEXT: vmax.vx v8, v8, a0395; CHECK-NEXT: ret396 %cmp = icmp sgt <vscale x 8 x i16> %va, splat (i16 -3)397 %vc = select <vscale x 8 x i1> %cmp, <vscale x 8 x i16> %va, <vscale x 8 x i16> splat (i16 -3)398 ret <vscale x 8 x i16> %vc399}400 401define <vscale x 16 x i16> @vmax_vv_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb) {402; CHECK-LABEL: vmax_vv_nxv16i16:403; CHECK: # %bb.0:404; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma405; CHECK-NEXT: vmax.vv v8, v8, v12406; CHECK-NEXT: ret407 %cmp = icmp sgt <vscale x 16 x i16> %va, %vb408 %vc = select <vscale x 16 x i1> %cmp, <vscale x 16 x i16> %va, <vscale x 16 x i16> %vb409 ret <vscale x 16 x i16> %vc410}411 412define <vscale x 16 x i16> @vmax_vx_nxv16i16(<vscale x 16 x i16> %va, i16 signext %b) {413; CHECK-LABEL: vmax_vx_nxv16i16:414; CHECK: # %bb.0:415; CHECK-NEXT: vsetvli a1, zero, e16, m4, ta, ma416; CHECK-NEXT: vmax.vx v8, v8, a0417; CHECK-NEXT: ret418 %head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0419 %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer420 %cmp = icmp sgt <vscale x 16 x i16> %va, %splat421 %vc = select <vscale x 16 x i1> %cmp, <vscale x 16 x i16> %va, <vscale x 16 x i16> %splat422 ret <vscale x 16 x i16> %vc423}424 425define <vscale x 16 x i16> @vmax_vi_nxv16i16_0(<vscale x 16 x i16> %va) {426; CHECK-LABEL: vmax_vi_nxv16i16_0:427; CHECK: # %bb.0:428; CHECK-NEXT: li a0, -3429; CHECK-NEXT: vsetvli a1, zero, e16, m4, ta, ma430; CHECK-NEXT: vmax.vx v8, v8, a0431; CHECK-NEXT: ret432 %cmp = icmp sgt <vscale x 16 x i16> %va, splat (i16 -3)433 %vc = select <vscale x 16 x i1> %cmp, <vscale x 16 x i16> %va, <vscale x 16 x i16> splat (i16 -3)434 ret <vscale x 16 x i16> %vc435}436 437define <vscale x 32 x i16> @vmax_vv_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb) {438; CHECK-LABEL: vmax_vv_nxv32i16:439; CHECK: # %bb.0:440; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma441; CHECK-NEXT: vmax.vv v8, v8, v16442; CHECK-NEXT: ret443 %cmp = icmp sgt <vscale x 32 x i16> %va, %vb444 %vc = select <vscale x 32 x i1> %cmp, <vscale x 32 x i16> %va, <vscale x 32 x i16> %vb445 ret <vscale x 32 x i16> %vc446}447 448define <vscale x 32 x i16> @vmax_vx_nxv32i16(<vscale x 32 x i16> %va, i16 signext %b) {449; CHECK-LABEL: vmax_vx_nxv32i16:450; CHECK: # %bb.0:451; CHECK-NEXT: vsetvli a1, zero, e16, m8, ta, ma452; CHECK-NEXT: vmax.vx v8, v8, a0453; CHECK-NEXT: ret454 %head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0455 %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer456 %cmp = icmp sgt <vscale x 32 x i16> %va, %splat457 %vc = select <vscale x 32 x i1> %cmp, <vscale x 32 x i16> %va, <vscale x 32 x i16> %splat458 ret <vscale x 32 x i16> %vc459}460 461define <vscale x 32 x i16> @vmax_vi_nxv32i16_0(<vscale x 32 x i16> %va) {462; CHECK-LABEL: vmax_vi_nxv32i16_0:463; CHECK: # %bb.0:464; CHECK-NEXT: li a0, -3465; CHECK-NEXT: vsetvli a1, zero, e16, m8, ta, ma466; CHECK-NEXT: vmax.vx v8, v8, a0467; CHECK-NEXT: ret468 %cmp = icmp sgt <vscale x 32 x i16> %va, splat (i16 -3)469 %vc = select <vscale x 32 x i1> %cmp, <vscale x 32 x i16> %va, <vscale x 32 x i16> splat (i16 -3)470 ret <vscale x 32 x i16> %vc471}472 473define <vscale x 1 x i32> @vmax_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb) {474; CHECK-LABEL: vmax_vv_nxv1i32:475; CHECK: # %bb.0:476; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma477; CHECK-NEXT: vmax.vv v8, v8, v9478; CHECK-NEXT: ret479 %cmp = icmp sgt <vscale x 1 x i32> %va, %vb480 %vc = select <vscale x 1 x i1> %cmp, <vscale x 1 x i32> %va, <vscale x 1 x i32> %vb481 ret <vscale x 1 x i32> %vc482}483 484define <vscale x 1 x i32> @vmax_vx_nxv1i32(<vscale x 1 x i32> %va, i32 signext %b) {485; CHECK-LABEL: vmax_vx_nxv1i32:486; CHECK: # %bb.0:487; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma488; CHECK-NEXT: vmax.vx v8, v8, a0489; CHECK-NEXT: ret490 %head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0491 %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer492 %cmp = icmp sgt <vscale x 1 x i32> %va, %splat493 %vc = select <vscale x 1 x i1> %cmp, <vscale x 1 x i32> %va, <vscale x 1 x i32> %splat494 ret <vscale x 1 x i32> %vc495}496 497define <vscale x 1 x i32> @vmax_vi_nxv1i32_0(<vscale x 1 x i32> %va) {498; CHECK-LABEL: vmax_vi_nxv1i32_0:499; CHECK: # %bb.0:500; CHECK-NEXT: li a0, -3501; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma502; CHECK-NEXT: vmax.vx v8, v8, a0503; CHECK-NEXT: ret504 %cmp = icmp sgt <vscale x 1 x i32> %va, splat (i32 -3)505 %vc = select <vscale x 1 x i1> %cmp, <vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 -3)506 ret <vscale x 1 x i32> %vc507}508 509define <vscale x 2 x i32> @vmax_vv_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb) {510; CHECK-LABEL: vmax_vv_nxv2i32:511; CHECK: # %bb.0:512; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma513; CHECK-NEXT: vmax.vv v8, v8, v9514; CHECK-NEXT: ret515 %cmp = icmp sgt <vscale x 2 x i32> %va, %vb516 %vc = select <vscale x 2 x i1> %cmp, <vscale x 2 x i32> %va, <vscale x 2 x i32> %vb517 ret <vscale x 2 x i32> %vc518}519 520define <vscale x 2 x i32> @vmax_vx_nxv2i32(<vscale x 2 x i32> %va, i32 signext %b) {521; CHECK-LABEL: vmax_vx_nxv2i32:522; CHECK: # %bb.0:523; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma524; CHECK-NEXT: vmax.vx v8, v8, a0525; CHECK-NEXT: ret526 %head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0527 %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer528 %cmp = icmp sgt <vscale x 2 x i32> %va, %splat529 %vc = select <vscale x 2 x i1> %cmp, <vscale x 2 x i32> %va, <vscale x 2 x i32> %splat530 ret <vscale x 2 x i32> %vc531}532 533define <vscale x 2 x i32> @vmax_vi_nxv2i32_0(<vscale x 2 x i32> %va) {534; CHECK-LABEL: vmax_vi_nxv2i32_0:535; CHECK: # %bb.0:536; CHECK-NEXT: li a0, -3537; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma538; CHECK-NEXT: vmax.vx v8, v8, a0539; CHECK-NEXT: ret540 %cmp = icmp sgt <vscale x 2 x i32> %va, splat (i32 -3)541 %vc = select <vscale x 2 x i1> %cmp, <vscale x 2 x i32> %va, <vscale x 2 x i32> splat (i32 -3)542 ret <vscale x 2 x i32> %vc543}544 545define <vscale x 4 x i32> @vmax_vv_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb) {546; CHECK-LABEL: vmax_vv_nxv4i32:547; CHECK: # %bb.0:548; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma549; CHECK-NEXT: vmax.vv v8, v8, v10550; CHECK-NEXT: ret551 %cmp = icmp sgt <vscale x 4 x i32> %va, %vb552 %vc = select <vscale x 4 x i1> %cmp, <vscale x 4 x i32> %va, <vscale x 4 x i32> %vb553 ret <vscale x 4 x i32> %vc554}555 556define <vscale x 4 x i32> @vmax_vx_nxv4i32(<vscale x 4 x i32> %va, i32 signext %b) {557; CHECK-LABEL: vmax_vx_nxv4i32:558; CHECK: # %bb.0:559; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma560; CHECK-NEXT: vmax.vx v8, v8, a0561; CHECK-NEXT: ret562 %head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0563 %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer564 %cmp = icmp sgt <vscale x 4 x i32> %va, %splat565 %vc = select <vscale x 4 x i1> %cmp, <vscale x 4 x i32> %va, <vscale x 4 x i32> %splat566 ret <vscale x 4 x i32> %vc567}568 569define <vscale x 4 x i32> @vmax_vi_nxv4i32_0(<vscale x 4 x i32> %va) {570; CHECK-LABEL: vmax_vi_nxv4i32_0:571; CHECK: # %bb.0:572; CHECK-NEXT: li a0, -3573; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma574; CHECK-NEXT: vmax.vx v8, v8, a0575; CHECK-NEXT: ret576 %cmp = icmp sgt <vscale x 4 x i32> %va, splat (i32 -3)577 %vc = select <vscale x 4 x i1> %cmp, <vscale x 4 x i32> %va, <vscale x 4 x i32> splat (i32 -3)578 ret <vscale x 4 x i32> %vc579}580 581define <vscale x 8 x i32> @vmax_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb) {582; CHECK-LABEL: vmax_vv_nxv8i32:583; CHECK: # %bb.0:584; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma585; CHECK-NEXT: vmax.vv v8, v8, v12586; CHECK-NEXT: ret587 %cmp = icmp sgt <vscale x 8 x i32> %va, %vb588 %vc = select <vscale x 8 x i1> %cmp, <vscale x 8 x i32> %va, <vscale x 8 x i32> %vb589 ret <vscale x 8 x i32> %vc590}591 592define <vscale x 8 x i32> @vmax_vx_nxv8i32(<vscale x 8 x i32> %va, i32 signext %b) {593; CHECK-LABEL: vmax_vx_nxv8i32:594; CHECK: # %bb.0:595; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma596; CHECK-NEXT: vmax.vx v8, v8, a0597; CHECK-NEXT: ret598 %head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0599 %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer600 %cmp = icmp sgt <vscale x 8 x i32> %va, %splat601 %vc = select <vscale x 8 x i1> %cmp, <vscale x 8 x i32> %va, <vscale x 8 x i32> %splat602 ret <vscale x 8 x i32> %vc603}604 605define <vscale x 8 x i32> @vmax_vi_nxv8i32_0(<vscale x 8 x i32> %va) {606; CHECK-LABEL: vmax_vi_nxv8i32_0:607; CHECK: # %bb.0:608; CHECK-NEXT: li a0, -3609; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma610; CHECK-NEXT: vmax.vx v8, v8, a0611; CHECK-NEXT: ret612 %cmp = icmp sgt <vscale x 8 x i32> %va, splat (i32 -3)613 %vc = select <vscale x 8 x i1> %cmp, <vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 -3)614 ret <vscale x 8 x i32> %vc615}616 617define <vscale x 16 x i32> @vmax_vv_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb) {618; CHECK-LABEL: vmax_vv_nxv16i32:619; CHECK: # %bb.0:620; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma621; CHECK-NEXT: vmax.vv v8, v8, v16622; CHECK-NEXT: ret623 %cmp = icmp sgt <vscale x 16 x i32> %va, %vb624 %vc = select <vscale x 16 x i1> %cmp, <vscale x 16 x i32> %va, <vscale x 16 x i32> %vb625 ret <vscale x 16 x i32> %vc626}627 628define <vscale x 16 x i32> @vmax_vx_nxv16i32(<vscale x 16 x i32> %va, i32 signext %b) {629; CHECK-LABEL: vmax_vx_nxv16i32:630; CHECK: # %bb.0:631; CHECK-NEXT: vsetvli a1, zero, e32, m8, ta, ma632; CHECK-NEXT: vmax.vx v8, v8, a0633; CHECK-NEXT: ret634 %head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 0635 %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer636 %cmp = icmp sgt <vscale x 16 x i32> %va, %splat637 %vc = select <vscale x 16 x i1> %cmp, <vscale x 16 x i32> %va, <vscale x 16 x i32> %splat638 ret <vscale x 16 x i32> %vc639}640 641define <vscale x 16 x i32> @vmax_vi_nxv16i32_0(<vscale x 16 x i32> %va) {642; CHECK-LABEL: vmax_vi_nxv16i32_0:643; CHECK: # %bb.0:644; CHECK-NEXT: li a0, -3645; CHECK-NEXT: vsetvli a1, zero, e32, m8, ta, ma646; CHECK-NEXT: vmax.vx v8, v8, a0647; CHECK-NEXT: ret648 %cmp = icmp sgt <vscale x 16 x i32> %va, splat (i32 -3)649 %vc = select <vscale x 16 x i1> %cmp, <vscale x 16 x i32> %va, <vscale x 16 x i32> splat (i32 -3)650 ret <vscale x 16 x i32> %vc651}652 653define <vscale x 1 x i64> @vmax_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb) {654; CHECK-LABEL: vmax_vv_nxv1i64:655; CHECK: # %bb.0:656; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma657; CHECK-NEXT: vmax.vv v8, v8, v9658; CHECK-NEXT: ret659 %cmp = icmp sgt <vscale x 1 x i64> %va, %vb660 %vc = select <vscale x 1 x i1> %cmp, <vscale x 1 x i64> %va, <vscale x 1 x i64> %vb661 ret <vscale x 1 x i64> %vc662}663 664define <vscale x 1 x i64> @vmax_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b) {665; RV32-LABEL: vmax_vx_nxv1i64:666; RV32: # %bb.0:667; RV32-NEXT: addi sp, sp, -16668; RV32-NEXT: .cfi_def_cfa_offset 16669; RV32-NEXT: sw a0, 8(sp)670; RV32-NEXT: sw a1, 12(sp)671; RV32-NEXT: addi a0, sp, 8672; RV32-NEXT: vsetvli a1, zero, e64, m1, ta, ma673; RV32-NEXT: vlse64.v v9, (a0), zero674; RV32-NEXT: vmax.vv v8, v8, v9675; RV32-NEXT: addi sp, sp, 16676; RV32-NEXT: .cfi_def_cfa_offset 0677; RV32-NEXT: ret678;679; RV64-LABEL: vmax_vx_nxv1i64:680; RV64: # %bb.0:681; RV64-NEXT: vsetvli a1, zero, e64, m1, ta, ma682; RV64-NEXT: vmax.vx v8, v8, a0683; RV64-NEXT: ret684 %head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0685 %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer686 %cmp = icmp sgt <vscale x 1 x i64> %va, %splat687 %vc = select <vscale x 1 x i1> %cmp, <vscale x 1 x i64> %va, <vscale x 1 x i64> %splat688 ret <vscale x 1 x i64> %vc689}690 691define <vscale x 1 x i64> @vmax_vi_nxv1i64_0(<vscale x 1 x i64> %va) {692; CHECK-LABEL: vmax_vi_nxv1i64_0:693; CHECK: # %bb.0:694; CHECK-NEXT: li a0, -3695; CHECK-NEXT: vsetvli a1, zero, e64, m1, ta, ma696; CHECK-NEXT: vmax.vx v8, v8, a0697; CHECK-NEXT: ret698 %cmp = icmp sgt <vscale x 1 x i64> %va, splat (i64 -3)699 %vc = select <vscale x 1 x i1> %cmp, <vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 -3)700 ret <vscale x 1 x i64> %vc701}702 703define <vscale x 2 x i64> @vmax_vv_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb) {704; CHECK-LABEL: vmax_vv_nxv2i64:705; CHECK: # %bb.0:706; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma707; CHECK-NEXT: vmax.vv v8, v8, v10708; CHECK-NEXT: ret709 %cmp = icmp sgt <vscale x 2 x i64> %va, %vb710 %vc = select <vscale x 2 x i1> %cmp, <vscale x 2 x i64> %va, <vscale x 2 x i64> %vb711 ret <vscale x 2 x i64> %vc712}713 714define <vscale x 2 x i64> @vmax_vx_nxv2i64(<vscale x 2 x i64> %va, i64 %b) {715; RV32-LABEL: vmax_vx_nxv2i64:716; RV32: # %bb.0:717; RV32-NEXT: addi sp, sp, -16718; RV32-NEXT: .cfi_def_cfa_offset 16719; RV32-NEXT: sw a0, 8(sp)720; RV32-NEXT: sw a1, 12(sp)721; RV32-NEXT: addi a0, sp, 8722; RV32-NEXT: vsetvli a1, zero, e64, m2, ta, ma723; RV32-NEXT: vlse64.v v10, (a0), zero724; RV32-NEXT: vmax.vv v8, v8, v10725; RV32-NEXT: addi sp, sp, 16726; RV32-NEXT: .cfi_def_cfa_offset 0727; RV32-NEXT: ret728;729; RV64-LABEL: vmax_vx_nxv2i64:730; RV64: # %bb.0:731; RV64-NEXT: vsetvli a1, zero, e64, m2, ta, ma732; RV64-NEXT: vmax.vx v8, v8, a0733; RV64-NEXT: ret734 %head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 0735 %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer736 %cmp = icmp sgt <vscale x 2 x i64> %va, %splat737 %vc = select <vscale x 2 x i1> %cmp, <vscale x 2 x i64> %va, <vscale x 2 x i64> %splat738 ret <vscale x 2 x i64> %vc739}740 741define <vscale x 2 x i64> @vmax_vi_nxv2i64_0(<vscale x 2 x i64> %va) {742; CHECK-LABEL: vmax_vi_nxv2i64_0:743; CHECK: # %bb.0:744; CHECK-NEXT: li a0, -3745; CHECK-NEXT: vsetvli a1, zero, e64, m2, ta, ma746; CHECK-NEXT: vmax.vx v8, v8, a0747; CHECK-NEXT: ret748 %cmp = icmp sgt <vscale x 2 x i64> %va, splat (i64 -3)749 %vc = select <vscale x 2 x i1> %cmp, <vscale x 2 x i64> %va, <vscale x 2 x i64> splat (i64 -3)750 ret <vscale x 2 x i64> %vc751}752 753define <vscale x 4 x i64> @vmax_vv_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb) {754; CHECK-LABEL: vmax_vv_nxv4i64:755; CHECK: # %bb.0:756; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma757; CHECK-NEXT: vmax.vv v8, v8, v12758; CHECK-NEXT: ret759 %cmp = icmp sgt <vscale x 4 x i64> %va, %vb760 %vc = select <vscale x 4 x i1> %cmp, <vscale x 4 x i64> %va, <vscale x 4 x i64> %vb761 ret <vscale x 4 x i64> %vc762}763 764define <vscale x 4 x i64> @vmax_vx_nxv4i64(<vscale x 4 x i64> %va, i64 %b) {765; RV32-LABEL: vmax_vx_nxv4i64:766; RV32: # %bb.0:767; RV32-NEXT: addi sp, sp, -16768; RV32-NEXT: .cfi_def_cfa_offset 16769; RV32-NEXT: sw a0, 8(sp)770; RV32-NEXT: sw a1, 12(sp)771; RV32-NEXT: addi a0, sp, 8772; RV32-NEXT: vsetvli a1, zero, e64, m4, ta, ma773; RV32-NEXT: vlse64.v v12, (a0), zero774; RV32-NEXT: vmax.vv v8, v8, v12775; RV32-NEXT: addi sp, sp, 16776; RV32-NEXT: .cfi_def_cfa_offset 0777; RV32-NEXT: ret778;779; RV64-LABEL: vmax_vx_nxv4i64:780; RV64: # %bb.0:781; RV64-NEXT: vsetvli a1, zero, e64, m4, ta, ma782; RV64-NEXT: vmax.vx v8, v8, a0783; RV64-NEXT: ret784 %head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 0785 %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer786 %cmp = icmp sgt <vscale x 4 x i64> %va, %splat787 %vc = select <vscale x 4 x i1> %cmp, <vscale x 4 x i64> %va, <vscale x 4 x i64> %splat788 ret <vscale x 4 x i64> %vc789}790 791define <vscale x 4 x i64> @vmax_vi_nxv4i64_0(<vscale x 4 x i64> %va) {792; CHECK-LABEL: vmax_vi_nxv4i64_0:793; CHECK: # %bb.0:794; CHECK-NEXT: li a0, -3795; CHECK-NEXT: vsetvli a1, zero, e64, m4, ta, ma796; CHECK-NEXT: vmax.vx v8, v8, a0797; CHECK-NEXT: ret798 %cmp = icmp sgt <vscale x 4 x i64> %va, splat (i64 -3)799 %vc = select <vscale x 4 x i1> %cmp, <vscale x 4 x i64> %va, <vscale x 4 x i64> splat (i64 -3)800 ret <vscale x 4 x i64> %vc801}802 803define <vscale x 8 x i64> @vmax_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb) {804; CHECK-LABEL: vmax_vv_nxv8i64:805; CHECK: # %bb.0:806; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma807; CHECK-NEXT: vmax.vv v8, v8, v16808; CHECK-NEXT: ret809 %cmp = icmp sgt <vscale x 8 x i64> %va, %vb810 %vc = select <vscale x 8 x i1> %cmp, <vscale x 8 x i64> %va, <vscale x 8 x i64> %vb811 ret <vscale x 8 x i64> %vc812}813 814define <vscale x 8 x i64> @vmax_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b) {815; RV32-LABEL: vmax_vx_nxv8i64:816; RV32: # %bb.0:817; RV32-NEXT: addi sp, sp, -16818; RV32-NEXT: .cfi_def_cfa_offset 16819; RV32-NEXT: sw a0, 8(sp)820; RV32-NEXT: sw a1, 12(sp)821; RV32-NEXT: addi a0, sp, 8822; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, ma823; RV32-NEXT: vlse64.v v16, (a0), zero824; RV32-NEXT: vmax.vv v8, v8, v16825; RV32-NEXT: addi sp, sp, 16826; RV32-NEXT: .cfi_def_cfa_offset 0827; RV32-NEXT: ret828;829; RV64-LABEL: vmax_vx_nxv8i64:830; RV64: # %bb.0:831; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, ma832; RV64-NEXT: vmax.vx v8, v8, a0833; RV64-NEXT: ret834 %head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0835 %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer836 %cmp = icmp sgt <vscale x 8 x i64> %va, %splat837 %vc = select <vscale x 8 x i1> %cmp, <vscale x 8 x i64> %va, <vscale x 8 x i64> %splat838 ret <vscale x 8 x i64> %vc839}840 841define <vscale x 8 x i64> @vmax_vi_nxv8i64_0(<vscale x 8 x i64> %va) {842; CHECK-LABEL: vmax_vi_nxv8i64_0:843; CHECK: # %bb.0:844; CHECK-NEXT: li a0, -3845; CHECK-NEXT: vsetvli a1, zero, e64, m8, ta, ma846; CHECK-NEXT: vmax.vx v8, v8, a0847; CHECK-NEXT: ret848 %cmp = icmp sgt <vscale x 8 x i64> %va, splat (i64 -3)849 %vc = select <vscale x 8 x i1> %cmp, <vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 -3)850 ret <vscale x 8 x i64> %vc851}852