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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <vscale x 8 x i7> @vminu_vx_nxv8i7(<vscale x 8 x i7> %a, i7 signext %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {8; CHECK-LABEL: vminu_vx_nxv8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: li a2, 12711; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma12; CHECK-NEXT: vmv.v.x v9, a013; CHECK-NEXT: vand.vx v8, v8, a2, v0.t14; CHECK-NEXT: vand.vx v9, v9, a2, v0.t15; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t16; CHECK-NEXT: ret17 %elt.head = insertelement <vscale x 8 x i7> poison, i7 %b, i32 018 %vb = shufflevector <vscale x 8 x i7> %elt.head, <vscale x 8 x i7> poison, <vscale x 8 x i32> zeroinitializer19 %v = call <vscale x 8 x i7> @llvm.vp.umin.nxv8i7(<vscale x 8 x i7> %a, <vscale x 8 x i7> %vb, <vscale x 8 x i1> %mask, i32 %evl)20 ret <vscale x 8 x i7> %v21}22 23define <vscale x 1 x i8> @vminu_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {24; CHECK-LABEL: vminu_vv_nxv1i8:25; CHECK: # %bb.0:26; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma27; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t28; CHECK-NEXT: ret29 %v = call <vscale x 1 x i8> @llvm.vp.umin.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 %evl)30 ret <vscale x 1 x i8> %v31}32 33define <vscale x 1 x i8> @vminu_vv_nxv1i8_unmasked(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, i32 zeroext %evl) {34; CHECK-LABEL: vminu_vv_nxv1i8_unmasked:35; CHECK: # %bb.0:36; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma37; CHECK-NEXT: vminu.vv v8, v8, v938; CHECK-NEXT: ret39 %v = call <vscale x 1 x i8> @llvm.vp.umin.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)40 ret <vscale x 1 x i8> %v41}42 43define <vscale x 1 x i8> @vminu_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {44; CHECK-LABEL: vminu_vx_nxv1i8:45; CHECK: # %bb.0:46; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma47; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t48; CHECK-NEXT: ret49 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 050 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer51 %v = call <vscale x 1 x i8> @llvm.vp.umin.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 %evl)52 ret <vscale x 1 x i8> %v53}54 55define <vscale x 1 x i8> @vminu_vx_nxv1i8_commute(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {56; CHECK-LABEL: vminu_vx_nxv1i8_commute:57; CHECK: # %bb.0:58; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma59; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t60; CHECK-NEXT: ret61 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 062 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer63 %v = call <vscale x 1 x i8> @llvm.vp.umin.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 %evl)64 ret <vscale x 1 x i8> %v65}66 67define <vscale x 1 x i8> @vminu_vx_nxv1i8_unmasked(<vscale x 1 x i8> %va, i8 %b, i32 zeroext %evl) {68; CHECK-LABEL: vminu_vx_nxv1i8_unmasked:69; CHECK: # %bb.0:70; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma71; CHECK-NEXT: vminu.vx v8, v8, a072; CHECK-NEXT: ret73 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 074 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer75 %v = call <vscale x 1 x i8> @llvm.vp.umin.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)76 ret <vscale x 1 x i8> %v77}78 79define <vscale x 2 x i8> @vminu_vv_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {80; CHECK-LABEL: vminu_vv_nxv2i8:81; CHECK: # %bb.0:82; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma83; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t84; CHECK-NEXT: ret85 %v = call <vscale x 2 x i8> @llvm.vp.umin.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 %evl)86 ret <vscale x 2 x i8> %v87}88 89define <vscale x 2 x i8> @vminu_vv_nxv2i8_unmasked(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, i32 zeroext %evl) {90; CHECK-LABEL: vminu_vv_nxv2i8_unmasked:91; CHECK: # %bb.0:92; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma93; CHECK-NEXT: vminu.vv v8, v8, v994; CHECK-NEXT: ret95 %v = call <vscale x 2 x i8> @llvm.vp.umin.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)96 ret <vscale x 2 x i8> %v97}98 99define <vscale x 2 x i8> @vminu_vx_nxv2i8(<vscale x 2 x i8> %va, i8 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {100; CHECK-LABEL: vminu_vx_nxv2i8:101; CHECK: # %bb.0:102; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma103; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t104; CHECK-NEXT: ret105 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0106 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer107 %v = call <vscale x 2 x i8> @llvm.vp.umin.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 %evl)108 ret <vscale x 2 x i8> %v109}110 111define <vscale x 2 x i8> @vminu_vx_nxv2i8_unmasked(<vscale x 2 x i8> %va, i8 %b, i32 zeroext %evl) {112; CHECK-LABEL: vminu_vx_nxv2i8_unmasked:113; CHECK: # %bb.0:114; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma115; CHECK-NEXT: vminu.vx v8, v8, a0116; CHECK-NEXT: ret117 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0118 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer119 %v = call <vscale x 2 x i8> @llvm.vp.umin.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)120 ret <vscale x 2 x i8> %v121}122 123define <vscale x 3 x i8> @vminu_vv_nxv3i8(<vscale x 3 x i8> %va, <vscale x 3 x i8> %b, <vscale x 3 x i1> %m, i32 zeroext %evl) {124; CHECK-LABEL: vminu_vv_nxv3i8:125; CHECK: # %bb.0:126; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma127; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t128; CHECK-NEXT: ret129 %v = call <vscale x 3 x i8> @llvm.vp.umin.nxv3i8(<vscale x 3 x i8> %va, <vscale x 3 x i8> %b, <vscale x 3 x i1> %m, i32 %evl)130 ret <vscale x 3 x i8> %v131}132 133define <vscale x 3 x i8> @vminu_vv_nxv3i8_unmasked(<vscale x 3 x i8> %va, <vscale x 3 x i8> %b, i32 zeroext %evl) {134; CHECK-LABEL: vminu_vv_nxv3i8_unmasked:135; CHECK: # %bb.0:136; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma137; CHECK-NEXT: vminu.vv v8, v8, v9138; CHECK-NEXT: ret139 %v = call <vscale x 3 x i8> @llvm.vp.umin.nxv3i8(<vscale x 3 x i8> %va, <vscale x 3 x i8> %b, <vscale x 3 x i1> splat (i1 true), i32 %evl)140 ret <vscale x 3 x i8> %v141}142 143define <vscale x 3 x i8> @vminu_vx_nxv3i8(<vscale x 3 x i8> %va, i8 %b, <vscale x 3 x i1> %m, i32 zeroext %evl) {144; CHECK-LABEL: vminu_vx_nxv3i8:145; CHECK: # %bb.0:146; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma147; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t148; CHECK-NEXT: ret149 %elt.head = insertelement <vscale x 3 x i8> poison, i8 %b, i32 0150 %vb = shufflevector <vscale x 3 x i8> %elt.head, <vscale x 3 x i8> poison, <vscale x 3 x i32> zeroinitializer151 %v = call <vscale x 3 x i8> @llvm.vp.umin.nxv3i8(<vscale x 3 x i8> %va, <vscale x 3 x i8> %vb, <vscale x 3 x i1> %m, i32 %evl)152 ret <vscale x 3 x i8> %v153}154 155define <vscale x 3 x i8> @vminu_vx_nxv3i8_unmasked(<vscale x 3 x i8> %va, i8 %b, i32 zeroext %evl) {156; CHECK-LABEL: vminu_vx_nxv3i8_unmasked:157; CHECK: # %bb.0:158; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma159; CHECK-NEXT: vminu.vx v8, v8, a0160; CHECK-NEXT: ret161 %elt.head = insertelement <vscale x 3 x i8> poison, i8 %b, i32 0162 %vb = shufflevector <vscale x 3 x i8> %elt.head, <vscale x 3 x i8> poison, <vscale x 3 x i32> zeroinitializer163 %v = call <vscale x 3 x i8> @llvm.vp.umin.nxv3i8(<vscale x 3 x i8> %va, <vscale x 3 x i8> %vb, <vscale x 3 x i1> splat (i1 true), i32 %evl)164 ret <vscale x 3 x i8> %v165}166 167define <vscale x 4 x i8> @vminu_vv_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {168; CHECK-LABEL: vminu_vv_nxv4i8:169; CHECK: # %bb.0:170; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma171; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t172; CHECK-NEXT: ret173 %v = call <vscale x 4 x i8> @llvm.vp.umin.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 %evl)174 ret <vscale x 4 x i8> %v175}176 177define <vscale x 4 x i8> @vminu_vv_nxv4i8_unmasked(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, i32 zeroext %evl) {178; CHECK-LABEL: vminu_vv_nxv4i8_unmasked:179; CHECK: # %bb.0:180; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma181; CHECK-NEXT: vminu.vv v8, v8, v9182; CHECK-NEXT: ret183 %v = call <vscale x 4 x i8> @llvm.vp.umin.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)184 ret <vscale x 4 x i8> %v185}186 187define <vscale x 4 x i8> @vminu_vx_nxv4i8(<vscale x 4 x i8> %va, i8 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {188; CHECK-LABEL: vminu_vx_nxv4i8:189; CHECK: # %bb.0:190; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma191; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t192; CHECK-NEXT: ret193 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0194 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer195 %v = call <vscale x 4 x i8> @llvm.vp.umin.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 %evl)196 ret <vscale x 4 x i8> %v197}198 199define <vscale x 4 x i8> @vminu_vx_nxv4i8_unmasked(<vscale x 4 x i8> %va, i8 %b, i32 zeroext %evl) {200; CHECK-LABEL: vminu_vx_nxv4i8_unmasked:201; CHECK: # %bb.0:202; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma203; CHECK-NEXT: vminu.vx v8, v8, a0204; CHECK-NEXT: ret205 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0206 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer207 %v = call <vscale x 4 x i8> @llvm.vp.umin.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)208 ret <vscale x 4 x i8> %v209}210 211define <vscale x 8 x i8> @vminu_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {212; CHECK-LABEL: vminu_vv_nxv8i8:213; CHECK: # %bb.0:214; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma215; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t216; CHECK-NEXT: ret217 %v = call <vscale x 8 x i8> @llvm.vp.umin.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 %evl)218 ret <vscale x 8 x i8> %v219}220 221define <vscale x 8 x i8> @vminu_vv_nxv8i8_unmasked(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, i32 zeroext %evl) {222; CHECK-LABEL: vminu_vv_nxv8i8_unmasked:223; CHECK: # %bb.0:224; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma225; CHECK-NEXT: vminu.vv v8, v8, v9226; CHECK-NEXT: ret227 %v = call <vscale x 8 x i8> @llvm.vp.umin.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)228 ret <vscale x 8 x i8> %v229}230 231define <vscale x 8 x i8> @vminu_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {232; CHECK-LABEL: vminu_vx_nxv8i8:233; CHECK: # %bb.0:234; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma235; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t236; CHECK-NEXT: ret237 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0238 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer239 %v = call <vscale x 8 x i8> @llvm.vp.umin.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 %evl)240 ret <vscale x 8 x i8> %v241}242 243define <vscale x 8 x i8> @vminu_vx_nxv8i8_unmasked(<vscale x 8 x i8> %va, i8 %b, i32 zeroext %evl) {244; CHECK-LABEL: vminu_vx_nxv8i8_unmasked:245; CHECK: # %bb.0:246; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma247; CHECK-NEXT: vminu.vx v8, v8, a0248; CHECK-NEXT: ret249 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0250 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer251 %v = call <vscale x 8 x i8> @llvm.vp.umin.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)252 ret <vscale x 8 x i8> %v253}254 255define <vscale x 16 x i8> @vminu_vv_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {256; CHECK-LABEL: vminu_vv_nxv16i8:257; CHECK: # %bb.0:258; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma259; CHECK-NEXT: vminu.vv v8, v8, v10, v0.t260; CHECK-NEXT: ret261 %v = call <vscale x 16 x i8> @llvm.vp.umin.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 %evl)262 ret <vscale x 16 x i8> %v263}264 265define <vscale x 16 x i8> @vminu_vv_nxv16i8_unmasked(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, i32 zeroext %evl) {266; CHECK-LABEL: vminu_vv_nxv16i8_unmasked:267; CHECK: # %bb.0:268; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma269; CHECK-NEXT: vminu.vv v8, v8, v10270; CHECK-NEXT: ret271 %v = call <vscale x 16 x i8> @llvm.vp.umin.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)272 ret <vscale x 16 x i8> %v273}274 275define <vscale x 16 x i8> @vminu_vx_nxv16i8(<vscale x 16 x i8> %va, i8 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {276; CHECK-LABEL: vminu_vx_nxv16i8:277; CHECK: # %bb.0:278; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma279; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t280; CHECK-NEXT: ret281 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0282 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer283 %v = call <vscale x 16 x i8> @llvm.vp.umin.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 %evl)284 ret <vscale x 16 x i8> %v285}286 287define <vscale x 16 x i8> @vminu_vx_nxv16i8_unmasked(<vscale x 16 x i8> %va, i8 %b, i32 zeroext %evl) {288; CHECK-LABEL: vminu_vx_nxv16i8_unmasked:289; CHECK: # %bb.0:290; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma291; CHECK-NEXT: vminu.vx v8, v8, a0292; CHECK-NEXT: ret293 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0294 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer295 %v = call <vscale x 16 x i8> @llvm.vp.umin.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)296 ret <vscale x 16 x i8> %v297}298 299define <vscale x 32 x i8> @vminu_vv_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {300; CHECK-LABEL: vminu_vv_nxv32i8:301; CHECK: # %bb.0:302; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma303; CHECK-NEXT: vminu.vv v8, v8, v12, v0.t304; CHECK-NEXT: ret305 %v = call <vscale x 32 x i8> @llvm.vp.umin.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 %evl)306 ret <vscale x 32 x i8> %v307}308 309define <vscale x 32 x i8> @vminu_vv_nxv32i8_unmasked(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, i32 zeroext %evl) {310; CHECK-LABEL: vminu_vv_nxv32i8_unmasked:311; CHECK: # %bb.0:312; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma313; CHECK-NEXT: vminu.vv v8, v8, v12314; CHECK-NEXT: ret315 %v = call <vscale x 32 x i8> @llvm.vp.umin.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)316 ret <vscale x 32 x i8> %v317}318 319define <vscale x 32 x i8> @vminu_vx_nxv32i8(<vscale x 32 x i8> %va, i8 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {320; CHECK-LABEL: vminu_vx_nxv32i8:321; CHECK: # %bb.0:322; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma323; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t324; CHECK-NEXT: ret325 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0326 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer327 %v = call <vscale x 32 x i8> @llvm.vp.umin.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 %evl)328 ret <vscale x 32 x i8> %v329}330 331define <vscale x 32 x i8> @vminu_vx_nxv32i8_unmasked(<vscale x 32 x i8> %va, i8 %b, i32 zeroext %evl) {332; CHECK-LABEL: vminu_vx_nxv32i8_unmasked:333; CHECK: # %bb.0:334; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma335; CHECK-NEXT: vminu.vx v8, v8, a0336; CHECK-NEXT: ret337 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0338 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer339 %v = call <vscale x 32 x i8> @llvm.vp.umin.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)340 ret <vscale x 32 x i8> %v341}342 343define <vscale x 64 x i8> @vminu_vv_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {344; CHECK-LABEL: vminu_vv_nxv64i8:345; CHECK: # %bb.0:346; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma347; CHECK-NEXT: vminu.vv v8, v8, v16, v0.t348; CHECK-NEXT: ret349 %v = call <vscale x 64 x i8> @llvm.vp.umin.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 %evl)350 ret <vscale x 64 x i8> %v351}352 353define <vscale x 64 x i8> @vminu_vv_nxv64i8_unmasked(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, i32 zeroext %evl) {354; CHECK-LABEL: vminu_vv_nxv64i8_unmasked:355; CHECK: # %bb.0:356; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma357; CHECK-NEXT: vminu.vv v8, v8, v16358; CHECK-NEXT: ret359 %v = call <vscale x 64 x i8> @llvm.vp.umin.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> splat (i1 true), i32 %evl)360 ret <vscale x 64 x i8> %v361}362 363define <vscale x 64 x i8> @vminu_vx_nxv64i8(<vscale x 64 x i8> %va, i8 %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {364; CHECK-LABEL: vminu_vx_nxv64i8:365; CHECK: # %bb.0:366; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma367; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t368; CHECK-NEXT: ret369 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0370 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer371 %v = call <vscale x 64 x i8> @llvm.vp.umin.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 %evl)372 ret <vscale x 64 x i8> %v373}374 375define <vscale x 64 x i8> @vminu_vx_nxv64i8_unmasked(<vscale x 64 x i8> %va, i8 %b, i32 zeroext %evl) {376; CHECK-LABEL: vminu_vx_nxv64i8_unmasked:377; CHECK: # %bb.0:378; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma379; CHECK-NEXT: vminu.vx v8, v8, a0380; CHECK-NEXT: ret381 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0382 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer383 %v = call <vscale x 64 x i8> @llvm.vp.umin.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> splat (i1 true), i32 %evl)384 ret <vscale x 64 x i8> %v385}386 387; Test that split-legalization works when the mask itself needs splitting.388 389define <vscale x 128 x i8> @vminu_vx_nxv128i8(<vscale x 128 x i8> %va, i8 %b, <vscale x 128 x i1> %m, i32 zeroext %evl) {390; CHECK-LABEL: vminu_vx_nxv128i8:391; CHECK: # %bb.0:392; CHECK-NEXT: vsetvli a3, zero, e8, m8, ta, ma393; CHECK-NEXT: vmv1r.v v24, v0394; CHECK-NEXT: vlm.v v0, (a1)395; CHECK-NEXT: csrr a1, vlenb396; CHECK-NEXT: slli a1, a1, 3397; CHECK-NEXT: sub a3, a2, a1398; CHECK-NEXT: sltu a4, a2, a3399; CHECK-NEXT: addi a4, a4, -1400; CHECK-NEXT: and a3, a4, a3401; CHECK-NEXT: vsetvli zero, a3, e8, m8, ta, ma402; CHECK-NEXT: vminu.vx v16, v16, a0, v0.t403; CHECK-NEXT: bltu a2, a1, .LBB34_2404; CHECK-NEXT: # %bb.1:405; CHECK-NEXT: mv a2, a1406; CHECK-NEXT: .LBB34_2:407; CHECK-NEXT: vmv1r.v v0, v24408; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma409; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t410; CHECK-NEXT: ret411 %elt.head = insertelement <vscale x 128 x i8> poison, i8 %b, i32 0412 %vb = shufflevector <vscale x 128 x i8> %elt.head, <vscale x 128 x i8> poison, <vscale x 128 x i32> zeroinitializer413 %v = call <vscale x 128 x i8> @llvm.vp.umin.nxv128i8(<vscale x 128 x i8> %va, <vscale x 128 x i8> %vb, <vscale x 128 x i1> %m, i32 %evl)414 ret <vscale x 128 x i8> %v415}416 417define <vscale x 128 x i8> @vminu_vx_nxv128i8_unmasked(<vscale x 128 x i8> %va, i8 %b, i32 zeroext %evl) {418; CHECK-LABEL: vminu_vx_nxv128i8_unmasked:419; CHECK: # %bb.0:420; CHECK-NEXT: csrr a2, vlenb421; CHECK-NEXT: slli a2, a2, 3422; CHECK-NEXT: sub a3, a1, a2423; CHECK-NEXT: sltu a4, a1, a3424; CHECK-NEXT: addi a4, a4, -1425; CHECK-NEXT: and a3, a4, a3426; CHECK-NEXT: vsetvli zero, a3, e8, m8, ta, ma427; CHECK-NEXT: vminu.vx v16, v16, a0428; CHECK-NEXT: bltu a1, a2, .LBB35_2429; CHECK-NEXT: # %bb.1:430; CHECK-NEXT: mv a1, a2431; CHECK-NEXT: .LBB35_2:432; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma433; CHECK-NEXT: vminu.vx v8, v8, a0434; CHECK-NEXT: ret435 %elt.head = insertelement <vscale x 128 x i8> poison, i8 %b, i32 0436 %vb = shufflevector <vscale x 128 x i8> %elt.head, <vscale x 128 x i8> poison, <vscale x 128 x i32> zeroinitializer437 %v = call <vscale x 128 x i8> @llvm.vp.umin.nxv128i8(<vscale x 128 x i8> %va, <vscale x 128 x i8> %vb, <vscale x 128 x i1> splat (i1 true), i32 %evl)438 ret <vscale x 128 x i8> %v439}440 441define <vscale x 1 x i16> @vminu_vv_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {442; CHECK-LABEL: vminu_vv_nxv1i16:443; CHECK: # %bb.0:444; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma445; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t446; CHECK-NEXT: ret447 %v = call <vscale x 1 x i16> @llvm.vp.umin.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 %evl)448 ret <vscale x 1 x i16> %v449}450 451define <vscale x 1 x i16> @vminu_vv_nxv1i16_unmasked(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, i32 zeroext %evl) {452; CHECK-LABEL: vminu_vv_nxv1i16_unmasked:453; CHECK: # %bb.0:454; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma455; CHECK-NEXT: vminu.vv v8, v8, v9456; CHECK-NEXT: ret457 %v = call <vscale x 1 x i16> @llvm.vp.umin.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)458 ret <vscale x 1 x i16> %v459}460 461define <vscale x 1 x i16> @vminu_vx_nxv1i16(<vscale x 1 x i16> %va, i16 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {462; CHECK-LABEL: vminu_vx_nxv1i16:463; CHECK: # %bb.0:464; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma465; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t466; CHECK-NEXT: ret467 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0468 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer469 %v = call <vscale x 1 x i16> @llvm.vp.umin.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 %evl)470 ret <vscale x 1 x i16> %v471}472 473define <vscale x 1 x i16> @vminu_vx_nxv1i16_unmasked(<vscale x 1 x i16> %va, i16 %b, i32 zeroext %evl) {474; CHECK-LABEL: vminu_vx_nxv1i16_unmasked:475; CHECK: # %bb.0:476; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma477; CHECK-NEXT: vminu.vx v8, v8, a0478; CHECK-NEXT: ret479 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0480 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer481 %v = call <vscale x 1 x i16> @llvm.vp.umin.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)482 ret <vscale x 1 x i16> %v483}484 485define <vscale x 2 x i16> @vminu_vv_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {486; CHECK-LABEL: vminu_vv_nxv2i16:487; CHECK: # %bb.0:488; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma489; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t490; CHECK-NEXT: ret491 %v = call <vscale x 2 x i16> @llvm.vp.umin.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 %evl)492 ret <vscale x 2 x i16> %v493}494 495define <vscale x 2 x i16> @vminu_vv_nxv2i16_unmasked(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, i32 zeroext %evl) {496; CHECK-LABEL: vminu_vv_nxv2i16_unmasked:497; CHECK: # %bb.0:498; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma499; CHECK-NEXT: vminu.vv v8, v8, v9500; CHECK-NEXT: ret501 %v = call <vscale x 2 x i16> @llvm.vp.umin.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)502 ret <vscale x 2 x i16> %v503}504 505define <vscale x 2 x i16> @vminu_vx_nxv2i16(<vscale x 2 x i16> %va, i16 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {506; CHECK-LABEL: vminu_vx_nxv2i16:507; CHECK: # %bb.0:508; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma509; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t510; CHECK-NEXT: ret511 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0512 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer513 %v = call <vscale x 2 x i16> @llvm.vp.umin.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 %evl)514 ret <vscale x 2 x i16> %v515}516 517define <vscale x 2 x i16> @vminu_vx_nxv2i16_unmasked(<vscale x 2 x i16> %va, i16 %b, i32 zeroext %evl) {518; CHECK-LABEL: vminu_vx_nxv2i16_unmasked:519; CHECK: # %bb.0:520; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma521; CHECK-NEXT: vminu.vx v8, v8, a0522; CHECK-NEXT: ret523 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0524 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer525 %v = call <vscale x 2 x i16> @llvm.vp.umin.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)526 ret <vscale x 2 x i16> %v527}528 529define <vscale x 4 x i16> @vminu_vv_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {530; CHECK-LABEL: vminu_vv_nxv4i16:531; CHECK: # %bb.0:532; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma533; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t534; CHECK-NEXT: ret535 %v = call <vscale x 4 x i16> @llvm.vp.umin.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 %evl)536 ret <vscale x 4 x i16> %v537}538 539define <vscale x 4 x i16> @vminu_vv_nxv4i16_unmasked(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, i32 zeroext %evl) {540; CHECK-LABEL: vminu_vv_nxv4i16_unmasked:541; CHECK: # %bb.0:542; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma543; CHECK-NEXT: vminu.vv v8, v8, v9544; CHECK-NEXT: ret545 %v = call <vscale x 4 x i16> @llvm.vp.umin.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)546 ret <vscale x 4 x i16> %v547}548 549define <vscale x 4 x i16> @vminu_vx_nxv4i16(<vscale x 4 x i16> %va, i16 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {550; CHECK-LABEL: vminu_vx_nxv4i16:551; CHECK: # %bb.0:552; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma553; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t554; CHECK-NEXT: ret555 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0556 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer557 %v = call <vscale x 4 x i16> @llvm.vp.umin.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 %evl)558 ret <vscale x 4 x i16> %v559}560 561define <vscale x 4 x i16> @vminu_vx_nxv4i16_unmasked(<vscale x 4 x i16> %va, i16 %b, i32 zeroext %evl) {562; CHECK-LABEL: vminu_vx_nxv4i16_unmasked:563; CHECK: # %bb.0:564; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma565; CHECK-NEXT: vminu.vx v8, v8, a0566; CHECK-NEXT: ret567 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0568 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer569 %v = call <vscale x 4 x i16> @llvm.vp.umin.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)570 ret <vscale x 4 x i16> %v571}572 573define <vscale x 8 x i16> @vminu_vv_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {574; CHECK-LABEL: vminu_vv_nxv8i16:575; CHECK: # %bb.0:576; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma577; CHECK-NEXT: vminu.vv v8, v8, v10, v0.t578; CHECK-NEXT: ret579 %v = call <vscale x 8 x i16> @llvm.vp.umin.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 %evl)580 ret <vscale x 8 x i16> %v581}582 583define <vscale x 8 x i16> @vminu_vv_nxv8i16_unmasked(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, i32 zeroext %evl) {584; CHECK-LABEL: vminu_vv_nxv8i16_unmasked:585; CHECK: # %bb.0:586; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma587; CHECK-NEXT: vminu.vv v8, v8, v10588; CHECK-NEXT: ret589 %v = call <vscale x 8 x i16> @llvm.vp.umin.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)590 ret <vscale x 8 x i16> %v591}592 593define <vscale x 8 x i16> @vminu_vx_nxv8i16(<vscale x 8 x i16> %va, i16 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {594; CHECK-LABEL: vminu_vx_nxv8i16:595; CHECK: # %bb.0:596; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma597; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t598; CHECK-NEXT: ret599 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0600 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer601 %v = call <vscale x 8 x i16> @llvm.vp.umin.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 %evl)602 ret <vscale x 8 x i16> %v603}604 605define <vscale x 8 x i16> @vminu_vx_nxv8i16_unmasked(<vscale x 8 x i16> %va, i16 %b, i32 zeroext %evl) {606; CHECK-LABEL: vminu_vx_nxv8i16_unmasked:607; CHECK: # %bb.0:608; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma609; CHECK-NEXT: vminu.vx v8, v8, a0610; CHECK-NEXT: ret611 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0612 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer613 %v = call <vscale x 8 x i16> @llvm.vp.umin.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)614 ret <vscale x 8 x i16> %v615}616 617define <vscale x 16 x i16> @vminu_vv_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {618; CHECK-LABEL: vminu_vv_nxv16i16:619; CHECK: # %bb.0:620; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma621; CHECK-NEXT: vminu.vv v8, v8, v12, v0.t622; CHECK-NEXT: ret623 %v = call <vscale x 16 x i16> @llvm.vp.umin.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 %evl)624 ret <vscale x 16 x i16> %v625}626 627define <vscale x 16 x i16> @vminu_vv_nxv16i16_unmasked(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, i32 zeroext %evl) {628; CHECK-LABEL: vminu_vv_nxv16i16_unmasked:629; CHECK: # %bb.0:630; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma631; CHECK-NEXT: vminu.vv v8, v8, v12632; CHECK-NEXT: ret633 %v = call <vscale x 16 x i16> @llvm.vp.umin.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)634 ret <vscale x 16 x i16> %v635}636 637define <vscale x 16 x i16> @vminu_vx_nxv16i16(<vscale x 16 x i16> %va, i16 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {638; CHECK-LABEL: vminu_vx_nxv16i16:639; CHECK: # %bb.0:640; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma641; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t642; CHECK-NEXT: ret643 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0644 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer645 %v = call <vscale x 16 x i16> @llvm.vp.umin.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 %evl)646 ret <vscale x 16 x i16> %v647}648 649define <vscale x 16 x i16> @vminu_vx_nxv16i16_unmasked(<vscale x 16 x i16> %va, i16 %b, i32 zeroext %evl) {650; CHECK-LABEL: vminu_vx_nxv16i16_unmasked:651; CHECK: # %bb.0:652; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma653; CHECK-NEXT: vminu.vx v8, v8, a0654; CHECK-NEXT: ret655 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0656 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer657 %v = call <vscale x 16 x i16> @llvm.vp.umin.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)658 ret <vscale x 16 x i16> %v659}660 661define <vscale x 32 x i16> @vminu_vv_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {662; CHECK-LABEL: vminu_vv_nxv32i16:663; CHECK: # %bb.0:664; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma665; CHECK-NEXT: vminu.vv v8, v8, v16, v0.t666; CHECK-NEXT: ret667 %v = call <vscale x 32 x i16> @llvm.vp.umin.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 %evl)668 ret <vscale x 32 x i16> %v669}670 671define <vscale x 32 x i16> @vminu_vv_nxv32i16_unmasked(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, i32 zeroext %evl) {672; CHECK-LABEL: vminu_vv_nxv32i16_unmasked:673; CHECK: # %bb.0:674; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma675; CHECK-NEXT: vminu.vv v8, v8, v16676; CHECK-NEXT: ret677 %v = call <vscale x 32 x i16> @llvm.vp.umin.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)678 ret <vscale x 32 x i16> %v679}680 681define <vscale x 32 x i16> @vminu_vx_nxv32i16(<vscale x 32 x i16> %va, i16 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {682; CHECK-LABEL: vminu_vx_nxv32i16:683; CHECK: # %bb.0:684; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma685; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t686; CHECK-NEXT: ret687 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0688 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer689 %v = call <vscale x 32 x i16> @llvm.vp.umin.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 %evl)690 ret <vscale x 32 x i16> %v691}692 693define <vscale x 32 x i16> @vminu_vx_nxv32i16_unmasked(<vscale x 32 x i16> %va, i16 %b, i32 zeroext %evl) {694; CHECK-LABEL: vminu_vx_nxv32i16_unmasked:695; CHECK: # %bb.0:696; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma697; CHECK-NEXT: vminu.vx v8, v8, a0698; CHECK-NEXT: ret699 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0700 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer701 %v = call <vscale x 32 x i16> @llvm.vp.umin.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)702 ret <vscale x 32 x i16> %v703}704 705define <vscale x 1 x i32> @vminu_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {706; CHECK-LABEL: vminu_vv_nxv1i32:707; CHECK: # %bb.0:708; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma709; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t710; CHECK-NEXT: ret711 %v = call <vscale x 1 x i32> @llvm.vp.umin.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 %evl)712 ret <vscale x 1 x i32> %v713}714 715define <vscale x 1 x i32> @vminu_vv_nxv1i32_unmasked(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, i32 zeroext %evl) {716; CHECK-LABEL: vminu_vv_nxv1i32_unmasked:717; CHECK: # %bb.0:718; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma719; CHECK-NEXT: vminu.vv v8, v8, v9720; CHECK-NEXT: ret721 %v = call <vscale x 1 x i32> @llvm.vp.umin.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)722 ret <vscale x 1 x i32> %v723}724 725define <vscale x 1 x i32> @vminu_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {726; CHECK-LABEL: vminu_vx_nxv1i32:727; CHECK: # %bb.0:728; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma729; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t730; CHECK-NEXT: ret731 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0732 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer733 %v = call <vscale x 1 x i32> @llvm.vp.umin.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 %evl)734 ret <vscale x 1 x i32> %v735}736 737define <vscale x 1 x i32> @vminu_vx_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 %b, i32 zeroext %evl) {738; CHECK-LABEL: vminu_vx_nxv1i32_unmasked:739; CHECK: # %bb.0:740; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma741; CHECK-NEXT: vminu.vx v8, v8, a0742; CHECK-NEXT: ret743 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0744 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer745 %v = call <vscale x 1 x i32> @llvm.vp.umin.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)746 ret <vscale x 1 x i32> %v747}748 749define <vscale x 2 x i32> @vminu_vv_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {750; CHECK-LABEL: vminu_vv_nxv2i32:751; CHECK: # %bb.0:752; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma753; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t754; CHECK-NEXT: ret755 %v = call <vscale x 2 x i32> @llvm.vp.umin.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 %evl)756 ret <vscale x 2 x i32> %v757}758 759define <vscale x 2 x i32> @vminu_vv_nxv2i32_unmasked(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, i32 zeroext %evl) {760; CHECK-LABEL: vminu_vv_nxv2i32_unmasked:761; CHECK: # %bb.0:762; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma763; CHECK-NEXT: vminu.vv v8, v8, v9764; CHECK-NEXT: ret765 %v = call <vscale x 2 x i32> @llvm.vp.umin.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)766 ret <vscale x 2 x i32> %v767}768 769define <vscale x 2 x i32> @vminu_vx_nxv2i32(<vscale x 2 x i32> %va, i32 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {770; CHECK-LABEL: vminu_vx_nxv2i32:771; CHECK: # %bb.0:772; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma773; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t774; CHECK-NEXT: ret775 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0776 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer777 %v = call <vscale x 2 x i32> @llvm.vp.umin.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 %evl)778 ret <vscale x 2 x i32> %v779}780 781define <vscale x 2 x i32> @vminu_vx_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 %b, i32 zeroext %evl) {782; CHECK-LABEL: vminu_vx_nxv2i32_unmasked:783; CHECK: # %bb.0:784; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma785; CHECK-NEXT: vminu.vx v8, v8, a0786; CHECK-NEXT: ret787 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0788 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer789 %v = call <vscale x 2 x i32> @llvm.vp.umin.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)790 ret <vscale x 2 x i32> %v791}792 793define <vscale x 4 x i32> @vminu_vv_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {794; CHECK-LABEL: vminu_vv_nxv4i32:795; CHECK: # %bb.0:796; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma797; CHECK-NEXT: vminu.vv v8, v8, v10, v0.t798; CHECK-NEXT: ret799 %v = call <vscale x 4 x i32> @llvm.vp.umin.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 %evl)800 ret <vscale x 4 x i32> %v801}802 803define <vscale x 4 x i32> @vminu_vv_nxv4i32_unmasked(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, i32 zeroext %evl) {804; CHECK-LABEL: vminu_vv_nxv4i32_unmasked:805; CHECK: # %bb.0:806; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma807; CHECK-NEXT: vminu.vv v8, v8, v10808; CHECK-NEXT: ret809 %v = call <vscale x 4 x i32> @llvm.vp.umin.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)810 ret <vscale x 4 x i32> %v811}812 813define <vscale x 4 x i32> @vminu_vx_nxv4i32(<vscale x 4 x i32> %va, i32 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {814; CHECK-LABEL: vminu_vx_nxv4i32:815; CHECK: # %bb.0:816; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma817; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t818; CHECK-NEXT: ret819 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0820 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer821 %v = call <vscale x 4 x i32> @llvm.vp.umin.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 %evl)822 ret <vscale x 4 x i32> %v823}824 825define <vscale x 4 x i32> @vminu_vx_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 %b, i32 zeroext %evl) {826; CHECK-LABEL: vminu_vx_nxv4i32_unmasked:827; CHECK: # %bb.0:828; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma829; CHECK-NEXT: vminu.vx v8, v8, a0830; CHECK-NEXT: ret831 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0832 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer833 %v = call <vscale x 4 x i32> @llvm.vp.umin.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)834 ret <vscale x 4 x i32> %v835}836 837define <vscale x 8 x i32> @vminu_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {838; CHECK-LABEL: vminu_vv_nxv8i32:839; CHECK: # %bb.0:840; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma841; CHECK-NEXT: vminu.vv v8, v8, v12, v0.t842; CHECK-NEXT: ret843 %v = call <vscale x 8 x i32> @llvm.vp.umin.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 %evl)844 ret <vscale x 8 x i32> %v845}846 847define <vscale x 8 x i32> @vminu_vv_nxv8i32_unmasked(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, i32 zeroext %evl) {848; CHECK-LABEL: vminu_vv_nxv8i32_unmasked:849; CHECK: # %bb.0:850; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma851; CHECK-NEXT: vminu.vv v8, v8, v12852; CHECK-NEXT: ret853 %v = call <vscale x 8 x i32> @llvm.vp.umin.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)854 ret <vscale x 8 x i32> %v855}856 857define <vscale x 8 x i32> @vminu_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {858; CHECK-LABEL: vminu_vx_nxv8i32:859; CHECK: # %bb.0:860; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma861; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t862; CHECK-NEXT: ret863 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0864 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer865 %v = call <vscale x 8 x i32> @llvm.vp.umin.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 %evl)866 ret <vscale x 8 x i32> %v867}868 869define <vscale x 8 x i32> @vminu_vx_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 %b, i32 zeroext %evl) {870; CHECK-LABEL: vminu_vx_nxv8i32_unmasked:871; CHECK: # %bb.0:872; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma873; CHECK-NEXT: vminu.vx v8, v8, a0874; CHECK-NEXT: ret875 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0876 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer877 %v = call <vscale x 8 x i32> @llvm.vp.umin.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)878 ret <vscale x 8 x i32> %v879}880 881define <vscale x 16 x i32> @vminu_vv_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {882; CHECK-LABEL: vminu_vv_nxv16i32:883; CHECK: # %bb.0:884; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma885; CHECK-NEXT: vminu.vv v8, v8, v16, v0.t886; CHECK-NEXT: ret887 %v = call <vscale x 16 x i32> @llvm.vp.umin.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 %evl)888 ret <vscale x 16 x i32> %v889}890 891define <vscale x 16 x i32> @vminu_vv_nxv16i32_unmasked(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, i32 zeroext %evl) {892; CHECK-LABEL: vminu_vv_nxv16i32_unmasked:893; CHECK: # %bb.0:894; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma895; CHECK-NEXT: vminu.vv v8, v8, v16896; CHECK-NEXT: ret897 %v = call <vscale x 16 x i32> @llvm.vp.umin.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)898 ret <vscale x 16 x i32> %v899}900 901define <vscale x 16 x i32> @vminu_vx_nxv16i32(<vscale x 16 x i32> %va, i32 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {902; CHECK-LABEL: vminu_vx_nxv16i32:903; CHECK: # %bb.0:904; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma905; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t906; CHECK-NEXT: ret907 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 0908 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer909 %v = call <vscale x 16 x i32> @llvm.vp.umin.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 %evl)910 ret <vscale x 16 x i32> %v911}912 913define <vscale x 16 x i32> @vminu_vx_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 %b, i32 zeroext %evl) {914; CHECK-LABEL: vminu_vx_nxv16i32_unmasked:915; CHECK: # %bb.0:916; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma917; CHECK-NEXT: vminu.vx v8, v8, a0918; CHECK-NEXT: ret919 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 0920 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer921 %v = call <vscale x 16 x i32> @llvm.vp.umin.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)922 ret <vscale x 16 x i32> %v923}924 925; Test that split-legalization works then the mask needs manual splitting.926 927define <vscale x 32 x i32> @vminu_vx_nxv32i32(<vscale x 32 x i32> %va, i32 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {928; CHECK-LABEL: vminu_vx_nxv32i32:929; CHECK: # %bb.0:930; CHECK-NEXT: vsetvli a2, zero, e8, mf2, ta, ma931; CHECK-NEXT: vmv1r.v v24, v0932; CHECK-NEXT: csrr a2, vlenb933; CHECK-NEXT: srli a3, a2, 2934; CHECK-NEXT: slli a2, a2, 1935; CHECK-NEXT: vslidedown.vx v0, v0, a3936; CHECK-NEXT: sub a3, a1, a2937; CHECK-NEXT: sltu a4, a1, a3938; CHECK-NEXT: addi a4, a4, -1939; CHECK-NEXT: and a3, a4, a3940; CHECK-NEXT: vsetvli zero, a3, e32, m8, ta, ma941; CHECK-NEXT: vminu.vx v16, v16, a0, v0.t942; CHECK-NEXT: bltu a1, a2, .LBB80_2943; CHECK-NEXT: # %bb.1:944; CHECK-NEXT: mv a1, a2945; CHECK-NEXT: .LBB80_2:946; CHECK-NEXT: vmv1r.v v0, v24947; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma948; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t949; CHECK-NEXT: ret950 %elt.head = insertelement <vscale x 32 x i32> poison, i32 %b, i32 0951 %vb = shufflevector <vscale x 32 x i32> %elt.head, <vscale x 32 x i32> poison, <vscale x 32 x i32> zeroinitializer952 %v = call <vscale x 32 x i32> @llvm.vp.umin.nxv32i32(<vscale x 32 x i32> %va, <vscale x 32 x i32> %vb, <vscale x 32 x i1> %m, i32 %evl)953 ret <vscale x 32 x i32> %v954}955 956define <vscale x 32 x i32> @vminu_vx_nxv32i32_unmasked(<vscale x 32 x i32> %va, i32 %b, i32 zeroext %evl) {957; CHECK-LABEL: vminu_vx_nxv32i32_unmasked:958; CHECK: # %bb.0:959; CHECK-NEXT: csrr a2, vlenb960; CHECK-NEXT: slli a2, a2, 1961; CHECK-NEXT: sub a3, a1, a2962; CHECK-NEXT: sltu a4, a1, a3963; CHECK-NEXT: addi a4, a4, -1964; CHECK-NEXT: and a3, a4, a3965; CHECK-NEXT: vsetvli zero, a3, e32, m8, ta, ma966; CHECK-NEXT: vminu.vx v16, v16, a0967; CHECK-NEXT: bltu a1, a2, .LBB81_2968; CHECK-NEXT: # %bb.1:969; CHECK-NEXT: mv a1, a2970; CHECK-NEXT: .LBB81_2:971; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma972; CHECK-NEXT: vminu.vx v8, v8, a0973; CHECK-NEXT: ret974 %elt.head = insertelement <vscale x 32 x i32> poison, i32 %b, i32 0975 %vb = shufflevector <vscale x 32 x i32> %elt.head, <vscale x 32 x i32> poison, <vscale x 32 x i32> zeroinitializer976 %v = call <vscale x 32 x i32> @llvm.vp.umin.nxv32i32(<vscale x 32 x i32> %va, <vscale x 32 x i32> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)977 ret <vscale x 32 x i32> %v978}979 980; Test splitting when the %evl is a constant (albeit an unknown one).981 982define <vscale x 32 x i32> @vminu_vx_nxv32i32_evl_nx8(<vscale x 32 x i32> %va, i32 %b, <vscale x 32 x i1> %m) {983; RV32-LABEL: vminu_vx_nxv32i32_evl_nx8:984; RV32: # %bb.0:985; RV32-NEXT: csrr a1, vlenb986; RV32-NEXT: srli a2, a1, 2987; RV32-NEXT: vsetvli zero, a1, e32, m8, ta, ma988; RV32-NEXT: vminu.vx v8, v8, a0, v0.t989; RV32-NEXT: vsetvli a3, zero, e8, mf2, ta, ma990; RV32-NEXT: vslidedown.vx v0, v0, a2991; RV32-NEXT: slli a2, a1, 1992; RV32-NEXT: sub a2, a1, a2993; RV32-NEXT: sltu a1, a1, a2994; RV32-NEXT: addi a1, a1, -1995; RV32-NEXT: and a1, a1, a2996; RV32-NEXT: vsetvli zero, a1, e32, m8, ta, ma997; RV32-NEXT: vminu.vx v16, v16, a0, v0.t998; RV32-NEXT: ret999;1000; RV64-LABEL: vminu_vx_nxv32i32_evl_nx8:1001; RV64: # %bb.0:1002; RV64-NEXT: vsetvli a1, zero, e8, mf2, ta, ma1003; RV64-NEXT: vmv1r.v v24, v01004; RV64-NEXT: csrr a1, vlenb1005; RV64-NEXT: srli a3, a1, 21006; RV64-NEXT: slli a2, a1, 11007; RV64-NEXT: vslidedown.vx v0, v0, a31008; RV64-NEXT: sub a3, a1, a21009; RV64-NEXT: sltu a4, a1, a31010; RV64-NEXT: addi a4, a4, -11011; RV64-NEXT: and a3, a4, a31012; RV64-NEXT: vsetvli zero, a3, e32, m8, ta, ma1013; RV64-NEXT: vminu.vx v16, v16, a0, v0.t1014; RV64-NEXT: bltu a1, a2, .LBB82_21015; RV64-NEXT: # %bb.1:1016; RV64-NEXT: mv a1, a21017; RV64-NEXT: .LBB82_2:1018; RV64-NEXT: vmv1r.v v0, v241019; RV64-NEXT: vsetvli zero, a1, e32, m8, ta, ma1020; RV64-NEXT: vminu.vx v8, v8, a0, v0.t1021; RV64-NEXT: ret1022 %elt.head = insertelement <vscale x 32 x i32> poison, i32 %b, i32 01023 %vb = shufflevector <vscale x 32 x i32> %elt.head, <vscale x 32 x i32> poison, <vscale x 32 x i32> zeroinitializer1024 %evl = call i32 @llvm.vscale.i32()1025 %evl0 = mul i32 %evl, 81026 %v = call <vscale x 32 x i32> @llvm.vp.umin.nxv32i32(<vscale x 32 x i32> %va, <vscale x 32 x i32> %vb, <vscale x 32 x i1> %m, i32 %evl0)1027 ret <vscale x 32 x i32> %v1028}1029 1030; The attribute vscale_range(2,1024) given here can remove the zero_extend for1031; the i32 %evl to i64 on RV64 through KnownBits analysis.1032 1033define <vscale x 32 x i32> @vminu_vx_nxv32i32_evl_nx16(<vscale x 32 x i32> %va, i32 %b, <vscale x 32 x i1> %m) vscale_range(2,1024) {1034; CHECK-LABEL: vminu_vx_nxv32i32_evl_nx16:1035; CHECK: # %bb.0:1036; CHECK-NEXT: vsetvli a1, zero, e32, m8, ta, ma1037; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t1038; CHECK-NEXT: ret1039 %elt.head = insertelement <vscale x 32 x i32> poison, i32 %b, i32 01040 %vb = shufflevector <vscale x 32 x i32> %elt.head, <vscale x 32 x i32> poison, <vscale x 32 x i32> zeroinitializer1041 %evl = call i32 @llvm.vscale.i32()1042 %evl0 = mul i32 %evl, 161043 %v = call <vscale x 32 x i32> @llvm.vp.umin.nxv32i32(<vscale x 32 x i32> %va, <vscale x 32 x i32> %vb, <vscale x 32 x i1> %m, i32 %evl0)1044 ret <vscale x 32 x i32> %v1045}1046 1047define <vscale x 1 x i64> @vminu_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1048; CHECK-LABEL: vminu_vv_nxv1i64:1049; CHECK: # %bb.0:1050; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1051; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t1052; CHECK-NEXT: ret1053 %v = call <vscale x 1 x i64> @llvm.vp.umin.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 %evl)1054 ret <vscale x 1 x i64> %v1055}1056 1057define <vscale x 1 x i64> @vminu_vv_nxv1i64_unmasked(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, i32 zeroext %evl) {1058; CHECK-LABEL: vminu_vv_nxv1i64_unmasked:1059; CHECK: # %bb.0:1060; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1061; CHECK-NEXT: vminu.vv v8, v8, v91062; CHECK-NEXT: ret1063 %v = call <vscale x 1 x i64> @llvm.vp.umin.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)1064 ret <vscale x 1 x i64> %v1065}1066 1067define <vscale x 1 x i64> @vminu_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1068; RV32-LABEL: vminu_vx_nxv1i64:1069; RV32: # %bb.0:1070; RV32-NEXT: addi sp, sp, -161071; RV32-NEXT: .cfi_def_cfa_offset 161072; RV32-NEXT: sw a0, 8(sp)1073; RV32-NEXT: sw a1, 12(sp)1074; RV32-NEXT: addi a0, sp, 81075; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma1076; RV32-NEXT: vlse64.v v9, (a0), zero1077; RV32-NEXT: vminu.vv v8, v8, v9, v0.t1078; RV32-NEXT: addi sp, sp, 161079; RV32-NEXT: .cfi_def_cfa_offset 01080; RV32-NEXT: ret1081;1082; RV64-LABEL: vminu_vx_nxv1i64:1083; RV64: # %bb.0:1084; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma1085; RV64-NEXT: vminu.vx v8, v8, a0, v0.t1086; RV64-NEXT: ret1087 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01088 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1089 %v = call <vscale x 1 x i64> @llvm.vp.umin.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 %evl)1090 ret <vscale x 1 x i64> %v1091}1092 1093define <vscale x 1 x i64> @vminu_vx_nxv1i64_unmasked(<vscale x 1 x i64> %va, i64 %b, i32 zeroext %evl) {1094; RV32-LABEL: vminu_vx_nxv1i64_unmasked:1095; RV32: # %bb.0:1096; RV32-NEXT: addi sp, sp, -161097; RV32-NEXT: .cfi_def_cfa_offset 161098; RV32-NEXT: sw a0, 8(sp)1099; RV32-NEXT: sw a1, 12(sp)1100; RV32-NEXT: addi a0, sp, 81101; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma1102; RV32-NEXT: vlse64.v v9, (a0), zero1103; RV32-NEXT: vminu.vv v8, v8, v91104; RV32-NEXT: addi sp, sp, 161105; RV32-NEXT: .cfi_def_cfa_offset 01106; RV32-NEXT: ret1107;1108; RV64-LABEL: vminu_vx_nxv1i64_unmasked:1109; RV64: # %bb.0:1110; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma1111; RV64-NEXT: vminu.vx v8, v8, a01112; RV64-NEXT: ret1113 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01114 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1115 %v = call <vscale x 1 x i64> @llvm.vp.umin.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)1116 ret <vscale x 1 x i64> %v1117}1118 1119define <vscale x 2 x i64> @vminu_vv_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1120; CHECK-LABEL: vminu_vv_nxv2i64:1121; CHECK: # %bb.0:1122; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1123; CHECK-NEXT: vminu.vv v8, v8, v10, v0.t1124; CHECK-NEXT: ret1125 %v = call <vscale x 2 x i64> @llvm.vp.umin.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 %evl)1126 ret <vscale x 2 x i64> %v1127}1128 1129define <vscale x 2 x i64> @vminu_vv_nxv2i64_unmasked(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, i32 zeroext %evl) {1130; CHECK-LABEL: vminu_vv_nxv2i64_unmasked:1131; CHECK: # %bb.0:1132; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1133; CHECK-NEXT: vminu.vv v8, v8, v101134; CHECK-NEXT: ret1135 %v = call <vscale x 2 x i64> @llvm.vp.umin.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)1136 ret <vscale x 2 x i64> %v1137}1138 1139define <vscale x 2 x i64> @vminu_vx_nxv2i64(<vscale x 2 x i64> %va, i64 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1140; RV32-LABEL: vminu_vx_nxv2i64:1141; RV32: # %bb.0:1142; RV32-NEXT: addi sp, sp, -161143; RV32-NEXT: .cfi_def_cfa_offset 161144; RV32-NEXT: sw a0, 8(sp)1145; RV32-NEXT: sw a1, 12(sp)1146; RV32-NEXT: addi a0, sp, 81147; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma1148; RV32-NEXT: vlse64.v v10, (a0), zero1149; RV32-NEXT: vminu.vv v8, v8, v10, v0.t1150; RV32-NEXT: addi sp, sp, 161151; RV32-NEXT: .cfi_def_cfa_offset 01152; RV32-NEXT: ret1153;1154; RV64-LABEL: vminu_vx_nxv2i64:1155; RV64: # %bb.0:1156; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma1157; RV64-NEXT: vminu.vx v8, v8, a0, v0.t1158; RV64-NEXT: ret1159 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01160 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1161 %v = call <vscale x 2 x i64> @llvm.vp.umin.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 %evl)1162 ret <vscale x 2 x i64> %v1163}1164 1165define <vscale x 2 x i64> @vminu_vx_nxv2i64_unmasked(<vscale x 2 x i64> %va, i64 %b, i32 zeroext %evl) {1166; RV32-LABEL: vminu_vx_nxv2i64_unmasked:1167; RV32: # %bb.0:1168; RV32-NEXT: addi sp, sp, -161169; RV32-NEXT: .cfi_def_cfa_offset 161170; RV32-NEXT: sw a0, 8(sp)1171; RV32-NEXT: sw a1, 12(sp)1172; RV32-NEXT: addi a0, sp, 81173; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma1174; RV32-NEXT: vlse64.v v10, (a0), zero1175; RV32-NEXT: vminu.vv v8, v8, v101176; RV32-NEXT: addi sp, sp, 161177; RV32-NEXT: .cfi_def_cfa_offset 01178; RV32-NEXT: ret1179;1180; RV64-LABEL: vminu_vx_nxv2i64_unmasked:1181; RV64: # %bb.0:1182; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma1183; RV64-NEXT: vminu.vx v8, v8, a01184; RV64-NEXT: ret1185 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01186 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1187 %v = call <vscale x 2 x i64> @llvm.vp.umin.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)1188 ret <vscale x 2 x i64> %v1189}1190 1191define <vscale x 4 x i64> @vminu_vv_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1192; CHECK-LABEL: vminu_vv_nxv4i64:1193; CHECK: # %bb.0:1194; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1195; CHECK-NEXT: vminu.vv v8, v8, v12, v0.t1196; CHECK-NEXT: ret1197 %v = call <vscale x 4 x i64> @llvm.vp.umin.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 %evl)1198 ret <vscale x 4 x i64> %v1199}1200 1201define <vscale x 4 x i64> @vminu_vv_nxv4i64_unmasked(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, i32 zeroext %evl) {1202; CHECK-LABEL: vminu_vv_nxv4i64_unmasked:1203; CHECK: # %bb.0:1204; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1205; CHECK-NEXT: vminu.vv v8, v8, v121206; CHECK-NEXT: ret1207 %v = call <vscale x 4 x i64> @llvm.vp.umin.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)1208 ret <vscale x 4 x i64> %v1209}1210 1211define <vscale x 4 x i64> @vminu_vx_nxv4i64(<vscale x 4 x i64> %va, i64 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1212; RV32-LABEL: vminu_vx_nxv4i64:1213; RV32: # %bb.0:1214; RV32-NEXT: addi sp, sp, -161215; RV32-NEXT: .cfi_def_cfa_offset 161216; RV32-NEXT: sw a0, 8(sp)1217; RV32-NEXT: sw a1, 12(sp)1218; RV32-NEXT: addi a0, sp, 81219; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1220; RV32-NEXT: vlse64.v v12, (a0), zero1221; RV32-NEXT: vminu.vv v8, v8, v12, v0.t1222; RV32-NEXT: addi sp, sp, 161223; RV32-NEXT: .cfi_def_cfa_offset 01224; RV32-NEXT: ret1225;1226; RV64-LABEL: vminu_vx_nxv4i64:1227; RV64: # %bb.0:1228; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1229; RV64-NEXT: vminu.vx v8, v8, a0, v0.t1230; RV64-NEXT: ret1231 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01232 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1233 %v = call <vscale x 4 x i64> @llvm.vp.umin.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 %evl)1234 ret <vscale x 4 x i64> %v1235}1236 1237define <vscale x 4 x i64> @vminu_vx_nxv4i64_unmasked(<vscale x 4 x i64> %va, i64 %b, i32 zeroext %evl) {1238; RV32-LABEL: vminu_vx_nxv4i64_unmasked:1239; RV32: # %bb.0:1240; RV32-NEXT: addi sp, sp, -161241; RV32-NEXT: .cfi_def_cfa_offset 161242; RV32-NEXT: sw a0, 8(sp)1243; RV32-NEXT: sw a1, 12(sp)1244; RV32-NEXT: addi a0, sp, 81245; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1246; RV32-NEXT: vlse64.v v12, (a0), zero1247; RV32-NEXT: vminu.vv v8, v8, v121248; RV32-NEXT: addi sp, sp, 161249; RV32-NEXT: .cfi_def_cfa_offset 01250; RV32-NEXT: ret1251;1252; RV64-LABEL: vminu_vx_nxv4i64_unmasked:1253; RV64: # %bb.0:1254; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1255; RV64-NEXT: vminu.vx v8, v8, a01256; RV64-NEXT: ret1257 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01258 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1259 %v = call <vscale x 4 x i64> @llvm.vp.umin.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)1260 ret <vscale x 4 x i64> %v1261}1262 1263define <vscale x 8 x i64> @vminu_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1264; CHECK-LABEL: vminu_vv_nxv8i64:1265; CHECK: # %bb.0:1266; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1267; CHECK-NEXT: vminu.vv v8, v8, v16, v0.t1268; CHECK-NEXT: ret1269 %v = call <vscale x 8 x i64> @llvm.vp.umin.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 %evl)1270 ret <vscale x 8 x i64> %v1271}1272 1273define <vscale x 8 x i64> @vminu_vv_nxv8i64_unmasked(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, i32 zeroext %evl) {1274; CHECK-LABEL: vminu_vv_nxv8i64_unmasked:1275; CHECK: # %bb.0:1276; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1277; CHECK-NEXT: vminu.vv v8, v8, v161278; CHECK-NEXT: ret1279 %v = call <vscale x 8 x i64> @llvm.vp.umin.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)1280 ret <vscale x 8 x i64> %v1281}1282 1283define <vscale x 8 x i64> @vminu_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1284; RV32-LABEL: vminu_vx_nxv8i64:1285; RV32: # %bb.0:1286; RV32-NEXT: addi sp, sp, -161287; RV32-NEXT: .cfi_def_cfa_offset 161288; RV32-NEXT: sw a0, 8(sp)1289; RV32-NEXT: sw a1, 12(sp)1290; RV32-NEXT: addi a0, sp, 81291; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1292; RV32-NEXT: vlse64.v v16, (a0), zero1293; RV32-NEXT: vminu.vv v8, v8, v16, v0.t1294; RV32-NEXT: addi sp, sp, 161295; RV32-NEXT: .cfi_def_cfa_offset 01296; RV32-NEXT: ret1297;1298; RV64-LABEL: vminu_vx_nxv8i64:1299; RV64: # %bb.0:1300; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1301; RV64-NEXT: vminu.vx v8, v8, a0, v0.t1302; RV64-NEXT: ret1303 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01304 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1305 %v = call <vscale x 8 x i64> @llvm.vp.umin.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 %evl)1306 ret <vscale x 8 x i64> %v1307}1308 1309define <vscale x 8 x i64> @vminu_vx_nxv8i64_unmasked(<vscale x 8 x i64> %va, i64 %b, i32 zeroext %evl) {1310; RV32-LABEL: vminu_vx_nxv8i64_unmasked:1311; RV32: # %bb.0:1312; RV32-NEXT: addi sp, sp, -161313; RV32-NEXT: .cfi_def_cfa_offset 161314; RV32-NEXT: sw a0, 8(sp)1315; RV32-NEXT: sw a1, 12(sp)1316; RV32-NEXT: addi a0, sp, 81317; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1318; RV32-NEXT: vlse64.v v16, (a0), zero1319; RV32-NEXT: vminu.vv v8, v8, v161320; RV32-NEXT: addi sp, sp, 161321; RV32-NEXT: .cfi_def_cfa_offset 01322; RV32-NEXT: ret1323;1324; RV64-LABEL: vminu_vx_nxv8i64_unmasked:1325; RV64: # %bb.0:1326; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1327; RV64-NEXT: vminu.vx v8, v8, a01328; RV64-NEXT: ret1329 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01330 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1331 %v = call <vscale x 8 x i64> @llvm.vp.umin.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)1332 ret <vscale x 8 x i64> %v1333}1334