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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -verify-machineinstrs -mtriple riscv64 -run-pass=postrapseudos %s -o - | FileCheck %s3# RUN: llc -verify-machineinstrs -mtriple riscv64 -passes=post-ra-pseudos %s -o - | FileCheck %s4 5...6---7name: copy_different_lmul8tracksRegLiveness: true9body: |10 bb.0:11 liveins: $x14, $x1612 ; CHECK-LABEL: name: copy_different_lmul13 ; CHECK: liveins: $x14, $x1614 ; CHECK-NEXT: {{ $}}15 ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype16 ; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype17 ; CHECK-NEXT: $v12m2 = VMV2R_V $v28m2, implicit $vtype18 $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype19 $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype20 $v12m2 = COPY $v28m221...22---23name: copy_convert_to_vmv_v_v24tracksRegLiveness: true25body: |26 bb.0:27 liveins: $x14, $x1628 ; CHECK-LABEL: name: copy_convert_to_vmv_v_v29 ; CHECK: liveins: $x14, $x1630 ; CHECK-NEXT: {{ $}}31 ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype32 ; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype33 ; CHECK-NEXT: $v12m4 = PseudoVMV_V_V_M4 undef $v12m4, $v28m4, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype34 $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype35 $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype36 $v12m4 = COPY $v28m437...38---39name: copy_convert_to_vmv_v_i40tracksRegLiveness: true41body: |42 bb.0:43 liveins: $x1444 ; CHECK-LABEL: name: copy_convert_to_vmv_v_i45 ; CHECK: liveins: $x1446 ; CHECK-NEXT: {{ $}}47 ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype48 ; CHECK-NEXT: $v28m4 = PseudoVMV_V_I_M4 undef $v28m4, 0, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype49 ; CHECK-NEXT: $v12m4 = PseudoVMV_V_I_M4 undef $v12m4, 0, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype50 $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype51 $v28m4 = PseudoVMV_V_I_M4 undef $v28m4, 0, $noreg, 5, 0, implicit $vl, implicit $vtype52 $v12m4 = COPY $v28m453...54---55name: copy_from_whole_load_store56tracksRegLiveness: true57body: |58 bb.0:59 liveins: $x14, $x1660 ; CHECK-LABEL: name: copy_from_whole_load_store61 ; CHECK: liveins: $x14, $x1662 ; CHECK-NEXT: {{ $}}63 ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype64 ; CHECK-NEXT: $v28m4 = VL4RE32_V $x1665 ; CHECK-NEXT: $v12m4 = VMV4R_V $v28m4, implicit $vtype66 $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype67 $v28m4 = VL4RE32_V $x1668 $v12m4 = COPY $v28m469...70---71name: copy_with_vleff72tracksRegLiveness: true73body: |74 bb.0:75 liveins: $x14, $x1676 ; CHECK-LABEL: name: copy_with_vleff77 ; CHECK: liveins: $x14, $x1678 ; CHECK-NEXT: {{ $}}79 ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype80 ; CHECK-NEXT: $v28m4 = PseudoVMV_V_I_M4 undef $v28m4, 0, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype81 ; CHECK-NEXT: $v4m4, $x0 = PseudoVLE32FF_V_M4 undef $v4m4, $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit-def $vl82 ; CHECK-NEXT: $v12m4 = VMV4R_V $v28m4, implicit $vtype83 $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype84 $v28m4 = PseudoVMV_V_I_M4 undef $v28m4, 0, $noreg, 5, 0, implicit $vl, implicit $vtype85 $v4m4,$x0 = PseudoVLE32FF_V_M4 undef $v4m4, $x16, $noreg, 5, 0, implicit-def $vl86 $v12m4 = COPY $v28m487...88---89name: copy_with_vsetvl_x0_x0_190tracksRegLiveness: true91body: |92 bb.0:93 liveins: $x14, $x16, $x17, $x1894 ; CHECK-LABEL: name: copy_with_vsetvl_x0_x0_195 ; CHECK: liveins: $x14, $x16, $x17, $x1896 ; CHECK-NEXT: {{ $}}97 ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype98 ; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype99 ; CHECK-NEXT: $x15 = PseudoVSETVLI $x17, 73 /* e16, m2, ta, mu */, implicit-def $vl, implicit-def $vtype100 ; CHECK-NEXT: $v0m2 = PseudoVLE32_V_M2 undef $v0m2, $x18, $noreg, 4 /* e16 */, 0 /* tu, mu */, implicit $vl, implicit $vtype101 ; CHECK-NEXT: $x0 = PseudoVSETVLIX0X0 $x0, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype102 ; CHECK-NEXT: $v4m4 = PseudoVLE32_V_M4 undef $v4m4, killed $x18, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype103 ; CHECK-NEXT: $v12m4 = VMV4R_V $v28m4, implicit $vtype104 $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype105 $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype106 $x15 = PseudoVSETVLI $x17, 73, implicit-def $vl, implicit-def $vtype107 $v0m2 = PseudoVLE32_V_M2 undef $v0m2, $x18, $noreg, 4, 0, implicit $vl, implicit $vtype108 $x0 = PseudoVSETVLIX0X0 $x0, 82, implicit-def $vl, implicit-def $vtype109 $v4m4 = PseudoVLE32_V_M4 undef $v4m4, killed $x18, $noreg, 5, 0, implicit $vl, implicit $vtype110 $v12m4 = COPY $v28m4111...112---113name: copy_with_vsetvl_x0_x0_2114tracksRegLiveness: true115body: |116 bb.0:117 liveins: $x14, $x16, $x17, $x18118 ; CHECK-LABEL: name: copy_with_vsetvl_x0_x0_2119 ; CHECK: liveins: $x14, $x16, $x17, $x18120 ; CHECK-NEXT: {{ $}}121 ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype122 ; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype123 ; CHECK-NEXT: $x0 = PseudoVSETVLIX0X0 $x0, 73 /* e16, m2, ta, mu */, implicit-def $vl, implicit-def $vtype124 ; CHECK-NEXT: $v0m2 = PseudoVLE32_V_M2 undef $v0m2, $x18, $noreg, 4 /* e16 */, 0 /* tu, mu */, implicit $vl, implicit $vtype125 ; CHECK-NEXT: $x0 = PseudoVSETVLIX0X0 $x0, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype126 ; CHECK-NEXT: $v4m4 = PseudoVLE32_V_M4 undef $v4m4, killed $x18, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype127 ; CHECK-NEXT: $v12m4 = PseudoVMV_V_V_M4 undef $v12m4, $v28m4, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype128 $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype129 $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype130 $x0 = PseudoVSETVLIX0X0 $x0, 73, implicit-def $vl, implicit-def $vtype131 $v0m2 = PseudoVLE32_V_M2 undef $v0m2, $x18, $noreg, 4, 0, implicit $vl, implicit $vtype132 $x0 = PseudoVSETVLIX0X0 $x0, 82, implicit-def $vl, implicit-def $vtype133 $v4m4 = PseudoVLE32_V_M4 undef $v4m4, killed $x18, $noreg, 5, 0, implicit $vl, implicit $vtype134 $v12m4 = COPY $v28m4135...136---137name: copy_with_vsetvl_x0_x0_3138tracksRegLiveness: true139body: |140 bb.0:141 liveins: $x14, $x16, $x17, $x18142 ; CHECK-LABEL: name: copy_with_vsetvl_x0_x0_3143 ; CHECK: liveins: $x14, $x16, $x17, $x18144 ; CHECK-NEXT: {{ $}}145 ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype146 ; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype147 ; CHECK-NEXT: $x0 = PseudoVSETVLIX0X0 $x0, 73 /* e16, m2, ta, mu */, implicit-def $vl, implicit-def $vtype148 ; CHECK-NEXT: $v0m2 = PseudoVLE32_V_M2 undef $v0m2, $x18, $noreg, 4 /* e16 */, 0 /* tu, mu */, implicit $vl, implicit $vtype149 ; CHECK-NEXT: $v12m4 = VMV4R_V $v28m4, implicit $vtype150 $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype151 $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype152 $x0 = PseudoVSETVLIX0X0 $x0, 73, implicit-def $vl, implicit-def $vtype153 $v0m2 = PseudoVLE32_V_M2 undef $v0m2, $x18, $noreg, 4, 0, implicit $vl, implicit $vtype154 $v12m4 = COPY $v28m4155...156---157name: copy_subregister158tracksRegLiveness: true159body: |160 bb.0:161 liveins: $x16, $x17162 ; CHECK-LABEL: name: copy_subregister163 ; CHECK: liveins: $x16, $x17164 ; CHECK-NEXT: {{ $}}165 ; CHECK-NEXT: $x15 = PseudoVSETIVLI 4, 73 /* e16, m2, ta, mu */, implicit-def $vl, implicit-def $vtype166 ; CHECK-NEXT: $v26m2 = PseudoVLE16_V_M2 undef $v26m2, killed $x16, $noreg, 4 /* e16 */, 0 /* tu, mu */, implicit $vl, implicit $vtype167 ; CHECK-NEXT: $v8m2 = PseudoVLE16_V_M2 undef $v8m2, killed $x17, $noreg, 4 /* e16 */, 0 /* tu, mu */, implicit $vl, implicit $vtype168 ; CHECK-NEXT: early-clobber $v28m4 = PseudoVWADD_VV_M2 undef $v28m4, $v26m2, $v8m2, $noreg, 4 /* e16 */, 0 /* tu, mu */, implicit $vl, implicit $vtype169 ; CHECK-NEXT: $v12m2 = VMV2R_V $v28m2, implicit $vtype170 $x15 = PseudoVSETIVLI 4, 73, implicit-def $vl, implicit-def $vtype171 $v26m2 = PseudoVLE16_V_M2 undef $v26m2, killed $x16, $noreg, 4, 0, implicit $vl, implicit $vtype172 $v8m2 = PseudoVLE16_V_M2 undef $v8m2, killed $x17, $noreg, 4, 0, implicit $vl, implicit $vtype173 174 $v28m4 = PseudoVWADD_VV_M2 undef $v28m4, $v26m2, $v8m2, $noreg, 4, 0, implicit $vl, implicit $vtype175 $v12m2 = COPY $v28m2176...177---178name: copy_with_different_vlmax179tracksRegLiveness: true180body: |181 bb.0:182 liveins: $x14, $x16183 ; CHECK-LABEL: name: copy_with_different_vlmax184 ; CHECK: liveins: $x14, $x16185 ; CHECK-NEXT: {{ $}}186 ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype187 ; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype188 ; CHECK-NEXT: $x0 = PseudoVSETVLIX0X0 $x0, 74 /* e16, m4, ta, mu */, implicit-def $vl, implicit-def $vtype189 ; CHECK-NEXT: $v12m4 = VMV4R_V $v28m4, implicit $vtype190 $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype191 $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype192 $x0 = PseudoVSETVLIX0X0 $x0, 74, implicit-def $vl, implicit-def $vtype193 $v12m4 = COPY $v28m4194...195---196name: copy_with_widening_reduction197tracksRegLiveness: true198body: |199 bb.0:200 liveins: $x10, $v8, $v26, $v27201 ; CHECK-LABEL: name: copy_with_widening_reduction202 ; CHECK: liveins: $x10, $v8, $v26, $v27203 ; CHECK-NEXT: {{ $}}204 ; CHECK-NEXT: $x11 = PseudoVSETIVLI 1, 64 /* e8, m1, ta, mu */, implicit-def $vl, implicit-def $vtype205 ; CHECK-NEXT: $v8 = PseudoVWREDSUM_VS_M1_E8 killed renamable $v8, killed renamable $v26, killed renamable $v27, 1, 3 /* e8 */, 1 /* ta, mu */, implicit $vl, implicit $vtype206 ; CHECK-NEXT: $v26 = VMV1R_V killed $v8, implicit $vtype207 ; CHECK-NEXT: $x10 = PseudoVSETVLI killed renamable $x10, 75 /* e16, m8, ta, mu */, implicit-def $vl, implicit-def $vtype208 ; CHECK-NEXT: $v8m8 = VL8RE8_V killed $x10209 $x11 = PseudoVSETIVLI 1, 64, implicit-def $vl, implicit-def $vtype210 $v8 = PseudoVWREDSUM_VS_M1_E8 killed renamable $v8, killed renamable $v26, killed renamable $v27, 1, 3, 1, implicit $vl, implicit $vtype211 $v26 = COPY killed renamable $v8212 $x10 = PseudoVSETVLI killed renamable $x10, 75, implicit-def $vl, implicit-def $vtype213 $v8m8 = VL8RE8_V killed $x10214...215---216name: copy_zvlsseg_reg217tracksRegLiveness: true218body: |219 bb.0:220 liveins: $x14, $x16221 ; CHECK-LABEL: name: copy_zvlsseg_reg222 ; CHECK: liveins: $x14, $x16223 ; CHECK-NEXT: {{ $}}224 ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 80 /* e32, m1, ta, mu */, implicit-def $vl, implicit-def $vtype225 ; CHECK-NEXT: $v8_v9 = PseudoVLSEG2E32_V_M1 undef $v8_v9, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype226 ; CHECK-NEXT: $v10 = VMV1R_V $v8, implicit $vtype227 $x15 = PseudoVSETVLI $x14, 80, implicit-def $vl, implicit-def $vtype228 $v8_v9 = PseudoVLSEG2E32_V_M1 undef $v8_v9, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype229 $v10 = COPY $v8230...231---232name: copy_zvlsseg_reg_2233tracksRegLiveness: true234body: |235 bb.0:236 liveins: $x14, $x16237 ; CHECK-LABEL: name: copy_zvlsseg_reg_2238 ; CHECK: liveins: $x14, $x16239 ; CHECK-NEXT: {{ $}}240 ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 80 /* e32, m1, ta, mu */, implicit-def $vl, implicit-def $vtype241 ; CHECK-NEXT: $v8_v9 = PseudoVLSEG2E32_V_M1 undef $v8_v9, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype242 ; CHECK-NEXT: $v10m2 = VMV2R_V $v8m2, implicit $vtype243 $x15 = PseudoVSETVLI $x14, 80, implicit-def $vl, implicit-def $vtype244 $v8_v9 = PseudoVLSEG2E32_V_M1 undef $v8_v9, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype245 $v10_v11 = COPY $v8_v9246...247---248name: copy_fractional_lmul249tracksRegLiveness: true250body: |251 bb.0:252 liveins: $x14, $x16253 ; CHECK-LABEL: name: copy_fractional_lmul254 ; CHECK: liveins: $x14, $x16255 ; CHECK-NEXT: {{ $}}256 ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 87 /* e32, mf2, ta, mu */, implicit-def $vl, implicit-def $vtype257 ; CHECK-NEXT: $v28 = PseudoVLE32_V_MF2 undef $v28, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype258 ; CHECK-NEXT: $v12 = VMV1R_V $v28, implicit $vtype259 $x15 = PseudoVSETVLI $x14, 87, implicit-def $vl, implicit-def $vtype260 $v28 = PseudoVLE32_V_MF2 undef $v28, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype261 $v12 = COPY $v28262...263---264name: copy_implicit_def265tracksRegLiveness: true266body: |267 bb.0:268 liveins: $x12, $x14, $x16269 ; CHECK-LABEL: name: copy_implicit_def270 ; CHECK: liveins: $x12, $x14, $x16271 ; CHECK-NEXT: {{ $}}272 ; CHECK-NEXT: $x0 = PseudoVSETVLI $x14, 80 /* e32, m1, ta, mu */, implicit-def $vl, implicit-def $vtype273 ; CHECK-NEXT: $v8_v9_v10_v11_v12_v13_v14_v15 = PseudoVLSEG8E32_V_M1 undef $v8_v9_v10_v11_v12_v13_v14_v15, killed $x12, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype274 ; CHECK-NEXT: $x0 = PseudoVSETIVLI 10, 80 /* e32, m1, ta, mu */, implicit-def $vl, implicit-def $vtype275 ; CHECK-NEXT: $v15 = PseudoVLE32_V_M1 undef $v15, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype, implicit killed $v8_v9_v10_v11_v12_v13_v14_v15, implicit-def $v8_v9_v10_v11_v12_v13_v14_v15276 ; CHECK-NEXT: $v24m8 = VMV8R_V killed $v8m8, implicit $vtype277 $x0 = PseudoVSETVLI $x14, 80, implicit-def $vl, implicit-def $vtype278 $v8_v9_v10_v11_v12_v13_v14_v15 = PseudoVLSEG8E32_V_M1 undef $v8_v9_v10_v11_v12_v13_v14_v15, killed $x12, $noreg, 5, 0, implicit $vl, implicit $vtype279 $x0 = PseudoVSETIVLI 10, 80, implicit-def $vl, implicit-def $vtype280 $v15 = PseudoVLE32_V_M1 undef $v15, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype, implicit killed $v8_v9_v10_v11_v12_v13_v14_v15, implicit-def $v8_v9_v10_v11_v12_v13_v14_v15281 $v24_v25_v26_v27_v28_v29_v30_v31 = COPY killed $v8_v9_v10_v11_v12_v13_v14_v15282...283---284name: copy_sifive_custom_macc285tracksRegLiveness: true286body: |287 bb.0:288 liveins: $x2, $x10, $v8, $v13, $v4m4, $v16m4289 ; CHECK-LABEL: name: copy_sifive_custom_macc290 ; CHECK: liveins: $x2, $x10, $v8, $v13, $v4m4, $v16m4291 ; CHECK-NEXT: {{ $}}292 ; CHECK-NEXT: $x0 = PseudoVSETVLI $x10, 66 /* e8, m4, ta, mu */, implicit-def $vl, implicit-def $vtype293 ; CHECK-NEXT: early-clobber $v4m4 = PseudoSF_VQMACCUS_2x8x2_M4 renamable $v4m4, killed renamable $v13, killed renamable $v16m4, $noreg, 3 /* e8 */, 1 /* ta, mu */, implicit $vl, implicit $vtype294 ; CHECK-NEXT: $v16m4 = PseudoVMV_V_V_M4 undef $v16m4, $v4m4, $noreg, 3 /* e8 */, 0 /* tu, mu */, implicit $vl, implicit $vtype295 $x0 = PseudoVSETVLI $x10, 66, implicit-def $vl, implicit-def $vtype296 early-clobber $v4m4 = PseudoSF_VQMACCUS_2x8x2_M4 renamable $v4m4, killed renamable $v13, killed renamable $v16m4, $noreg, 3, 1, implicit $vl, implicit $vtype297 $v16m4 = COPY renamable $v4m4298...299---300name: copy_sifive_custom_macc1301tracksRegLiveness: true302body: |303 bb.0:304 liveins: $x2, $x10, $v8, $v13, $v4m4, $v16m2305 ; CHECK-LABEL: name: copy_sifive_custom_macc1306 ; CHECK: liveins: $x2, $x10, $v8, $v13, $v4m4, $v16m2307 ; CHECK-NEXT: {{ $}}308 ; CHECK-NEXT: $x0 = PseudoVSETVLI $x10, 65 /* e8, m2, ta, mu */, implicit-def $vl, implicit-def $vtype309 ; CHECK-NEXT: early-clobber $v4m4 = PseudoSF_VQMACCUS_4x8x4_M2 renamable $v4m4, killed renamable $v13, killed renamable $v16m2, $noreg, 3 /* e8 */, 1 /* ta, mu */, implicit $vl, implicit $vtype310 ; CHECK-NEXT: $v16m4 = VMV4R_V $v4m4, implicit $vtype311 $x0 = PseudoVSETVLI $x10, 65, implicit-def $vl, implicit-def $vtype312 early-clobber $v4m4 = PseudoSF_VQMACCUS_4x8x4_M2 renamable $v4m4, killed renamable $v13, killed renamable $v16m2, $noreg, 3, 1, implicit $vl, implicit $vtype313 $v16m4 = COPY renamable $v4m4314...315---316name: copy_narrow_copies_in_between317tracksRegLiveness: true318body: |319 bb.0:320 liveins: $x10, $x11, $v8, $v9321 ; CHECK-LABEL: name: copy_narrow_copies_in_between322 ; CHECK: liveins: $x10, $x11, $v8, $v9323 ; CHECK-NEXT: {{ $}}324 ; CHECK-NEXT: $x0 = PseudoVSETVLI $x10, 201 /* e16, m2, ta, ma */, implicit-def $vl, implicit-def $vtype325 ; CHECK-NEXT: $v10m2 = PseudoVLE16_V_M2 undef $v10m2, killed $x11, $noreg, 4 /* e16 */, 0 /* tu, mu */, implicit $vl, implicit $vtype326 ; CHECK-NEXT: $v10 = VMV1R_V $v8, implicit $vtype327 ; CHECK-NEXT: $v11 = VMV1R_V $v9, implicit $vtype328 ; CHECK-NEXT: $v12m2 = VMV2R_V $v10m2, implicit $vtype329 $x0 = PseudoVSETVLI $x10, 201, implicit-def $vl, implicit-def $vtype330 $v10m2 = PseudoVLE16_V_M2 undef $v10m2, killed $x11, $noreg, 4, 0, implicit $vl, implicit $vtype331 $v10 = COPY $v8332 $v11 = COPY $v9333 $v12m2 = COPY $v10m2334...335