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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v,+m -target-abi=ilp32d \3; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v,+m -target-abi=lp64d \5; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV646 7define <vscale x 1 x i8> @vnmsac_vv_nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %b, <vscale x 1 x i8> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vnmsac_vv_nxv1i8:9; CHECK:       # %bb.0:10; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, tu, mu11; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t12; CHECK-NEXT:    vmv1r.v v8, v1013; CHECK-NEXT:    ret14  %x = call <vscale x 1 x i8> @llvm.vp.mul.nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)15  %y = call <vscale x 1 x i8> @llvm.vp.sub.nxv1i8(<vscale x 1 x i8> %c, <vscale x 1 x i8> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)16  %u = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> %m, <vscale x 1 x i8> %y, <vscale x 1 x i8> %c, i32 %evl)17  ret <vscale x 1 x i8> %u18}19 20define <vscale x 1 x i8> @vnmsac_vv_nxv1i8_unmasked(<vscale x 1 x i8> %a, <vscale x 1 x i8> %b, <vscale x 1 x i8> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {21; CHECK-LABEL: vnmsac_vv_nxv1i8_unmasked:22; CHECK:       # %bb.0:23; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, tu, ma24; CHECK-NEXT:    vnmsac.vv v10, v8, v925; CHECK-NEXT:    vmv1r.v v8, v1026; CHECK-NEXT:    ret27  %x = call <vscale x 1 x i8> @llvm.vp.mul.nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)28  %y = call <vscale x 1 x i8> @llvm.vp.sub.nxv1i8(<vscale x 1 x i8> %c, <vscale x 1 x i8> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)29  %u = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i8> %y, <vscale x 1 x i8> %c, i32 %evl)30  ret <vscale x 1 x i8> %u31}32 33define <vscale x 1 x i8> @vnmsac_vx_nxv1i8(<vscale x 1 x i8> %a, i8 %b, <vscale x 1 x i8> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {34; CHECK-LABEL: vnmsac_vx_nxv1i8:35; CHECK:       # %bb.0:36; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, tu, mu37; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t38; CHECK-NEXT:    vmv1r.v v8, v939; CHECK-NEXT:    ret40  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 041  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer42  %x = call <vscale x 1 x i8> @llvm.vp.mul.nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)43  %y = call <vscale x 1 x i8> @llvm.vp.sub.nxv1i8(<vscale x 1 x i8> %c, <vscale x 1 x i8> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)44  %u = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> %m, <vscale x 1 x i8> %y, <vscale x 1 x i8> %c, i32 %evl)45  ret <vscale x 1 x i8> %u46}47 48define <vscale x 1 x i8> @vnmsac_vx_nxv1i8_unmasked(<vscale x 1 x i8> %a, i8 %b, <vscale x 1 x i8> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {49; CHECK-LABEL: vnmsac_vx_nxv1i8_unmasked:50; CHECK:       # %bb.0:51; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, tu, ma52; CHECK-NEXT:    vnmsac.vx v9, a0, v853; CHECK-NEXT:    vmv1r.v v8, v954; CHECK-NEXT:    ret55  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 056  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer57  %x = call <vscale x 1 x i8> @llvm.vp.mul.nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)58  %y = call <vscale x 1 x i8> @llvm.vp.sub.nxv1i8(<vscale x 1 x i8> %c, <vscale x 1 x i8> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)59  %u = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i8> %y, <vscale x 1 x i8> %c, i32 %evl)60  ret <vscale x 1 x i8> %u61}62 63define <vscale x 1 x i8> @vnmsac_vv_nxv1i8_ta(<vscale x 1 x i8> %a, <vscale x 1 x i8> %b, <vscale x 1 x i8> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {64; CHECK-LABEL: vnmsac_vv_nxv1i8_ta:65; CHECK:       # %bb.0:66; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, mu67; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t68; CHECK-NEXT:    vmv1r.v v8, v1069; CHECK-NEXT:    ret70  %x = call <vscale x 1 x i8> @llvm.vp.mul.nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)71  %y = call <vscale x 1 x i8> @llvm.vp.sub.nxv1i8(<vscale x 1 x i8> %c, <vscale x 1 x i8> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)72  %u = call <vscale x 1 x i8> @llvm.vp.select.nxv1i8(<vscale x 1 x i1> %m, <vscale x 1 x i8> %y, <vscale x 1 x i8> %c, i32 %evl)73  ret <vscale x 1 x i8> %u74}75 76define <vscale x 1 x i8> @vnmsac_vx_nxv1i8_ta(<vscale x 1 x i8> %a, i8 %b, <vscale x 1 x i8> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {77; CHECK-LABEL: vnmsac_vx_nxv1i8_ta:78; CHECK:       # %bb.0:79; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, mu80; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t81; CHECK-NEXT:    vmv1r.v v8, v982; CHECK-NEXT:    ret83  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 084  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer85  %x = call <vscale x 1 x i8> @llvm.vp.mul.nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)86  %y = call <vscale x 1 x i8> @llvm.vp.sub.nxv1i8(<vscale x 1 x i8> %c, <vscale x 1 x i8> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)87  %u = call <vscale x 1 x i8> @llvm.vp.select.nxv1i8(<vscale x 1 x i1> %m, <vscale x 1 x i8> %y, <vscale x 1 x i8> %c, i32 %evl)88  ret <vscale x 1 x i8> %u89}90 91define <vscale x 2 x i8> @vnmsac_vv_nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %b, <vscale x 2 x i8> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {92; CHECK-LABEL: vnmsac_vv_nxv2i8:93; CHECK:       # %bb.0:94; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, tu, mu95; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t96; CHECK-NEXT:    vmv1r.v v8, v1097; CHECK-NEXT:    ret98  %x = call <vscale x 2 x i8> @llvm.vp.mul.nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)99  %y = call <vscale x 2 x i8> @llvm.vp.sub.nxv2i8(<vscale x 2 x i8> %c, <vscale x 2 x i8> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)100  %u = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> %m, <vscale x 2 x i8> %y, <vscale x 2 x i8> %c, i32 %evl)101  ret <vscale x 2 x i8> %u102}103 104define <vscale x 2 x i8> @vnmsac_vv_nxv2i8_unmasked(<vscale x 2 x i8> %a, <vscale x 2 x i8> %b, <vscale x 2 x i8> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {105; CHECK-LABEL: vnmsac_vv_nxv2i8_unmasked:106; CHECK:       # %bb.0:107; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, tu, ma108; CHECK-NEXT:    vnmsac.vv v10, v8, v9109; CHECK-NEXT:    vmv1r.v v8, v10110; CHECK-NEXT:    ret111  %x = call <vscale x 2 x i8> @llvm.vp.mul.nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)112  %y = call <vscale x 2 x i8> @llvm.vp.sub.nxv2i8(<vscale x 2 x i8> %c, <vscale x 2 x i8> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)113  %u = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i8> %y, <vscale x 2 x i8> %c, i32 %evl)114  ret <vscale x 2 x i8> %u115}116 117define <vscale x 2 x i8> @vnmsac_vx_nxv2i8(<vscale x 2 x i8> %a, i8 %b, <vscale x 2 x i8> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {118; CHECK-LABEL: vnmsac_vx_nxv2i8:119; CHECK:       # %bb.0:120; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, tu, mu121; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t122; CHECK-NEXT:    vmv1r.v v8, v9123; CHECK-NEXT:    ret124  %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0125  %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer126  %x = call <vscale x 2 x i8> @llvm.vp.mul.nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)127  %y = call <vscale x 2 x i8> @llvm.vp.sub.nxv2i8(<vscale x 2 x i8> %c, <vscale x 2 x i8> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)128  %u = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> %m, <vscale x 2 x i8> %y, <vscale x 2 x i8> %c, i32 %evl)129  ret <vscale x 2 x i8> %u130}131 132define <vscale x 2 x i8> @vnmsac_vx_nxv2i8_unmasked(<vscale x 2 x i8> %a, i8 %b, <vscale x 2 x i8> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {133; CHECK-LABEL: vnmsac_vx_nxv2i8_unmasked:134; CHECK:       # %bb.0:135; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, tu, ma136; CHECK-NEXT:    vnmsac.vx v9, a0, v8137; CHECK-NEXT:    vmv1r.v v8, v9138; CHECK-NEXT:    ret139  %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0140  %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer141  %x = call <vscale x 2 x i8> @llvm.vp.mul.nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)142  %y = call <vscale x 2 x i8> @llvm.vp.sub.nxv2i8(<vscale x 2 x i8> %c, <vscale x 2 x i8> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)143  %u = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i8> %y, <vscale x 2 x i8> %c, i32 %evl)144  ret <vscale x 2 x i8> %u145}146 147define <vscale x 2 x i8> @vnmsac_vv_nxv2i8_ta(<vscale x 2 x i8> %a, <vscale x 2 x i8> %b, <vscale x 2 x i8> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {148; CHECK-LABEL: vnmsac_vv_nxv2i8_ta:149; CHECK:       # %bb.0:150; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, ta, mu151; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t152; CHECK-NEXT:    vmv1r.v v8, v10153; CHECK-NEXT:    ret154  %x = call <vscale x 2 x i8> @llvm.vp.mul.nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)155  %y = call <vscale x 2 x i8> @llvm.vp.sub.nxv2i8(<vscale x 2 x i8> %c, <vscale x 2 x i8> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)156  %u = call <vscale x 2 x i8> @llvm.vp.select.nxv2i8(<vscale x 2 x i1> %m, <vscale x 2 x i8> %y, <vscale x 2 x i8> %c, i32 %evl)157  ret <vscale x 2 x i8> %u158}159 160define <vscale x 2 x i8> @vnmsac_vx_nxv2i8_ta(<vscale x 2 x i8> %a, i8 %b, <vscale x 2 x i8> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {161; CHECK-LABEL: vnmsac_vx_nxv2i8_ta:162; CHECK:       # %bb.0:163; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, mu164; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t165; CHECK-NEXT:    vmv1r.v v8, v9166; CHECK-NEXT:    ret167  %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0168  %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer169  %x = call <vscale x 2 x i8> @llvm.vp.mul.nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)170  %y = call <vscale x 2 x i8> @llvm.vp.sub.nxv2i8(<vscale x 2 x i8> %c, <vscale x 2 x i8> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)171  %u = call <vscale x 2 x i8> @llvm.vp.select.nxv2i8(<vscale x 2 x i1> %m, <vscale x 2 x i8> %y, <vscale x 2 x i8> %c, i32 %evl)172  ret <vscale x 2 x i8> %u173}174 175define <vscale x 4 x i8> @vnmsac_vv_nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %b, <vscale x 4 x i8> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {176; CHECK-LABEL: vnmsac_vv_nxv4i8:177; CHECK:       # %bb.0:178; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, tu, mu179; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t180; CHECK-NEXT:    vmv1r.v v8, v10181; CHECK-NEXT:    ret182  %x = call <vscale x 4 x i8> @llvm.vp.mul.nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)183  %y = call <vscale x 4 x i8> @llvm.vp.sub.nxv4i8(<vscale x 4 x i8> %c, <vscale x 4 x i8> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)184  %u = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> %m, <vscale x 4 x i8> %y, <vscale x 4 x i8> %c, i32 %evl)185  ret <vscale x 4 x i8> %u186}187 188define <vscale x 4 x i8> @vnmsac_vv_nxv4i8_unmasked(<vscale x 4 x i8> %a, <vscale x 4 x i8> %b, <vscale x 4 x i8> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {189; CHECK-LABEL: vnmsac_vv_nxv4i8_unmasked:190; CHECK:       # %bb.0:191; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, tu, ma192; CHECK-NEXT:    vnmsac.vv v10, v8, v9193; CHECK-NEXT:    vmv1r.v v8, v10194; CHECK-NEXT:    ret195  %x = call <vscale x 4 x i8> @llvm.vp.mul.nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)196  %y = call <vscale x 4 x i8> @llvm.vp.sub.nxv4i8(<vscale x 4 x i8> %c, <vscale x 4 x i8> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)197  %u = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i8> %y, <vscale x 4 x i8> %c, i32 %evl)198  ret <vscale x 4 x i8> %u199}200 201define <vscale x 4 x i8> @vnmsac_vx_nxv4i8(<vscale x 4 x i8> %a, i8 %b, <vscale x 4 x i8> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {202; CHECK-LABEL: vnmsac_vx_nxv4i8:203; CHECK:       # %bb.0:204; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, tu, mu205; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t206; CHECK-NEXT:    vmv1r.v v8, v9207; CHECK-NEXT:    ret208  %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0209  %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer210  %x = call <vscale x 4 x i8> @llvm.vp.mul.nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)211  %y = call <vscale x 4 x i8> @llvm.vp.sub.nxv4i8(<vscale x 4 x i8> %c, <vscale x 4 x i8> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)212  %u = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> %m, <vscale x 4 x i8> %y, <vscale x 4 x i8> %c, i32 %evl)213  ret <vscale x 4 x i8> %u214}215 216define <vscale x 4 x i8> @vnmsac_vx_nxv4i8_unmasked(<vscale x 4 x i8> %a, i8 %b, <vscale x 4 x i8> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {217; CHECK-LABEL: vnmsac_vx_nxv4i8_unmasked:218; CHECK:       # %bb.0:219; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, tu, ma220; CHECK-NEXT:    vnmsac.vx v9, a0, v8221; CHECK-NEXT:    vmv1r.v v8, v9222; CHECK-NEXT:    ret223  %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0224  %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer225  %x = call <vscale x 4 x i8> @llvm.vp.mul.nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)226  %y = call <vscale x 4 x i8> @llvm.vp.sub.nxv4i8(<vscale x 4 x i8> %c, <vscale x 4 x i8> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)227  %u = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i8> %y, <vscale x 4 x i8> %c, i32 %evl)228  ret <vscale x 4 x i8> %u229}230 231define <vscale x 4 x i8> @vnmsac_vv_nxv4i8_ta(<vscale x 4 x i8> %a, <vscale x 4 x i8> %b, <vscale x 4 x i8> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {232; CHECK-LABEL: vnmsac_vv_nxv4i8_ta:233; CHECK:       # %bb.0:234; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, mu235; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t236; CHECK-NEXT:    vmv1r.v v8, v10237; CHECK-NEXT:    ret238  %x = call <vscale x 4 x i8> @llvm.vp.mul.nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)239  %y = call <vscale x 4 x i8> @llvm.vp.sub.nxv4i8(<vscale x 4 x i8> %c, <vscale x 4 x i8> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)240  %u = call <vscale x 4 x i8> @llvm.vp.select.nxv4i8(<vscale x 4 x i1> %m, <vscale x 4 x i8> %y, <vscale x 4 x i8> %c, i32 %evl)241  ret <vscale x 4 x i8> %u242}243 244define <vscale x 4 x i8> @vnmsac_vx_nxv4i8_ta(<vscale x 4 x i8> %a, i8 %b, <vscale x 4 x i8> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {245; CHECK-LABEL: vnmsac_vx_nxv4i8_ta:246; CHECK:       # %bb.0:247; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, mu248; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t249; CHECK-NEXT:    vmv1r.v v8, v9250; CHECK-NEXT:    ret251  %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0252  %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer253  %x = call <vscale x 4 x i8> @llvm.vp.mul.nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)254  %y = call <vscale x 4 x i8> @llvm.vp.sub.nxv4i8(<vscale x 4 x i8> %c, <vscale x 4 x i8> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)255  %u = call <vscale x 4 x i8> @llvm.vp.select.nxv4i8(<vscale x 4 x i1> %m, <vscale x 4 x i8> %y, <vscale x 4 x i8> %c, i32 %evl)256  ret <vscale x 4 x i8> %u257}258 259define <vscale x 8 x i8> @vnmsac_vv_nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i8> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {260; CHECK-LABEL: vnmsac_vv_nxv8i8:261; CHECK:       # %bb.0:262; CHECK-NEXT:    vsetvli zero, a0, e8, m1, tu, mu263; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t264; CHECK-NEXT:    vmv1r.v v8, v10265; CHECK-NEXT:    ret266  %x = call <vscale x 8 x i8> @llvm.vp.mul.nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)267  %y = call <vscale x 8 x i8> @llvm.vp.sub.nxv8i8(<vscale x 8 x i8> %c, <vscale x 8 x i8> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)268  %u = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> %m, <vscale x 8 x i8> %y, <vscale x 8 x i8> %c, i32 %evl)269  ret <vscale x 8 x i8> %u270}271 272define <vscale x 8 x i8> @vnmsac_vv_nxv8i8_unmasked(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i8> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {273; CHECK-LABEL: vnmsac_vv_nxv8i8_unmasked:274; CHECK:       # %bb.0:275; CHECK-NEXT:    vsetvli zero, a0, e8, m1, tu, ma276; CHECK-NEXT:    vnmsac.vv v10, v8, v9277; CHECK-NEXT:    vmv1r.v v8, v10278; CHECK-NEXT:    ret279  %x = call <vscale x 8 x i8> @llvm.vp.mul.nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)280  %y = call <vscale x 8 x i8> @llvm.vp.sub.nxv8i8(<vscale x 8 x i8> %c, <vscale x 8 x i8> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)281  %u = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i8> %y, <vscale x 8 x i8> %c, i32 %evl)282  ret <vscale x 8 x i8> %u283}284 285define <vscale x 8 x i8> @vnmsac_vx_nxv8i8(<vscale x 8 x i8> %a, i8 %b, <vscale x 8 x i8> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {286; CHECK-LABEL: vnmsac_vx_nxv8i8:287; CHECK:       # %bb.0:288; CHECK-NEXT:    vsetvli zero, a1, e8, m1, tu, mu289; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t290; CHECK-NEXT:    vmv1r.v v8, v9291; CHECK-NEXT:    ret292  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0293  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer294  %x = call <vscale x 8 x i8> @llvm.vp.mul.nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)295  %y = call <vscale x 8 x i8> @llvm.vp.sub.nxv8i8(<vscale x 8 x i8> %c, <vscale x 8 x i8> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)296  %u = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> %m, <vscale x 8 x i8> %y, <vscale x 8 x i8> %c, i32 %evl)297  ret <vscale x 8 x i8> %u298}299 300define <vscale x 8 x i8> @vnmsac_vx_nxv8i8_unmasked(<vscale x 8 x i8> %a, i8 %b, <vscale x 8 x i8> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {301; CHECK-LABEL: vnmsac_vx_nxv8i8_unmasked:302; CHECK:       # %bb.0:303; CHECK-NEXT:    vsetvli zero, a1, e8, m1, tu, ma304; CHECK-NEXT:    vnmsac.vx v9, a0, v8305; CHECK-NEXT:    vmv1r.v v8, v9306; CHECK-NEXT:    ret307  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0308  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer309  %x = call <vscale x 8 x i8> @llvm.vp.mul.nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)310  %y = call <vscale x 8 x i8> @llvm.vp.sub.nxv8i8(<vscale x 8 x i8> %c, <vscale x 8 x i8> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)311  %u = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i8> %y, <vscale x 8 x i8> %c, i32 %evl)312  ret <vscale x 8 x i8> %u313}314 315define <vscale x 8 x i8> @vnmsac_vv_nxv8i8_ta(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i8> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {316; CHECK-LABEL: vnmsac_vv_nxv8i8_ta:317; CHECK:       # %bb.0:318; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, mu319; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t320; CHECK-NEXT:    vmv.v.v v8, v10321; CHECK-NEXT:    ret322  %x = call <vscale x 8 x i8> @llvm.vp.mul.nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)323  %y = call <vscale x 8 x i8> @llvm.vp.sub.nxv8i8(<vscale x 8 x i8> %c, <vscale x 8 x i8> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)324  %u = call <vscale x 8 x i8> @llvm.vp.select.nxv8i8(<vscale x 8 x i1> %m, <vscale x 8 x i8> %y, <vscale x 8 x i8> %c, i32 %evl)325  ret <vscale x 8 x i8> %u326}327 328define <vscale x 8 x i8> @vnmsac_vx_nxv8i8_ta(<vscale x 8 x i8> %a, i8 %b, <vscale x 8 x i8> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {329; CHECK-LABEL: vnmsac_vx_nxv8i8_ta:330; CHECK:       # %bb.0:331; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, mu332; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t333; CHECK-NEXT:    vmv.v.v v8, v9334; CHECK-NEXT:    ret335  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0336  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer337  %x = call <vscale x 8 x i8> @llvm.vp.mul.nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)338  %y = call <vscale x 8 x i8> @llvm.vp.sub.nxv8i8(<vscale x 8 x i8> %c, <vscale x 8 x i8> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)339  %u = call <vscale x 8 x i8> @llvm.vp.select.nxv8i8(<vscale x 8 x i1> %m, <vscale x 8 x i8> %y, <vscale x 8 x i8> %c, i32 %evl)340  ret <vscale x 8 x i8> %u341}342 343define <vscale x 16 x i8> @vnmsac_vv_nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {344; CHECK-LABEL: vnmsac_vv_nxv16i8:345; CHECK:       # %bb.0:346; CHECK-NEXT:    vsetvli zero, a0, e8, m2, tu, mu347; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t348; CHECK-NEXT:    vmv2r.v v8, v12349; CHECK-NEXT:    ret350  %x = call <vscale x 16 x i8> @llvm.vp.mul.nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)351  %y = call <vscale x 16 x i8> @llvm.vp.sub.nxv16i8(<vscale x 16 x i8> %c, <vscale x 16 x i8> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)352  %u = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> %m, <vscale x 16 x i8> %y, <vscale x 16 x i8> %c, i32 %evl)353  ret <vscale x 16 x i8> %u354}355 356define <vscale x 16 x i8> @vnmsac_vv_nxv16i8_unmasked(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {357; CHECK-LABEL: vnmsac_vv_nxv16i8_unmasked:358; CHECK:       # %bb.0:359; CHECK-NEXT:    vsetvli zero, a0, e8, m2, tu, ma360; CHECK-NEXT:    vnmsac.vv v12, v8, v10361; CHECK-NEXT:    vmv2r.v v8, v12362; CHECK-NEXT:    ret363  %x = call <vscale x 16 x i8> @llvm.vp.mul.nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)364  %y = call <vscale x 16 x i8> @llvm.vp.sub.nxv16i8(<vscale x 16 x i8> %c, <vscale x 16 x i8> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)365  %u = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> splat (i1 -1), <vscale x 16 x i8> %y, <vscale x 16 x i8> %c, i32 %evl)366  ret <vscale x 16 x i8> %u367}368 369define <vscale x 16 x i8> @vnmsac_vx_nxv16i8(<vscale x 16 x i8> %a, i8 %b, <vscale x 16 x i8> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {370; CHECK-LABEL: vnmsac_vx_nxv16i8:371; CHECK:       # %bb.0:372; CHECK-NEXT:    vsetvli zero, a1, e8, m2, tu, mu373; CHECK-NEXT:    vnmsac.vx v10, a0, v8, v0.t374; CHECK-NEXT:    vmv2r.v v8, v10375; CHECK-NEXT:    ret376  %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0377  %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer378  %x = call <vscale x 16 x i8> @llvm.vp.mul.nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)379  %y = call <vscale x 16 x i8> @llvm.vp.sub.nxv16i8(<vscale x 16 x i8> %c, <vscale x 16 x i8> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)380  %u = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> %m, <vscale x 16 x i8> %y, <vscale x 16 x i8> %c, i32 %evl)381  ret <vscale x 16 x i8> %u382}383 384define <vscale x 16 x i8> @vnmsac_vx_nxv16i8_unmasked(<vscale x 16 x i8> %a, i8 %b, <vscale x 16 x i8> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {385; CHECK-LABEL: vnmsac_vx_nxv16i8_unmasked:386; CHECK:       # %bb.0:387; CHECK-NEXT:    vsetvli zero, a1, e8, m2, tu, ma388; CHECK-NEXT:    vnmsac.vx v10, a0, v8389; CHECK-NEXT:    vmv2r.v v8, v10390; CHECK-NEXT:    ret391  %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0392  %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer393  %x = call <vscale x 16 x i8> @llvm.vp.mul.nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)394  %y = call <vscale x 16 x i8> @llvm.vp.sub.nxv16i8(<vscale x 16 x i8> %c, <vscale x 16 x i8> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)395  %u = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> splat (i1 -1), <vscale x 16 x i8> %y, <vscale x 16 x i8> %c, i32 %evl)396  ret <vscale x 16 x i8> %u397}398 399define <vscale x 16 x i8> @vnmsac_vv_nxv16i8_ta(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {400; CHECK-LABEL: vnmsac_vv_nxv16i8_ta:401; CHECK:       # %bb.0:402; CHECK-NEXT:    vsetvli zero, a0, e8, m2, ta, mu403; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t404; CHECK-NEXT:    vmv.v.v v8, v12405; CHECK-NEXT:    ret406  %x = call <vscale x 16 x i8> @llvm.vp.mul.nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)407  %y = call <vscale x 16 x i8> @llvm.vp.sub.nxv16i8(<vscale x 16 x i8> %c, <vscale x 16 x i8> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)408  %u = call <vscale x 16 x i8> @llvm.vp.select.nxv16i8(<vscale x 16 x i1> %m, <vscale x 16 x i8> %y, <vscale x 16 x i8> %c, i32 %evl)409  ret <vscale x 16 x i8> %u410}411 412define <vscale x 16 x i8> @vnmsac_vx_nxv16i8_ta(<vscale x 16 x i8> %a, i8 %b, <vscale x 16 x i8> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {413; CHECK-LABEL: vnmsac_vx_nxv16i8_ta:414; CHECK:       # %bb.0:415; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, mu416; CHECK-NEXT:    vnmsac.vx v10, a0, v8, v0.t417; CHECK-NEXT:    vmv.v.v v8, v10418; CHECK-NEXT:    ret419  %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0420  %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer421  %x = call <vscale x 16 x i8> @llvm.vp.mul.nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)422  %y = call <vscale x 16 x i8> @llvm.vp.sub.nxv16i8(<vscale x 16 x i8> %c, <vscale x 16 x i8> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)423  %u = call <vscale x 16 x i8> @llvm.vp.select.nxv16i8(<vscale x 16 x i1> %m, <vscale x 16 x i8> %y, <vscale x 16 x i8> %c, i32 %evl)424  ret <vscale x 16 x i8> %u425}426 427define <vscale x 32 x i8> @vnmsac_vv_nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %b, <vscale x 32 x i8> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {428; CHECK-LABEL: vnmsac_vv_nxv32i8:429; CHECK:       # %bb.0:430; CHECK-NEXT:    vsetvli zero, a0, e8, m4, tu, mu431; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t432; CHECK-NEXT:    vmv4r.v v8, v16433; CHECK-NEXT:    ret434  %x = call <vscale x 32 x i8> @llvm.vp.mul.nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %b, <vscale x 32 x i1> splat (i1 -1), i32 %evl)435  %y = call <vscale x 32 x i8> @llvm.vp.sub.nxv32i8(<vscale x 32 x i8> %c, <vscale x 32 x i8> %x, <vscale x 32 x i1> splat (i1 -1), i32 %evl)436  %u = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> %m, <vscale x 32 x i8> %y, <vscale x 32 x i8> %c, i32 %evl)437  ret <vscale x 32 x i8> %u438}439 440define <vscale x 32 x i8> @vnmsac_vv_nxv32i8_unmasked(<vscale x 32 x i8> %a, <vscale x 32 x i8> %b, <vscale x 32 x i8> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {441; CHECK-LABEL: vnmsac_vv_nxv32i8_unmasked:442; CHECK:       # %bb.0:443; CHECK-NEXT:    vsetvli zero, a0, e8, m4, tu, ma444; CHECK-NEXT:    vnmsac.vv v16, v8, v12445; CHECK-NEXT:    vmv4r.v v8, v16446; CHECK-NEXT:    ret447  %x = call <vscale x 32 x i8> @llvm.vp.mul.nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %b, <vscale x 32 x i1> splat (i1 -1), i32 %evl)448  %y = call <vscale x 32 x i8> @llvm.vp.sub.nxv32i8(<vscale x 32 x i8> %c, <vscale x 32 x i8> %x, <vscale x 32 x i1> splat (i1 -1), i32 %evl)449  %u = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> splat (i1 -1), <vscale x 32 x i8> %y, <vscale x 32 x i8> %c, i32 %evl)450  ret <vscale x 32 x i8> %u451}452 453define <vscale x 32 x i8> @vnmsac_vx_nxv32i8(<vscale x 32 x i8> %a, i8 %b, <vscale x 32 x i8> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {454; CHECK-LABEL: vnmsac_vx_nxv32i8:455; CHECK:       # %bb.0:456; CHECK-NEXT:    vsetvli zero, a1, e8, m4, tu, mu457; CHECK-NEXT:    vnmsac.vx v12, a0, v8, v0.t458; CHECK-NEXT:    vmv4r.v v8, v12459; CHECK-NEXT:    ret460  %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0461  %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer462  %x = call <vscale x 32 x i8> @llvm.vp.mul.nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %vb, <vscale x 32 x i1> splat (i1 -1), i32 %evl)463  %y = call <vscale x 32 x i8> @llvm.vp.sub.nxv32i8(<vscale x 32 x i8> %c, <vscale x 32 x i8> %x, <vscale x 32 x i1> splat (i1 -1), i32 %evl)464  %u = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> %m, <vscale x 32 x i8> %y, <vscale x 32 x i8> %c, i32 %evl)465  ret <vscale x 32 x i8> %u466}467 468define <vscale x 32 x i8> @vnmsac_vx_nxv32i8_unmasked(<vscale x 32 x i8> %a, i8 %b, <vscale x 32 x i8> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {469; CHECK-LABEL: vnmsac_vx_nxv32i8_unmasked:470; CHECK:       # %bb.0:471; CHECK-NEXT:    vsetvli zero, a1, e8, m4, tu, ma472; CHECK-NEXT:    vnmsac.vx v12, a0, v8473; CHECK-NEXT:    vmv4r.v v8, v12474; CHECK-NEXT:    ret475  %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0476  %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer477  %x = call <vscale x 32 x i8> @llvm.vp.mul.nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %vb, <vscale x 32 x i1> splat (i1 -1), i32 %evl)478  %y = call <vscale x 32 x i8> @llvm.vp.sub.nxv32i8(<vscale x 32 x i8> %c, <vscale x 32 x i8> %x, <vscale x 32 x i1> splat (i1 -1), i32 %evl)479  %u = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> splat (i1 -1), <vscale x 32 x i8> %y, <vscale x 32 x i8> %c, i32 %evl)480  ret <vscale x 32 x i8> %u481}482 483define <vscale x 32 x i8> @vnmsac_vv_nxv32i8_ta(<vscale x 32 x i8> %a, <vscale x 32 x i8> %b, <vscale x 32 x i8> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {484; CHECK-LABEL: vnmsac_vv_nxv32i8_ta:485; CHECK:       # %bb.0:486; CHECK-NEXT:    vsetvli zero, a0, e8, m4, ta, mu487; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t488; CHECK-NEXT:    vmv.v.v v8, v16489; CHECK-NEXT:    ret490  %x = call <vscale x 32 x i8> @llvm.vp.mul.nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %b, <vscale x 32 x i1> splat (i1 -1), i32 %evl)491  %y = call <vscale x 32 x i8> @llvm.vp.sub.nxv32i8(<vscale x 32 x i8> %c, <vscale x 32 x i8> %x, <vscale x 32 x i1> splat (i1 -1), i32 %evl)492  %u = call <vscale x 32 x i8> @llvm.vp.select.nxv32i8(<vscale x 32 x i1> %m, <vscale x 32 x i8> %y, <vscale x 32 x i8> %c, i32 %evl)493  ret <vscale x 32 x i8> %u494}495 496define <vscale x 32 x i8> @vnmsac_vx_nxv32i8_ta(<vscale x 32 x i8> %a, i8 %b, <vscale x 32 x i8> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {497; CHECK-LABEL: vnmsac_vx_nxv32i8_ta:498; CHECK:       # %bb.0:499; CHECK-NEXT:    vsetvli zero, a1, e8, m4, ta, mu500; CHECK-NEXT:    vnmsac.vx v12, a0, v8, v0.t501; CHECK-NEXT:    vmv.v.v v8, v12502; CHECK-NEXT:    ret503  %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0504  %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer505  %x = call <vscale x 32 x i8> @llvm.vp.mul.nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %vb, <vscale x 32 x i1> splat (i1 -1), i32 %evl)506  %y = call <vscale x 32 x i8> @llvm.vp.sub.nxv32i8(<vscale x 32 x i8> %c, <vscale x 32 x i8> %x, <vscale x 32 x i1> splat (i1 -1), i32 %evl)507  %u = call <vscale x 32 x i8> @llvm.vp.select.nxv32i8(<vscale x 32 x i1> %m, <vscale x 32 x i8> %y, <vscale x 32 x i8> %c, i32 %evl)508  ret <vscale x 32 x i8> %u509}510 511define <vscale x 64 x i8> @vnmsac_vv_nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b, <vscale x 64 x i8> %c,  <vscale x 64 x i1> %m, i32 zeroext %evl) {512; CHECK-LABEL: vnmsac_vv_nxv64i8:513; CHECK:       # %bb.0:514; CHECK-NEXT:    vl8r.v v24, (a0)515; CHECK-NEXT:    vsetvli zero, a1, e8, m8, tu, mu516; CHECK-NEXT:    vnmsac.vv v24, v8, v16, v0.t517; CHECK-NEXT:    vmv8r.v v8, v24518; CHECK-NEXT:    ret519  %x = call <vscale x 64 x i8> @llvm.vp.mul.nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b, <vscale x 64 x i1> splat (i1 -1), i32 %evl)520  %y = call <vscale x 64 x i8> @llvm.vp.sub.nxv64i8(<vscale x 64 x i8> %c, <vscale x 64 x i8> %x, <vscale x 64 x i1> splat (i1 -1), i32 %evl)521  %u = call <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1> %m, <vscale x 64 x i8> %y, <vscale x 64 x i8> %c, i32 %evl)522  ret <vscale x 64 x i8> %u523}524 525define <vscale x 64 x i8> @vnmsac_vv_nxv64i8_unmasked(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b, <vscale x 64 x i8> %c,  <vscale x 64 x i1> %m, i32 zeroext %evl) {526; CHECK-LABEL: vnmsac_vv_nxv64i8_unmasked:527; CHECK:       # %bb.0:528; CHECK-NEXT:    vl8r.v v24, (a0)529; CHECK-NEXT:    vsetvli zero, a1, e8, m8, tu, ma530; CHECK-NEXT:    vnmsac.vv v24, v8, v16531; CHECK-NEXT:    vmv8r.v v8, v24532; CHECK-NEXT:    ret533  %x = call <vscale x 64 x i8> @llvm.vp.mul.nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b, <vscale x 64 x i1> splat (i1 -1), i32 %evl)534  %y = call <vscale x 64 x i8> @llvm.vp.sub.nxv64i8(<vscale x 64 x i8> %c, <vscale x 64 x i8> %x, <vscale x 64 x i1> splat (i1 -1), i32 %evl)535  %u = call <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1> splat (i1 -1), <vscale x 64 x i8> %y, <vscale x 64 x i8> %c, i32 %evl)536  ret <vscale x 64 x i8> %u537}538 539define <vscale x 64 x i8> @vnmsac_vx_nxv64i8(<vscale x 64 x i8> %a, i8 %b, <vscale x 64 x i8> %c,  <vscale x 64 x i1> %m, i32 zeroext %evl) {540; CHECK-LABEL: vnmsac_vx_nxv64i8:541; CHECK:       # %bb.0:542; CHECK-NEXT:    vsetvli zero, a1, e8, m8, tu, mu543; CHECK-NEXT:    vnmsac.vx v16, a0, v8, v0.t544; CHECK-NEXT:    vmv8r.v v8, v16545; CHECK-NEXT:    ret546  %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0547  %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer548  %x = call <vscale x 64 x i8> @llvm.vp.mul.nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %vb, <vscale x 64 x i1> splat (i1 -1), i32 %evl)549  %y = call <vscale x 64 x i8> @llvm.vp.sub.nxv64i8(<vscale x 64 x i8> %c, <vscale x 64 x i8> %x, <vscale x 64 x i1> splat (i1 -1), i32 %evl)550  %u = call <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1> %m, <vscale x 64 x i8> %y, <vscale x 64 x i8> %c, i32 %evl)551  ret <vscale x 64 x i8> %u552}553 554define <vscale x 64 x i8> @vnmsac_vx_nxv64i8_unmasked(<vscale x 64 x i8> %a, i8 %b, <vscale x 64 x i8> %c,  <vscale x 64 x i1> %m, i32 zeroext %evl) {555; CHECK-LABEL: vnmsac_vx_nxv64i8_unmasked:556; CHECK:       # %bb.0:557; CHECK-NEXT:    vsetvli zero, a1, e8, m8, tu, ma558; CHECK-NEXT:    vnmsac.vx v16, a0, v8559; CHECK-NEXT:    vmv8r.v v8, v16560; CHECK-NEXT:    ret561  %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0562  %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer563  %x = call <vscale x 64 x i8> @llvm.vp.mul.nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %vb, <vscale x 64 x i1> splat (i1 -1), i32 %evl)564  %y = call <vscale x 64 x i8> @llvm.vp.sub.nxv64i8(<vscale x 64 x i8> %c, <vscale x 64 x i8> %x, <vscale x 64 x i1> splat (i1 -1), i32 %evl)565  %u = call <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1> splat (i1 -1), <vscale x 64 x i8> %y, <vscale x 64 x i8> %c, i32 %evl)566  ret <vscale x 64 x i8> %u567}568 569define <vscale x 64 x i8> @vnmsac_vv_nxv64i8_ta(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b, <vscale x 64 x i8> %c,  <vscale x 64 x i1> %m, i32 zeroext %evl) {570; CHECK-LABEL: vnmsac_vv_nxv64i8_ta:571; CHECK:       # %bb.0:572; CHECK-NEXT:    vl8r.v v24, (a0)573; CHECK-NEXT:    vsetvli zero, a1, e8, m8, ta, mu574; CHECK-NEXT:    vnmsac.vv v24, v8, v16, v0.t575; CHECK-NEXT:    vmv.v.v v8, v24576; CHECK-NEXT:    ret577  %x = call <vscale x 64 x i8> @llvm.vp.mul.nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b, <vscale x 64 x i1> splat (i1 -1), i32 %evl)578  %y = call <vscale x 64 x i8> @llvm.vp.sub.nxv64i8(<vscale x 64 x i8> %c, <vscale x 64 x i8> %x, <vscale x 64 x i1> splat (i1 -1), i32 %evl)579  %u = call <vscale x 64 x i8> @llvm.vp.select.nxv64i8(<vscale x 64 x i1> %m, <vscale x 64 x i8> %y, <vscale x 64 x i8> %c, i32 %evl)580  ret <vscale x 64 x i8> %u581}582 583define <vscale x 64 x i8> @vnmsac_vx_nxv64i8_ta(<vscale x 64 x i8> %a, i8 %b, <vscale x 64 x i8> %c,  <vscale x 64 x i1> %m, i32 zeroext %evl) {584; CHECK-LABEL: vnmsac_vx_nxv64i8_ta:585; CHECK:       # %bb.0:586; CHECK-NEXT:    vsetvli zero, a1, e8, m8, ta, mu587; CHECK-NEXT:    vnmsac.vx v16, a0, v8, v0.t588; CHECK-NEXT:    vmv.v.v v8, v16589; CHECK-NEXT:    ret590  %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0591  %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer592  %x = call <vscale x 64 x i8> @llvm.vp.mul.nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %vb, <vscale x 64 x i1> splat (i1 -1), i32 %evl)593  %y = call <vscale x 64 x i8> @llvm.vp.sub.nxv64i8(<vscale x 64 x i8> %c, <vscale x 64 x i8> %x, <vscale x 64 x i1> splat (i1 -1), i32 %evl)594  %u = call <vscale x 64 x i8> @llvm.vp.select.nxv64i8(<vscale x 64 x i1> %m, <vscale x 64 x i8> %y, <vscale x 64 x i8> %c, i32 %evl)595  ret <vscale x 64 x i8> %u596}597 598define <vscale x 1 x i16> @vnmsac_vv_nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %b, <vscale x 1 x i16> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {599; CHECK-LABEL: vnmsac_vv_nxv1i16:600; CHECK:       # %bb.0:601; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, tu, mu602; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t603; CHECK-NEXT:    vmv1r.v v8, v10604; CHECK-NEXT:    ret605  %x = call <vscale x 1 x i16> @llvm.vp.mul.nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)606  %y = call <vscale x 1 x i16> @llvm.vp.sub.nxv1i16(<vscale x 1 x i16> %c, <vscale x 1 x i16> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)607  %u = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> %m, <vscale x 1 x i16> %y, <vscale x 1 x i16> %c, i32 %evl)608  ret <vscale x 1 x i16> %u609}610 611define <vscale x 1 x i16> @vnmsac_vv_nxv1i16_unmasked(<vscale x 1 x i16> %a, <vscale x 1 x i16> %b, <vscale x 1 x i16> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {612; CHECK-LABEL: vnmsac_vv_nxv1i16_unmasked:613; CHECK:       # %bb.0:614; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, tu, ma615; CHECK-NEXT:    vnmsac.vv v10, v8, v9616; CHECK-NEXT:    vmv1r.v v8, v10617; CHECK-NEXT:    ret618  %x = call <vscale x 1 x i16> @llvm.vp.mul.nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)619  %y = call <vscale x 1 x i16> @llvm.vp.sub.nxv1i16(<vscale x 1 x i16> %c, <vscale x 1 x i16> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)620  %u = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i16> %y, <vscale x 1 x i16> %c, i32 %evl)621  ret <vscale x 1 x i16> %u622}623 624define <vscale x 1 x i16> @vnmsac_vx_nxv1i16(<vscale x 1 x i16> %a, i16 %b, <vscale x 1 x i16> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {625; CHECK-LABEL: vnmsac_vx_nxv1i16:626; CHECK:       # %bb.0:627; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, tu, mu628; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t629; CHECK-NEXT:    vmv1r.v v8, v9630; CHECK-NEXT:    ret631  %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0632  %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer633  %x = call <vscale x 1 x i16> @llvm.vp.mul.nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)634  %y = call <vscale x 1 x i16> @llvm.vp.sub.nxv1i16(<vscale x 1 x i16> %c, <vscale x 1 x i16> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)635  %u = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> %m, <vscale x 1 x i16> %y, <vscale x 1 x i16> %c, i32 %evl)636  ret <vscale x 1 x i16> %u637}638 639define <vscale x 1 x i16> @vnmsac_vx_nxv1i16_unmasked(<vscale x 1 x i16> %a, i16 %b, <vscale x 1 x i16> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {640; CHECK-LABEL: vnmsac_vx_nxv1i16_unmasked:641; CHECK:       # %bb.0:642; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, tu, ma643; CHECK-NEXT:    vnmsac.vx v9, a0, v8644; CHECK-NEXT:    vmv1r.v v8, v9645; CHECK-NEXT:    ret646  %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0647  %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer648  %x = call <vscale x 1 x i16> @llvm.vp.mul.nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)649  %y = call <vscale x 1 x i16> @llvm.vp.sub.nxv1i16(<vscale x 1 x i16> %c, <vscale x 1 x i16> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)650  %u = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i16> %y, <vscale x 1 x i16> %c, i32 %evl)651  ret <vscale x 1 x i16> %u652}653 654define <vscale x 1 x i16> @vnmsac_vv_nxv1i16_ta(<vscale x 1 x i16> %a, <vscale x 1 x i16> %b, <vscale x 1 x i16> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {655; CHECK-LABEL: vnmsac_vv_nxv1i16_ta:656; CHECK:       # %bb.0:657; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, mu658; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t659; CHECK-NEXT:    vmv1r.v v8, v10660; CHECK-NEXT:    ret661  %x = call <vscale x 1 x i16> @llvm.vp.mul.nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)662  %y = call <vscale x 1 x i16> @llvm.vp.sub.nxv1i16(<vscale x 1 x i16> %c, <vscale x 1 x i16> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)663  %u = call <vscale x 1 x i16> @llvm.vp.select.nxv1i16(<vscale x 1 x i1> %m, <vscale x 1 x i16> %y, <vscale x 1 x i16> %c, i32 %evl)664  ret <vscale x 1 x i16> %u665}666 667define <vscale x 1 x i16> @vnmsac_vx_nxv1i16_ta(<vscale x 1 x i16> %a, i16 %b, <vscale x 1 x i16> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {668; CHECK-LABEL: vnmsac_vx_nxv1i16_ta:669; CHECK:       # %bb.0:670; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, mu671; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t672; CHECK-NEXT:    vmv1r.v v8, v9673; CHECK-NEXT:    ret674  %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0675  %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer676  %x = call <vscale x 1 x i16> @llvm.vp.mul.nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)677  %y = call <vscale x 1 x i16> @llvm.vp.sub.nxv1i16(<vscale x 1 x i16> %c, <vscale x 1 x i16> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)678  %u = call <vscale x 1 x i16> @llvm.vp.select.nxv1i16(<vscale x 1 x i1> %m, <vscale x 1 x i16> %y, <vscale x 1 x i16> %c, i32 %evl)679  ret <vscale x 1 x i16> %u680}681 682define <vscale x 2 x i16> @vnmsac_vv_nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, <vscale x 2 x i16> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {683; CHECK-LABEL: vnmsac_vv_nxv2i16:684; CHECK:       # %bb.0:685; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, tu, mu686; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t687; CHECK-NEXT:    vmv1r.v v8, v10688; CHECK-NEXT:    ret689  %x = call <vscale x 2 x i16> @llvm.vp.mul.nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)690  %y = call <vscale x 2 x i16> @llvm.vp.sub.nxv2i16(<vscale x 2 x i16> %c, <vscale x 2 x i16> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)691  %u = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> %m, <vscale x 2 x i16> %y, <vscale x 2 x i16> %c, i32 %evl)692  ret <vscale x 2 x i16> %u693}694 695define <vscale x 2 x i16> @vnmsac_vv_nxv2i16_unmasked(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, <vscale x 2 x i16> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {696; CHECK-LABEL: vnmsac_vv_nxv2i16_unmasked:697; CHECK:       # %bb.0:698; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, tu, ma699; CHECK-NEXT:    vnmsac.vv v10, v8, v9700; CHECK-NEXT:    vmv1r.v v8, v10701; CHECK-NEXT:    ret702  %x = call <vscale x 2 x i16> @llvm.vp.mul.nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)703  %y = call <vscale x 2 x i16> @llvm.vp.sub.nxv2i16(<vscale x 2 x i16> %c, <vscale x 2 x i16> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)704  %u = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i16> %y, <vscale x 2 x i16> %c, i32 %evl)705  ret <vscale x 2 x i16> %u706}707 708define <vscale x 2 x i16> @vnmsac_vx_nxv2i16(<vscale x 2 x i16> %a, i16 %b, <vscale x 2 x i16> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {709; CHECK-LABEL: vnmsac_vx_nxv2i16:710; CHECK:       # %bb.0:711; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, tu, mu712; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t713; CHECK-NEXT:    vmv1r.v v8, v9714; CHECK-NEXT:    ret715  %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0716  %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer717  %x = call <vscale x 2 x i16> @llvm.vp.mul.nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)718  %y = call <vscale x 2 x i16> @llvm.vp.sub.nxv2i16(<vscale x 2 x i16> %c, <vscale x 2 x i16> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)719  %u = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> %m, <vscale x 2 x i16> %y, <vscale x 2 x i16> %c, i32 %evl)720  ret <vscale x 2 x i16> %u721}722 723define <vscale x 2 x i16> @vnmsac_vx_nxv2i16_unmasked(<vscale x 2 x i16> %a, i16 %b, <vscale x 2 x i16> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {724; CHECK-LABEL: vnmsac_vx_nxv2i16_unmasked:725; CHECK:       # %bb.0:726; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, tu, ma727; CHECK-NEXT:    vnmsac.vx v9, a0, v8728; CHECK-NEXT:    vmv1r.v v8, v9729; CHECK-NEXT:    ret730  %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0731  %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer732  %x = call <vscale x 2 x i16> @llvm.vp.mul.nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)733  %y = call <vscale x 2 x i16> @llvm.vp.sub.nxv2i16(<vscale x 2 x i16> %c, <vscale x 2 x i16> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)734  %u = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i16> %y, <vscale x 2 x i16> %c, i32 %evl)735  ret <vscale x 2 x i16> %u736}737 738define <vscale x 2 x i16> @vnmsac_vv_nxv2i16_ta(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, <vscale x 2 x i16> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {739; CHECK-LABEL: vnmsac_vv_nxv2i16_ta:740; CHECK:       # %bb.0:741; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, mu742; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t743; CHECK-NEXT:    vmv1r.v v8, v10744; CHECK-NEXT:    ret745  %x = call <vscale x 2 x i16> @llvm.vp.mul.nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)746  %y = call <vscale x 2 x i16> @llvm.vp.sub.nxv2i16(<vscale x 2 x i16> %c, <vscale x 2 x i16> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)747  %u = call <vscale x 2 x i16> @llvm.vp.select.nxv2i16(<vscale x 2 x i1> %m, <vscale x 2 x i16> %y, <vscale x 2 x i16> %c, i32 %evl)748  ret <vscale x 2 x i16> %u749}750 751define <vscale x 2 x i16> @vnmsac_vx_nxv2i16_ta(<vscale x 2 x i16> %a, i16 %b, <vscale x 2 x i16> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {752; CHECK-LABEL: vnmsac_vx_nxv2i16_ta:753; CHECK:       # %bb.0:754; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, mu755; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t756; CHECK-NEXT:    vmv1r.v v8, v9757; CHECK-NEXT:    ret758  %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0759  %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer760  %x = call <vscale x 2 x i16> @llvm.vp.mul.nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)761  %y = call <vscale x 2 x i16> @llvm.vp.sub.nxv2i16(<vscale x 2 x i16> %c, <vscale x 2 x i16> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)762  %u = call <vscale x 2 x i16> @llvm.vp.select.nxv2i16(<vscale x 2 x i1> %m, <vscale x 2 x i16> %y, <vscale x 2 x i16> %c, i32 %evl)763  ret <vscale x 2 x i16> %u764}765 766define <vscale x 4 x i16> @vnmsac_vv_nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b, <vscale x 4 x i16> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {767; CHECK-LABEL: vnmsac_vv_nxv4i16:768; CHECK:       # %bb.0:769; CHECK-NEXT:    vsetvli zero, a0, e16, m1, tu, mu770; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t771; CHECK-NEXT:    vmv1r.v v8, v10772; CHECK-NEXT:    ret773  %x = call <vscale x 4 x i16> @llvm.vp.mul.nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)774  %y = call <vscale x 4 x i16> @llvm.vp.sub.nxv4i16(<vscale x 4 x i16> %c, <vscale x 4 x i16> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)775  %u = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> %m, <vscale x 4 x i16> %y, <vscale x 4 x i16> %c, i32 %evl)776  ret <vscale x 4 x i16> %u777}778 779define <vscale x 4 x i16> @vnmsac_vv_nxv4i16_unmasked(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b, <vscale x 4 x i16> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {780; CHECK-LABEL: vnmsac_vv_nxv4i16_unmasked:781; CHECK:       # %bb.0:782; CHECK-NEXT:    vsetvli zero, a0, e16, m1, tu, ma783; CHECK-NEXT:    vnmsac.vv v10, v8, v9784; CHECK-NEXT:    vmv1r.v v8, v10785; CHECK-NEXT:    ret786  %x = call <vscale x 4 x i16> @llvm.vp.mul.nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)787  %y = call <vscale x 4 x i16> @llvm.vp.sub.nxv4i16(<vscale x 4 x i16> %c, <vscale x 4 x i16> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)788  %u = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i16> %y, <vscale x 4 x i16> %c, i32 %evl)789  ret <vscale x 4 x i16> %u790}791 792define <vscale x 4 x i16> @vnmsac_vx_nxv4i16(<vscale x 4 x i16> %a, i16 %b, <vscale x 4 x i16> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {793; CHECK-LABEL: vnmsac_vx_nxv4i16:794; CHECK:       # %bb.0:795; CHECK-NEXT:    vsetvli zero, a1, e16, m1, tu, mu796; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t797; CHECK-NEXT:    vmv1r.v v8, v9798; CHECK-NEXT:    ret799  %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0800  %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer801  %x = call <vscale x 4 x i16> @llvm.vp.mul.nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)802  %y = call <vscale x 4 x i16> @llvm.vp.sub.nxv4i16(<vscale x 4 x i16> %c, <vscale x 4 x i16> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)803  %u = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> %m, <vscale x 4 x i16> %y, <vscale x 4 x i16> %c, i32 %evl)804  ret <vscale x 4 x i16> %u805}806 807define <vscale x 4 x i16> @vnmsac_vx_nxv4i16_unmasked(<vscale x 4 x i16> %a, i16 %b, <vscale x 4 x i16> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {808; CHECK-LABEL: vnmsac_vx_nxv4i16_unmasked:809; CHECK:       # %bb.0:810; CHECK-NEXT:    vsetvli zero, a1, e16, m1, tu, ma811; CHECK-NEXT:    vnmsac.vx v9, a0, v8812; CHECK-NEXT:    vmv1r.v v8, v9813; CHECK-NEXT:    ret814  %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0815  %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer816  %x = call <vscale x 4 x i16> @llvm.vp.mul.nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)817  %y = call <vscale x 4 x i16> @llvm.vp.sub.nxv4i16(<vscale x 4 x i16> %c, <vscale x 4 x i16> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)818  %u = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i16> %y, <vscale x 4 x i16> %c, i32 %evl)819  ret <vscale x 4 x i16> %u820}821 822define <vscale x 4 x i16> @vnmsac_vv_nxv4i16_ta(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b, <vscale x 4 x i16> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {823; CHECK-LABEL: vnmsac_vv_nxv4i16_ta:824; CHECK:       # %bb.0:825; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, mu826; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t827; CHECK-NEXT:    vmv.v.v v8, v10828; CHECK-NEXT:    ret829  %x = call <vscale x 4 x i16> @llvm.vp.mul.nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)830  %y = call <vscale x 4 x i16> @llvm.vp.sub.nxv4i16(<vscale x 4 x i16> %c, <vscale x 4 x i16> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)831  %u = call <vscale x 4 x i16> @llvm.vp.select.nxv4i16(<vscale x 4 x i1> %m, <vscale x 4 x i16> %y, <vscale x 4 x i16> %c, i32 %evl)832  ret <vscale x 4 x i16> %u833}834 835define <vscale x 4 x i16> @vnmsac_vx_nxv4i16_ta(<vscale x 4 x i16> %a, i16 %b, <vscale x 4 x i16> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {836; CHECK-LABEL: vnmsac_vx_nxv4i16_ta:837; CHECK:       # %bb.0:838; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, mu839; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t840; CHECK-NEXT:    vmv.v.v v8, v9841; CHECK-NEXT:    ret842  %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0843  %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer844  %x = call <vscale x 4 x i16> @llvm.vp.mul.nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)845  %y = call <vscale x 4 x i16> @llvm.vp.sub.nxv4i16(<vscale x 4 x i16> %c, <vscale x 4 x i16> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)846  %u = call <vscale x 4 x i16> @llvm.vp.select.nxv4i16(<vscale x 4 x i1> %m, <vscale x 4 x i16> %y, <vscale x 4 x i16> %c, i32 %evl)847  ret <vscale x 4 x i16> %u848}849 850define <vscale x 8 x i16> @vnmsac_vv_nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b, <vscale x 8 x i16> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {851; CHECK-LABEL: vnmsac_vv_nxv8i16:852; CHECK:       # %bb.0:853; CHECK-NEXT:    vsetvli zero, a0, e16, m2, tu, mu854; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t855; CHECK-NEXT:    vmv2r.v v8, v12856; CHECK-NEXT:    ret857  %x = call <vscale x 8 x i16> @llvm.vp.mul.nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)858  %y = call <vscale x 8 x i16> @llvm.vp.sub.nxv8i16(<vscale x 8 x i16> %c, <vscale x 8 x i16> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)859  %u = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> %m, <vscale x 8 x i16> %y, <vscale x 8 x i16> %c, i32 %evl)860  ret <vscale x 8 x i16> %u861}862 863define <vscale x 8 x i16> @vnmsac_vv_nxv8i16_unmasked(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b, <vscale x 8 x i16> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {864; CHECK-LABEL: vnmsac_vv_nxv8i16_unmasked:865; CHECK:       # %bb.0:866; CHECK-NEXT:    vsetvli zero, a0, e16, m2, tu, ma867; CHECK-NEXT:    vnmsac.vv v12, v8, v10868; CHECK-NEXT:    vmv2r.v v8, v12869; CHECK-NEXT:    ret870  %x = call <vscale x 8 x i16> @llvm.vp.mul.nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)871  %y = call <vscale x 8 x i16> @llvm.vp.sub.nxv8i16(<vscale x 8 x i16> %c, <vscale x 8 x i16> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)872  %u = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i16> %y, <vscale x 8 x i16> %c, i32 %evl)873  ret <vscale x 8 x i16> %u874}875 876define <vscale x 8 x i16> @vnmsac_vx_nxv8i16(<vscale x 8 x i16> %a, i16 %b, <vscale x 8 x i16> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {877; CHECK-LABEL: vnmsac_vx_nxv8i16:878; CHECK:       # %bb.0:879; CHECK-NEXT:    vsetvli zero, a1, e16, m2, tu, mu880; CHECK-NEXT:    vnmsac.vx v10, a0, v8, v0.t881; CHECK-NEXT:    vmv2r.v v8, v10882; CHECK-NEXT:    ret883  %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0884  %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer885  %x = call <vscale x 8 x i16> @llvm.vp.mul.nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)886  %y = call <vscale x 8 x i16> @llvm.vp.sub.nxv8i16(<vscale x 8 x i16> %c, <vscale x 8 x i16> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)887  %u = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> %m, <vscale x 8 x i16> %y, <vscale x 8 x i16> %c, i32 %evl)888  ret <vscale x 8 x i16> %u889}890 891define <vscale x 8 x i16> @vnmsac_vx_nxv8i16_unmasked(<vscale x 8 x i16> %a, i16 %b, <vscale x 8 x i16> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {892; CHECK-LABEL: vnmsac_vx_nxv8i16_unmasked:893; CHECK:       # %bb.0:894; CHECK-NEXT:    vsetvli zero, a1, e16, m2, tu, ma895; CHECK-NEXT:    vnmsac.vx v10, a0, v8896; CHECK-NEXT:    vmv2r.v v8, v10897; CHECK-NEXT:    ret898  %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0899  %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer900  %x = call <vscale x 8 x i16> @llvm.vp.mul.nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)901  %y = call <vscale x 8 x i16> @llvm.vp.sub.nxv8i16(<vscale x 8 x i16> %c, <vscale x 8 x i16> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)902  %u = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i16> %y, <vscale x 8 x i16> %c, i32 %evl)903  ret <vscale x 8 x i16> %u904}905 906define <vscale x 8 x i16> @vnmsac_vv_nxv8i16_ta(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b, <vscale x 8 x i16> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {907; CHECK-LABEL: vnmsac_vv_nxv8i16_ta:908; CHECK:       # %bb.0:909; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, mu910; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t911; CHECK-NEXT:    vmv.v.v v8, v12912; CHECK-NEXT:    ret913  %x = call <vscale x 8 x i16> @llvm.vp.mul.nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)914  %y = call <vscale x 8 x i16> @llvm.vp.sub.nxv8i16(<vscale x 8 x i16> %c, <vscale x 8 x i16> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)915  %u = call <vscale x 8 x i16> @llvm.vp.select.nxv8i16(<vscale x 8 x i1> %m, <vscale x 8 x i16> %y, <vscale x 8 x i16> %c, i32 %evl)916  ret <vscale x 8 x i16> %u917}918 919define <vscale x 8 x i16> @vnmsac_vx_nxv8i16_ta(<vscale x 8 x i16> %a, i16 %b, <vscale x 8 x i16> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {920; CHECK-LABEL: vnmsac_vx_nxv8i16_ta:921; CHECK:       # %bb.0:922; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, mu923; CHECK-NEXT:    vnmsac.vx v10, a0, v8, v0.t924; CHECK-NEXT:    vmv.v.v v8, v10925; CHECK-NEXT:    ret926  %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0927  %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer928  %x = call <vscale x 8 x i16> @llvm.vp.mul.nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)929  %y = call <vscale x 8 x i16> @llvm.vp.sub.nxv8i16(<vscale x 8 x i16> %c, <vscale x 8 x i16> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)930  %u = call <vscale x 8 x i16> @llvm.vp.select.nxv8i16(<vscale x 8 x i1> %m, <vscale x 8 x i16> %y, <vscale x 8 x i16> %c, i32 %evl)931  ret <vscale x 8 x i16> %u932}933 934define <vscale x 16 x i16> @vnmsac_vv_nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %b, <vscale x 16 x i16> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {935; CHECK-LABEL: vnmsac_vv_nxv16i16:936; CHECK:       # %bb.0:937; CHECK-NEXT:    vsetvli zero, a0, e16, m4, tu, mu938; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t939; CHECK-NEXT:    vmv4r.v v8, v16940; CHECK-NEXT:    ret941  %x = call <vscale x 16 x i16> @llvm.vp.mul.nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)942  %y = call <vscale x 16 x i16> @llvm.vp.sub.nxv16i16(<vscale x 16 x i16> %c, <vscale x 16 x i16> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)943  %u = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> %m, <vscale x 16 x i16> %y, <vscale x 16 x i16> %c, i32 %evl)944  ret <vscale x 16 x i16> %u945}946 947define <vscale x 16 x i16> @vnmsac_vv_nxv16i16_unmasked(<vscale x 16 x i16> %a, <vscale x 16 x i16> %b, <vscale x 16 x i16> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {948; CHECK-LABEL: vnmsac_vv_nxv16i16_unmasked:949; CHECK:       # %bb.0:950; CHECK-NEXT:    vsetvli zero, a0, e16, m4, tu, ma951; CHECK-NEXT:    vnmsac.vv v16, v8, v12952; CHECK-NEXT:    vmv4r.v v8, v16953; CHECK-NEXT:    ret954  %x = call <vscale x 16 x i16> @llvm.vp.mul.nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)955  %y = call <vscale x 16 x i16> @llvm.vp.sub.nxv16i16(<vscale x 16 x i16> %c, <vscale x 16 x i16> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)956  %u = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> splat (i1 -1), <vscale x 16 x i16> %y, <vscale x 16 x i16> %c, i32 %evl)957  ret <vscale x 16 x i16> %u958}959 960define <vscale x 16 x i16> @vnmsac_vx_nxv16i16(<vscale x 16 x i16> %a, i16 %b, <vscale x 16 x i16> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {961; CHECK-LABEL: vnmsac_vx_nxv16i16:962; CHECK:       # %bb.0:963; CHECK-NEXT:    vsetvli zero, a1, e16, m4, tu, mu964; CHECK-NEXT:    vnmsac.vx v12, a0, v8, v0.t965; CHECK-NEXT:    vmv4r.v v8, v12966; CHECK-NEXT:    ret967  %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0968  %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer969  %x = call <vscale x 16 x i16> @llvm.vp.mul.nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)970  %y = call <vscale x 16 x i16> @llvm.vp.sub.nxv16i16(<vscale x 16 x i16> %c, <vscale x 16 x i16> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)971  %u = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> %m, <vscale x 16 x i16> %y, <vscale x 16 x i16> %c, i32 %evl)972  ret <vscale x 16 x i16> %u973}974 975define <vscale x 16 x i16> @vnmsac_vx_nxv16i16_unmasked(<vscale x 16 x i16> %a, i16 %b, <vscale x 16 x i16> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {976; CHECK-LABEL: vnmsac_vx_nxv16i16_unmasked:977; CHECK:       # %bb.0:978; CHECK-NEXT:    vsetvli zero, a1, e16, m4, tu, ma979; CHECK-NEXT:    vnmsac.vx v12, a0, v8980; CHECK-NEXT:    vmv4r.v v8, v12981; CHECK-NEXT:    ret982  %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0983  %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer984  %x = call <vscale x 16 x i16> @llvm.vp.mul.nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)985  %y = call <vscale x 16 x i16> @llvm.vp.sub.nxv16i16(<vscale x 16 x i16> %c, <vscale x 16 x i16> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)986  %u = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> splat (i1 -1), <vscale x 16 x i16> %y, <vscale x 16 x i16> %c, i32 %evl)987  ret <vscale x 16 x i16> %u988}989 990define <vscale x 16 x i16> @vnmsac_vv_nxv16i16_ta(<vscale x 16 x i16> %a, <vscale x 16 x i16> %b, <vscale x 16 x i16> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {991; CHECK-LABEL: vnmsac_vv_nxv16i16_ta:992; CHECK:       # %bb.0:993; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, mu994; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t995; CHECK-NEXT:    vmv.v.v v8, v16996; CHECK-NEXT:    ret997  %x = call <vscale x 16 x i16> @llvm.vp.mul.nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)998  %y = call <vscale x 16 x i16> @llvm.vp.sub.nxv16i16(<vscale x 16 x i16> %c, <vscale x 16 x i16> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)999  %u = call <vscale x 16 x i16> @llvm.vp.select.nxv16i16(<vscale x 16 x i1> %m, <vscale x 16 x i16> %y, <vscale x 16 x i16> %c, i32 %evl)1000  ret <vscale x 16 x i16> %u1001}1002 1003define <vscale x 16 x i16> @vnmsac_vx_nxv16i16_ta(<vscale x 16 x i16> %a, i16 %b, <vscale x 16 x i16> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {1004; CHECK-LABEL: vnmsac_vx_nxv16i16_ta:1005; CHECK:       # %bb.0:1006; CHECK-NEXT:    vsetvli zero, a1, e16, m4, ta, mu1007; CHECK-NEXT:    vnmsac.vx v12, a0, v8, v0.t1008; CHECK-NEXT:    vmv.v.v v8, v121009; CHECK-NEXT:    ret1010  %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 01011  %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer1012  %x = call <vscale x 16 x i16> @llvm.vp.mul.nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1013  %y = call <vscale x 16 x i16> @llvm.vp.sub.nxv16i16(<vscale x 16 x i16> %c, <vscale x 16 x i16> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1014  %u = call <vscale x 16 x i16> @llvm.vp.select.nxv16i16(<vscale x 16 x i1> %m, <vscale x 16 x i16> %y, <vscale x 16 x i16> %c, i32 %evl)1015  ret <vscale x 16 x i16> %u1016}1017 1018define <vscale x 32 x i16> @vnmsac_vv_nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b, <vscale x 32 x i16> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {1019; CHECK-LABEL: vnmsac_vv_nxv32i16:1020; CHECK:       # %bb.0:1021; CHECK-NEXT:    vl8re16.v v24, (a0)1022; CHECK-NEXT:    vsetvli zero, a1, e16, m8, tu, mu1023; CHECK-NEXT:    vnmsac.vv v24, v8, v16, v0.t1024; CHECK-NEXT:    vmv8r.v v8, v241025; CHECK-NEXT:    ret1026  %x = call <vscale x 32 x i16> @llvm.vp.mul.nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1027  %y = call <vscale x 32 x i16> @llvm.vp.sub.nxv32i16(<vscale x 32 x i16> %c, <vscale x 32 x i16> %x, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1028  %u = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> %m, <vscale x 32 x i16> %y, <vscale x 32 x i16> %c, i32 %evl)1029  ret <vscale x 32 x i16> %u1030}1031 1032define <vscale x 32 x i16> @vnmsac_vv_nxv32i16_unmasked(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b, <vscale x 32 x i16> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {1033; CHECK-LABEL: vnmsac_vv_nxv32i16_unmasked:1034; CHECK:       # %bb.0:1035; CHECK-NEXT:    vl8re16.v v24, (a0)1036; CHECK-NEXT:    vsetvli zero, a1, e16, m8, tu, ma1037; CHECK-NEXT:    vnmsac.vv v24, v8, v161038; CHECK-NEXT:    vmv8r.v v8, v241039; CHECK-NEXT:    ret1040  %x = call <vscale x 32 x i16> @llvm.vp.mul.nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1041  %y = call <vscale x 32 x i16> @llvm.vp.sub.nxv32i16(<vscale x 32 x i16> %c, <vscale x 32 x i16> %x, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1042  %u = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> splat (i1 -1), <vscale x 32 x i16> %y, <vscale x 32 x i16> %c, i32 %evl)1043  ret <vscale x 32 x i16> %u1044}1045 1046define <vscale x 32 x i16> @vnmsac_vx_nxv32i16(<vscale x 32 x i16> %a, i16 %b, <vscale x 32 x i16> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {1047; CHECK-LABEL: vnmsac_vx_nxv32i16:1048; CHECK:       # %bb.0:1049; CHECK-NEXT:    vsetvli zero, a1, e16, m8, tu, mu1050; CHECK-NEXT:    vnmsac.vx v16, a0, v8, v0.t1051; CHECK-NEXT:    vmv8r.v v8, v161052; CHECK-NEXT:    ret1053  %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 01054  %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer1055  %x = call <vscale x 32 x i16> @llvm.vp.mul.nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %vb, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1056  %y = call <vscale x 32 x i16> @llvm.vp.sub.nxv32i16(<vscale x 32 x i16> %c, <vscale x 32 x i16> %x, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1057  %u = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> %m, <vscale x 32 x i16> %y, <vscale x 32 x i16> %c, i32 %evl)1058  ret <vscale x 32 x i16> %u1059}1060 1061define <vscale x 32 x i16> @vnmsac_vx_nxv32i16_unmasked(<vscale x 32 x i16> %a, i16 %b, <vscale x 32 x i16> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {1062; CHECK-LABEL: vnmsac_vx_nxv32i16_unmasked:1063; CHECK:       # %bb.0:1064; CHECK-NEXT:    vsetvli zero, a1, e16, m8, tu, ma1065; CHECK-NEXT:    vnmsac.vx v16, a0, v81066; CHECK-NEXT:    vmv8r.v v8, v161067; CHECK-NEXT:    ret1068  %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 01069  %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer1070  %x = call <vscale x 32 x i16> @llvm.vp.mul.nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %vb, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1071  %y = call <vscale x 32 x i16> @llvm.vp.sub.nxv32i16(<vscale x 32 x i16> %c, <vscale x 32 x i16> %x, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1072  %u = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> splat (i1 -1), <vscale x 32 x i16> %y, <vscale x 32 x i16> %c, i32 %evl)1073  ret <vscale x 32 x i16> %u1074}1075 1076define <vscale x 32 x i16> @vnmsac_vv_nxv32i16_ta(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b, <vscale x 32 x i16> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {1077; CHECK-LABEL: vnmsac_vv_nxv32i16_ta:1078; CHECK:       # %bb.0:1079; CHECK-NEXT:    vl8re16.v v24, (a0)1080; CHECK-NEXT:    vsetvli zero, a1, e16, m8, ta, mu1081; CHECK-NEXT:    vnmsac.vv v24, v8, v16, v0.t1082; CHECK-NEXT:    vmv.v.v v8, v241083; CHECK-NEXT:    ret1084  %x = call <vscale x 32 x i16> @llvm.vp.mul.nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1085  %y = call <vscale x 32 x i16> @llvm.vp.sub.nxv32i16(<vscale x 32 x i16> %c, <vscale x 32 x i16> %x, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1086  %u = call <vscale x 32 x i16> @llvm.vp.select.nxv32i16(<vscale x 32 x i1> %m, <vscale x 32 x i16> %y, <vscale x 32 x i16> %c, i32 %evl)1087  ret <vscale x 32 x i16> %u1088}1089 1090define <vscale x 32 x i16> @vnmsac_vx_nxv32i16_ta(<vscale x 32 x i16> %a, i16 %b, <vscale x 32 x i16> %c,  <vscale x 32 x i1> %m, i32 zeroext %evl) {1091; CHECK-LABEL: vnmsac_vx_nxv32i16_ta:1092; CHECK:       # %bb.0:1093; CHECK-NEXT:    vsetvli zero, a1, e16, m8, ta, mu1094; CHECK-NEXT:    vnmsac.vx v16, a0, v8, v0.t1095; CHECK-NEXT:    vmv.v.v v8, v161096; CHECK-NEXT:    ret1097  %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 01098  %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer1099  %x = call <vscale x 32 x i16> @llvm.vp.mul.nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %vb, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1100  %y = call <vscale x 32 x i16> @llvm.vp.sub.nxv32i16(<vscale x 32 x i16> %c, <vscale x 32 x i16> %x, <vscale x 32 x i1> splat (i1 -1), i32 %evl)1101  %u = call <vscale x 32 x i16> @llvm.vp.select.nxv32i16(<vscale x 32 x i1> %m, <vscale x 32 x i16> %y, <vscale x 32 x i16> %c, i32 %evl)1102  ret <vscale x 32 x i16> %u1103}1104 1105define <vscale x 1 x i32> @vnmsac_vv_nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i32> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1106; CHECK-LABEL: vnmsac_vv_nxv1i32:1107; CHECK:       # %bb.0:1108; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, tu, mu1109; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t1110; CHECK-NEXT:    vmv1r.v v8, v101111; CHECK-NEXT:    ret1112  %x = call <vscale x 1 x i32> @llvm.vp.mul.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1113  %y = call <vscale x 1 x i32> @llvm.vp.sub.nxv1i32(<vscale x 1 x i32> %c, <vscale x 1 x i32> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1114  %u = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> %m, <vscale x 1 x i32> %y, <vscale x 1 x i32> %c, i32 %evl)1115  ret <vscale x 1 x i32> %u1116}1117 1118define <vscale x 1 x i32> @vnmsac_vv_nxv1i32_unmasked(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i32> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1119; CHECK-LABEL: vnmsac_vv_nxv1i32_unmasked:1120; CHECK:       # %bb.0:1121; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, tu, ma1122; CHECK-NEXT:    vnmsac.vv v10, v8, v91123; CHECK-NEXT:    vmv1r.v v8, v101124; CHECK-NEXT:    ret1125  %x = call <vscale x 1 x i32> @llvm.vp.mul.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1126  %y = call <vscale x 1 x i32> @llvm.vp.sub.nxv1i32(<vscale x 1 x i32> %c, <vscale x 1 x i32> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1127  %u = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i32> %y, <vscale x 1 x i32> %c, i32 %evl)1128  ret <vscale x 1 x i32> %u1129}1130 1131define <vscale x 1 x i32> @vnmsac_vx_nxv1i32(<vscale x 1 x i32> %a, i32 %b, <vscale x 1 x i32> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1132; CHECK-LABEL: vnmsac_vx_nxv1i32:1133; CHECK:       # %bb.0:1134; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, tu, mu1135; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t1136; CHECK-NEXT:    vmv1r.v v8, v91137; CHECK-NEXT:    ret1138  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01139  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1140  %x = call <vscale x 1 x i32> @llvm.vp.mul.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1141  %y = call <vscale x 1 x i32> @llvm.vp.sub.nxv1i32(<vscale x 1 x i32> %c, <vscale x 1 x i32> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1142  %u = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> %m, <vscale x 1 x i32> %y, <vscale x 1 x i32> %c, i32 %evl)1143  ret <vscale x 1 x i32> %u1144}1145 1146define <vscale x 1 x i32> @vnmsac_vx_nxv1i32_unmasked(<vscale x 1 x i32> %a, i32 %b, <vscale x 1 x i32> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1147; CHECK-LABEL: vnmsac_vx_nxv1i32_unmasked:1148; CHECK:       # %bb.0:1149; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, tu, ma1150; CHECK-NEXT:    vnmsac.vx v9, a0, v81151; CHECK-NEXT:    vmv1r.v v8, v91152; CHECK-NEXT:    ret1153  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01154  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1155  %x = call <vscale x 1 x i32> @llvm.vp.mul.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1156  %y = call <vscale x 1 x i32> @llvm.vp.sub.nxv1i32(<vscale x 1 x i32> %c, <vscale x 1 x i32> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1157  %u = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i32> %y, <vscale x 1 x i32> %c, i32 %evl)1158  ret <vscale x 1 x i32> %u1159}1160 1161define <vscale x 1 x i32> @vnmsac_vv_nxv1i32_ta(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i32> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1162; CHECK-LABEL: vnmsac_vv_nxv1i32_ta:1163; CHECK:       # %bb.0:1164; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, mu1165; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t1166; CHECK-NEXT:    vmv1r.v v8, v101167; CHECK-NEXT:    ret1168  %x = call <vscale x 1 x i32> @llvm.vp.mul.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1169  %y = call <vscale x 1 x i32> @llvm.vp.sub.nxv1i32(<vscale x 1 x i32> %c, <vscale x 1 x i32> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1170  %u = call <vscale x 1 x i32> @llvm.vp.select.nxv1i32(<vscale x 1 x i1> %m, <vscale x 1 x i32> %y, <vscale x 1 x i32> %c, i32 %evl)1171  ret <vscale x 1 x i32> %u1172}1173 1174define <vscale x 1 x i32> @vnmsac_vx_nxv1i32_ta(<vscale x 1 x i32> %a, i32 %b, <vscale x 1 x i32> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1175; CHECK-LABEL: vnmsac_vx_nxv1i32_ta:1176; CHECK:       # %bb.0:1177; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, mu1178; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t1179; CHECK-NEXT:    vmv1r.v v8, v91180; CHECK-NEXT:    ret1181  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01182  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1183  %x = call <vscale x 1 x i32> @llvm.vp.mul.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1184  %y = call <vscale x 1 x i32> @llvm.vp.sub.nxv1i32(<vscale x 1 x i32> %c, <vscale x 1 x i32> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1185  %u = call <vscale x 1 x i32> @llvm.vp.select.nxv1i32(<vscale x 1 x i1> %m, <vscale x 1 x i32> %y, <vscale x 1 x i32> %c, i32 %evl)1186  ret <vscale x 1 x i32> %u1187}1188 1189define <vscale x 2 x i32> @vnmsac_vv_nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b, <vscale x 2 x i32> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1190; CHECK-LABEL: vnmsac_vv_nxv2i32:1191; CHECK:       # %bb.0:1192; CHECK-NEXT:    vsetvli zero, a0, e32, m1, tu, mu1193; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t1194; CHECK-NEXT:    vmv1r.v v8, v101195; CHECK-NEXT:    ret1196  %x = call <vscale x 2 x i32> @llvm.vp.mul.nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1197  %y = call <vscale x 2 x i32> @llvm.vp.sub.nxv2i32(<vscale x 2 x i32> %c, <vscale x 2 x i32> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1198  %u = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> %m, <vscale x 2 x i32> %y, <vscale x 2 x i32> %c, i32 %evl)1199  ret <vscale x 2 x i32> %u1200}1201 1202define <vscale x 2 x i32> @vnmsac_vv_nxv2i32_unmasked(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b, <vscale x 2 x i32> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1203; CHECK-LABEL: vnmsac_vv_nxv2i32_unmasked:1204; CHECK:       # %bb.0:1205; CHECK-NEXT:    vsetvli zero, a0, e32, m1, tu, ma1206; CHECK-NEXT:    vnmsac.vv v10, v8, v91207; CHECK-NEXT:    vmv1r.v v8, v101208; CHECK-NEXT:    ret1209  %x = call <vscale x 2 x i32> @llvm.vp.mul.nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1210  %y = call <vscale x 2 x i32> @llvm.vp.sub.nxv2i32(<vscale x 2 x i32> %c, <vscale x 2 x i32> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1211  %u = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i32> %y, <vscale x 2 x i32> %c, i32 %evl)1212  ret <vscale x 2 x i32> %u1213}1214 1215define <vscale x 2 x i32> @vnmsac_vx_nxv2i32(<vscale x 2 x i32> %a, i32 %b, <vscale x 2 x i32> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1216; CHECK-LABEL: vnmsac_vx_nxv2i32:1217; CHECK:       # %bb.0:1218; CHECK-NEXT:    vsetvli zero, a1, e32, m1, tu, mu1219; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t1220; CHECK-NEXT:    vmv1r.v v8, v91221; CHECK-NEXT:    ret1222  %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 01223  %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer1224  %x = call <vscale x 2 x i32> @llvm.vp.mul.nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1225  %y = call <vscale x 2 x i32> @llvm.vp.sub.nxv2i32(<vscale x 2 x i32> %c, <vscale x 2 x i32> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1226  %u = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> %m, <vscale x 2 x i32> %y, <vscale x 2 x i32> %c, i32 %evl)1227  ret <vscale x 2 x i32> %u1228}1229 1230define <vscale x 2 x i32> @vnmsac_vx_nxv2i32_unmasked(<vscale x 2 x i32> %a, i32 %b, <vscale x 2 x i32> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1231; CHECK-LABEL: vnmsac_vx_nxv2i32_unmasked:1232; CHECK:       # %bb.0:1233; CHECK-NEXT:    vsetvli zero, a1, e32, m1, tu, ma1234; CHECK-NEXT:    vnmsac.vx v9, a0, v81235; CHECK-NEXT:    vmv1r.v v8, v91236; CHECK-NEXT:    ret1237  %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 01238  %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer1239  %x = call <vscale x 2 x i32> @llvm.vp.mul.nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1240  %y = call <vscale x 2 x i32> @llvm.vp.sub.nxv2i32(<vscale x 2 x i32> %c, <vscale x 2 x i32> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1241  %u = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i32> %y, <vscale x 2 x i32> %c, i32 %evl)1242  ret <vscale x 2 x i32> %u1243}1244 1245define <vscale x 2 x i32> @vnmsac_vv_nxv2i32_ta(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b, <vscale x 2 x i32> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1246; CHECK-LABEL: vnmsac_vv_nxv2i32_ta:1247; CHECK:       # %bb.0:1248; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, mu1249; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t1250; CHECK-NEXT:    vmv.v.v v8, v101251; CHECK-NEXT:    ret1252  %x = call <vscale x 2 x i32> @llvm.vp.mul.nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1253  %y = call <vscale x 2 x i32> @llvm.vp.sub.nxv2i32(<vscale x 2 x i32> %c, <vscale x 2 x i32> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1254  %u = call <vscale x 2 x i32> @llvm.vp.select.nxv2i32(<vscale x 2 x i1> %m, <vscale x 2 x i32> %y, <vscale x 2 x i32> %c, i32 %evl)1255  ret <vscale x 2 x i32> %u1256}1257 1258define <vscale x 2 x i32> @vnmsac_vx_nxv2i32_ta(<vscale x 2 x i32> %a, i32 %b, <vscale x 2 x i32> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1259; CHECK-LABEL: vnmsac_vx_nxv2i32_ta:1260; CHECK:       # %bb.0:1261; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, mu1262; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t1263; CHECK-NEXT:    vmv.v.v v8, v91264; CHECK-NEXT:    ret1265  %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 01266  %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer1267  %x = call <vscale x 2 x i32> @llvm.vp.mul.nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1268  %y = call <vscale x 2 x i32> @llvm.vp.sub.nxv2i32(<vscale x 2 x i32> %c, <vscale x 2 x i32> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1269  %u = call <vscale x 2 x i32> @llvm.vp.select.nxv2i32(<vscale x 2 x i1> %m, <vscale x 2 x i32> %y, <vscale x 2 x i32> %c, i32 %evl)1270  ret <vscale x 2 x i32> %u1271}1272 1273define <vscale x 4 x i32> @vnmsac_vv_nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1274; CHECK-LABEL: vnmsac_vv_nxv4i32:1275; CHECK:       # %bb.0:1276; CHECK-NEXT:    vsetvli zero, a0, e32, m2, tu, mu1277; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t1278; CHECK-NEXT:    vmv2r.v v8, v121279; CHECK-NEXT:    ret1280  %x = call <vscale x 4 x i32> @llvm.vp.mul.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1281  %y = call <vscale x 4 x i32> @llvm.vp.sub.nxv4i32(<vscale x 4 x i32> %c, <vscale x 4 x i32> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1282  %u = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> %m, <vscale x 4 x i32> %y, <vscale x 4 x i32> %c, i32 %evl)1283  ret <vscale x 4 x i32> %u1284}1285 1286define <vscale x 4 x i32> @vnmsac_vv_nxv4i32_unmasked(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1287; CHECK-LABEL: vnmsac_vv_nxv4i32_unmasked:1288; CHECK:       # %bb.0:1289; CHECK-NEXT:    vsetvli zero, a0, e32, m2, tu, ma1290; CHECK-NEXT:    vnmsac.vv v12, v8, v101291; CHECK-NEXT:    vmv2r.v v8, v121292; CHECK-NEXT:    ret1293  %x = call <vscale x 4 x i32> @llvm.vp.mul.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1294  %y = call <vscale x 4 x i32> @llvm.vp.sub.nxv4i32(<vscale x 4 x i32> %c, <vscale x 4 x i32> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1295  %u = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i32> %y, <vscale x 4 x i32> %c, i32 %evl)1296  ret <vscale x 4 x i32> %u1297}1298 1299define <vscale x 4 x i32> @vnmsac_vx_nxv4i32(<vscale x 4 x i32> %a, i32 %b, <vscale x 4 x i32> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1300; CHECK-LABEL: vnmsac_vx_nxv4i32:1301; CHECK:       # %bb.0:1302; CHECK-NEXT:    vsetvli zero, a1, e32, m2, tu, mu1303; CHECK-NEXT:    vnmsac.vx v10, a0, v8, v0.t1304; CHECK-NEXT:    vmv2r.v v8, v101305; CHECK-NEXT:    ret1306  %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 01307  %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer1308  %x = call <vscale x 4 x i32> @llvm.vp.mul.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1309  %y = call <vscale x 4 x i32> @llvm.vp.sub.nxv4i32(<vscale x 4 x i32> %c, <vscale x 4 x i32> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1310  %u = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> %m, <vscale x 4 x i32> %y, <vscale x 4 x i32> %c, i32 %evl)1311  ret <vscale x 4 x i32> %u1312}1313 1314define <vscale x 4 x i32> @vnmsac_vx_nxv4i32_unmasked(<vscale x 4 x i32> %a, i32 %b, <vscale x 4 x i32> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1315; CHECK-LABEL: vnmsac_vx_nxv4i32_unmasked:1316; CHECK:       # %bb.0:1317; CHECK-NEXT:    vsetvli zero, a1, e32, m2, tu, ma1318; CHECK-NEXT:    vnmsac.vx v10, a0, v81319; CHECK-NEXT:    vmv2r.v v8, v101320; CHECK-NEXT:    ret1321  %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 01322  %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer1323  %x = call <vscale x 4 x i32> @llvm.vp.mul.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1324  %y = call <vscale x 4 x i32> @llvm.vp.sub.nxv4i32(<vscale x 4 x i32> %c, <vscale x 4 x i32> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1325  %u = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i32> %y, <vscale x 4 x i32> %c, i32 %evl)1326  ret <vscale x 4 x i32> %u1327}1328 1329define <vscale x 4 x i32> @vnmsac_vv_nxv4i32_ta(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1330; CHECK-LABEL: vnmsac_vv_nxv4i32_ta:1331; CHECK:       # %bb.0:1332; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, mu1333; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t1334; CHECK-NEXT:    vmv.v.v v8, v121335; CHECK-NEXT:    ret1336  %x = call <vscale x 4 x i32> @llvm.vp.mul.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1337  %y = call <vscale x 4 x i32> @llvm.vp.sub.nxv4i32(<vscale x 4 x i32> %c, <vscale x 4 x i32> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1338  %u = call <vscale x 4 x i32> @llvm.vp.select.nxv4i32(<vscale x 4 x i1> %m, <vscale x 4 x i32> %y, <vscale x 4 x i32> %c, i32 %evl)1339  ret <vscale x 4 x i32> %u1340}1341 1342define <vscale x 4 x i32> @vnmsac_vx_nxv4i32_ta(<vscale x 4 x i32> %a, i32 %b, <vscale x 4 x i32> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1343; CHECK-LABEL: vnmsac_vx_nxv4i32_ta:1344; CHECK:       # %bb.0:1345; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, mu1346; CHECK-NEXT:    vnmsac.vx v10, a0, v8, v0.t1347; CHECK-NEXT:    vmv.v.v v8, v101348; CHECK-NEXT:    ret1349  %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 01350  %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer1351  %x = call <vscale x 4 x i32> @llvm.vp.mul.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1352  %y = call <vscale x 4 x i32> @llvm.vp.sub.nxv4i32(<vscale x 4 x i32> %c, <vscale x 4 x i32> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1353  %u = call <vscale x 4 x i32> @llvm.vp.select.nxv4i32(<vscale x 4 x i1> %m, <vscale x 4 x i32> %y, <vscale x 4 x i32> %c, i32 %evl)1354  ret <vscale x 4 x i32> %u1355}1356 1357define <vscale x 8 x i32> @vnmsac_vv_nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %b, <vscale x 8 x i32> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1358; CHECK-LABEL: vnmsac_vv_nxv8i32:1359; CHECK:       # %bb.0:1360; CHECK-NEXT:    vsetvli zero, a0, e32, m4, tu, mu1361; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t1362; CHECK-NEXT:    vmv4r.v v8, v161363; CHECK-NEXT:    ret1364  %x = call <vscale x 8 x i32> @llvm.vp.mul.nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1365  %y = call <vscale x 8 x i32> @llvm.vp.sub.nxv8i32(<vscale x 8 x i32> %c, <vscale x 8 x i32> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1366  %u = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> %m, <vscale x 8 x i32> %y, <vscale x 8 x i32> %c, i32 %evl)1367  ret <vscale x 8 x i32> %u1368}1369 1370define <vscale x 8 x i32> @vnmsac_vv_nxv8i32_unmasked(<vscale x 8 x i32> %a, <vscale x 8 x i32> %b, <vscale x 8 x i32> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1371; CHECK-LABEL: vnmsac_vv_nxv8i32_unmasked:1372; CHECK:       # %bb.0:1373; CHECK-NEXT:    vsetvli zero, a0, e32, m4, tu, ma1374; CHECK-NEXT:    vnmsac.vv v16, v8, v121375; CHECK-NEXT:    vmv4r.v v8, v161376; CHECK-NEXT:    ret1377  %x = call <vscale x 8 x i32> @llvm.vp.mul.nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1378  %y = call <vscale x 8 x i32> @llvm.vp.sub.nxv8i32(<vscale x 8 x i32> %c, <vscale x 8 x i32> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1379  %u = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i32> %y, <vscale x 8 x i32> %c, i32 %evl)1380  ret <vscale x 8 x i32> %u1381}1382 1383define <vscale x 8 x i32> @vnmsac_vx_nxv8i32(<vscale x 8 x i32> %a, i32 %b, <vscale x 8 x i32> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1384; CHECK-LABEL: vnmsac_vx_nxv8i32:1385; CHECK:       # %bb.0:1386; CHECK-NEXT:    vsetvli zero, a1, e32, m4, tu, mu1387; CHECK-NEXT:    vnmsac.vx v12, a0, v8, v0.t1388; CHECK-NEXT:    vmv4r.v v8, v121389; CHECK-NEXT:    ret1390  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01391  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1392  %x = call <vscale x 8 x i32> @llvm.vp.mul.nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1393  %y = call <vscale x 8 x i32> @llvm.vp.sub.nxv8i32(<vscale x 8 x i32> %c, <vscale x 8 x i32> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1394  %u = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> %m, <vscale x 8 x i32> %y, <vscale x 8 x i32> %c, i32 %evl)1395  ret <vscale x 8 x i32> %u1396}1397 1398define <vscale x 8 x i32> @vnmsac_vx_nxv8i32_unmasked(<vscale x 8 x i32> %a, i32 %b, <vscale x 8 x i32> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1399; CHECK-LABEL: vnmsac_vx_nxv8i32_unmasked:1400; CHECK:       # %bb.0:1401; CHECK-NEXT:    vsetvli zero, a1, e32, m4, tu, ma1402; CHECK-NEXT:    vnmsac.vx v12, a0, v81403; CHECK-NEXT:    vmv4r.v v8, v121404; CHECK-NEXT:    ret1405  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01406  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1407  %x = call <vscale x 8 x i32> @llvm.vp.mul.nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1408  %y = call <vscale x 8 x i32> @llvm.vp.sub.nxv8i32(<vscale x 8 x i32> %c, <vscale x 8 x i32> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1409  %u = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i32> %y, <vscale x 8 x i32> %c, i32 %evl)1410  ret <vscale x 8 x i32> %u1411}1412 1413define <vscale x 8 x i32> @vnmsac_vv_nxv8i32_ta(<vscale x 8 x i32> %a, <vscale x 8 x i32> %b, <vscale x 8 x i32> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1414; CHECK-LABEL: vnmsac_vv_nxv8i32_ta:1415; CHECK:       # %bb.0:1416; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, mu1417; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t1418; CHECK-NEXT:    vmv.v.v v8, v161419; CHECK-NEXT:    ret1420  %x = call <vscale x 8 x i32> @llvm.vp.mul.nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1421  %y = call <vscale x 8 x i32> @llvm.vp.sub.nxv8i32(<vscale x 8 x i32> %c, <vscale x 8 x i32> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1422  %u = call <vscale x 8 x i32> @llvm.vp.select.nxv8i32(<vscale x 8 x i1> %m, <vscale x 8 x i32> %y, <vscale x 8 x i32> %c, i32 %evl)1423  ret <vscale x 8 x i32> %u1424}1425 1426define <vscale x 8 x i32> @vnmsac_vx_nxv8i32_ta(<vscale x 8 x i32> %a, i32 %b, <vscale x 8 x i32> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1427; CHECK-LABEL: vnmsac_vx_nxv8i32_ta:1428; CHECK:       # %bb.0:1429; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, mu1430; CHECK-NEXT:    vnmsac.vx v12, a0, v8, v0.t1431; CHECK-NEXT:    vmv.v.v v8, v121432; CHECK-NEXT:    ret1433  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01434  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1435  %x = call <vscale x 8 x i32> @llvm.vp.mul.nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1436  %y = call <vscale x 8 x i32> @llvm.vp.sub.nxv8i32(<vscale x 8 x i32> %c, <vscale x 8 x i32> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1437  %u = call <vscale x 8 x i32> @llvm.vp.select.nxv8i32(<vscale x 8 x i1> %m, <vscale x 8 x i32> %y, <vscale x 8 x i32> %c, i32 %evl)1438  ret <vscale x 8 x i32> %u1439}1440 1441define <vscale x 16 x i32> @vnmsac_vv_nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b, <vscale x 16 x i32> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {1442; CHECK-LABEL: vnmsac_vv_nxv16i32:1443; CHECK:       # %bb.0:1444; CHECK-NEXT:    vl8re32.v v24, (a0)1445; CHECK-NEXT:    vsetvli zero, a1, e32, m8, tu, mu1446; CHECK-NEXT:    vnmsac.vv v24, v8, v16, v0.t1447; CHECK-NEXT:    vmv8r.v v8, v241448; CHECK-NEXT:    ret1449  %x = call <vscale x 16 x i32> @llvm.vp.mul.nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1450  %y = call <vscale x 16 x i32> @llvm.vp.sub.nxv16i32(<vscale x 16 x i32> %c, <vscale x 16 x i32> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1451  %u = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> %m, <vscale x 16 x i32> %y, <vscale x 16 x i32> %c, i32 %evl)1452  ret <vscale x 16 x i32> %u1453}1454 1455define <vscale x 16 x i32> @vnmsac_vv_nxv16i32_unmasked(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b, <vscale x 16 x i32> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {1456; CHECK-LABEL: vnmsac_vv_nxv16i32_unmasked:1457; CHECK:       # %bb.0:1458; CHECK-NEXT:    vl8re32.v v24, (a0)1459; CHECK-NEXT:    vsetvli zero, a1, e32, m8, tu, ma1460; CHECK-NEXT:    vnmsac.vv v24, v8, v161461; CHECK-NEXT:    vmv8r.v v8, v241462; CHECK-NEXT:    ret1463  %x = call <vscale x 16 x i32> @llvm.vp.mul.nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1464  %y = call <vscale x 16 x i32> @llvm.vp.sub.nxv16i32(<vscale x 16 x i32> %c, <vscale x 16 x i32> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1465  %u = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> splat (i1 -1), <vscale x 16 x i32> %y, <vscale x 16 x i32> %c, i32 %evl)1466  ret <vscale x 16 x i32> %u1467}1468 1469define <vscale x 16 x i32> @vnmsac_vx_nxv16i32(<vscale x 16 x i32> %a, i32 %b, <vscale x 16 x i32> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {1470; CHECK-LABEL: vnmsac_vx_nxv16i32:1471; CHECK:       # %bb.0:1472; CHECK-NEXT:    vsetvli zero, a1, e32, m8, tu, mu1473; CHECK-NEXT:    vnmsac.vx v16, a0, v8, v0.t1474; CHECK-NEXT:    vmv8r.v v8, v161475; CHECK-NEXT:    ret1476  %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 01477  %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer1478  %x = call <vscale x 16 x i32> @llvm.vp.mul.nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1479  %y = call <vscale x 16 x i32> @llvm.vp.sub.nxv16i32(<vscale x 16 x i32> %c, <vscale x 16 x i32> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1480  %u = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> %m, <vscale x 16 x i32> %y, <vscale x 16 x i32> %c, i32 %evl)1481  ret <vscale x 16 x i32> %u1482}1483 1484define <vscale x 16 x i32> @vnmsac_vx_nxv16i32_unmasked(<vscale x 16 x i32> %a, i32 %b, <vscale x 16 x i32> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {1485; CHECK-LABEL: vnmsac_vx_nxv16i32_unmasked:1486; CHECK:       # %bb.0:1487; CHECK-NEXT:    vsetvli zero, a1, e32, m8, tu, ma1488; CHECK-NEXT:    vnmsac.vx v16, a0, v81489; CHECK-NEXT:    vmv8r.v v8, v161490; CHECK-NEXT:    ret1491  %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 01492  %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer1493  %x = call <vscale x 16 x i32> @llvm.vp.mul.nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1494  %y = call <vscale x 16 x i32> @llvm.vp.sub.nxv16i32(<vscale x 16 x i32> %c, <vscale x 16 x i32> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1495  %u = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> splat (i1 -1), <vscale x 16 x i32> %y, <vscale x 16 x i32> %c, i32 %evl)1496  ret <vscale x 16 x i32> %u1497}1498 1499define <vscale x 16 x i32> @vnmsac_vv_nxv16i32_ta(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b, <vscale x 16 x i32> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {1500; CHECK-LABEL: vnmsac_vv_nxv16i32_ta:1501; CHECK:       # %bb.0:1502; CHECK-NEXT:    vl8re32.v v24, (a0)1503; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, mu1504; CHECK-NEXT:    vnmsac.vv v24, v8, v16, v0.t1505; CHECK-NEXT:    vmv.v.v v8, v241506; CHECK-NEXT:    ret1507  %x = call <vscale x 16 x i32> @llvm.vp.mul.nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1508  %y = call <vscale x 16 x i32> @llvm.vp.sub.nxv16i32(<vscale x 16 x i32> %c, <vscale x 16 x i32> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1509  %u = call <vscale x 16 x i32> @llvm.vp.select.nxv16i32(<vscale x 16 x i1> %m, <vscale x 16 x i32> %y, <vscale x 16 x i32> %c, i32 %evl)1510  ret <vscale x 16 x i32> %u1511}1512 1513define <vscale x 16 x i32> @vnmsac_vx_nxv16i32_ta(<vscale x 16 x i32> %a, i32 %b, <vscale x 16 x i32> %c,  <vscale x 16 x i1> %m, i32 zeroext %evl) {1514; CHECK-LABEL: vnmsac_vx_nxv16i32_ta:1515; CHECK:       # %bb.0:1516; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, mu1517; CHECK-NEXT:    vnmsac.vx v16, a0, v8, v0.t1518; CHECK-NEXT:    vmv.v.v v8, v161519; CHECK-NEXT:    ret1520  %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 01521  %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer1522  %x = call <vscale x 16 x i32> @llvm.vp.mul.nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1523  %y = call <vscale x 16 x i32> @llvm.vp.sub.nxv16i32(<vscale x 16 x i32> %c, <vscale x 16 x i32> %x, <vscale x 16 x i1> splat (i1 -1), i32 %evl)1524  %u = call <vscale x 16 x i32> @llvm.vp.select.nxv16i32(<vscale x 16 x i1> %m, <vscale x 16 x i32> %y, <vscale x 16 x i32> %c, i32 %evl)1525  ret <vscale x 16 x i32> %u1526}1527 1528define <vscale x 1 x i64> @vnmsac_vv_nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 1 x i64> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1529; CHECK-LABEL: vnmsac_vv_nxv1i64:1530; CHECK:       # %bb.0:1531; CHECK-NEXT:    vsetvli zero, a0, e64, m1, tu, mu1532; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t1533; CHECK-NEXT:    vmv1r.v v8, v101534; CHECK-NEXT:    ret1535  %x = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1536  %y = call <vscale x 1 x i64> @llvm.vp.sub.nxv1i64(<vscale x 1 x i64> %c, <vscale x 1 x i64> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1537  %u = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> %m, <vscale x 1 x i64> %y, <vscale x 1 x i64> %c, i32 %evl)1538  ret <vscale x 1 x i64> %u1539}1540 1541define <vscale x 1 x i64> @vnmsac_vv_nxv1i64_unmasked(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 1 x i64> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1542; CHECK-LABEL: vnmsac_vv_nxv1i64_unmasked:1543; CHECK:       # %bb.0:1544; CHECK-NEXT:    vsetvli zero, a0, e64, m1, tu, ma1545; CHECK-NEXT:    vnmsac.vv v10, v8, v91546; CHECK-NEXT:    vmv1r.v v8, v101547; CHECK-NEXT:    ret1548  %x = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1549  %y = call <vscale x 1 x i64> @llvm.vp.sub.nxv1i64(<vscale x 1 x i64> %c, <vscale x 1 x i64> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1550  %u = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i64> %y, <vscale x 1 x i64> %c, i32 %evl)1551  ret <vscale x 1 x i64> %u1552}1553 1554define <vscale x 1 x i64> @vnmsac_vx_nxv1i64(<vscale x 1 x i64> %a, i64 %b, <vscale x 1 x i64> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1555; RV32-LABEL: vnmsac_vx_nxv1i64:1556; RV32:       # %bb.0:1557; RV32-NEXT:    addi sp, sp, -161558; RV32-NEXT:    .cfi_def_cfa_offset 161559; RV32-NEXT:    sw a0, 8(sp)1560; RV32-NEXT:    sw a1, 12(sp)1561; RV32-NEXT:    addi a0, sp, 81562; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma1563; RV32-NEXT:    vlse64.v v10, (a0), zero1564; RV32-NEXT:    vsetvli zero, zero, e64, m1, tu, mu1565; RV32-NEXT:    vnmsac.vv v9, v8, v10, v0.t1566; RV32-NEXT:    vmv1r.v v8, v91567; RV32-NEXT:    addi sp, sp, 161568; RV32-NEXT:    .cfi_def_cfa_offset 01569; RV32-NEXT:    ret1570;1571; RV64-LABEL: vnmsac_vx_nxv1i64:1572; RV64:       # %bb.0:1573; RV64-NEXT:    vsetvli zero, a1, e64, m1, tu, mu1574; RV64-NEXT:    vnmsac.vx v9, a0, v8, v0.t1575; RV64-NEXT:    vmv1r.v v8, v91576; RV64-NEXT:    ret1577  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01578  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1579  %x = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1580  %y = call <vscale x 1 x i64> @llvm.vp.sub.nxv1i64(<vscale x 1 x i64> %c, <vscale x 1 x i64> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1581  %u = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> %m, <vscale x 1 x i64> %y, <vscale x 1 x i64> %c, i32 %evl)1582  ret <vscale x 1 x i64> %u1583}1584 1585define <vscale x 1 x i64> @vnmsac_vx_nxv1i64_unmasked(<vscale x 1 x i64> %a, i64 %b, <vscale x 1 x i64> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1586; RV32-LABEL: vnmsac_vx_nxv1i64_unmasked:1587; RV32:       # %bb.0:1588; RV32-NEXT:    addi sp, sp, -161589; RV32-NEXT:    .cfi_def_cfa_offset 161590; RV32-NEXT:    sw a0, 8(sp)1591; RV32-NEXT:    sw a1, 12(sp)1592; RV32-NEXT:    addi a0, sp, 81593; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma1594; RV32-NEXT:    vlse64.v v10, (a0), zero1595; RV32-NEXT:    vsetvli zero, zero, e64, m1, tu, ma1596; RV32-NEXT:    vnmsac.vv v9, v8, v101597; RV32-NEXT:    vmv1r.v v8, v91598; RV32-NEXT:    addi sp, sp, 161599; RV32-NEXT:    .cfi_def_cfa_offset 01600; RV32-NEXT:    ret1601;1602; RV64-LABEL: vnmsac_vx_nxv1i64_unmasked:1603; RV64:       # %bb.0:1604; RV64-NEXT:    vsetvli zero, a1, e64, m1, tu, ma1605; RV64-NEXT:    vnmsac.vx v9, a0, v81606; RV64-NEXT:    vmv1r.v v8, v91607; RV64-NEXT:    ret1608  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01609  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1610  %x = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1611  %y = call <vscale x 1 x i64> @llvm.vp.sub.nxv1i64(<vscale x 1 x i64> %c, <vscale x 1 x i64> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1612  %u = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i64> %y, <vscale x 1 x i64> %c, i32 %evl)1613  ret <vscale x 1 x i64> %u1614}1615 1616define <vscale x 1 x i64> @vnmsac_vv_nxv1i64_ta(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 1 x i64> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1617; CHECK-LABEL: vnmsac_vv_nxv1i64_ta:1618; CHECK:       # %bb.0:1619; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, mu1620; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t1621; CHECK-NEXT:    vmv.v.v v8, v101622; CHECK-NEXT:    ret1623  %x = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1624  %y = call <vscale x 1 x i64> @llvm.vp.sub.nxv1i64(<vscale x 1 x i64> %c, <vscale x 1 x i64> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1625  %u = call <vscale x 1 x i64> @llvm.vp.select.nxv1i64(<vscale x 1 x i1> %m, <vscale x 1 x i64> %y, <vscale x 1 x i64> %c, i32 %evl)1626  ret <vscale x 1 x i64> %u1627}1628 1629define <vscale x 1 x i64> @vnmsac_vx_nxv1i64_ta(<vscale x 1 x i64> %a, i64 %b, <vscale x 1 x i64> %c,  <vscale x 1 x i1> %m, i32 zeroext %evl) {1630; RV32-LABEL: vnmsac_vx_nxv1i64_ta:1631; RV32:       # %bb.0:1632; RV32-NEXT:    addi sp, sp, -161633; RV32-NEXT:    .cfi_def_cfa_offset 161634; RV32-NEXT:    sw a0, 8(sp)1635; RV32-NEXT:    sw a1, 12(sp)1636; RV32-NEXT:    addi a0, sp, 81637; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, mu1638; RV32-NEXT:    vlse64.v v10, (a0), zero1639; RV32-NEXT:    vnmsac.vv v9, v8, v10, v0.t1640; RV32-NEXT:    vmv.v.v v8, v91641; RV32-NEXT:    addi sp, sp, 161642; RV32-NEXT:    .cfi_def_cfa_offset 01643; RV32-NEXT:    ret1644;1645; RV64-LABEL: vnmsac_vx_nxv1i64_ta:1646; RV64:       # %bb.0:1647; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, mu1648; RV64-NEXT:    vnmsac.vx v9, a0, v8, v0.t1649; RV64-NEXT:    vmv.v.v v8, v91650; RV64-NEXT:    ret1651  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01652  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1653  %x = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1654  %y = call <vscale x 1 x i64> @llvm.vp.sub.nxv1i64(<vscale x 1 x i64> %c, <vscale x 1 x i64> %x, <vscale x 1 x i1> splat (i1 -1), i32 %evl)1655  %u = call <vscale x 1 x i64> @llvm.vp.select.nxv1i64(<vscale x 1 x i1> %m, <vscale x 1 x i64> %y, <vscale x 1 x i64> %c, i32 %evl)1656  ret <vscale x 1 x i64> %u1657}1658 1659define <vscale x 2 x i64> @vnmsac_vv_nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i64> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1660; CHECK-LABEL: vnmsac_vv_nxv2i64:1661; CHECK:       # %bb.0:1662; CHECK-NEXT:    vsetvli zero, a0, e64, m2, tu, mu1663; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t1664; CHECK-NEXT:    vmv2r.v v8, v121665; CHECK-NEXT:    ret1666  %x = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1667  %y = call <vscale x 2 x i64> @llvm.vp.sub.nxv2i64(<vscale x 2 x i64> %c, <vscale x 2 x i64> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1668  %u = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> %m, <vscale x 2 x i64> %y, <vscale x 2 x i64> %c, i32 %evl)1669  ret <vscale x 2 x i64> %u1670}1671 1672define <vscale x 2 x i64> @vnmsac_vv_nxv2i64_unmasked(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i64> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1673; CHECK-LABEL: vnmsac_vv_nxv2i64_unmasked:1674; CHECK:       # %bb.0:1675; CHECK-NEXT:    vsetvli zero, a0, e64, m2, tu, ma1676; CHECK-NEXT:    vnmsac.vv v12, v8, v101677; CHECK-NEXT:    vmv2r.v v8, v121678; CHECK-NEXT:    ret1679  %x = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1680  %y = call <vscale x 2 x i64> @llvm.vp.sub.nxv2i64(<vscale x 2 x i64> %c, <vscale x 2 x i64> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1681  %u = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i64> %y, <vscale x 2 x i64> %c, i32 %evl)1682  ret <vscale x 2 x i64> %u1683}1684 1685define <vscale x 2 x i64> @vnmsac_vx_nxv2i64(<vscale x 2 x i64> %a, i64 %b, <vscale x 2 x i64> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1686; RV32-LABEL: vnmsac_vx_nxv2i64:1687; RV32:       # %bb.0:1688; RV32-NEXT:    addi sp, sp, -161689; RV32-NEXT:    .cfi_def_cfa_offset 161690; RV32-NEXT:    sw a0, 8(sp)1691; RV32-NEXT:    sw a1, 12(sp)1692; RV32-NEXT:    addi a0, sp, 81693; RV32-NEXT:    vsetvli zero, a2, e64, m2, ta, ma1694; RV32-NEXT:    vlse64.v v12, (a0), zero1695; RV32-NEXT:    vsetvli zero, zero, e64, m2, tu, mu1696; RV32-NEXT:    vnmsac.vv v10, v8, v12, v0.t1697; RV32-NEXT:    vmv2r.v v8, v101698; RV32-NEXT:    addi sp, sp, 161699; RV32-NEXT:    .cfi_def_cfa_offset 01700; RV32-NEXT:    ret1701;1702; RV64-LABEL: vnmsac_vx_nxv2i64:1703; RV64:       # %bb.0:1704; RV64-NEXT:    vsetvli zero, a1, e64, m2, tu, mu1705; RV64-NEXT:    vnmsac.vx v10, a0, v8, v0.t1706; RV64-NEXT:    vmv2r.v v8, v101707; RV64-NEXT:    ret1708  %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01709  %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1710  %x = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1711  %y = call <vscale x 2 x i64> @llvm.vp.sub.nxv2i64(<vscale x 2 x i64> %c, <vscale x 2 x i64> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1712  %u = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> %m, <vscale x 2 x i64> %y, <vscale x 2 x i64> %c, i32 %evl)1713  ret <vscale x 2 x i64> %u1714}1715 1716define <vscale x 2 x i64> @vnmsac_vx_nxv2i64_unmasked(<vscale x 2 x i64> %a, i64 %b, <vscale x 2 x i64> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1717; RV32-LABEL: vnmsac_vx_nxv2i64_unmasked:1718; RV32:       # %bb.0:1719; RV32-NEXT:    addi sp, sp, -161720; RV32-NEXT:    .cfi_def_cfa_offset 161721; RV32-NEXT:    sw a0, 8(sp)1722; RV32-NEXT:    sw a1, 12(sp)1723; RV32-NEXT:    addi a0, sp, 81724; RV32-NEXT:    vsetvli zero, a2, e64, m2, ta, ma1725; RV32-NEXT:    vlse64.v v12, (a0), zero1726; RV32-NEXT:    vsetvli zero, zero, e64, m2, tu, ma1727; RV32-NEXT:    vnmsac.vv v10, v8, v121728; RV32-NEXT:    vmv2r.v v8, v101729; RV32-NEXT:    addi sp, sp, 161730; RV32-NEXT:    .cfi_def_cfa_offset 01731; RV32-NEXT:    ret1732;1733; RV64-LABEL: vnmsac_vx_nxv2i64_unmasked:1734; RV64:       # %bb.0:1735; RV64-NEXT:    vsetvli zero, a1, e64, m2, tu, ma1736; RV64-NEXT:    vnmsac.vx v10, a0, v81737; RV64-NEXT:    vmv2r.v v8, v101738; RV64-NEXT:    ret1739  %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01740  %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1741  %x = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1742  %y = call <vscale x 2 x i64> @llvm.vp.sub.nxv2i64(<vscale x 2 x i64> %c, <vscale x 2 x i64> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1743  %u = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i64> %y, <vscale x 2 x i64> %c, i32 %evl)1744  ret <vscale x 2 x i64> %u1745}1746 1747define <vscale x 2 x i64> @vnmsac_vv_nxv2i64_ta(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i64> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1748; CHECK-LABEL: vnmsac_vv_nxv2i64_ta:1749; CHECK:       # %bb.0:1750; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, mu1751; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t1752; CHECK-NEXT:    vmv.v.v v8, v121753; CHECK-NEXT:    ret1754  %x = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1755  %y = call <vscale x 2 x i64> @llvm.vp.sub.nxv2i64(<vscale x 2 x i64> %c, <vscale x 2 x i64> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1756  %u = call <vscale x 2 x i64> @llvm.vp.select.nxv2i64(<vscale x 2 x i1> %m, <vscale x 2 x i64> %y, <vscale x 2 x i64> %c, i32 %evl)1757  ret <vscale x 2 x i64> %u1758}1759 1760define <vscale x 2 x i64> @vnmsac_vx_nxv2i64_ta(<vscale x 2 x i64> %a, i64 %b, <vscale x 2 x i64> %c,  <vscale x 2 x i1> %m, i32 zeroext %evl) {1761; RV32-LABEL: vnmsac_vx_nxv2i64_ta:1762; RV32:       # %bb.0:1763; RV32-NEXT:    addi sp, sp, -161764; RV32-NEXT:    .cfi_def_cfa_offset 161765; RV32-NEXT:    sw a0, 8(sp)1766; RV32-NEXT:    sw a1, 12(sp)1767; RV32-NEXT:    addi a0, sp, 81768; RV32-NEXT:    vsetvli zero, a2, e64, m2, ta, mu1769; RV32-NEXT:    vlse64.v v12, (a0), zero1770; RV32-NEXT:    vnmsac.vv v10, v8, v12, v0.t1771; RV32-NEXT:    vmv.v.v v8, v101772; RV32-NEXT:    addi sp, sp, 161773; RV32-NEXT:    .cfi_def_cfa_offset 01774; RV32-NEXT:    ret1775;1776; RV64-LABEL: vnmsac_vx_nxv2i64_ta:1777; RV64:       # %bb.0:1778; RV64-NEXT:    vsetvli zero, a1, e64, m2, ta, mu1779; RV64-NEXT:    vnmsac.vx v10, a0, v8, v0.t1780; RV64-NEXT:    vmv.v.v v8, v101781; RV64-NEXT:    ret1782  %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01783  %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1784  %x = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1785  %y = call <vscale x 2 x i64> @llvm.vp.sub.nxv2i64(<vscale x 2 x i64> %c, <vscale x 2 x i64> %x, <vscale x 2 x i1> splat (i1 -1), i32 %evl)1786  %u = call <vscale x 2 x i64> @llvm.vp.select.nxv2i64(<vscale x 2 x i1> %m, <vscale x 2 x i64> %y, <vscale x 2 x i64> %c, i32 %evl)1787  ret <vscale x 2 x i64> %u1788}1789 1790define <vscale x 4 x i64> @vnmsac_vv_nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %b, <vscale x 4 x i64> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1791; CHECK-LABEL: vnmsac_vv_nxv4i64:1792; CHECK:       # %bb.0:1793; CHECK-NEXT:    vsetvli zero, a0, e64, m4, tu, mu1794; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t1795; CHECK-NEXT:    vmv4r.v v8, v161796; CHECK-NEXT:    ret1797  %x = call <vscale x 4 x i64> @llvm.vp.mul.nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1798  %y = call <vscale x 4 x i64> @llvm.vp.sub.nxv4i64(<vscale x 4 x i64> %c, <vscale x 4 x i64> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1799  %u = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> %m, <vscale x 4 x i64> %y, <vscale x 4 x i64> %c, i32 %evl)1800  ret <vscale x 4 x i64> %u1801}1802 1803define <vscale x 4 x i64> @vnmsac_vv_nxv4i64_unmasked(<vscale x 4 x i64> %a, <vscale x 4 x i64> %b, <vscale x 4 x i64> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1804; CHECK-LABEL: vnmsac_vv_nxv4i64_unmasked:1805; CHECK:       # %bb.0:1806; CHECK-NEXT:    vsetvli zero, a0, e64, m4, tu, ma1807; CHECK-NEXT:    vnmsac.vv v16, v8, v121808; CHECK-NEXT:    vmv4r.v v8, v161809; CHECK-NEXT:    ret1810  %x = call <vscale x 4 x i64> @llvm.vp.mul.nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1811  %y = call <vscale x 4 x i64> @llvm.vp.sub.nxv4i64(<vscale x 4 x i64> %c, <vscale x 4 x i64> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1812  %u = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i64> %y, <vscale x 4 x i64> %c, i32 %evl)1813  ret <vscale x 4 x i64> %u1814}1815 1816define <vscale x 4 x i64> @vnmsac_vx_nxv4i64(<vscale x 4 x i64> %a, i64 %b, <vscale x 4 x i64> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1817; RV32-LABEL: vnmsac_vx_nxv4i64:1818; RV32:       # %bb.0:1819; RV32-NEXT:    addi sp, sp, -161820; RV32-NEXT:    .cfi_def_cfa_offset 161821; RV32-NEXT:    sw a0, 8(sp)1822; RV32-NEXT:    sw a1, 12(sp)1823; RV32-NEXT:    addi a0, sp, 81824; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma1825; RV32-NEXT:    vlse64.v v16, (a0), zero1826; RV32-NEXT:    vsetvli zero, zero, e64, m4, tu, mu1827; RV32-NEXT:    vnmsac.vv v12, v8, v16, v0.t1828; RV32-NEXT:    vmv4r.v v8, v121829; RV32-NEXT:    addi sp, sp, 161830; RV32-NEXT:    .cfi_def_cfa_offset 01831; RV32-NEXT:    ret1832;1833; RV64-LABEL: vnmsac_vx_nxv4i64:1834; RV64:       # %bb.0:1835; RV64-NEXT:    vsetvli zero, a1, e64, m4, tu, mu1836; RV64-NEXT:    vnmsac.vx v12, a0, v8, v0.t1837; RV64-NEXT:    vmv4r.v v8, v121838; RV64-NEXT:    ret1839  %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01840  %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1841  %x = call <vscale x 4 x i64> @llvm.vp.mul.nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1842  %y = call <vscale x 4 x i64> @llvm.vp.sub.nxv4i64(<vscale x 4 x i64> %c, <vscale x 4 x i64> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1843  %u = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> %m, <vscale x 4 x i64> %y, <vscale x 4 x i64> %c, i32 %evl)1844  ret <vscale x 4 x i64> %u1845}1846 1847define <vscale x 4 x i64> @vnmsac_vx_nxv4i64_unmasked(<vscale x 4 x i64> %a, i64 %b, <vscale x 4 x i64> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1848; RV32-LABEL: vnmsac_vx_nxv4i64_unmasked:1849; RV32:       # %bb.0:1850; RV32-NEXT:    addi sp, sp, -161851; RV32-NEXT:    .cfi_def_cfa_offset 161852; RV32-NEXT:    sw a0, 8(sp)1853; RV32-NEXT:    sw a1, 12(sp)1854; RV32-NEXT:    addi a0, sp, 81855; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma1856; RV32-NEXT:    vlse64.v v16, (a0), zero1857; RV32-NEXT:    vsetvli zero, zero, e64, m4, tu, ma1858; RV32-NEXT:    vnmsac.vv v12, v8, v161859; RV32-NEXT:    vmv4r.v v8, v121860; RV32-NEXT:    addi sp, sp, 161861; RV32-NEXT:    .cfi_def_cfa_offset 01862; RV32-NEXT:    ret1863;1864; RV64-LABEL: vnmsac_vx_nxv4i64_unmasked:1865; RV64:       # %bb.0:1866; RV64-NEXT:    vsetvli zero, a1, e64, m4, tu, ma1867; RV64-NEXT:    vnmsac.vx v12, a0, v81868; RV64-NEXT:    vmv4r.v v8, v121869; RV64-NEXT:    ret1870  %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01871  %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1872  %x = call <vscale x 4 x i64> @llvm.vp.mul.nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1873  %y = call <vscale x 4 x i64> @llvm.vp.sub.nxv4i64(<vscale x 4 x i64> %c, <vscale x 4 x i64> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1874  %u = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i64> %y, <vscale x 4 x i64> %c, i32 %evl)1875  ret <vscale x 4 x i64> %u1876}1877 1878define <vscale x 4 x i64> @vnmsac_vv_nxv4i64_ta(<vscale x 4 x i64> %a, <vscale x 4 x i64> %b, <vscale x 4 x i64> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1879; CHECK-LABEL: vnmsac_vv_nxv4i64_ta:1880; CHECK:       # %bb.0:1881; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, mu1882; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t1883; CHECK-NEXT:    vmv.v.v v8, v161884; CHECK-NEXT:    ret1885  %x = call <vscale x 4 x i64> @llvm.vp.mul.nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1886  %y = call <vscale x 4 x i64> @llvm.vp.sub.nxv4i64(<vscale x 4 x i64> %c, <vscale x 4 x i64> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1887  %u = call <vscale x 4 x i64> @llvm.vp.select.nxv4i64(<vscale x 4 x i1> %m, <vscale x 4 x i64> %y, <vscale x 4 x i64> %c, i32 %evl)1888  ret <vscale x 4 x i64> %u1889}1890 1891define <vscale x 4 x i64> @vnmsac_vx_nxv4i64_ta(<vscale x 4 x i64> %a, i64 %b, <vscale x 4 x i64> %c,  <vscale x 4 x i1> %m, i32 zeroext %evl) {1892; RV32-LABEL: vnmsac_vx_nxv4i64_ta:1893; RV32:       # %bb.0:1894; RV32-NEXT:    addi sp, sp, -161895; RV32-NEXT:    .cfi_def_cfa_offset 161896; RV32-NEXT:    sw a0, 8(sp)1897; RV32-NEXT:    sw a1, 12(sp)1898; RV32-NEXT:    addi a0, sp, 81899; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, mu1900; RV32-NEXT:    vlse64.v v16, (a0), zero1901; RV32-NEXT:    vnmsac.vv v12, v8, v16, v0.t1902; RV32-NEXT:    vmv.v.v v8, v121903; RV32-NEXT:    addi sp, sp, 161904; RV32-NEXT:    .cfi_def_cfa_offset 01905; RV32-NEXT:    ret1906;1907; RV64-LABEL: vnmsac_vx_nxv4i64_ta:1908; RV64:       # %bb.0:1909; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, mu1910; RV64-NEXT:    vnmsac.vx v12, a0, v8, v0.t1911; RV64-NEXT:    vmv.v.v v8, v121912; RV64-NEXT:    ret1913  %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01914  %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1915  %x = call <vscale x 4 x i64> @llvm.vp.mul.nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1916  %y = call <vscale x 4 x i64> @llvm.vp.sub.nxv4i64(<vscale x 4 x i64> %c, <vscale x 4 x i64> %x, <vscale x 4 x i1> splat (i1 -1), i32 %evl)1917  %u = call <vscale x 4 x i64> @llvm.vp.select.nxv4i64(<vscale x 4 x i1> %m, <vscale x 4 x i64> %y, <vscale x 4 x i64> %c, i32 %evl)1918  ret <vscale x 4 x i64> %u1919}1920 1921define <vscale x 8 x i64> @vnmsac_vv_nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b, <vscale x 8 x i64> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1922; CHECK-LABEL: vnmsac_vv_nxv8i64:1923; CHECK:       # %bb.0:1924; CHECK-NEXT:    vl8re64.v v24, (a0)1925; CHECK-NEXT:    vsetvli zero, a1, e64, m8, tu, mu1926; CHECK-NEXT:    vnmsac.vv v24, v8, v16, v0.t1927; CHECK-NEXT:    vmv8r.v v8, v241928; CHECK-NEXT:    ret1929  %x = call <vscale x 8 x i64> @llvm.vp.mul.nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1930  %y = call <vscale x 8 x i64> @llvm.vp.sub.nxv8i64(<vscale x 8 x i64> %c, <vscale x 8 x i64> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1931  %u = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> %m, <vscale x 8 x i64> %y, <vscale x 8 x i64> %c, i32 %evl)1932  ret <vscale x 8 x i64> %u1933}1934 1935define <vscale x 8 x i64> @vnmsac_vv_nxv8i64_unmasked(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b, <vscale x 8 x i64> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1936; CHECK-LABEL: vnmsac_vv_nxv8i64_unmasked:1937; CHECK:       # %bb.0:1938; CHECK-NEXT:    vl8re64.v v24, (a0)1939; CHECK-NEXT:    vsetvli zero, a1, e64, m8, tu, ma1940; CHECK-NEXT:    vnmsac.vv v24, v8, v161941; CHECK-NEXT:    vmv8r.v v8, v241942; CHECK-NEXT:    ret1943  %x = call <vscale x 8 x i64> @llvm.vp.mul.nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1944  %y = call <vscale x 8 x i64> @llvm.vp.sub.nxv8i64(<vscale x 8 x i64> %c, <vscale x 8 x i64> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1945  %u = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i64> %y, <vscale x 8 x i64> %c, i32 %evl)1946  ret <vscale x 8 x i64> %u1947}1948 1949define <vscale x 8 x i64> @vnmsac_vx_nxv8i64(<vscale x 8 x i64> %a, i64 %b, <vscale x 8 x i64> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1950; RV32-LABEL: vnmsac_vx_nxv8i64:1951; RV32:       # %bb.0:1952; RV32-NEXT:    addi sp, sp, -161953; RV32-NEXT:    .cfi_def_cfa_offset 161954; RV32-NEXT:    sw a0, 8(sp)1955; RV32-NEXT:    sw a1, 12(sp)1956; RV32-NEXT:    addi a0, sp, 81957; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma1958; RV32-NEXT:    vlse64.v v24, (a0), zero1959; RV32-NEXT:    vsetvli zero, zero, e64, m8, tu, mu1960; RV32-NEXT:    vnmsac.vv v16, v8, v24, v0.t1961; RV32-NEXT:    vmv8r.v v8, v161962; RV32-NEXT:    addi sp, sp, 161963; RV32-NEXT:    .cfi_def_cfa_offset 01964; RV32-NEXT:    ret1965;1966; RV64-LABEL: vnmsac_vx_nxv8i64:1967; RV64:       # %bb.0:1968; RV64-NEXT:    vsetvli zero, a1, e64, m8, tu, mu1969; RV64-NEXT:    vnmsac.vx v16, a0, v8, v0.t1970; RV64-NEXT:    vmv8r.v v8, v161971; RV64-NEXT:    ret1972  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01973  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1974  %x = call <vscale x 8 x i64> @llvm.vp.mul.nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1975  %y = call <vscale x 8 x i64> @llvm.vp.sub.nxv8i64(<vscale x 8 x i64> %c, <vscale x 8 x i64> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)1976  %u = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> %m, <vscale x 8 x i64> %y, <vscale x 8 x i64> %c, i32 %evl)1977  ret <vscale x 8 x i64> %u1978}1979 1980define <vscale x 8 x i64> @vnmsac_vx_nxv8i64_unmasked(<vscale x 8 x i64> %a, i64 %b, <vscale x 8 x i64> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {1981; RV32-LABEL: vnmsac_vx_nxv8i64_unmasked:1982; RV32:       # %bb.0:1983; RV32-NEXT:    addi sp, sp, -161984; RV32-NEXT:    .cfi_def_cfa_offset 161985; RV32-NEXT:    sw a0, 8(sp)1986; RV32-NEXT:    sw a1, 12(sp)1987; RV32-NEXT:    addi a0, sp, 81988; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma1989; RV32-NEXT:    vlse64.v v24, (a0), zero1990; RV32-NEXT:    vsetvli zero, zero, e64, m8, tu, ma1991; RV32-NEXT:    vnmsac.vv v16, v8, v241992; RV32-NEXT:    vmv8r.v v8, v161993; RV32-NEXT:    addi sp, sp, 161994; RV32-NEXT:    .cfi_def_cfa_offset 01995; RV32-NEXT:    ret1996;1997; RV64-LABEL: vnmsac_vx_nxv8i64_unmasked:1998; RV64:       # %bb.0:1999; RV64-NEXT:    vsetvli zero, a1, e64, m8, tu, ma2000; RV64-NEXT:    vnmsac.vx v16, a0, v82001; RV64-NEXT:    vmv8r.v v8, v162002; RV64-NEXT:    ret2003  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 02004  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer2005  %x = call <vscale x 8 x i64> @llvm.vp.mul.nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)2006  %y = call <vscale x 8 x i64> @llvm.vp.sub.nxv8i64(<vscale x 8 x i64> %c, <vscale x 8 x i64> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)2007  %u = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i64> %y, <vscale x 8 x i64> %c, i32 %evl)2008  ret <vscale x 8 x i64> %u2009}2010 2011define <vscale x 8 x i64> @vnmsac_vv_nxv8i64_ta(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b, <vscale x 8 x i64> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {2012; CHECK-LABEL: vnmsac_vv_nxv8i64_ta:2013; CHECK:       # %bb.0:2014; CHECK-NEXT:    vl8re64.v v24, (a0)2015; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu2016; CHECK-NEXT:    vnmsac.vv v24, v8, v16, v0.t2017; CHECK-NEXT:    vmv.v.v v8, v242018; CHECK-NEXT:    ret2019  %x = call <vscale x 8 x i64> @llvm.vp.mul.nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)2020  %y = call <vscale x 8 x i64> @llvm.vp.sub.nxv8i64(<vscale x 8 x i64> %c, <vscale x 8 x i64> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)2021  %u = call <vscale x 8 x i64> @llvm.vp.select.nxv8i64(<vscale x 8 x i1> %m, <vscale x 8 x i64> %y, <vscale x 8 x i64> %c, i32 %evl)2022  ret <vscale x 8 x i64> %u2023}2024 2025define <vscale x 8 x i64> @vnmsac_vx_nxv8i64_ta(<vscale x 8 x i64> %a, i64 %b, <vscale x 8 x i64> %c,  <vscale x 8 x i1> %m, i32 zeroext %evl) {2026; RV32-LABEL: vnmsac_vx_nxv8i64_ta:2027; RV32:       # %bb.0:2028; RV32-NEXT:    addi sp, sp, -162029; RV32-NEXT:    .cfi_def_cfa_offset 162030; RV32-NEXT:    sw a0, 8(sp)2031; RV32-NEXT:    sw a1, 12(sp)2032; RV32-NEXT:    addi a0, sp, 82033; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, mu2034; RV32-NEXT:    vlse64.v v24, (a0), zero2035; RV32-NEXT:    vnmsac.vv v16, v8, v24, v0.t2036; RV32-NEXT:    vmv.v.v v8, v162037; RV32-NEXT:    addi sp, sp, 162038; RV32-NEXT:    .cfi_def_cfa_offset 02039; RV32-NEXT:    ret2040;2041; RV64-LABEL: vnmsac_vx_nxv8i64_ta:2042; RV64:       # %bb.0:2043; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, mu2044; RV64-NEXT:    vnmsac.vx v16, a0, v8, v0.t2045; RV64-NEXT:    vmv.v.v v8, v162046; RV64-NEXT:    ret2047  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 02048  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer2049  %x = call <vscale x 8 x i64> @llvm.vp.mul.nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)2050  %y = call <vscale x 8 x i64> @llvm.vp.sub.nxv8i64(<vscale x 8 x i64> %c, <vscale x 8 x i64> %x, <vscale x 8 x i1> splat (i1 -1), i32 %evl)2051  %u = call <vscale x 8 x i64> @llvm.vp.select.nxv8i64(<vscale x 8 x i1> %m, <vscale x 8 x i64> %y, <vscale x 8 x i64> %c, i32 %evl)2052  ret <vscale x 8 x i64> %u2053}2054