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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -target-abi=ilp32 \3; RUN: -verify-machineinstrs < %s | FileCheck %s4; RUN: llc -mtriple=riscv64 -mattr=+v -target-abi=lp64 \5; RUN: -verify-machineinstrs < %s | FileCheck %s6 7define <vscale x 1 x i32> @vnsrl_wx_i64_nxv1i32(<vscale x 1 x i64> %va, i64 %b) {8; CHECK-LABEL: vnsrl_wx_i64_nxv1i32:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma11; CHECK-NEXT: vnsrl.wx v8, v8, a012; CHECK-NEXT: ret13 %head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 014 %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer15 %x = lshr <vscale x 1 x i64> %va, %splat16 %y = trunc <vscale x 1 x i64> %x to <vscale x 1 x i32>17 ret <vscale x 1 x i32> %y18}19 20define <vscale x 2 x i32> @vnsrl_wx_i64_nxv2i32(<vscale x 2 x i64> %va, i64 %b) {21; CHECK-LABEL: vnsrl_wx_i64_nxv2i32:22; CHECK: # %bb.0:23; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma24; CHECK-NEXT: vnsrl.wx v10, v8, a025; CHECK-NEXT: vmv.v.v v8, v1026; CHECK-NEXT: ret27 %head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 028 %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer29 %x = lshr <vscale x 2 x i64> %va, %splat30 %y = trunc <vscale x 2 x i64> %x to <vscale x 2 x i32>31 ret <vscale x 2 x i32> %y32}33 34define <vscale x 4 x i32> @vnsrl_wx_i64_nxv4i32(<vscale x 4 x i64> %va, i64 %b) {35; CHECK-LABEL: vnsrl_wx_i64_nxv4i32:36; CHECK: # %bb.0:37; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma38; CHECK-NEXT: vnsrl.wx v12, v8, a039; CHECK-NEXT: vmv.v.v v8, v1240; CHECK-NEXT: ret41 %head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 042 %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer43 %x = lshr <vscale x 4 x i64> %va, %splat44 %y = trunc <vscale x 4 x i64> %x to <vscale x 4 x i32>45 ret <vscale x 4 x i32> %y46}47 48define <vscale x 8 x i32> @vnsrl_wx_i64_nxv8i32(<vscale x 8 x i64> %va, i64 %b) {49; CHECK-LABEL: vnsrl_wx_i64_nxv8i32:50; CHECK: # %bb.0:51; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma52; CHECK-NEXT: vnsrl.wx v16, v8, a053; CHECK-NEXT: vmv.v.v v8, v1654; CHECK-NEXT: ret55 %head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 056 %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer57 %x = lshr <vscale x 8 x i64> %va, %splat58 %y = trunc <vscale x 8 x i64> %x to <vscale x 8 x i32>59 ret <vscale x 8 x i32> %y60}61 62define <vscale x 1 x i32> @vnsrl_wv_nxv1i32_sext(<vscale x 1 x i64> %va, <vscale x 1 x i32> %vb) {63; CHECK-LABEL: vnsrl_wv_nxv1i32_sext:64; CHECK: # %bb.0:65; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma66; CHECK-NEXT: vnsrl.wv v8, v8, v967; CHECK-NEXT: ret68 %vc = sext <vscale x 1 x i32> %vb to <vscale x 1 x i64>69 %x = lshr <vscale x 1 x i64> %va, %vc70 %y = trunc <vscale x 1 x i64> %x to <vscale x 1 x i32>71 ret <vscale x 1 x i32> %y72}73 74define <vscale x 1 x i32> @vnsrl_wx_i32_nxv1i32_sext(<vscale x 1 x i64> %va, i32 %b) {75; CHECK-LABEL: vnsrl_wx_i32_nxv1i32_sext:76; CHECK: # %bb.0:77; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma78; CHECK-NEXT: vnsrl.wx v8, v8, a079; CHECK-NEXT: ret80 %head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 081 %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer82 %vb = sext <vscale x 1 x i32> %splat to <vscale x 1 x i64>83 %x = lshr <vscale x 1 x i64> %va, %vb84 %y = trunc <vscale x 1 x i64> %x to <vscale x 1 x i32>85 ret <vscale x 1 x i32> %y86}87 88define <vscale x 1 x i32> @vnsrl_wx_i16_nxv1i32_sext(<vscale x 1 x i64> %va, i16 %b) {89; CHECK-LABEL: vnsrl_wx_i16_nxv1i32_sext:90; CHECK: # %bb.0:91; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma92; CHECK-NEXT: vnsrl.wx v8, v8, a093; CHECK-NEXT: ret94 %head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 095 %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer96 %vb = sext <vscale x 1 x i16> %splat to <vscale x 1 x i64>97 %x = lshr <vscale x 1 x i64> %va, %vb98 %y = trunc <vscale x 1 x i64> %x to <vscale x 1 x i32>99 ret <vscale x 1 x i32> %y100}101 102define <vscale x 1 x i32> @vnsrl_wx_i8_nxv1i32_sext(<vscale x 1 x i64> %va, i8 %b) {103; CHECK-LABEL: vnsrl_wx_i8_nxv1i32_sext:104; CHECK: # %bb.0:105; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma106; CHECK-NEXT: vnsrl.wx v8, v8, a0107; CHECK-NEXT: ret108 %head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0109 %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer110 %vb = sext <vscale x 1 x i8> %splat to <vscale x 1 x i64>111 %x = lshr <vscale x 1 x i64> %va, %vb112 %y = trunc <vscale x 1 x i64> %x to <vscale x 1 x i32>113 ret <vscale x 1 x i32> %y114}115 116define <vscale x 1 x i32> @vnsrl_wi_i32_nxv1i32_sext(<vscale x 1 x i64> %va) {117; CHECK-LABEL: vnsrl_wi_i32_nxv1i32_sext:118; CHECK: # %bb.0:119; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma120; CHECK-NEXT: vnsrl.wi v8, v8, 15121; CHECK-NEXT: ret122 %vb = sext <vscale x 1 x i32> splat (i32 15) to <vscale x 1 x i64>123 %x = lshr <vscale x 1 x i64> %va, %vb124 %y = trunc <vscale x 1 x i64> %x to <vscale x 1 x i32>125 ret <vscale x 1 x i32> %y126}127 128define <vscale x 2 x i32> @vnsrl_wv_nxv2i32_sext(<vscale x 2 x i64> %va, <vscale x 2 x i32> %vb) {129; CHECK-LABEL: vnsrl_wv_nxv2i32_sext:130; CHECK: # %bb.0:131; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma132; CHECK-NEXT: vnsrl.wv v11, v8, v10133; CHECK-NEXT: vmv.v.v v8, v11134; CHECK-NEXT: ret135 %vc = sext <vscale x 2 x i32> %vb to <vscale x 2 x i64>136 %x = lshr <vscale x 2 x i64> %va, %vc137 %y = trunc <vscale x 2 x i64> %x to <vscale x 2 x i32>138 ret <vscale x 2 x i32> %y139}140 141define <vscale x 2 x i32> @vnsrl_wx_i32_nxv2i32_sext(<vscale x 2 x i64> %va, i32 %b) {142; CHECK-LABEL: vnsrl_wx_i32_nxv2i32_sext:143; CHECK: # %bb.0:144; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma145; CHECK-NEXT: vnsrl.wx v10, v8, a0146; CHECK-NEXT: vmv.v.v v8, v10147; CHECK-NEXT: ret148 %head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0149 %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer150 %vb = sext <vscale x 2 x i32> %splat to <vscale x 2 x i64>151 %x = lshr <vscale x 2 x i64> %va, %vb152 %y = trunc <vscale x 2 x i64> %x to <vscale x 2 x i32>153 ret <vscale x 2 x i32> %y154}155 156define <vscale x 2 x i32> @vnsrl_wx_i16_nxv2i32_sext(<vscale x 2 x i64> %va, i16 %b) {157; CHECK-LABEL: vnsrl_wx_i16_nxv2i32_sext:158; CHECK: # %bb.0:159; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma160; CHECK-NEXT: vnsrl.wx v10, v8, a0161; CHECK-NEXT: vmv.v.v v8, v10162; CHECK-NEXT: ret163 %head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0164 %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer165 %vb = sext <vscale x 2 x i16> %splat to <vscale x 2 x i64>166 %x = lshr <vscale x 2 x i64> %va, %vb167 %y = trunc <vscale x 2 x i64> %x to <vscale x 2 x i32>168 ret <vscale x 2 x i32> %y169}170 171define <vscale x 2 x i32> @vnsrl_wx_i8_nxv2i32_sext(<vscale x 2 x i64> %va, i8 %b) {172; CHECK-LABEL: vnsrl_wx_i8_nxv2i32_sext:173; CHECK: # %bb.0:174; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma175; CHECK-NEXT: vnsrl.wx v10, v8, a0176; CHECK-NEXT: vmv.v.v v8, v10177; CHECK-NEXT: ret178 %head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0179 %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer180 %vb = sext <vscale x 2 x i8> %splat to <vscale x 2 x i64>181 %x = lshr <vscale x 2 x i64> %va, %vb182 %y = trunc <vscale x 2 x i64> %x to <vscale x 2 x i32>183 ret <vscale x 2 x i32> %y184}185 186define <vscale x 2 x i32> @vnsrl_wi_i32_nxv2i32_sext(<vscale x 2 x i64> %va) {187; CHECK-LABEL: vnsrl_wi_i32_nxv2i32_sext:188; CHECK: # %bb.0:189; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma190; CHECK-NEXT: vnsrl.wi v10, v8, 15191; CHECK-NEXT: vmv.v.v v8, v10192; CHECK-NEXT: ret193 %vb = sext <vscale x 2 x i32> splat (i32 15) to <vscale x 2 x i64>194 %x = lshr <vscale x 2 x i64> %va, %vb195 %y = trunc <vscale x 2 x i64> %x to <vscale x 2 x i32>196 ret <vscale x 2 x i32> %y197}198 199define <vscale x 4 x i32> @vnsrl_wv_nxv4i32_sext(<vscale x 4 x i64> %va, <vscale x 4 x i32> %vb) {200; CHECK-LABEL: vnsrl_wv_nxv4i32_sext:201; CHECK: # %bb.0:202; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma203; CHECK-NEXT: vnsrl.wv v14, v8, v12204; CHECK-NEXT: vmv.v.v v8, v14205; CHECK-NEXT: ret206 %vc = sext <vscale x 4 x i32> %vb to <vscale x 4 x i64>207 %x = lshr <vscale x 4 x i64> %va, %vc208 %y = trunc <vscale x 4 x i64> %x to <vscale x 4 x i32>209 ret <vscale x 4 x i32> %y210}211 212define <vscale x 4 x i32> @vnsrl_wx_i32_nxv4i32_sext(<vscale x 4 x i64> %va, i32 %b) {213; CHECK-LABEL: vnsrl_wx_i32_nxv4i32_sext:214; CHECK: # %bb.0:215; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma216; CHECK-NEXT: vnsrl.wx v12, v8, a0217; CHECK-NEXT: vmv.v.v v8, v12218; CHECK-NEXT: ret219 %head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0220 %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer221 %vb = sext <vscale x 4 x i32> %splat to <vscale x 4 x i64>222 %x = lshr <vscale x 4 x i64> %va, %vb223 %y = trunc <vscale x 4 x i64> %x to <vscale x 4 x i32>224 ret <vscale x 4 x i32> %y225}226 227define <vscale x 4 x i32> @vnsrl_wx_i16_nxv4i32_sext(<vscale x 4 x i64> %va, i16 %b) {228; CHECK-LABEL: vnsrl_wx_i16_nxv4i32_sext:229; CHECK: # %bb.0:230; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma231; CHECK-NEXT: vnsrl.wx v12, v8, a0232; CHECK-NEXT: vmv.v.v v8, v12233; CHECK-NEXT: ret234 %head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0235 %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer236 %vb = sext <vscale x 4 x i16> %splat to <vscale x 4 x i64>237 %x = lshr <vscale x 4 x i64> %va, %vb238 %y = trunc <vscale x 4 x i64> %x to <vscale x 4 x i32>239 ret <vscale x 4 x i32> %y240}241 242define <vscale x 4 x i32> @vnsrl_wx_i8_nxv4i32_sext(<vscale x 4 x i64> %va, i8 %b) {243; CHECK-LABEL: vnsrl_wx_i8_nxv4i32_sext:244; CHECK: # %bb.0:245; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma246; CHECK-NEXT: vnsrl.wx v12, v8, a0247; CHECK-NEXT: vmv.v.v v8, v12248; CHECK-NEXT: ret249 %head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0250 %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer251 %vb = sext <vscale x 4 x i8> %splat to <vscale x 4 x i64>252 %x = lshr <vscale x 4 x i64> %va, %vb253 %y = trunc <vscale x 4 x i64> %x to <vscale x 4 x i32>254 ret <vscale x 4 x i32> %y255}256 257define <vscale x 4 x i32> @vnsrl_wi_i32_nxv4i32_sext(<vscale x 4 x i64> %va) {258; CHECK-LABEL: vnsrl_wi_i32_nxv4i32_sext:259; CHECK: # %bb.0:260; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma261; CHECK-NEXT: vnsrl.wi v12, v8, 15262; CHECK-NEXT: vmv.v.v v8, v12263; CHECK-NEXT: ret264 %vb = sext <vscale x 4 x i32> splat (i32 15) to <vscale x 4 x i64>265 %x = lshr <vscale x 4 x i64> %va, %vb266 %y = trunc <vscale x 4 x i64> %x to <vscale x 4 x i32>267 ret <vscale x 4 x i32> %y268}269 270define <vscale x 8 x i32> @vnsrl_wv_nxv8i32_sext(<vscale x 8 x i64> %va, <vscale x 8 x i32> %vb) {271; CHECK-LABEL: vnsrl_wv_nxv8i32_sext:272; CHECK: # %bb.0:273; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma274; CHECK-NEXT: vnsrl.wv v20, v8, v16275; CHECK-NEXT: vmv.v.v v8, v20276; CHECK-NEXT: ret277 %vc = sext <vscale x 8 x i32> %vb to <vscale x 8 x i64>278 %x = lshr <vscale x 8 x i64> %va, %vc279 %y = trunc <vscale x 8 x i64> %x to <vscale x 8 x i32>280 ret <vscale x 8 x i32> %y281}282 283define <vscale x 8 x i32> @vnsrl_wx_i32_nxv8i32_sext(<vscale x 8 x i64> %va, i32 %b) {284; CHECK-LABEL: vnsrl_wx_i32_nxv8i32_sext:285; CHECK: # %bb.0:286; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma287; CHECK-NEXT: vnsrl.wx v16, v8, a0288; CHECK-NEXT: vmv.v.v v8, v16289; CHECK-NEXT: ret290 %head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0291 %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer292 %vb = sext <vscale x 8 x i32> %splat to <vscale x 8 x i64>293 %x = lshr <vscale x 8 x i64> %va, %vb294 %y = trunc <vscale x 8 x i64> %x to <vscale x 8 x i32>295 ret <vscale x 8 x i32> %y296}297 298define <vscale x 8 x i32> @vnsrl_wx_i16_nxv8i32_sext(<vscale x 8 x i64> %va, i16 %b) {299; CHECK-LABEL: vnsrl_wx_i16_nxv8i32_sext:300; CHECK: # %bb.0:301; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma302; CHECK-NEXT: vnsrl.wx v16, v8, a0303; CHECK-NEXT: vmv.v.v v8, v16304; CHECK-NEXT: ret305 %head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0306 %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer307 %vb = sext <vscale x 8 x i16> %splat to <vscale x 8 x i64>308 %x = lshr <vscale x 8 x i64> %va, %vb309 %y = trunc <vscale x 8 x i64> %x to <vscale x 8 x i32>310 ret <vscale x 8 x i32> %y311}312 313define <vscale x 8 x i32> @vnsrl_wx_i8_nxv8i32_sext(<vscale x 8 x i64> %va, i8 %b) {314; CHECK-LABEL: vnsrl_wx_i8_nxv8i32_sext:315; CHECK: # %bb.0:316; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma317; CHECK-NEXT: vnsrl.wx v16, v8, a0318; CHECK-NEXT: vmv.v.v v8, v16319; CHECK-NEXT: ret320 %head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0321 %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer322 %vb = sext <vscale x 8 x i8> %splat to <vscale x 8 x i64>323 %x = lshr <vscale x 8 x i64> %va, %vb324 %y = trunc <vscale x 8 x i64> %x to <vscale x 8 x i32>325 ret <vscale x 8 x i32> %y326}327 328define <vscale x 8 x i32> @vnsrl_wi_i32_nxv8i32_sext(<vscale x 8 x i64> %va) {329; CHECK-LABEL: vnsrl_wi_i32_nxv8i32_sext:330; CHECK: # %bb.0:331; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma332; CHECK-NEXT: vnsrl.wi v16, v8, 15333; CHECK-NEXT: vmv.v.v v8, v16334; CHECK-NEXT: ret335 %vb = sext <vscale x 8 x i32> splat (i32 15) to <vscale x 8 x i64>336 %x = lshr <vscale x 8 x i64> %va, %vb337 %y = trunc <vscale x 8 x i64> %x to <vscale x 8 x i32>338 ret <vscale x 8 x i32> %y339}340 341define <vscale x 1 x i32> @vnsrl_wv_nxv1i32_zext(<vscale x 1 x i64> %va, <vscale x 1 x i32> %vb) {342; CHECK-LABEL: vnsrl_wv_nxv1i32_zext:343; CHECK: # %bb.0:344; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma345; CHECK-NEXT: vnsrl.wv v8, v8, v9346; CHECK-NEXT: ret347 %vc = zext <vscale x 1 x i32> %vb to <vscale x 1 x i64>348 %x = lshr <vscale x 1 x i64> %va, %vc349 %y = trunc <vscale x 1 x i64> %x to <vscale x 1 x i32>350 ret <vscale x 1 x i32> %y351}352 353define <vscale x 1 x i32> @vnsrl_wx_i32_nxv1i32_zext(<vscale x 1 x i64> %va, i32 %b) {354; CHECK-LABEL: vnsrl_wx_i32_nxv1i32_zext:355; CHECK: # %bb.0:356; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma357; CHECK-NEXT: vnsrl.wx v8, v8, a0358; CHECK-NEXT: ret359 %head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0360 %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer361 %vb = zext <vscale x 1 x i32> %splat to <vscale x 1 x i64>362 %x = lshr <vscale x 1 x i64> %va, %vb363 %y = trunc <vscale x 1 x i64> %x to <vscale x 1 x i32>364 ret <vscale x 1 x i32> %y365}366 367define <vscale x 1 x i32> @vnsrl_wx_i16_nxv1i32_zext(<vscale x 1 x i64> %va, i16 %b) {368; CHECK-LABEL: vnsrl_wx_i16_nxv1i32_zext:369; CHECK: # %bb.0:370; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma371; CHECK-NEXT: vnsrl.wx v8, v8, a0372; CHECK-NEXT: ret373 %head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0374 %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer375 %vb = zext <vscale x 1 x i16> %splat to <vscale x 1 x i64>376 %x = lshr <vscale x 1 x i64> %va, %vb377 %y = trunc <vscale x 1 x i64> %x to <vscale x 1 x i32>378 ret <vscale x 1 x i32> %y379}380 381define <vscale x 1 x i32> @vnsrl_wx_i8_nxv1i32_zext(<vscale x 1 x i64> %va, i8 %b) {382; CHECK-LABEL: vnsrl_wx_i8_nxv1i32_zext:383; CHECK: # %bb.0:384; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma385; CHECK-NEXT: vnsrl.wx v8, v8, a0386; CHECK-NEXT: ret387 %head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0388 %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer389 %vb = sext <vscale x 1 x i8> %splat to <vscale x 1 x i64>390 %x = lshr <vscale x 1 x i64> %va, %vb391 %y = trunc <vscale x 1 x i64> %x to <vscale x 1 x i32>392 ret <vscale x 1 x i32> %y393}394 395define <vscale x 1 x i32> @vnsrl_wi_i32_nxv1i32_zext(<vscale x 1 x i64> %va) {396; CHECK-LABEL: vnsrl_wi_i32_nxv1i32_zext:397; CHECK: # %bb.0:398; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma399; CHECK-NEXT: vnsrl.wi v8, v8, 15400; CHECK-NEXT: ret401 %vb = zext <vscale x 1 x i32> splat (i32 15) to <vscale x 1 x i64>402 %x = lshr <vscale x 1 x i64> %va, %vb403 %y = trunc <vscale x 1 x i64> %x to <vscale x 1 x i32>404 ret <vscale x 1 x i32> %y405}406 407define <vscale x 2 x i32> @vnsrl_wv_nxv2i32_zext(<vscale x 2 x i64> %va, <vscale x 2 x i32> %vb) {408; CHECK-LABEL: vnsrl_wv_nxv2i32_zext:409; CHECK: # %bb.0:410; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma411; CHECK-NEXT: vnsrl.wv v11, v8, v10412; CHECK-NEXT: vmv.v.v v8, v11413; CHECK-NEXT: ret414 %vc = zext <vscale x 2 x i32> %vb to <vscale x 2 x i64>415 %x = lshr <vscale x 2 x i64> %va, %vc416 %y = trunc <vscale x 2 x i64> %x to <vscale x 2 x i32>417 ret <vscale x 2 x i32> %y418}419 420define <vscale x 2 x i32> @vnsrl_wx_i32_nxv2i32_zext(<vscale x 2 x i64> %va, i32 %b) {421; CHECK-LABEL: vnsrl_wx_i32_nxv2i32_zext:422; CHECK: # %bb.0:423; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma424; CHECK-NEXT: vnsrl.wx v10, v8, a0425; CHECK-NEXT: vmv.v.v v8, v10426; CHECK-NEXT: ret427 %head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0428 %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer429 %vb = zext <vscale x 2 x i32> %splat to <vscale x 2 x i64>430 %x = lshr <vscale x 2 x i64> %va, %vb431 %y = trunc <vscale x 2 x i64> %x to <vscale x 2 x i32>432 ret <vscale x 2 x i32> %y433}434 435define <vscale x 2 x i32> @vnsrl_wx_i16_nxv2i32_zext(<vscale x 2 x i64> %va, i16 %b) {436; CHECK-LABEL: vnsrl_wx_i16_nxv2i32_zext:437; CHECK: # %bb.0:438; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma439; CHECK-NEXT: vnsrl.wx v10, v8, a0440; CHECK-NEXT: vmv.v.v v8, v10441; CHECK-NEXT: ret442 %head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0443 %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer444 %vb = zext <vscale x 2 x i16> %splat to <vscale x 2 x i64>445 %x = lshr <vscale x 2 x i64> %va, %vb446 %y = trunc <vscale x 2 x i64> %x to <vscale x 2 x i32>447 ret <vscale x 2 x i32> %y448}449 450define <vscale x 2 x i32> @vnsrl_wx_i8_nxv2i32_zext(<vscale x 2 x i64> %va, i8 %b) {451; CHECK-LABEL: vnsrl_wx_i8_nxv2i32_zext:452; CHECK: # %bb.0:453; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma454; CHECK-NEXT: vnsrl.wx v10, v8, a0455; CHECK-NEXT: vmv.v.v v8, v10456; CHECK-NEXT: ret457 %head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0458 %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer459 %vb = sext <vscale x 2 x i8> %splat to <vscale x 2 x i64>460 %x = lshr <vscale x 2 x i64> %va, %vb461 %y = trunc <vscale x 2 x i64> %x to <vscale x 2 x i32>462 ret <vscale x 2 x i32> %y463}464 465define <vscale x 2 x i32> @vnsrl_wi_i32_nxv2i32_zext(<vscale x 2 x i64> %va) {466; CHECK-LABEL: vnsrl_wi_i32_nxv2i32_zext:467; CHECK: # %bb.0:468; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma469; CHECK-NEXT: vnsrl.wi v10, v8, 15470; CHECK-NEXT: vmv.v.v v8, v10471; CHECK-NEXT: ret472 %vb = zext <vscale x 2 x i32> splat (i32 15) to <vscale x 2 x i64>473 %x = lshr <vscale x 2 x i64> %va, %vb474 %y = trunc <vscale x 2 x i64> %x to <vscale x 2 x i32>475 ret <vscale x 2 x i32> %y476}477 478define <vscale x 4 x i32> @vnsrl_wv_nxv4i32_zext(<vscale x 4 x i64> %va, <vscale x 4 x i32> %vb) {479; CHECK-LABEL: vnsrl_wv_nxv4i32_zext:480; CHECK: # %bb.0:481; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma482; CHECK-NEXT: vnsrl.wv v14, v8, v12483; CHECK-NEXT: vmv.v.v v8, v14484; CHECK-NEXT: ret485 %vc = zext <vscale x 4 x i32> %vb to <vscale x 4 x i64>486 %x = lshr <vscale x 4 x i64> %va, %vc487 %y = trunc <vscale x 4 x i64> %x to <vscale x 4 x i32>488 ret <vscale x 4 x i32> %y489}490 491define <vscale x 4 x i32> @vnsrl_wx_i32_nxv4i32_zext(<vscale x 4 x i64> %va, i32 %b) {492; CHECK-LABEL: vnsrl_wx_i32_nxv4i32_zext:493; CHECK: # %bb.0:494; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma495; CHECK-NEXT: vnsrl.wx v12, v8, a0496; CHECK-NEXT: vmv.v.v v8, v12497; CHECK-NEXT: ret498 %head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0499 %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer500 %vb = zext <vscale x 4 x i32> %splat to <vscale x 4 x i64>501 %x = lshr <vscale x 4 x i64> %va, %vb502 %y = trunc <vscale x 4 x i64> %x to <vscale x 4 x i32>503 ret <vscale x 4 x i32> %y504}505 506define <vscale x 4 x i32> @vnsrl_wx_i16_nxv4i32_zext(<vscale x 4 x i64> %va, i16 %b) {507; CHECK-LABEL: vnsrl_wx_i16_nxv4i32_zext:508; CHECK: # %bb.0:509; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma510; CHECK-NEXT: vnsrl.wx v12, v8, a0511; CHECK-NEXT: vmv.v.v v8, v12512; CHECK-NEXT: ret513 %head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0514 %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer515 %vb = zext <vscale x 4 x i16> %splat to <vscale x 4 x i64>516 %x = lshr <vscale x 4 x i64> %va, %vb517 %y = trunc <vscale x 4 x i64> %x to <vscale x 4 x i32>518 ret <vscale x 4 x i32> %y519}520 521define <vscale x 4 x i32> @vnsrl_wx_i8_nxv4i32_zext(<vscale x 4 x i64> %va, i8 %b) {522; CHECK-LABEL: vnsrl_wx_i8_nxv4i32_zext:523; CHECK: # %bb.0:524; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma525; CHECK-NEXT: vnsrl.wx v12, v8, a0526; CHECK-NEXT: vmv.v.v v8, v12527; CHECK-NEXT: ret528 %head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0529 %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer530 %vb = sext <vscale x 4 x i8> %splat to <vscale x 4 x i64>531 %x = lshr <vscale x 4 x i64> %va, %vb532 %y = trunc <vscale x 4 x i64> %x to <vscale x 4 x i32>533 ret <vscale x 4 x i32> %y534}535 536define <vscale x 4 x i32> @vnsrl_wi_i32_nxv4i32_zext(<vscale x 4 x i64> %va) {537; CHECK-LABEL: vnsrl_wi_i32_nxv4i32_zext:538; CHECK: # %bb.0:539; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma540; CHECK-NEXT: vnsrl.wi v12, v8, 15541; CHECK-NEXT: vmv.v.v v8, v12542; CHECK-NEXT: ret543 %vb = zext <vscale x 4 x i32> splat (i32 15) to <vscale x 4 x i64>544 %x = lshr <vscale x 4 x i64> %va, %vb545 %y = trunc <vscale x 4 x i64> %x to <vscale x 4 x i32>546 ret <vscale x 4 x i32> %y547}548 549define <vscale x 8 x i32> @vnsrl_wv_nxv8i32_zext(<vscale x 8 x i64> %va, <vscale x 8 x i32> %vb) {550; CHECK-LABEL: vnsrl_wv_nxv8i32_zext:551; CHECK: # %bb.0:552; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma553; CHECK-NEXT: vnsrl.wv v20, v8, v16554; CHECK-NEXT: vmv.v.v v8, v20555; CHECK-NEXT: ret556 %vc = zext <vscale x 8 x i32> %vb to <vscale x 8 x i64>557 %x = lshr <vscale x 8 x i64> %va, %vc558 %y = trunc <vscale x 8 x i64> %x to <vscale x 8 x i32>559 ret <vscale x 8 x i32> %y560}561 562define <vscale x 8 x i32> @vnsrl_wx_i32_nxv8i32_zext(<vscale x 8 x i64> %va, i32 %b) {563; CHECK-LABEL: vnsrl_wx_i32_nxv8i32_zext:564; CHECK: # %bb.0:565; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma566; CHECK-NEXT: vnsrl.wx v16, v8, a0567; CHECK-NEXT: vmv.v.v v8, v16568; CHECK-NEXT: ret569 %head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0570 %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer571 %vb = zext <vscale x 8 x i32> %splat to <vscale x 8 x i64>572 %x = lshr <vscale x 8 x i64> %va, %vb573 %y = trunc <vscale x 8 x i64> %x to <vscale x 8 x i32>574 ret <vscale x 8 x i32> %y575}576 577define <vscale x 8 x i32> @vnsrl_wx_i16_nxv8i32_zext(<vscale x 8 x i64> %va, i16 %b) {578; CHECK-LABEL: vnsrl_wx_i16_nxv8i32_zext:579; CHECK: # %bb.0:580; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma581; CHECK-NEXT: vnsrl.wx v16, v8, a0582; CHECK-NEXT: vmv.v.v v8, v16583; CHECK-NEXT: ret584 %head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0585 %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer586 %vb = zext <vscale x 8 x i16> %splat to <vscale x 8 x i64>587 %x = lshr <vscale x 8 x i64> %va, %vb588 %y = trunc <vscale x 8 x i64> %x to <vscale x 8 x i32>589 ret <vscale x 8 x i32> %y590}591 592define <vscale x 8 x i32> @vnsrl_wx_i8_nxv8i32_zext(<vscale x 8 x i64> %va, i8 %b) {593; CHECK-LABEL: vnsrl_wx_i8_nxv8i32_zext:594; CHECK: # %bb.0:595; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma596; CHECK-NEXT: vnsrl.wx v16, v8, a0597; CHECK-NEXT: vmv.v.v v8, v16598; CHECK-NEXT: ret599 %head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0600 %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer601 %vb = sext <vscale x 8 x i8> %splat to <vscale x 8 x i64>602 %x = lshr <vscale x 8 x i64> %va, %vb603 %y = trunc <vscale x 8 x i64> %x to <vscale x 8 x i32>604 ret <vscale x 8 x i32> %y605}606 607define <vscale x 8 x i32> @vnsrl_wi_i32_nxv8i32_zext(<vscale x 8 x i64> %va) {608; CHECK-LABEL: vnsrl_wi_i32_nxv8i32_zext:609; CHECK: # %bb.0:610; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma611; CHECK-NEXT: vnsrl.wi v16, v8, 15612; CHECK-NEXT: vmv.v.v v8, v16613; CHECK-NEXT: ret614 %vb = zext <vscale x 8 x i32> splat (i32 15) to <vscale x 8 x i64>615 %x = lshr <vscale x 8 x i64> %va, %vb616 %y = trunc <vscale x 8 x i64> %x to <vscale x 8 x i32>617 ret <vscale x 8 x i32> %y618}619 620define <vscale x 1 x i16> @vnsrl_wx_i64_nxv1i16(<vscale x 1 x i32> %va, i64 %b) {621; CHECK-LABEL: vnsrl_wx_i64_nxv1i16:622; CHECK: # %bb.0:623; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, ma624; CHECK-NEXT: vnsrl.wx v8, v8, a0625; CHECK-NEXT: ret626 %head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0627 %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer628 %vb = trunc <vscale x 1 x i64> %splat to <vscale x 1 x i32>629 %x = lshr <vscale x 1 x i32> %va, %vb630 %y = trunc <vscale x 1 x i32> %x to <vscale x 1 x i16>631 ret <vscale x 1 x i16> %y632}633 634define <vscale x 1 x i8> @vnsrl_wx_i64_nxv1i8(<vscale x 1 x i16> %va, i64 %b) {635; CHECK-LABEL: vnsrl_wx_i64_nxv1i8:636; CHECK: # %bb.0:637; CHECK-NEXT: vsetvli a1, zero, e8, mf8, ta, ma638; CHECK-NEXT: vnsrl.wx v8, v8, a0639; CHECK-NEXT: ret640 %head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0641 %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer642 %vb = trunc <vscale x 1 x i64> %splat to <vscale x 1 x i16>643 %x = lshr <vscale x 1 x i16> %va, %vb644 %y = trunc <vscale x 1 x i16> %x to <vscale x 1 x i8>645 ret <vscale x 1 x i8> %y646}647