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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <vscale x 8 x i7> @vor_vx_nxv8i7(<vscale x 8 x i7> %a, i7 signext %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {8; CHECK-LABEL: vor_vx_nxv8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma11; CHECK-NEXT: vor.vx v8, v8, a0, v0.t12; CHECK-NEXT: ret13 %elt.head = insertelement <vscale x 8 x i7> poison, i7 %b, i32 014 %vb = shufflevector <vscale x 8 x i7> %elt.head, <vscale x 8 x i7> poison, <vscale x 8 x i32> zeroinitializer15 %v = call <vscale x 8 x i7> @llvm.vp.or.nxv8i7(<vscale x 8 x i7> %a, <vscale x 8 x i7> %vb, <vscale x 8 x i1> %mask, i32 %evl)16 ret <vscale x 8 x i7> %v17}18 19define <vscale x 1 x i8> @vor_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {20; CHECK-LABEL: vor_vv_nxv1i8:21; CHECK: # %bb.0:22; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma23; CHECK-NEXT: vor.vv v8, v8, v9, v0.t24; CHECK-NEXT: ret25 %v = call <vscale x 1 x i8> @llvm.vp.or.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 %evl)26 ret <vscale x 1 x i8> %v27}28 29define <vscale x 1 x i8> @vor_vv_nxv1i8_unmasked(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, i32 zeroext %evl) {30; CHECK-LABEL: vor_vv_nxv1i8_unmasked:31; CHECK: # %bb.0:32; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma33; CHECK-NEXT: vor.vv v8, v8, v934; CHECK-NEXT: ret35 %v = call <vscale x 1 x i8> @llvm.vp.or.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)36 ret <vscale x 1 x i8> %v37}38 39define <vscale x 1 x i8> @vor_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {40; CHECK-LABEL: vor_vx_nxv1i8:41; CHECK: # %bb.0:42; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma43; CHECK-NEXT: vor.vx v8, v8, a0, v0.t44; CHECK-NEXT: ret45 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 046 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer47 %v = call <vscale x 1 x i8> @llvm.vp.or.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 %evl)48 ret <vscale x 1 x i8> %v49}50 51define <vscale x 1 x i8> @vor_vx_nxv1i8_unmasked(<vscale x 1 x i8> %va, i8 %b, i32 zeroext %evl) {52; CHECK-LABEL: vor_vx_nxv1i8_unmasked:53; CHECK: # %bb.0:54; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma55; CHECK-NEXT: vor.vx v8, v8, a056; CHECK-NEXT: ret57 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 058 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer59 %v = call <vscale x 1 x i8> @llvm.vp.or.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)60 ret <vscale x 1 x i8> %v61}62 63define <vscale x 1 x i8> @vor_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {64; CHECK-LABEL: vor_vi_nxv1i8:65; CHECK: # %bb.0:66; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma67; CHECK-NEXT: vor.vi v8, v8, 5, v0.t68; CHECK-NEXT: ret69 %v = call <vscale x 1 x i8> @llvm.vp.or.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 5), <vscale x 1 x i1> %m, i32 %evl)70 ret <vscale x 1 x i8> %v71}72 73define <vscale x 1 x i8> @vor_vi_nxv1i8_unmasked(<vscale x 1 x i8> %va, i32 zeroext %evl) {74; CHECK-LABEL: vor_vi_nxv1i8_unmasked:75; CHECK: # %bb.0:76; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma77; CHECK-NEXT: vor.vi v8, v8, 578; CHECK-NEXT: ret79 %v = call <vscale x 1 x i8> @llvm.vp.or.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 5), <vscale x 1 x i1> splat (i1 true), i32 %evl)80 ret <vscale x 1 x i8> %v81}82 83define <vscale x 2 x i8> @vor_vv_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {84; CHECK-LABEL: vor_vv_nxv2i8:85; CHECK: # %bb.0:86; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma87; CHECK-NEXT: vor.vv v8, v8, v9, v0.t88; CHECK-NEXT: ret89 %v = call <vscale x 2 x i8> @llvm.vp.or.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 %evl)90 ret <vscale x 2 x i8> %v91}92 93define <vscale x 2 x i8> @vor_vv_nxv2i8_unmasked(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, i32 zeroext %evl) {94; CHECK-LABEL: vor_vv_nxv2i8_unmasked:95; CHECK: # %bb.0:96; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma97; CHECK-NEXT: vor.vv v8, v8, v998; CHECK-NEXT: ret99 %v = call <vscale x 2 x i8> @llvm.vp.or.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)100 ret <vscale x 2 x i8> %v101}102 103define <vscale x 2 x i8> @vor_vx_nxv2i8(<vscale x 2 x i8> %va, i8 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {104; CHECK-LABEL: vor_vx_nxv2i8:105; CHECK: # %bb.0:106; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma107; CHECK-NEXT: vor.vx v8, v8, a0, v0.t108; CHECK-NEXT: ret109 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0110 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer111 %v = call <vscale x 2 x i8> @llvm.vp.or.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 %evl)112 ret <vscale x 2 x i8> %v113}114 115define <vscale x 2 x i8> @vor_vx_nxv2i8_unmasked(<vscale x 2 x i8> %va, i8 %b, i32 zeroext %evl) {116; CHECK-LABEL: vor_vx_nxv2i8_unmasked:117; CHECK: # %bb.0:118; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma119; CHECK-NEXT: vor.vx v8, v8, a0120; CHECK-NEXT: ret121 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0122 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer123 %v = call <vscale x 2 x i8> @llvm.vp.or.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)124 ret <vscale x 2 x i8> %v125}126 127define <vscale x 2 x i8> @vor_vi_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {128; CHECK-LABEL: vor_vi_nxv2i8:129; CHECK: # %bb.0:130; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma131; CHECK-NEXT: vor.vi v8, v8, 5, v0.t132; CHECK-NEXT: ret133 %v = call <vscale x 2 x i8> @llvm.vp.or.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> splat (i8 5), <vscale x 2 x i1> %m, i32 %evl)134 ret <vscale x 2 x i8> %v135}136 137define <vscale x 2 x i8> @vor_vi_nxv2i8_unmasked(<vscale x 2 x i8> %va, i32 zeroext %evl) {138; CHECK-LABEL: vor_vi_nxv2i8_unmasked:139; CHECK: # %bb.0:140; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma141; CHECK-NEXT: vor.vi v8, v8, 5142; CHECK-NEXT: ret143 %v = call <vscale x 2 x i8> @llvm.vp.or.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> splat (i8 5), <vscale x 2 x i1> splat (i1 true), i32 %evl)144 ret <vscale x 2 x i8> %v145}146 147define <vscale x 4 x i8> @vor_vv_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {148; CHECK-LABEL: vor_vv_nxv4i8:149; CHECK: # %bb.0:150; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma151; CHECK-NEXT: vor.vv v8, v8, v9, v0.t152; CHECK-NEXT: ret153 %v = call <vscale x 4 x i8> @llvm.vp.or.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 %evl)154 ret <vscale x 4 x i8> %v155}156 157define <vscale x 4 x i8> @vor_vv_nxv4i8_unmasked(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, i32 zeroext %evl) {158; CHECK-LABEL: vor_vv_nxv4i8_unmasked:159; CHECK: # %bb.0:160; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma161; CHECK-NEXT: vor.vv v8, v8, v9162; CHECK-NEXT: ret163 %v = call <vscale x 4 x i8> @llvm.vp.or.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)164 ret <vscale x 4 x i8> %v165}166 167define <vscale x 4 x i8> @vor_vx_nxv4i8(<vscale x 4 x i8> %va, i8 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {168; CHECK-LABEL: vor_vx_nxv4i8:169; CHECK: # %bb.0:170; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma171; CHECK-NEXT: vor.vx v8, v8, a0, v0.t172; CHECK-NEXT: ret173 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0174 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer175 %v = call <vscale x 4 x i8> @llvm.vp.or.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 %evl)176 ret <vscale x 4 x i8> %v177}178 179define <vscale x 4 x i8> @vor_vx_nxv4i8_unmasked(<vscale x 4 x i8> %va, i8 %b, i32 zeroext %evl) {180; CHECK-LABEL: vor_vx_nxv4i8_unmasked:181; CHECK: # %bb.0:182; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma183; CHECK-NEXT: vor.vx v8, v8, a0184; CHECK-NEXT: ret185 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0186 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer187 %v = call <vscale x 4 x i8> @llvm.vp.or.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)188 ret <vscale x 4 x i8> %v189}190 191define <vscale x 4 x i8> @vor_vi_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {192; CHECK-LABEL: vor_vi_nxv4i8:193; CHECK: # %bb.0:194; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma195; CHECK-NEXT: vor.vi v8, v8, 5, v0.t196; CHECK-NEXT: ret197 %v = call <vscale x 4 x i8> @llvm.vp.or.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> splat (i8 5), <vscale x 4 x i1> %m, i32 %evl)198 ret <vscale x 4 x i8> %v199}200 201define <vscale x 4 x i8> @vor_vi_nxv4i8_unmasked(<vscale x 4 x i8> %va, i32 zeroext %evl) {202; CHECK-LABEL: vor_vi_nxv4i8_unmasked:203; CHECK: # %bb.0:204; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma205; CHECK-NEXT: vor.vi v8, v8, 5206; CHECK-NEXT: ret207 %v = call <vscale x 4 x i8> @llvm.vp.or.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> splat (i8 5), <vscale x 4 x i1> splat (i1 true), i32 %evl)208 ret <vscale x 4 x i8> %v209}210 211define <vscale x 8 x i8> @vor_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {212; CHECK-LABEL: vor_vv_nxv8i8:213; CHECK: # %bb.0:214; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma215; CHECK-NEXT: vor.vv v8, v8, v9, v0.t216; CHECK-NEXT: ret217 %v = call <vscale x 8 x i8> @llvm.vp.or.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 %evl)218 ret <vscale x 8 x i8> %v219}220 221define <vscale x 8 x i8> @vor_vv_nxv8i8_unmasked(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, i32 zeroext %evl) {222; CHECK-LABEL: vor_vv_nxv8i8_unmasked:223; CHECK: # %bb.0:224; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma225; CHECK-NEXT: vor.vv v8, v8, v9226; CHECK-NEXT: ret227 %v = call <vscale x 8 x i8> @llvm.vp.or.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)228 ret <vscale x 8 x i8> %v229}230 231define <vscale x 8 x i8> @vor_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {232; CHECK-LABEL: vor_vx_nxv8i8:233; CHECK: # %bb.0:234; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma235; CHECK-NEXT: vor.vx v8, v8, a0, v0.t236; CHECK-NEXT: ret237 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0238 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer239 %v = call <vscale x 8 x i8> @llvm.vp.or.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 %evl)240 ret <vscale x 8 x i8> %v241}242 243define <vscale x 8 x i8> @vor_vx_nxv8i8_unmasked(<vscale x 8 x i8> %va, i8 %b, i32 zeroext %evl) {244; CHECK-LABEL: vor_vx_nxv8i8_unmasked:245; CHECK: # %bb.0:246; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma247; CHECK-NEXT: vor.vx v8, v8, a0248; CHECK-NEXT: ret249 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0250 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer251 %v = call <vscale x 8 x i8> @llvm.vp.or.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)252 ret <vscale x 8 x i8> %v253}254 255define <vscale x 8 x i8> @vor_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {256; CHECK-LABEL: vor_vi_nxv8i8:257; CHECK: # %bb.0:258; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma259; CHECK-NEXT: vor.vi v8, v8, 5, v0.t260; CHECK-NEXT: ret261 %v = call <vscale x 8 x i8> @llvm.vp.or.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 5), <vscale x 8 x i1> %m, i32 %evl)262 ret <vscale x 8 x i8> %v263}264 265define <vscale x 8 x i8> @vor_vi_nxv8i8_unmasked(<vscale x 8 x i8> %va, i32 zeroext %evl) {266; CHECK-LABEL: vor_vi_nxv8i8_unmasked:267; CHECK: # %bb.0:268; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma269; CHECK-NEXT: vor.vi v8, v8, 5270; CHECK-NEXT: ret271 %v = call <vscale x 8 x i8> @llvm.vp.or.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 5), <vscale x 8 x i1> splat (i1 true), i32 %evl)272 ret <vscale x 8 x i8> %v273}274 275define <vscale x 16 x i8> @vor_vv_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {276; CHECK-LABEL: vor_vv_nxv16i8:277; CHECK: # %bb.0:278; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma279; CHECK-NEXT: vor.vv v8, v8, v10, v0.t280; CHECK-NEXT: ret281 %v = call <vscale x 16 x i8> @llvm.vp.or.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 %evl)282 ret <vscale x 16 x i8> %v283}284 285define <vscale x 16 x i8> @vor_vv_nxv16i8_unmasked(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, i32 zeroext %evl) {286; CHECK-LABEL: vor_vv_nxv16i8_unmasked:287; CHECK: # %bb.0:288; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma289; CHECK-NEXT: vor.vv v8, v8, v10290; CHECK-NEXT: ret291 %v = call <vscale x 16 x i8> @llvm.vp.or.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)292 ret <vscale x 16 x i8> %v293}294 295define <vscale x 16 x i8> @vor_vx_nxv16i8(<vscale x 16 x i8> %va, i8 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {296; CHECK-LABEL: vor_vx_nxv16i8:297; CHECK: # %bb.0:298; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma299; CHECK-NEXT: vor.vx v8, v8, a0, v0.t300; CHECK-NEXT: ret301 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0302 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer303 %v = call <vscale x 16 x i8> @llvm.vp.or.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 %evl)304 ret <vscale x 16 x i8> %v305}306 307define <vscale x 16 x i8> @vor_vx_nxv16i8_unmasked(<vscale x 16 x i8> %va, i8 %b, i32 zeroext %evl) {308; CHECK-LABEL: vor_vx_nxv16i8_unmasked:309; CHECK: # %bb.0:310; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma311; CHECK-NEXT: vor.vx v8, v8, a0312; CHECK-NEXT: ret313 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0314 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer315 %v = call <vscale x 16 x i8> @llvm.vp.or.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)316 ret <vscale x 16 x i8> %v317}318 319define <vscale x 16 x i8> @vor_vi_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {320; CHECK-LABEL: vor_vi_nxv16i8:321; CHECK: # %bb.0:322; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma323; CHECK-NEXT: vor.vi v8, v8, 5, v0.t324; CHECK-NEXT: ret325 %v = call <vscale x 16 x i8> @llvm.vp.or.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> splat (i8 5), <vscale x 16 x i1> %m, i32 %evl)326 ret <vscale x 16 x i8> %v327}328 329define <vscale x 16 x i8> @vor_vi_nxv16i8_unmasked(<vscale x 16 x i8> %va, i32 zeroext %evl) {330; CHECK-LABEL: vor_vi_nxv16i8_unmasked:331; CHECK: # %bb.0:332; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma333; CHECK-NEXT: vor.vi v8, v8, 5334; CHECK-NEXT: ret335 %v = call <vscale x 16 x i8> @llvm.vp.or.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> splat (i8 5), <vscale x 16 x i1> splat (i1 true), i32 %evl)336 ret <vscale x 16 x i8> %v337}338 339define <vscale x 32 x i8> @vor_vv_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {340; CHECK-LABEL: vor_vv_nxv32i8:341; CHECK: # %bb.0:342; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma343; CHECK-NEXT: vor.vv v8, v8, v12, v0.t344; CHECK-NEXT: ret345 %v = call <vscale x 32 x i8> @llvm.vp.or.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 %evl)346 ret <vscale x 32 x i8> %v347}348 349define <vscale x 32 x i8> @vor_vv_nxv32i8_unmasked(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, i32 zeroext %evl) {350; CHECK-LABEL: vor_vv_nxv32i8_unmasked:351; CHECK: # %bb.0:352; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma353; CHECK-NEXT: vor.vv v8, v8, v12354; CHECK-NEXT: ret355 %v = call <vscale x 32 x i8> @llvm.vp.or.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)356 ret <vscale x 32 x i8> %v357}358 359define <vscale x 32 x i8> @vor_vx_nxv32i8(<vscale x 32 x i8> %va, i8 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {360; CHECK-LABEL: vor_vx_nxv32i8:361; CHECK: # %bb.0:362; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma363; CHECK-NEXT: vor.vx v8, v8, a0, v0.t364; CHECK-NEXT: ret365 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0366 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer367 %v = call <vscale x 32 x i8> @llvm.vp.or.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 %evl)368 ret <vscale x 32 x i8> %v369}370 371define <vscale x 32 x i8> @vor_vx_nxv32i8_unmasked(<vscale x 32 x i8> %va, i8 %b, i32 zeroext %evl) {372; CHECK-LABEL: vor_vx_nxv32i8_unmasked:373; CHECK: # %bb.0:374; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma375; CHECK-NEXT: vor.vx v8, v8, a0376; CHECK-NEXT: ret377 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0378 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer379 %v = call <vscale x 32 x i8> @llvm.vp.or.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)380 ret <vscale x 32 x i8> %v381}382 383define <vscale x 32 x i8> @vor_vi_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {384; CHECK-LABEL: vor_vi_nxv32i8:385; CHECK: # %bb.0:386; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma387; CHECK-NEXT: vor.vi v8, v8, 5, v0.t388; CHECK-NEXT: ret389 %v = call <vscale x 32 x i8> @llvm.vp.or.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> splat (i8 5), <vscale x 32 x i1> %m, i32 %evl)390 ret <vscale x 32 x i8> %v391}392 393define <vscale x 32 x i8> @vor_vi_nxv32i8_unmasked(<vscale x 32 x i8> %va, i32 zeroext %evl) {394; CHECK-LABEL: vor_vi_nxv32i8_unmasked:395; CHECK: # %bb.0:396; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma397; CHECK-NEXT: vor.vi v8, v8, 5398; CHECK-NEXT: ret399 %v = call <vscale x 32 x i8> @llvm.vp.or.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> splat (i8 5), <vscale x 32 x i1> splat (i1 true), i32 %evl)400 ret <vscale x 32 x i8> %v401}402 403define <vscale x 64 x i8> @vor_vv_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {404; CHECK-LABEL: vor_vv_nxv64i8:405; CHECK: # %bb.0:406; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma407; CHECK-NEXT: vor.vv v8, v8, v16, v0.t408; CHECK-NEXT: ret409 %v = call <vscale x 64 x i8> @llvm.vp.or.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 %evl)410 ret <vscale x 64 x i8> %v411}412 413define <vscale x 64 x i8> @vor_vv_nxv64i8_unmasked(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, i32 zeroext %evl) {414; CHECK-LABEL: vor_vv_nxv64i8_unmasked:415; CHECK: # %bb.0:416; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma417; CHECK-NEXT: vor.vv v8, v8, v16418; CHECK-NEXT: ret419 %v = call <vscale x 64 x i8> @llvm.vp.or.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> splat (i1 true), i32 %evl)420 ret <vscale x 64 x i8> %v421}422 423define <vscale x 64 x i8> @vor_vx_nxv64i8(<vscale x 64 x i8> %va, i8 %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {424; CHECK-LABEL: vor_vx_nxv64i8:425; CHECK: # %bb.0:426; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma427; CHECK-NEXT: vor.vx v8, v8, a0, v0.t428; CHECK-NEXT: ret429 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0430 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer431 %v = call <vscale x 64 x i8> @llvm.vp.or.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 %evl)432 ret <vscale x 64 x i8> %v433}434 435define <vscale x 64 x i8> @vor_vx_nxv64i8_unmasked(<vscale x 64 x i8> %va, i8 %b, i32 zeroext %evl) {436; CHECK-LABEL: vor_vx_nxv64i8_unmasked:437; CHECK: # %bb.0:438; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma439; CHECK-NEXT: vor.vx v8, v8, a0440; CHECK-NEXT: ret441 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0442 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer443 %v = call <vscale x 64 x i8> @llvm.vp.or.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> splat (i1 true), i32 %evl)444 ret <vscale x 64 x i8> %v445}446 447define <vscale x 64 x i8> @vor_vi_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i1> %m, i32 zeroext %evl) {448; CHECK-LABEL: vor_vi_nxv64i8:449; CHECK: # %bb.0:450; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma451; CHECK-NEXT: vor.vi v8, v8, 5, v0.t452; CHECK-NEXT: ret453 %v = call <vscale x 64 x i8> @llvm.vp.or.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> splat (i8 5), <vscale x 64 x i1> %m, i32 %evl)454 ret <vscale x 64 x i8> %v455}456 457define <vscale x 64 x i8> @vor_vi_nxv64i8_unmasked(<vscale x 64 x i8> %va, i32 zeroext %evl) {458; CHECK-LABEL: vor_vi_nxv64i8_unmasked:459; CHECK: # %bb.0:460; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma461; CHECK-NEXT: vor.vi v8, v8, 5462; CHECK-NEXT: ret463 %v = call <vscale x 64 x i8> @llvm.vp.or.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> splat (i8 5), <vscale x 64 x i1> splat (i1 true), i32 %evl)464 ret <vscale x 64 x i8> %v465}466 467define <vscale x 1 x i16> @vor_vv_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {468; CHECK-LABEL: vor_vv_nxv1i16:469; CHECK: # %bb.0:470; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma471; CHECK-NEXT: vor.vv v8, v8, v9, v0.t472; CHECK-NEXT: ret473 %v = call <vscale x 1 x i16> @llvm.vp.or.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 %evl)474 ret <vscale x 1 x i16> %v475}476 477define <vscale x 1 x i16> @vor_vv_nxv1i16_unmasked(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, i32 zeroext %evl) {478; CHECK-LABEL: vor_vv_nxv1i16_unmasked:479; CHECK: # %bb.0:480; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma481; CHECK-NEXT: vor.vv v8, v8, v9482; CHECK-NEXT: ret483 %v = call <vscale x 1 x i16> @llvm.vp.or.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)484 ret <vscale x 1 x i16> %v485}486 487define <vscale x 1 x i16> @vor_vx_nxv1i16(<vscale x 1 x i16> %va, i16 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {488; CHECK-LABEL: vor_vx_nxv1i16:489; CHECK: # %bb.0:490; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma491; CHECK-NEXT: vor.vx v8, v8, a0, v0.t492; CHECK-NEXT: ret493 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0494 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer495 %v = call <vscale x 1 x i16> @llvm.vp.or.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 %evl)496 ret <vscale x 1 x i16> %v497}498 499define <vscale x 1 x i16> @vor_vx_nxv1i16_unmasked(<vscale x 1 x i16> %va, i16 %b, i32 zeroext %evl) {500; CHECK-LABEL: vor_vx_nxv1i16_unmasked:501; CHECK: # %bb.0:502; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma503; CHECK-NEXT: vor.vx v8, v8, a0504; CHECK-NEXT: ret505 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0506 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer507 %v = call <vscale x 1 x i16> @llvm.vp.or.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)508 ret <vscale x 1 x i16> %v509}510 511define <vscale x 1 x i16> @vor_vi_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {512; CHECK-LABEL: vor_vi_nxv1i16:513; CHECK: # %bb.0:514; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma515; CHECK-NEXT: vor.vi v8, v8, 5, v0.t516; CHECK-NEXT: ret517 %v = call <vscale x 1 x i16> @llvm.vp.or.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> splat (i16 5), <vscale x 1 x i1> %m, i32 %evl)518 ret <vscale x 1 x i16> %v519}520 521define <vscale x 1 x i16> @vor_vi_nxv1i16_unmasked(<vscale x 1 x i16> %va, i32 zeroext %evl) {522; CHECK-LABEL: vor_vi_nxv1i16_unmasked:523; CHECK: # %bb.0:524; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma525; CHECK-NEXT: vor.vi v8, v8, 5526; CHECK-NEXT: ret527 %v = call <vscale x 1 x i16> @llvm.vp.or.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> splat (i16 5), <vscale x 1 x i1> splat (i1 true), i32 %evl)528 ret <vscale x 1 x i16> %v529}530 531define <vscale x 2 x i16> @vor_vv_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {532; CHECK-LABEL: vor_vv_nxv2i16:533; CHECK: # %bb.0:534; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma535; CHECK-NEXT: vor.vv v8, v8, v9, v0.t536; CHECK-NEXT: ret537 %v = call <vscale x 2 x i16> @llvm.vp.or.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 %evl)538 ret <vscale x 2 x i16> %v539}540 541define <vscale x 2 x i16> @vor_vv_nxv2i16_unmasked(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, i32 zeroext %evl) {542; CHECK-LABEL: vor_vv_nxv2i16_unmasked:543; CHECK: # %bb.0:544; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma545; CHECK-NEXT: vor.vv v8, v8, v9546; CHECK-NEXT: ret547 %v = call <vscale x 2 x i16> @llvm.vp.or.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)548 ret <vscale x 2 x i16> %v549}550 551define <vscale x 2 x i16> @vor_vx_nxv2i16(<vscale x 2 x i16> %va, i16 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {552; CHECK-LABEL: vor_vx_nxv2i16:553; CHECK: # %bb.0:554; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma555; CHECK-NEXT: vor.vx v8, v8, a0, v0.t556; CHECK-NEXT: ret557 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0558 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer559 %v = call <vscale x 2 x i16> @llvm.vp.or.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 %evl)560 ret <vscale x 2 x i16> %v561}562 563define <vscale x 2 x i16> @vor_vx_nxv2i16_unmasked(<vscale x 2 x i16> %va, i16 %b, i32 zeroext %evl) {564; CHECK-LABEL: vor_vx_nxv2i16_unmasked:565; CHECK: # %bb.0:566; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma567; CHECK-NEXT: vor.vx v8, v8, a0568; CHECK-NEXT: ret569 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0570 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer571 %v = call <vscale x 2 x i16> @llvm.vp.or.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)572 ret <vscale x 2 x i16> %v573}574 575define <vscale x 2 x i16> @vor_vi_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {576; CHECK-LABEL: vor_vi_nxv2i16:577; CHECK: # %bb.0:578; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma579; CHECK-NEXT: vor.vi v8, v8, 5, v0.t580; CHECK-NEXT: ret581 %v = call <vscale x 2 x i16> @llvm.vp.or.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> splat (i16 5), <vscale x 2 x i1> %m, i32 %evl)582 ret <vscale x 2 x i16> %v583}584 585define <vscale x 2 x i16> @vor_vi_nxv2i16_unmasked(<vscale x 2 x i16> %va, i32 zeroext %evl) {586; CHECK-LABEL: vor_vi_nxv2i16_unmasked:587; CHECK: # %bb.0:588; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma589; CHECK-NEXT: vor.vi v8, v8, 5590; CHECK-NEXT: ret591 %v = call <vscale x 2 x i16> @llvm.vp.or.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> splat (i16 5), <vscale x 2 x i1> splat (i1 true), i32 %evl)592 ret <vscale x 2 x i16> %v593}594 595define <vscale x 4 x i16> @vor_vv_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {596; CHECK-LABEL: vor_vv_nxv4i16:597; CHECK: # %bb.0:598; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma599; CHECK-NEXT: vor.vv v8, v8, v9, v0.t600; CHECK-NEXT: ret601 %v = call <vscale x 4 x i16> @llvm.vp.or.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 %evl)602 ret <vscale x 4 x i16> %v603}604 605define <vscale x 4 x i16> @vor_vv_nxv4i16_unmasked(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, i32 zeroext %evl) {606; CHECK-LABEL: vor_vv_nxv4i16_unmasked:607; CHECK: # %bb.0:608; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma609; CHECK-NEXT: vor.vv v8, v8, v9610; CHECK-NEXT: ret611 %v = call <vscale x 4 x i16> @llvm.vp.or.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)612 ret <vscale x 4 x i16> %v613}614 615define <vscale x 4 x i16> @vor_vx_nxv4i16(<vscale x 4 x i16> %va, i16 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {616; CHECK-LABEL: vor_vx_nxv4i16:617; CHECK: # %bb.0:618; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma619; CHECK-NEXT: vor.vx v8, v8, a0, v0.t620; CHECK-NEXT: ret621 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0622 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer623 %v = call <vscale x 4 x i16> @llvm.vp.or.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 %evl)624 ret <vscale x 4 x i16> %v625}626 627define <vscale x 4 x i16> @vor_vx_nxv4i16_unmasked(<vscale x 4 x i16> %va, i16 %b, i32 zeroext %evl) {628; CHECK-LABEL: vor_vx_nxv4i16_unmasked:629; CHECK: # %bb.0:630; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma631; CHECK-NEXT: vor.vx v8, v8, a0632; CHECK-NEXT: ret633 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0634 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer635 %v = call <vscale x 4 x i16> @llvm.vp.or.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)636 ret <vscale x 4 x i16> %v637}638 639define <vscale x 4 x i16> @vor_vi_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {640; CHECK-LABEL: vor_vi_nxv4i16:641; CHECK: # %bb.0:642; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma643; CHECK-NEXT: vor.vi v8, v8, 5, v0.t644; CHECK-NEXT: ret645 %v = call <vscale x 4 x i16> @llvm.vp.or.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> splat (i16 5), <vscale x 4 x i1> %m, i32 %evl)646 ret <vscale x 4 x i16> %v647}648 649define <vscale x 4 x i16> @vor_vi_nxv4i16_unmasked(<vscale x 4 x i16> %va, i32 zeroext %evl) {650; CHECK-LABEL: vor_vi_nxv4i16_unmasked:651; CHECK: # %bb.0:652; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma653; CHECK-NEXT: vor.vi v8, v8, 5654; CHECK-NEXT: ret655 %v = call <vscale x 4 x i16> @llvm.vp.or.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> splat (i16 5), <vscale x 4 x i1> splat (i1 true), i32 %evl)656 ret <vscale x 4 x i16> %v657}658 659define <vscale x 8 x i16> @vor_vv_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {660; CHECK-LABEL: vor_vv_nxv8i16:661; CHECK: # %bb.0:662; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma663; CHECK-NEXT: vor.vv v8, v8, v10, v0.t664; CHECK-NEXT: ret665 %v = call <vscale x 8 x i16> @llvm.vp.or.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 %evl)666 ret <vscale x 8 x i16> %v667}668 669define <vscale x 8 x i16> @vor_vv_nxv8i16_unmasked(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, i32 zeroext %evl) {670; CHECK-LABEL: vor_vv_nxv8i16_unmasked:671; CHECK: # %bb.0:672; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma673; CHECK-NEXT: vor.vv v8, v8, v10674; CHECK-NEXT: ret675 %v = call <vscale x 8 x i16> @llvm.vp.or.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)676 ret <vscale x 8 x i16> %v677}678 679define <vscale x 8 x i16> @vor_vx_nxv8i16(<vscale x 8 x i16> %va, i16 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {680; CHECK-LABEL: vor_vx_nxv8i16:681; CHECK: # %bb.0:682; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma683; CHECK-NEXT: vor.vx v8, v8, a0, v0.t684; CHECK-NEXT: ret685 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0686 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer687 %v = call <vscale x 8 x i16> @llvm.vp.or.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 %evl)688 ret <vscale x 8 x i16> %v689}690 691define <vscale x 8 x i16> @vor_vx_nxv8i16_unmasked(<vscale x 8 x i16> %va, i16 %b, i32 zeroext %evl) {692; CHECK-LABEL: vor_vx_nxv8i16_unmasked:693; CHECK: # %bb.0:694; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma695; CHECK-NEXT: vor.vx v8, v8, a0696; CHECK-NEXT: ret697 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0698 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer699 %v = call <vscale x 8 x i16> @llvm.vp.or.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)700 ret <vscale x 8 x i16> %v701}702 703define <vscale x 8 x i16> @vor_vi_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {704; CHECK-LABEL: vor_vi_nxv8i16:705; CHECK: # %bb.0:706; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma707; CHECK-NEXT: vor.vi v8, v8, 5, v0.t708; CHECK-NEXT: ret709 %v = call <vscale x 8 x i16> @llvm.vp.or.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> splat (i16 5), <vscale x 8 x i1> %m, i32 %evl)710 ret <vscale x 8 x i16> %v711}712 713define <vscale x 8 x i16> @vor_vi_nxv8i16_unmasked(<vscale x 8 x i16> %va, i32 zeroext %evl) {714; CHECK-LABEL: vor_vi_nxv8i16_unmasked:715; CHECK: # %bb.0:716; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma717; CHECK-NEXT: vor.vi v8, v8, 5718; CHECK-NEXT: ret719 %v = call <vscale x 8 x i16> @llvm.vp.or.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> splat (i16 5), <vscale x 8 x i1> splat (i1 true), i32 %evl)720 ret <vscale x 8 x i16> %v721}722 723define <vscale x 16 x i16> @vor_vv_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {724; CHECK-LABEL: vor_vv_nxv16i16:725; CHECK: # %bb.0:726; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma727; CHECK-NEXT: vor.vv v8, v8, v12, v0.t728; CHECK-NEXT: ret729 %v = call <vscale x 16 x i16> @llvm.vp.or.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 %evl)730 ret <vscale x 16 x i16> %v731}732 733define <vscale x 16 x i16> @vor_vv_nxv16i16_unmasked(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, i32 zeroext %evl) {734; CHECK-LABEL: vor_vv_nxv16i16_unmasked:735; CHECK: # %bb.0:736; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma737; CHECK-NEXT: vor.vv v8, v8, v12738; CHECK-NEXT: ret739 %v = call <vscale x 16 x i16> @llvm.vp.or.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)740 ret <vscale x 16 x i16> %v741}742 743define <vscale x 16 x i16> @vor_vx_nxv16i16(<vscale x 16 x i16> %va, i16 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {744; CHECK-LABEL: vor_vx_nxv16i16:745; CHECK: # %bb.0:746; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma747; CHECK-NEXT: vor.vx v8, v8, a0, v0.t748; CHECK-NEXT: ret749 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0750 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer751 %v = call <vscale x 16 x i16> @llvm.vp.or.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 %evl)752 ret <vscale x 16 x i16> %v753}754 755define <vscale x 16 x i16> @vor_vx_nxv16i16_unmasked(<vscale x 16 x i16> %va, i16 %b, i32 zeroext %evl) {756; CHECK-LABEL: vor_vx_nxv16i16_unmasked:757; CHECK: # %bb.0:758; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma759; CHECK-NEXT: vor.vx v8, v8, a0760; CHECK-NEXT: ret761 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0762 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer763 %v = call <vscale x 16 x i16> @llvm.vp.or.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)764 ret <vscale x 16 x i16> %v765}766 767define <vscale x 16 x i16> @vor_vi_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {768; CHECK-LABEL: vor_vi_nxv16i16:769; CHECK: # %bb.0:770; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma771; CHECK-NEXT: vor.vi v8, v8, 5, v0.t772; CHECK-NEXT: ret773 %v = call <vscale x 16 x i16> @llvm.vp.or.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> splat (i16 5), <vscale x 16 x i1> %m, i32 %evl)774 ret <vscale x 16 x i16> %v775}776 777define <vscale x 16 x i16> @vor_vi_nxv16i16_unmasked(<vscale x 16 x i16> %va, i32 zeroext %evl) {778; CHECK-LABEL: vor_vi_nxv16i16_unmasked:779; CHECK: # %bb.0:780; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma781; CHECK-NEXT: vor.vi v8, v8, 5782; CHECK-NEXT: ret783 %v = call <vscale x 16 x i16> @llvm.vp.or.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> splat (i16 5), <vscale x 16 x i1> splat (i1 true), i32 %evl)784 ret <vscale x 16 x i16> %v785}786 787define <vscale x 32 x i16> @vor_vv_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {788; CHECK-LABEL: vor_vv_nxv32i16:789; CHECK: # %bb.0:790; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma791; CHECK-NEXT: vor.vv v8, v8, v16, v0.t792; CHECK-NEXT: ret793 %v = call <vscale x 32 x i16> @llvm.vp.or.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 %evl)794 ret <vscale x 32 x i16> %v795}796 797define <vscale x 32 x i16> @vor_vv_nxv32i16_unmasked(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, i32 zeroext %evl) {798; CHECK-LABEL: vor_vv_nxv32i16_unmasked:799; CHECK: # %bb.0:800; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma801; CHECK-NEXT: vor.vv v8, v8, v16802; CHECK-NEXT: ret803 %v = call <vscale x 32 x i16> @llvm.vp.or.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)804 ret <vscale x 32 x i16> %v805}806 807define <vscale x 32 x i16> @vor_vx_nxv32i16(<vscale x 32 x i16> %va, i16 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {808; CHECK-LABEL: vor_vx_nxv32i16:809; CHECK: # %bb.0:810; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma811; CHECK-NEXT: vor.vx v8, v8, a0, v0.t812; CHECK-NEXT: ret813 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0814 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer815 %v = call <vscale x 32 x i16> @llvm.vp.or.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 %evl)816 ret <vscale x 32 x i16> %v817}818 819define <vscale x 32 x i16> @vor_vx_nxv32i16_unmasked(<vscale x 32 x i16> %va, i16 %b, i32 zeroext %evl) {820; CHECK-LABEL: vor_vx_nxv32i16_unmasked:821; CHECK: # %bb.0:822; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma823; CHECK-NEXT: vor.vx v8, v8, a0824; CHECK-NEXT: ret825 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0826 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer827 %v = call <vscale x 32 x i16> @llvm.vp.or.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)828 ret <vscale x 32 x i16> %v829}830 831define <vscale x 32 x i16> @vor_vi_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {832; CHECK-LABEL: vor_vi_nxv32i16:833; CHECK: # %bb.0:834; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma835; CHECK-NEXT: vor.vi v8, v8, 5, v0.t836; CHECK-NEXT: ret837 %v = call <vscale x 32 x i16> @llvm.vp.or.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> splat (i16 5), <vscale x 32 x i1> %m, i32 %evl)838 ret <vscale x 32 x i16> %v839}840 841define <vscale x 32 x i16> @vor_vi_nxv32i16_unmasked(<vscale x 32 x i16> %va, i32 zeroext %evl) {842; CHECK-LABEL: vor_vi_nxv32i16_unmasked:843; CHECK: # %bb.0:844; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma845; CHECK-NEXT: vor.vi v8, v8, 5846; CHECK-NEXT: ret847 %v = call <vscale x 32 x i16> @llvm.vp.or.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> splat (i16 5), <vscale x 32 x i1> splat (i1 true), i32 %evl)848 ret <vscale x 32 x i16> %v849}850 851define <vscale x 1 x i32> @vor_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {852; CHECK-LABEL: vor_vv_nxv1i32:853; CHECK: # %bb.0:854; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma855; CHECK-NEXT: vor.vv v8, v8, v9, v0.t856; CHECK-NEXT: ret857 %v = call <vscale x 1 x i32> @llvm.vp.or.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 %evl)858 ret <vscale x 1 x i32> %v859}860 861define <vscale x 1 x i32> @vor_vv_nxv1i32_unmasked(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, i32 zeroext %evl) {862; CHECK-LABEL: vor_vv_nxv1i32_unmasked:863; CHECK: # %bb.0:864; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma865; CHECK-NEXT: vor.vv v8, v8, v9866; CHECK-NEXT: ret867 %v = call <vscale x 1 x i32> @llvm.vp.or.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)868 ret <vscale x 1 x i32> %v869}870 871define <vscale x 1 x i32> @vor_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {872; CHECK-LABEL: vor_vx_nxv1i32:873; CHECK: # %bb.0:874; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma875; CHECK-NEXT: vor.vx v8, v8, a0, v0.t876; CHECK-NEXT: ret877 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0878 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer879 %v = call <vscale x 1 x i32> @llvm.vp.or.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 %evl)880 ret <vscale x 1 x i32> %v881}882 883define <vscale x 1 x i32> @vor_vx_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 %b, i32 zeroext %evl) {884; CHECK-LABEL: vor_vx_nxv1i32_unmasked:885; CHECK: # %bb.0:886; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma887; CHECK-NEXT: vor.vx v8, v8, a0888; CHECK-NEXT: ret889 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0890 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer891 %v = call <vscale x 1 x i32> @llvm.vp.or.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)892 ret <vscale x 1 x i32> %v893}894 895define <vscale x 1 x i32> @vor_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {896; CHECK-LABEL: vor_vi_nxv1i32:897; CHECK: # %bb.0:898; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma899; CHECK-NEXT: vor.vi v8, v8, 5, v0.t900; CHECK-NEXT: ret901 %v = call <vscale x 1 x i32> @llvm.vp.or.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 5), <vscale x 1 x i1> %m, i32 %evl)902 ret <vscale x 1 x i32> %v903}904 905define <vscale x 1 x i32> @vor_vi_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 zeroext %evl) {906; CHECK-LABEL: vor_vi_nxv1i32_unmasked:907; CHECK: # %bb.0:908; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma909; CHECK-NEXT: vor.vi v8, v8, 5910; CHECK-NEXT: ret911 %v = call <vscale x 1 x i32> @llvm.vp.or.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 5), <vscale x 1 x i1> splat (i1 true), i32 %evl)912 ret <vscale x 1 x i32> %v913}914 915define <vscale x 2 x i32> @vor_vv_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {916; CHECK-LABEL: vor_vv_nxv2i32:917; CHECK: # %bb.0:918; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma919; CHECK-NEXT: vor.vv v8, v8, v9, v0.t920; CHECK-NEXT: ret921 %v = call <vscale x 2 x i32> @llvm.vp.or.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 %evl)922 ret <vscale x 2 x i32> %v923}924 925define <vscale x 2 x i32> @vor_vv_nxv2i32_unmasked(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, i32 zeroext %evl) {926; CHECK-LABEL: vor_vv_nxv2i32_unmasked:927; CHECK: # %bb.0:928; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma929; CHECK-NEXT: vor.vv v8, v8, v9930; CHECK-NEXT: ret931 %v = call <vscale x 2 x i32> @llvm.vp.or.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)932 ret <vscale x 2 x i32> %v933}934 935define <vscale x 2 x i32> @vor_vx_nxv2i32(<vscale x 2 x i32> %va, i32 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {936; CHECK-LABEL: vor_vx_nxv2i32:937; CHECK: # %bb.0:938; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma939; CHECK-NEXT: vor.vx v8, v8, a0, v0.t940; CHECK-NEXT: ret941 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0942 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer943 %v = call <vscale x 2 x i32> @llvm.vp.or.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 %evl)944 ret <vscale x 2 x i32> %v945}946 947define <vscale x 2 x i32> @vor_vx_nxv2i32_commute(<vscale x 2 x i32> %va, i32 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {948; CHECK-LABEL: vor_vx_nxv2i32_commute:949; CHECK: # %bb.0:950; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma951; CHECK-NEXT: vor.vx v8, v8, a0, v0.t952; CHECK-NEXT: ret953 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0954 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer955 %v = call <vscale x 2 x i32> @llvm.vp.or.nxv2i32(<vscale x 2 x i32> %vb, <vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 %evl)956 ret <vscale x 2 x i32> %v957}958 959define <vscale x 2 x i32> @vor_vx_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 %b, i32 zeroext %evl) {960; CHECK-LABEL: vor_vx_nxv2i32_unmasked:961; CHECK: # %bb.0:962; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma963; CHECK-NEXT: vor.vx v8, v8, a0964; CHECK-NEXT: ret965 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0966 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer967 %v = call <vscale x 2 x i32> @llvm.vp.or.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)968 ret <vscale x 2 x i32> %v969}970 971define <vscale x 2 x i32> @vor_vx_nxv2i32_unmasked_commute(<vscale x 2 x i32> %va, i32 %b, i32 zeroext %evl) {972; CHECK-LABEL: vor_vx_nxv2i32_unmasked_commute:973; CHECK: # %bb.0:974; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma975; CHECK-NEXT: vor.vx v8, v8, a0976; CHECK-NEXT: ret977 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0978 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer979 %v = call <vscale x 2 x i32> @llvm.vp.or.nxv2i32(<vscale x 2 x i32> %vb, <vscale x 2 x i32> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)980 ret <vscale x 2 x i32> %v981}982 983define <vscale x 2 x i32> @vor_vi_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {984; CHECK-LABEL: vor_vi_nxv2i32:985; CHECK: # %bb.0:986; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma987; CHECK-NEXT: vor.vi v8, v8, 5, v0.t988; CHECK-NEXT: ret989 %v = call <vscale x 2 x i32> @llvm.vp.or.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> splat (i32 5), <vscale x 2 x i1> %m, i32 %evl)990 ret <vscale x 2 x i32> %v991}992 993define <vscale x 2 x i32> @vor_vi_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 zeroext %evl) {994; CHECK-LABEL: vor_vi_nxv2i32_unmasked:995; CHECK: # %bb.0:996; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma997; CHECK-NEXT: vor.vi v8, v8, 5998; CHECK-NEXT: ret999 %v = call <vscale x 2 x i32> @llvm.vp.or.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> splat (i32 5), <vscale x 2 x i1> splat (i1 true), i32 %evl)1000 ret <vscale x 2 x i32> %v1001}1002 1003define <vscale x 4 x i32> @vor_vv_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1004; CHECK-LABEL: vor_vv_nxv4i32:1005; CHECK: # %bb.0:1006; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1007; CHECK-NEXT: vor.vv v8, v8, v10, v0.t1008; CHECK-NEXT: ret1009 %v = call <vscale x 4 x i32> @llvm.vp.or.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 %evl)1010 ret <vscale x 4 x i32> %v1011}1012 1013define <vscale x 4 x i32> @vor_vv_nxv4i32_unmasked(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, i32 zeroext %evl) {1014; CHECK-LABEL: vor_vv_nxv4i32_unmasked:1015; CHECK: # %bb.0:1016; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1017; CHECK-NEXT: vor.vv v8, v8, v101018; CHECK-NEXT: ret1019 %v = call <vscale x 4 x i32> @llvm.vp.or.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)1020 ret <vscale x 4 x i32> %v1021}1022 1023define <vscale x 4 x i32> @vor_vx_nxv4i32(<vscale x 4 x i32> %va, i32 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1024; CHECK-LABEL: vor_vx_nxv4i32:1025; CHECK: # %bb.0:1026; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma1027; CHECK-NEXT: vor.vx v8, v8, a0, v0.t1028; CHECK-NEXT: ret1029 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 01030 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer1031 %v = call <vscale x 4 x i32> @llvm.vp.or.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 %evl)1032 ret <vscale x 4 x i32> %v1033}1034 1035define <vscale x 4 x i32> @vor_vx_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 %b, i32 zeroext %evl) {1036; CHECK-LABEL: vor_vx_nxv4i32_unmasked:1037; CHECK: # %bb.0:1038; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma1039; CHECK-NEXT: vor.vx v8, v8, a01040; CHECK-NEXT: ret1041 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 01042 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer1043 %v = call <vscale x 4 x i32> @llvm.vp.or.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)1044 ret <vscale x 4 x i32> %v1045}1046 1047define <vscale x 4 x i32> @vor_vi_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {1048; CHECK-LABEL: vor_vi_nxv4i32:1049; CHECK: # %bb.0:1050; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1051; CHECK-NEXT: vor.vi v8, v8, 5, v0.t1052; CHECK-NEXT: ret1053 %v = call <vscale x 4 x i32> @llvm.vp.or.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> splat (i32 5), <vscale x 4 x i1> %m, i32 %evl)1054 ret <vscale x 4 x i32> %v1055}1056 1057define <vscale x 4 x i32> @vor_vi_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 zeroext %evl) {1058; CHECK-LABEL: vor_vi_nxv4i32_unmasked:1059; CHECK: # %bb.0:1060; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1061; CHECK-NEXT: vor.vi v8, v8, 51062; CHECK-NEXT: ret1063 %v = call <vscale x 4 x i32> @llvm.vp.or.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> splat (i32 5), <vscale x 4 x i1> splat (i1 true), i32 %evl)1064 ret <vscale x 4 x i32> %v1065}1066 1067define <vscale x 8 x i32> @vor_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1068; CHECK-LABEL: vor_vv_nxv8i32:1069; CHECK: # %bb.0:1070; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1071; CHECK-NEXT: vor.vv v8, v8, v12, v0.t1072; CHECK-NEXT: ret1073 %v = call <vscale x 8 x i32> @llvm.vp.or.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 %evl)1074 ret <vscale x 8 x i32> %v1075}1076 1077define <vscale x 8 x i32> @vor_vv_nxv8i32_unmasked(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, i32 zeroext %evl) {1078; CHECK-LABEL: vor_vv_nxv8i32_unmasked:1079; CHECK: # %bb.0:1080; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1081; CHECK-NEXT: vor.vv v8, v8, v121082; CHECK-NEXT: ret1083 %v = call <vscale x 8 x i32> @llvm.vp.or.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)1084 ret <vscale x 8 x i32> %v1085}1086 1087define <vscale x 8 x i32> @vor_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1088; CHECK-LABEL: vor_vx_nxv8i32:1089; CHECK: # %bb.0:1090; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma1091; CHECK-NEXT: vor.vx v8, v8, a0, v0.t1092; CHECK-NEXT: ret1093 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01094 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1095 %v = call <vscale x 8 x i32> @llvm.vp.or.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 %evl)1096 ret <vscale x 8 x i32> %v1097}1098 1099define <vscale x 8 x i32> @vor_vx_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 %b, i32 zeroext %evl) {1100; CHECK-LABEL: vor_vx_nxv8i32_unmasked:1101; CHECK: # %bb.0:1102; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma1103; CHECK-NEXT: vor.vx v8, v8, a01104; CHECK-NEXT: ret1105 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01106 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1107 %v = call <vscale x 8 x i32> @llvm.vp.or.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)1108 ret <vscale x 8 x i32> %v1109}1110 1111define <vscale x 8 x i32> @vor_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1112; CHECK-LABEL: vor_vi_nxv8i32:1113; CHECK: # %bb.0:1114; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1115; CHECK-NEXT: vor.vi v8, v8, 5, v0.t1116; CHECK-NEXT: ret1117 %v = call <vscale x 8 x i32> @llvm.vp.or.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 5), <vscale x 8 x i1> %m, i32 %evl)1118 ret <vscale x 8 x i32> %v1119}1120 1121define <vscale x 8 x i32> @vor_vi_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 zeroext %evl) {1122; CHECK-LABEL: vor_vi_nxv8i32_unmasked:1123; CHECK: # %bb.0:1124; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1125; CHECK-NEXT: vor.vi v8, v8, 51126; CHECK-NEXT: ret1127 %v = call <vscale x 8 x i32> @llvm.vp.or.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 5), <vscale x 8 x i1> splat (i1 true), i32 %evl)1128 ret <vscale x 8 x i32> %v1129}1130 1131define <vscale x 10 x i32> @vor_vv_nxv10i32(<vscale x 10 x i32> %va, <vscale x 10 x i32> %b, <vscale x 10 x i1> %m, i32 zeroext %evl) {1132; CHECK-LABEL: vor_vv_nxv10i32:1133; CHECK: # %bb.0:1134; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1135; CHECK-NEXT: vor.vv v8, v8, v16, v0.t1136; CHECK-NEXT: ret1137 %v = call <vscale x 10 x i32> @llvm.vp.or.nxv10i32(<vscale x 10 x i32> %va, <vscale x 10 x i32> %b, <vscale x 10 x i1> %m, i32 %evl)1138 ret <vscale x 10 x i32> %v1139}1140 1141define <vscale x 10 x i32> @vor_vv_nxv10i32_unmasked(<vscale x 10 x i32> %va, <vscale x 10 x i32> %b, i32 zeroext %evl) {1142; CHECK-LABEL: vor_vv_nxv10i32_unmasked:1143; CHECK: # %bb.0:1144; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1145; CHECK-NEXT: vor.vv v8, v8, v161146; CHECK-NEXT: ret1147 %v = call <vscale x 10 x i32> @llvm.vp.or.nxv10i32(<vscale x 10 x i32> %va, <vscale x 10 x i32> %b, <vscale x 10 x i1> splat (i1 true), i32 %evl)1148 ret <vscale x 10 x i32> %v1149}1150 1151define <vscale x 10 x i32> @vor_vx_nxv10i32(<vscale x 10 x i32> %va, i32 %b, <vscale x 10 x i1> %m, i32 zeroext %evl) {1152; CHECK-LABEL: vor_vx_nxv10i32:1153; CHECK: # %bb.0:1154; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma1155; CHECK-NEXT: vor.vx v8, v8, a0, v0.t1156; CHECK-NEXT: ret1157 %elt.head = insertelement <vscale x 10 x i32> poison, i32 %b, i32 01158 %vb = shufflevector <vscale x 10 x i32> %elt.head, <vscale x 10 x i32> poison, <vscale x 10 x i32> zeroinitializer1159 %v = call <vscale x 10 x i32> @llvm.vp.or.nxv10i32(<vscale x 10 x i32> %va, <vscale x 10 x i32> %vb, <vscale x 10 x i1> %m, i32 %evl)1160 ret <vscale x 10 x i32> %v1161}1162 1163define <vscale x 10 x i32> @vor_vx_nxv10i32_unmasked(<vscale x 10 x i32> %va, i32 %b, i32 zeroext %evl) {1164; CHECK-LABEL: vor_vx_nxv10i32_unmasked:1165; CHECK: # %bb.0:1166; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma1167; CHECK-NEXT: vor.vx v8, v8, a01168; CHECK-NEXT: ret1169 %elt.head = insertelement <vscale x 10 x i32> poison, i32 %b, i32 01170 %vb = shufflevector <vscale x 10 x i32> %elt.head, <vscale x 10 x i32> poison, <vscale x 10 x i32> zeroinitializer1171 %v = call <vscale x 10 x i32> @llvm.vp.or.nxv10i32(<vscale x 10 x i32> %va, <vscale x 10 x i32> %vb, <vscale x 10 x i1> splat (i1 true), i32 %evl)1172 ret <vscale x 10 x i32> %v1173}1174 1175define <vscale x 10 x i32> @vor_vi_nxv10i32(<vscale x 10 x i32> %va, <vscale x 10 x i1> %m, i32 zeroext %evl) {1176; CHECK-LABEL: vor_vi_nxv10i32:1177; CHECK: # %bb.0:1178; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1179; CHECK-NEXT: vor.vi v8, v8, 5, v0.t1180; CHECK-NEXT: ret1181 %v = call <vscale x 10 x i32> @llvm.vp.or.nxv10i32(<vscale x 10 x i32> %va, <vscale x 10 x i32> splat (i32 5), <vscale x 10 x i1> %m, i32 %evl)1182 ret <vscale x 10 x i32> %v1183}1184 1185define <vscale x 10 x i32> @vor_vi_nxv10i32_unmasked(<vscale x 10 x i32> %va, i32 zeroext %evl) {1186; CHECK-LABEL: vor_vi_nxv10i32_unmasked:1187; CHECK: # %bb.0:1188; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1189; CHECK-NEXT: vor.vi v8, v8, 51190; CHECK-NEXT: ret1191 %v = call <vscale x 10 x i32> @llvm.vp.or.nxv10i32(<vscale x 10 x i32> %va, <vscale x 10 x i32> splat (i32 5), <vscale x 10 x i1> splat (i1 true), i32 %evl)1192 ret <vscale x 10 x i32> %v1193}1194 1195define <vscale x 16 x i32> @vor_vv_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {1196; CHECK-LABEL: vor_vv_nxv16i32:1197; CHECK: # %bb.0:1198; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1199; CHECK-NEXT: vor.vv v8, v8, v16, v0.t1200; CHECK-NEXT: ret1201 %v = call <vscale x 16 x i32> @llvm.vp.or.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 %evl)1202 ret <vscale x 16 x i32> %v1203}1204 1205define <vscale x 16 x i32> @vor_vv_nxv16i32_unmasked(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, i32 zeroext %evl) {1206; CHECK-LABEL: vor_vv_nxv16i32_unmasked:1207; CHECK: # %bb.0:1208; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1209; CHECK-NEXT: vor.vv v8, v8, v161210; CHECK-NEXT: ret1211 %v = call <vscale x 16 x i32> @llvm.vp.or.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)1212 ret <vscale x 16 x i32> %v1213}1214 1215define <vscale x 16 x i32> @vor_vx_nxv16i32(<vscale x 16 x i32> %va, i32 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {1216; CHECK-LABEL: vor_vx_nxv16i32:1217; CHECK: # %bb.0:1218; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma1219; CHECK-NEXT: vor.vx v8, v8, a0, v0.t1220; CHECK-NEXT: ret1221 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 01222 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer1223 %v = call <vscale x 16 x i32> @llvm.vp.or.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 %evl)1224 ret <vscale x 16 x i32> %v1225}1226 1227define <vscale x 16 x i32> @vor_vx_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 %b, i32 zeroext %evl) {1228; CHECK-LABEL: vor_vx_nxv16i32_unmasked:1229; CHECK: # %bb.0:1230; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma1231; CHECK-NEXT: vor.vx v8, v8, a01232; CHECK-NEXT: ret1233 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 01234 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer1235 %v = call <vscale x 16 x i32> @llvm.vp.or.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)1236 ret <vscale x 16 x i32> %v1237}1238 1239define <vscale x 16 x i32> @vor_vi_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {1240; CHECK-LABEL: vor_vi_nxv16i32:1241; CHECK: # %bb.0:1242; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1243; CHECK-NEXT: vor.vi v8, v8, 5, v0.t1244; CHECK-NEXT: ret1245 %v = call <vscale x 16 x i32> @llvm.vp.or.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> splat (i32 5), <vscale x 16 x i1> %m, i32 %evl)1246 ret <vscale x 16 x i32> %v1247}1248 1249define <vscale x 16 x i32> @vor_vi_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 zeroext %evl) {1250; CHECK-LABEL: vor_vi_nxv16i32_unmasked:1251; CHECK: # %bb.0:1252; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1253; CHECK-NEXT: vor.vi v8, v8, 51254; CHECK-NEXT: ret1255 %v = call <vscale x 16 x i32> @llvm.vp.or.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> splat (i32 5), <vscale x 16 x i1> splat (i1 true), i32 %evl)1256 ret <vscale x 16 x i32> %v1257}1258 1259define <vscale x 1 x i64> @vor_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1260; CHECK-LABEL: vor_vv_nxv1i64:1261; CHECK: # %bb.0:1262; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1263; CHECK-NEXT: vor.vv v8, v8, v9, v0.t1264; CHECK-NEXT: ret1265 %v = call <vscale x 1 x i64> @llvm.vp.or.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 %evl)1266 ret <vscale x 1 x i64> %v1267}1268 1269define <vscale x 1 x i64> @vor_vv_nxv1i64_unmasked(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, i32 zeroext %evl) {1270; CHECK-LABEL: vor_vv_nxv1i64_unmasked:1271; CHECK: # %bb.0:1272; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1273; CHECK-NEXT: vor.vv v8, v8, v91274; CHECK-NEXT: ret1275 %v = call <vscale x 1 x i64> @llvm.vp.or.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)1276 ret <vscale x 1 x i64> %v1277}1278 1279define <vscale x 1 x i64> @vor_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1280; RV32-LABEL: vor_vx_nxv1i64:1281; RV32: # %bb.0:1282; RV32-NEXT: addi sp, sp, -161283; RV32-NEXT: .cfi_def_cfa_offset 161284; RV32-NEXT: sw a0, 8(sp)1285; RV32-NEXT: sw a1, 12(sp)1286; RV32-NEXT: addi a0, sp, 81287; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma1288; RV32-NEXT: vlse64.v v9, (a0), zero1289; RV32-NEXT: vor.vv v8, v8, v9, v0.t1290; RV32-NEXT: addi sp, sp, 161291; RV32-NEXT: .cfi_def_cfa_offset 01292; RV32-NEXT: ret1293;1294; RV64-LABEL: vor_vx_nxv1i64:1295; RV64: # %bb.0:1296; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma1297; RV64-NEXT: vor.vx v8, v8, a0, v0.t1298; RV64-NEXT: ret1299 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01300 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1301 %v = call <vscale x 1 x i64> @llvm.vp.or.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 %evl)1302 ret <vscale x 1 x i64> %v1303}1304 1305define <vscale x 1 x i64> @vor_vx_nxv1i64_unmasked(<vscale x 1 x i64> %va, i64 %b, i32 zeroext %evl) {1306; RV32-LABEL: vor_vx_nxv1i64_unmasked:1307; RV32: # %bb.0:1308; RV32-NEXT: addi sp, sp, -161309; RV32-NEXT: .cfi_def_cfa_offset 161310; RV32-NEXT: sw a0, 8(sp)1311; RV32-NEXT: sw a1, 12(sp)1312; RV32-NEXT: addi a0, sp, 81313; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma1314; RV32-NEXT: vlse64.v v9, (a0), zero1315; RV32-NEXT: vor.vv v8, v8, v91316; RV32-NEXT: addi sp, sp, 161317; RV32-NEXT: .cfi_def_cfa_offset 01318; RV32-NEXT: ret1319;1320; RV64-LABEL: vor_vx_nxv1i64_unmasked:1321; RV64: # %bb.0:1322; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma1323; RV64-NEXT: vor.vx v8, v8, a01324; RV64-NEXT: ret1325 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01326 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1327 %v = call <vscale x 1 x i64> @llvm.vp.or.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)1328 ret <vscale x 1 x i64> %v1329}1330 1331define <vscale x 1 x i64> @vor_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1332; CHECK-LABEL: vor_vi_nxv1i64:1333; CHECK: # %bb.0:1334; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1335; CHECK-NEXT: vor.vi v8, v8, 5, v0.t1336; CHECK-NEXT: ret1337 %v = call <vscale x 1 x i64> @llvm.vp.or.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 5), <vscale x 1 x i1> %m, i32 %evl)1338 ret <vscale x 1 x i64> %v1339}1340 1341define <vscale x 1 x i64> @vor_vi_nxv1i64_unmasked(<vscale x 1 x i64> %va, i32 zeroext %evl) {1342; CHECK-LABEL: vor_vi_nxv1i64_unmasked:1343; CHECK: # %bb.0:1344; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1345; CHECK-NEXT: vor.vi v8, v8, 51346; CHECK-NEXT: ret1347 %v = call <vscale x 1 x i64> @llvm.vp.or.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 5), <vscale x 1 x i1> splat (i1 true), i32 %evl)1348 ret <vscale x 1 x i64> %v1349}1350 1351define <vscale x 2 x i64> @vor_vv_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1352; CHECK-LABEL: vor_vv_nxv2i64:1353; CHECK: # %bb.0:1354; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1355; CHECK-NEXT: vor.vv v8, v8, v10, v0.t1356; CHECK-NEXT: ret1357 %v = call <vscale x 2 x i64> @llvm.vp.or.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 %evl)1358 ret <vscale x 2 x i64> %v1359}1360 1361define <vscale x 2 x i64> @vor_vv_nxv2i64_unmasked(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, i32 zeroext %evl) {1362; CHECK-LABEL: vor_vv_nxv2i64_unmasked:1363; CHECK: # %bb.0:1364; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1365; CHECK-NEXT: vor.vv v8, v8, v101366; CHECK-NEXT: ret1367 %v = call <vscale x 2 x i64> @llvm.vp.or.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)1368 ret <vscale x 2 x i64> %v1369}1370 1371define <vscale x 2 x i64> @vor_vx_nxv2i64(<vscale x 2 x i64> %va, i64 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1372; RV32-LABEL: vor_vx_nxv2i64:1373; RV32: # %bb.0:1374; RV32-NEXT: addi sp, sp, -161375; RV32-NEXT: .cfi_def_cfa_offset 161376; RV32-NEXT: sw a0, 8(sp)1377; RV32-NEXT: sw a1, 12(sp)1378; RV32-NEXT: addi a0, sp, 81379; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma1380; RV32-NEXT: vlse64.v v10, (a0), zero1381; RV32-NEXT: vor.vv v8, v8, v10, v0.t1382; RV32-NEXT: addi sp, sp, 161383; RV32-NEXT: .cfi_def_cfa_offset 01384; RV32-NEXT: ret1385;1386; RV64-LABEL: vor_vx_nxv2i64:1387; RV64: # %bb.0:1388; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma1389; RV64-NEXT: vor.vx v8, v8, a0, v0.t1390; RV64-NEXT: ret1391 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01392 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1393 %v = call <vscale x 2 x i64> @llvm.vp.or.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 %evl)1394 ret <vscale x 2 x i64> %v1395}1396 1397define <vscale x 2 x i64> @vor_vx_nxv2i64_unmasked(<vscale x 2 x i64> %va, i64 %b, i32 zeroext %evl) {1398; RV32-LABEL: vor_vx_nxv2i64_unmasked:1399; RV32: # %bb.0:1400; RV32-NEXT: addi sp, sp, -161401; RV32-NEXT: .cfi_def_cfa_offset 161402; RV32-NEXT: sw a0, 8(sp)1403; RV32-NEXT: sw a1, 12(sp)1404; RV32-NEXT: addi a0, sp, 81405; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma1406; RV32-NEXT: vlse64.v v10, (a0), zero1407; RV32-NEXT: vor.vv v8, v8, v101408; RV32-NEXT: addi sp, sp, 161409; RV32-NEXT: .cfi_def_cfa_offset 01410; RV32-NEXT: ret1411;1412; RV64-LABEL: vor_vx_nxv2i64_unmasked:1413; RV64: # %bb.0:1414; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma1415; RV64-NEXT: vor.vx v8, v8, a01416; RV64-NEXT: ret1417 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01418 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1419 %v = call <vscale x 2 x i64> @llvm.vp.or.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)1420 ret <vscale x 2 x i64> %v1421}1422 1423define <vscale x 2 x i64> @vor_vi_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {1424; CHECK-LABEL: vor_vi_nxv2i64:1425; CHECK: # %bb.0:1426; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1427; CHECK-NEXT: vor.vi v8, v8, 5, v0.t1428; CHECK-NEXT: ret1429 %v = call <vscale x 2 x i64> @llvm.vp.or.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> splat (i64 5), <vscale x 2 x i1> %m, i32 %evl)1430 ret <vscale x 2 x i64> %v1431}1432 1433define <vscale x 2 x i64> @vor_vi_nxv2i64_unmasked(<vscale x 2 x i64> %va, i32 zeroext %evl) {1434; CHECK-LABEL: vor_vi_nxv2i64_unmasked:1435; CHECK: # %bb.0:1436; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1437; CHECK-NEXT: vor.vi v8, v8, 51438; CHECK-NEXT: ret1439 %v = call <vscale x 2 x i64> @llvm.vp.or.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> splat (i64 5), <vscale x 2 x i1> splat (i1 true), i32 %evl)1440 ret <vscale x 2 x i64> %v1441}1442 1443define <vscale x 4 x i64> @vor_vv_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1444; CHECK-LABEL: vor_vv_nxv4i64:1445; CHECK: # %bb.0:1446; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1447; CHECK-NEXT: vor.vv v8, v8, v12, v0.t1448; CHECK-NEXT: ret1449 %v = call <vscale x 4 x i64> @llvm.vp.or.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 %evl)1450 ret <vscale x 4 x i64> %v1451}1452 1453define <vscale x 4 x i64> @vor_vv_nxv4i64_unmasked(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, i32 zeroext %evl) {1454; CHECK-LABEL: vor_vv_nxv4i64_unmasked:1455; CHECK: # %bb.0:1456; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1457; CHECK-NEXT: vor.vv v8, v8, v121458; CHECK-NEXT: ret1459 %v = call <vscale x 4 x i64> @llvm.vp.or.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)1460 ret <vscale x 4 x i64> %v1461}1462 1463define <vscale x 4 x i64> @vor_vx_nxv4i64(<vscale x 4 x i64> %va, i64 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1464; RV32-LABEL: vor_vx_nxv4i64:1465; RV32: # %bb.0:1466; RV32-NEXT: addi sp, sp, -161467; RV32-NEXT: .cfi_def_cfa_offset 161468; RV32-NEXT: sw a0, 8(sp)1469; RV32-NEXT: sw a1, 12(sp)1470; RV32-NEXT: addi a0, sp, 81471; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1472; RV32-NEXT: vlse64.v v12, (a0), zero1473; RV32-NEXT: vor.vv v8, v8, v12, v0.t1474; RV32-NEXT: addi sp, sp, 161475; RV32-NEXT: .cfi_def_cfa_offset 01476; RV32-NEXT: ret1477;1478; RV64-LABEL: vor_vx_nxv4i64:1479; RV64: # %bb.0:1480; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1481; RV64-NEXT: vor.vx v8, v8, a0, v0.t1482; RV64-NEXT: ret1483 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01484 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1485 %v = call <vscale x 4 x i64> @llvm.vp.or.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 %evl)1486 ret <vscale x 4 x i64> %v1487}1488 1489define <vscale x 4 x i64> @vor_vx_nxv4i64_unmasked(<vscale x 4 x i64> %va, i64 %b, i32 zeroext %evl) {1490; RV32-LABEL: vor_vx_nxv4i64_unmasked:1491; RV32: # %bb.0:1492; RV32-NEXT: addi sp, sp, -161493; RV32-NEXT: .cfi_def_cfa_offset 161494; RV32-NEXT: sw a0, 8(sp)1495; RV32-NEXT: sw a1, 12(sp)1496; RV32-NEXT: addi a0, sp, 81497; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1498; RV32-NEXT: vlse64.v v12, (a0), zero1499; RV32-NEXT: vor.vv v8, v8, v121500; RV32-NEXT: addi sp, sp, 161501; RV32-NEXT: .cfi_def_cfa_offset 01502; RV32-NEXT: ret1503;1504; RV64-LABEL: vor_vx_nxv4i64_unmasked:1505; RV64: # %bb.0:1506; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1507; RV64-NEXT: vor.vx v8, v8, a01508; RV64-NEXT: ret1509 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01510 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1511 %v = call <vscale x 4 x i64> @llvm.vp.or.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)1512 ret <vscale x 4 x i64> %v1513}1514 1515define <vscale x 4 x i64> @vor_vi_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {1516; CHECK-LABEL: vor_vi_nxv4i64:1517; CHECK: # %bb.0:1518; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1519; CHECK-NEXT: vor.vi v8, v8, 5, v0.t1520; CHECK-NEXT: ret1521 %v = call <vscale x 4 x i64> @llvm.vp.or.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> splat (i64 5), <vscale x 4 x i1> %m, i32 %evl)1522 ret <vscale x 4 x i64> %v1523}1524 1525define <vscale x 4 x i64> @vor_vi_nxv4i64_unmasked(<vscale x 4 x i64> %va, i32 zeroext %evl) {1526; CHECK-LABEL: vor_vi_nxv4i64_unmasked:1527; CHECK: # %bb.0:1528; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1529; CHECK-NEXT: vor.vi v8, v8, 51530; CHECK-NEXT: ret1531 %v = call <vscale x 4 x i64> @llvm.vp.or.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> splat (i64 5), <vscale x 4 x i1> splat (i1 true), i32 %evl)1532 ret <vscale x 4 x i64> %v1533}1534 1535define <vscale x 8 x i64> @vor_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1536; CHECK-LABEL: vor_vv_nxv8i64:1537; CHECK: # %bb.0:1538; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1539; CHECK-NEXT: vor.vv v8, v8, v16, v0.t1540; CHECK-NEXT: ret1541 %v = call <vscale x 8 x i64> @llvm.vp.or.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 %evl)1542 ret <vscale x 8 x i64> %v1543}1544 1545define <vscale x 8 x i64> @vor_vv_nxv8i64_unmasked(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, i32 zeroext %evl) {1546; CHECK-LABEL: vor_vv_nxv8i64_unmasked:1547; CHECK: # %bb.0:1548; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1549; CHECK-NEXT: vor.vv v8, v8, v161550; CHECK-NEXT: ret1551 %v = call <vscale x 8 x i64> @llvm.vp.or.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)1552 ret <vscale x 8 x i64> %v1553}1554 1555define <vscale x 8 x i64> @vor_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1556; RV32-LABEL: vor_vx_nxv8i64:1557; RV32: # %bb.0:1558; RV32-NEXT: addi sp, sp, -161559; RV32-NEXT: .cfi_def_cfa_offset 161560; RV32-NEXT: sw a0, 8(sp)1561; RV32-NEXT: sw a1, 12(sp)1562; RV32-NEXT: addi a0, sp, 81563; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1564; RV32-NEXT: vlse64.v v16, (a0), zero1565; RV32-NEXT: vor.vv v8, v8, v16, v0.t1566; RV32-NEXT: addi sp, sp, 161567; RV32-NEXT: .cfi_def_cfa_offset 01568; RV32-NEXT: ret1569;1570; RV64-LABEL: vor_vx_nxv8i64:1571; RV64: # %bb.0:1572; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1573; RV64-NEXT: vor.vx v8, v8, a0, v0.t1574; RV64-NEXT: ret1575 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01576 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1577 %v = call <vscale x 8 x i64> @llvm.vp.or.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 %evl)1578 ret <vscale x 8 x i64> %v1579}1580 1581define <vscale x 8 x i64> @vor_vx_nxv8i64_unmasked(<vscale x 8 x i64> %va, i64 %b, i32 zeroext %evl) {1582; RV32-LABEL: vor_vx_nxv8i64_unmasked:1583; RV32: # %bb.0:1584; RV32-NEXT: addi sp, sp, -161585; RV32-NEXT: .cfi_def_cfa_offset 161586; RV32-NEXT: sw a0, 8(sp)1587; RV32-NEXT: sw a1, 12(sp)1588; RV32-NEXT: addi a0, sp, 81589; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1590; RV32-NEXT: vlse64.v v16, (a0), zero1591; RV32-NEXT: vor.vv v8, v8, v161592; RV32-NEXT: addi sp, sp, 161593; RV32-NEXT: .cfi_def_cfa_offset 01594; RV32-NEXT: ret1595;1596; RV64-LABEL: vor_vx_nxv8i64_unmasked:1597; RV64: # %bb.0:1598; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1599; RV64-NEXT: vor.vx v8, v8, a01600; RV64-NEXT: ret1601 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01602 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1603 %v = call <vscale x 8 x i64> @llvm.vp.or.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)1604 ret <vscale x 8 x i64> %v1605}1606 1607define <vscale x 8 x i64> @vor_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1608; CHECK-LABEL: vor_vi_nxv8i64:1609; CHECK: # %bb.0:1610; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1611; CHECK-NEXT: vor.vi v8, v8, 5, v0.t1612; CHECK-NEXT: ret1613 %v = call <vscale x 8 x i64> @llvm.vp.or.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 5), <vscale x 8 x i1> %m, i32 %evl)1614 ret <vscale x 8 x i64> %v1615}1616 1617define <vscale x 8 x i64> @vor_vi_nxv8i64_unmasked(<vscale x 8 x i64> %va, i32 zeroext %evl) {1618; CHECK-LABEL: vor_vi_nxv8i64_unmasked:1619; CHECK: # %bb.0:1620; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1621; CHECK-NEXT: vor.vi v8, v8, 51622; CHECK-NEXT: ret1623 %v = call <vscale x 8 x i64> @llvm.vp.or.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 5), <vscale x 8 x i1> splat (i1 true), i32 %evl)1624 ret <vscale x 8 x i64> %v1625}1626