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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+zvfbfmin,+v \3; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV324; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+zvfbfmin,+v \5; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV646; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfhmin,+zvfbfmin,+v \7; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV328; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfhmin,+zvfbfmin,+v \9; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV6410 11define <vscale x 1 x i8> @vpgather_nxv1i8(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {12; RV32-LABEL: vpgather_nxv1i8:13; RV32:       # %bb.0:14; RV32-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma15; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t16; RV32-NEXT:    vmv1r.v v8, v917; RV32-NEXT:    ret18;19; RV64-LABEL: vpgather_nxv1i8:20; RV64:       # %bb.0:21; RV64-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma22; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t23; RV64-NEXT:    vmv1r.v v8, v924; RV64-NEXT:    ret25  %v = call <vscale x 1 x i8> @llvm.vp.gather.nxv1i8.nxv1p0(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)26  ret <vscale x 1 x i8> %v27}28 29define <vscale x 2 x i8> @vpgather_nxv2i8(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {30; RV32-LABEL: vpgather_nxv2i8:31; RV32:       # %bb.0:32; RV32-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma33; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t34; RV32-NEXT:    vmv1r.v v8, v935; RV32-NEXT:    ret36;37; RV64-LABEL: vpgather_nxv2i8:38; RV64:       # %bb.0:39; RV64-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma40; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t41; RV64-NEXT:    vmv1r.v v8, v1042; RV64-NEXT:    ret43  %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)44  ret <vscale x 2 x i8> %v45}46 47define <vscale x 2 x i16> @vpgather_nxv2i8_sextload_nxv2i16(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {48; RV32-LABEL: vpgather_nxv2i8_sextload_nxv2i16:49; RV32:       # %bb.0:50; RV32-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma51; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t52; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma53; RV32-NEXT:    vsext.vf2 v8, v954; RV32-NEXT:    ret55;56; RV64-LABEL: vpgather_nxv2i8_sextload_nxv2i16:57; RV64:       # %bb.0:58; RV64-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma59; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t60; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma61; RV64-NEXT:    vsext.vf2 v8, v1062; RV64-NEXT:    ret63  %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)64  %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i16>65  ret <vscale x 2 x i16> %ev66}67 68define <vscale x 2 x i16> @vpgather_nxv2i8_zextload_nxv2i16(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {69; RV32-LABEL: vpgather_nxv2i8_zextload_nxv2i16:70; RV32:       # %bb.0:71; RV32-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma72; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t73; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma74; RV32-NEXT:    vzext.vf2 v8, v975; RV32-NEXT:    ret76;77; RV64-LABEL: vpgather_nxv2i8_zextload_nxv2i16:78; RV64:       # %bb.0:79; RV64-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma80; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t81; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma82; RV64-NEXT:    vzext.vf2 v8, v1083; RV64-NEXT:    ret84  %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)85  %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i16>86  ret <vscale x 2 x i16> %ev87}88 89define <vscale x 2 x i32> @vpgather_nxv2i8_sextload_nxv2i32(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {90; RV32-LABEL: vpgather_nxv2i8_sextload_nxv2i32:91; RV32:       # %bb.0:92; RV32-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma93; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t94; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, ma95; RV32-NEXT:    vsext.vf4 v8, v996; RV32-NEXT:    ret97;98; RV64-LABEL: vpgather_nxv2i8_sextload_nxv2i32:99; RV64:       # %bb.0:100; RV64-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma101; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t102; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, ma103; RV64-NEXT:    vsext.vf4 v8, v10104; RV64-NEXT:    ret105  %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)106  %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i32>107  ret <vscale x 2 x i32> %ev108}109 110define <vscale x 2 x i32> @vpgather_nxv2i8_zextload_nxv2i32(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {111; RV32-LABEL: vpgather_nxv2i8_zextload_nxv2i32:112; RV32:       # %bb.0:113; RV32-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma114; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t115; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, ma116; RV32-NEXT:    vzext.vf4 v8, v9117; RV32-NEXT:    ret118;119; RV64-LABEL: vpgather_nxv2i8_zextload_nxv2i32:120; RV64:       # %bb.0:121; RV64-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma122; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t123; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, ma124; RV64-NEXT:    vzext.vf4 v8, v10125; RV64-NEXT:    ret126  %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)127  %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i32>128  ret <vscale x 2 x i32> %ev129}130 131define <vscale x 2 x i64> @vpgather_nxv2i8_sextload_nxv2i64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {132; RV32-LABEL: vpgather_nxv2i8_sextload_nxv2i64:133; RV32:       # %bb.0:134; RV32-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma135; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t136; RV32-NEXT:    vsetvli a0, zero, e64, m2, ta, ma137; RV32-NEXT:    vsext.vf8 v8, v10138; RV32-NEXT:    ret139;140; RV64-LABEL: vpgather_nxv2i8_sextload_nxv2i64:141; RV64:       # %bb.0:142; RV64-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma143; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t144; RV64-NEXT:    vsetvli a0, zero, e64, m2, ta, ma145; RV64-NEXT:    vsext.vf8 v8, v10146; RV64-NEXT:    ret147  %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)148  %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i64>149  ret <vscale x 2 x i64> %ev150}151 152define <vscale x 2 x i64> @vpgather_nxv2i8_zextload_nxv2i64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {153; RV32-LABEL: vpgather_nxv2i8_zextload_nxv2i64:154; RV32:       # %bb.0:155; RV32-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma156; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t157; RV32-NEXT:    vsetvli a0, zero, e64, m2, ta, ma158; RV32-NEXT:    vzext.vf8 v8, v10159; RV32-NEXT:    ret160;161; RV64-LABEL: vpgather_nxv2i8_zextload_nxv2i64:162; RV64:       # %bb.0:163; RV64-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma164; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t165; RV64-NEXT:    vsetvli a0, zero, e64, m2, ta, ma166; RV64-NEXT:    vzext.vf8 v8, v10167; RV64-NEXT:    ret168  %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)169  %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i64>170  ret <vscale x 2 x i64> %ev171}172 173define <vscale x 4 x i8> @vpgather_nxv4i8(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {174; RV32-LABEL: vpgather_nxv4i8:175; RV32:       # %bb.0:176; RV32-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma177; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t178; RV32-NEXT:    vmv1r.v v8, v10179; RV32-NEXT:    ret180;181; RV64-LABEL: vpgather_nxv4i8:182; RV64:       # %bb.0:183; RV64-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma184; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t185; RV64-NEXT:    vmv1r.v v8, v12186; RV64-NEXT:    ret187  %v = call <vscale x 4 x i8> @llvm.vp.gather.nxv4i8.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)188  ret <vscale x 4 x i8> %v189}190 191define <vscale x 4 x i8> @vpgather_truemask_nxv4i8(<vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {192; RV32-LABEL: vpgather_truemask_nxv4i8:193; RV32:       # %bb.0:194; RV32-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma195; RV32-NEXT:    vluxei32.v v10, (zero), v8196; RV32-NEXT:    vmv1r.v v8, v10197; RV32-NEXT:    ret198;199; RV64-LABEL: vpgather_truemask_nxv4i8:200; RV64:       # %bb.0:201; RV64-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma202; RV64-NEXT:    vluxei64.v v12, (zero), v8203; RV64-NEXT:    vmv1r.v v8, v12204; RV64-NEXT:    ret205  %v = call <vscale x 4 x i8> @llvm.vp.gather.nxv4i8.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)206  ret <vscale x 4 x i8> %v207}208 209define <vscale x 8 x i8> @vpgather_nxv8i8(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {210; RV32-LABEL: vpgather_nxv8i8:211; RV32:       # %bb.0:212; RV32-NEXT:    vsetvli zero, a0, e8, m1, ta, ma213; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t214; RV32-NEXT:    vmv.v.v v8, v12215; RV32-NEXT:    ret216;217; RV64-LABEL: vpgather_nxv8i8:218; RV64:       # %bb.0:219; RV64-NEXT:    vsetvli zero, a0, e8, m1, ta, ma220; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t221; RV64-NEXT:    vmv.v.v v8, v16222; RV64-NEXT:    ret223  %v = call <vscale x 8 x i8> @llvm.vp.gather.nxv8i8.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)224  ret <vscale x 8 x i8> %v225}226 227define <vscale x 8 x i8> @vpgather_baseidx_nxv8i8(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {228; RV32-LABEL: vpgather_baseidx_nxv8i8:229; RV32:       # %bb.0:230; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma231; RV32-NEXT:    vsext.vf4 v12, v8232; RV32-NEXT:    vsetvli zero, zero, e8, m1, ta, ma233; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t234; RV32-NEXT:    ret235;236; RV64-LABEL: vpgather_baseidx_nxv8i8:237; RV64:       # %bb.0:238; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma239; RV64-NEXT:    vsext.vf8 v16, v8240; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, ma241; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t242; RV64-NEXT:    ret243  %ptrs = getelementptr inbounds i8, ptr %base, <vscale x 8 x i8> %idxs244  %v = call <vscale x 8 x i8> @llvm.vp.gather.nxv8i8.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)245  ret <vscale x 8 x i8> %v246}247 248define <vscale x 32 x i8> @vpgather_baseidx_nxv32i8(ptr %base, <vscale x 32 x i8> %idxs, <vscale x 32 x i1> %m, i32 zeroext %evl) {249; RV32-LABEL: vpgather_baseidx_nxv32i8:250; RV32:       # %bb.0:251; RV32-NEXT:    vsetvli a2, zero, e8, mf2, ta, ma252; RV32-NEXT:    vmv1r.v v12, v0253; RV32-NEXT:    csrr a3, vlenb254; RV32-NEXT:    slli a2, a3, 1255; RV32-NEXT:    srli a3, a3, 2256; RV32-NEXT:    sub a4, a1, a2257; RV32-NEXT:    sltu a5, a1, a4258; RV32-NEXT:    addi a5, a5, -1259; RV32-NEXT:    and a4, a5, a4260; RV32-NEXT:    vslidedown.vx v0, v0, a3261; RV32-NEXT:    vsetvli zero, a4, e32, m8, ta, ma262; RV32-NEXT:    vsext.vf4 v16, v10263; RV32-NEXT:    vsetvli zero, zero, e8, m2, ta, ma264; RV32-NEXT:    vluxei32.v v10, (a0), v16, v0.t265; RV32-NEXT:    bltu a1, a2, .LBB12_2266; RV32-NEXT:  # %bb.1:267; RV32-NEXT:    mv a1, a2268; RV32-NEXT:  .LBB12_2:269; RV32-NEXT:    vsetvli zero, a1, e32, m8, ta, ma270; RV32-NEXT:    vsext.vf4 v16, v8271; RV32-NEXT:    vmv1r.v v0, v12272; RV32-NEXT:    vsetvli zero, zero, e8, m2, ta, ma273; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t274; RV32-NEXT:    ret275;276; RV64-LABEL: vpgather_baseidx_nxv32i8:277; RV64:       # %bb.0:278; RV64-NEXT:    vsetvli a2, zero, e8, mf2, ta, ma279; RV64-NEXT:    vmv1r.v v12, v0280; RV64-NEXT:    csrr a2, vlenb281; RV64-NEXT:    slli a3, a2, 1282; RV64-NEXT:    srli a4, a2, 2283; RV64-NEXT:    sub a5, a1, a3284; RV64-NEXT:    vslidedown.vx v13, v0, a4285; RV64-NEXT:    sltu a4, a1, a5286; RV64-NEXT:    addi a4, a4, -1287; RV64-NEXT:    and a5, a4, a5288; RV64-NEXT:    sub a4, a5, a2289; RV64-NEXT:    sltu a6, a5, a4290; RV64-NEXT:    addi a6, a6, -1291; RV64-NEXT:    and a6, a6, a4292; RV64-NEXT:    srli a4, a2, 3293; RV64-NEXT:    vsetvli a7, zero, e8, mf4, ta, ma294; RV64-NEXT:    vslidedown.vx v0, v13, a4295; RV64-NEXT:    vsetvli zero, a6, e64, m8, ta, ma296; RV64-NEXT:    vsext.vf8 v16, v11297; RV64-NEXT:    bltu a5, a2, .LBB12_2298; RV64-NEXT:  # %bb.1:299; RV64-NEXT:    mv a5, a2300; RV64-NEXT:  .LBB12_2:301; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, ma302; RV64-NEXT:    vluxei64.v v11, (a0), v16, v0.t303; RV64-NEXT:    vsetvli zero, a5, e64, m8, ta, ma304; RV64-NEXT:    vsext.vf8 v16, v10305; RV64-NEXT:    vmv1r.v v0, v13306; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, ma307; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t308; RV64-NEXT:    bltu a1, a3, .LBB12_4309; RV64-NEXT:  # %bb.3:310; RV64-NEXT:    mv a1, a3311; RV64-NEXT:  .LBB12_4:312; RV64-NEXT:    sub a3, a1, a2313; RV64-NEXT:    sltu a5, a1, a3314; RV64-NEXT:    addi a5, a5, -1315; RV64-NEXT:    and a3, a5, a3316; RV64-NEXT:    vsetvli a5, zero, e8, mf4, ta, ma317; RV64-NEXT:    vslidedown.vx v0, v12, a4318; RV64-NEXT:    vsetvli zero, a3, e64, m8, ta, ma319; RV64-NEXT:    vsext.vf8 v16, v9320; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, ma321; RV64-NEXT:    vluxei64.v v9, (a0), v16, v0.t322; RV64-NEXT:    bltu a1, a2, .LBB12_6323; RV64-NEXT:  # %bb.5:324; RV64-NEXT:    mv a1, a2325; RV64-NEXT:  .LBB12_6:326; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma327; RV64-NEXT:    vsext.vf8 v16, v8328; RV64-NEXT:    vmv1r.v v0, v12329; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, ma330; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t331; RV64-NEXT:    ret332  %ptrs = getelementptr inbounds i8, ptr %base, <vscale x 32 x i8> %idxs333  %v = call <vscale x 32 x i8> @llvm.vp.gather.nxv32i8.nxv32p0(<vscale x 32 x ptr> %ptrs, <vscale x 32 x i1> %m, i32 %evl)334  ret <vscale x 32 x i8> %v335}336 337define <vscale x 1 x i16> @vpgather_nxv1i16(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {338; RV32-LABEL: vpgather_nxv1i16:339; RV32:       # %bb.0:340; RV32-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma341; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t342; RV32-NEXT:    vmv1r.v v8, v9343; RV32-NEXT:    ret344;345; RV64-LABEL: vpgather_nxv1i16:346; RV64:       # %bb.0:347; RV64-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma348; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t349; RV64-NEXT:    vmv1r.v v8, v9350; RV64-NEXT:    ret351  %v = call <vscale x 1 x i16> @llvm.vp.gather.nxv1i16.nxv1p0(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)352  ret <vscale x 1 x i16> %v353}354 355define <vscale x 2 x i16> @vpgather_nxv2i16(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {356; RV32-LABEL: vpgather_nxv2i16:357; RV32:       # %bb.0:358; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma359; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t360; RV32-NEXT:    vmv1r.v v8, v9361; RV32-NEXT:    ret362;363; RV64-LABEL: vpgather_nxv2i16:364; RV64:       # %bb.0:365; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma366; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t367; RV64-NEXT:    vmv1r.v v8, v10368; RV64-NEXT:    ret369  %v = call <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)370  ret <vscale x 2 x i16> %v371}372 373define <vscale x 2 x i32> @vpgather_nxv2i16_sextload_nxv2i32(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {374; RV32-LABEL: vpgather_nxv2i16_sextload_nxv2i32:375; RV32:       # %bb.0:376; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma377; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t378; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, ma379; RV32-NEXT:    vsext.vf2 v8, v9380; RV32-NEXT:    ret381;382; RV64-LABEL: vpgather_nxv2i16_sextload_nxv2i32:383; RV64:       # %bb.0:384; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma385; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t386; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, ma387; RV64-NEXT:    vsext.vf2 v8, v10388; RV64-NEXT:    ret389  %v = call <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)390  %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i32>391  ret <vscale x 2 x i32> %ev392}393 394define <vscale x 2 x i32> @vpgather_nxv2i16_zextload_nxv2i32(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {395; RV32-LABEL: vpgather_nxv2i16_zextload_nxv2i32:396; RV32:       # %bb.0:397; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma398; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t399; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, ma400; RV32-NEXT:    vzext.vf2 v8, v9401; RV32-NEXT:    ret402;403; RV64-LABEL: vpgather_nxv2i16_zextload_nxv2i32:404; RV64:       # %bb.0:405; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma406; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t407; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, ma408; RV64-NEXT:    vzext.vf2 v8, v10409; RV64-NEXT:    ret410  %v = call <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)411  %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i32>412  ret <vscale x 2 x i32> %ev413}414 415define <vscale x 2 x i64> @vpgather_nxv2i16_sextload_nxv2i64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {416; RV32-LABEL: vpgather_nxv2i16_sextload_nxv2i64:417; RV32:       # %bb.0:418; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma419; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t420; RV32-NEXT:    vsetvli a0, zero, e64, m2, ta, ma421; RV32-NEXT:    vsext.vf4 v8, v10422; RV32-NEXT:    ret423;424; RV64-LABEL: vpgather_nxv2i16_sextload_nxv2i64:425; RV64:       # %bb.0:426; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma427; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t428; RV64-NEXT:    vsetvli a0, zero, e64, m2, ta, ma429; RV64-NEXT:    vsext.vf4 v8, v10430; RV64-NEXT:    ret431  %v = call <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)432  %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i64>433  ret <vscale x 2 x i64> %ev434}435 436define <vscale x 2 x i64> @vpgather_nxv2i16_zextload_nxv2i64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {437; RV32-LABEL: vpgather_nxv2i16_zextload_nxv2i64:438; RV32:       # %bb.0:439; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma440; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t441; RV32-NEXT:    vsetvli a0, zero, e64, m2, ta, ma442; RV32-NEXT:    vzext.vf4 v8, v10443; RV32-NEXT:    ret444;445; RV64-LABEL: vpgather_nxv2i16_zextload_nxv2i64:446; RV64:       # %bb.0:447; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma448; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t449; RV64-NEXT:    vsetvli a0, zero, e64, m2, ta, ma450; RV64-NEXT:    vzext.vf4 v8, v10451; RV64-NEXT:    ret452  %v = call <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)453  %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i64>454  ret <vscale x 2 x i64> %ev455}456 457define <vscale x 4 x i16> @vpgather_nxv4i16(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {458; RV32-LABEL: vpgather_nxv4i16:459; RV32:       # %bb.0:460; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, ma461; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t462; RV32-NEXT:    vmv.v.v v8, v10463; RV32-NEXT:    ret464;465; RV64-LABEL: vpgather_nxv4i16:466; RV64:       # %bb.0:467; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, ma468; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t469; RV64-NEXT:    vmv.v.v v8, v12470; RV64-NEXT:    ret471  %v = call <vscale x 4 x i16> @llvm.vp.gather.nxv4i16.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)472  ret <vscale x 4 x i16> %v473}474 475define <vscale x 4 x i16> @vpgather_truemask_nxv4i16(<vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {476; RV32-LABEL: vpgather_truemask_nxv4i16:477; RV32:       # %bb.0:478; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, ma479; RV32-NEXT:    vluxei32.v v10, (zero), v8480; RV32-NEXT:    vmv.v.v v8, v10481; RV32-NEXT:    ret482;483; RV64-LABEL: vpgather_truemask_nxv4i16:484; RV64:       # %bb.0:485; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, ma486; RV64-NEXT:    vluxei64.v v12, (zero), v8487; RV64-NEXT:    vmv.v.v v8, v12488; RV64-NEXT:    ret489  %v = call <vscale x 4 x i16> @llvm.vp.gather.nxv4i16.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)490  ret <vscale x 4 x i16> %v491}492 493define <vscale x 8 x i16> @vpgather_nxv8i16(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {494; RV32-LABEL: vpgather_nxv8i16:495; RV32:       # %bb.0:496; RV32-NEXT:    vsetvli zero, a0, e16, m2, ta, ma497; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t498; RV32-NEXT:    vmv.v.v v8, v12499; RV32-NEXT:    ret500;501; RV64-LABEL: vpgather_nxv8i16:502; RV64:       # %bb.0:503; RV64-NEXT:    vsetvli zero, a0, e16, m2, ta, ma504; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t505; RV64-NEXT:    vmv.v.v v8, v16506; RV64-NEXT:    ret507  %v = call <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)508  ret <vscale x 8 x i16> %v509}510 511define <vscale x 8 x i16> @vpgather_baseidx_nxv8i8_nxv8i16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {512; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8i16:513; RV32:       # %bb.0:514; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma515; RV32-NEXT:    vsext.vf4 v12, v8516; RV32-NEXT:    vadd.vv v12, v12, v12517; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma518; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t519; RV32-NEXT:    ret520;521; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8i16:522; RV64:       # %bb.0:523; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma524; RV64-NEXT:    vsext.vf8 v16, v8525; RV64-NEXT:    vadd.vv v16, v16, v16526; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma527; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t528; RV64-NEXT:    ret529  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i8> %idxs530  %v = call <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)531  ret <vscale x 8 x i16> %v532}533 534define <vscale x 8 x i16> @vpgather_baseidx_sext_nxv8i8_nxv8i16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {535; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i16:536; RV32:       # %bb.0:537; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma538; RV32-NEXT:    vsext.vf4 v12, v8539; RV32-NEXT:    vadd.vv v12, v12, v12540; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma541; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t542; RV32-NEXT:    ret543;544; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i16:545; RV64:       # %bb.0:546; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma547; RV64-NEXT:    vsext.vf8 v16, v8548; RV64-NEXT:    vadd.vv v16, v16, v16549; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma550; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t551; RV64-NEXT:    ret552  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>553  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i16> %eidxs554  %v = call <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)555  ret <vscale x 8 x i16> %v556}557 558define <vscale x 8 x i16> @vpgather_baseidx_zext_nxv8i8_nxv8i16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {559; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i16:560; RV32:       # %bb.0:561; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma562; RV32-NEXT:    vwaddu.vv v10, v8, v8563; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma564; RV32-NEXT:    vluxei16.v v8, (a0), v10, v0.t565; RV32-NEXT:    ret566;567; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i16:568; RV64:       # %bb.0:569; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma570; RV64-NEXT:    vwaddu.vv v10, v8, v8571; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma572; RV64-NEXT:    vluxei16.v v8, (a0), v10, v0.t573; RV64-NEXT:    ret574  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>575  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i16> %eidxs576  %v = call <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)577  ret <vscale x 8 x i16> %v578}579 580define <vscale x 8 x i16> @vpgather_baseidx_nxv8i16(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {581; RV32-LABEL: vpgather_baseidx_nxv8i16:582; RV32:       # %bb.0:583; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma584; RV32-NEXT:    vwadd.vv v12, v8, v8585; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t586; RV32-NEXT:    ret587;588; RV64-LABEL: vpgather_baseidx_nxv8i16:589; RV64:       # %bb.0:590; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma591; RV64-NEXT:    vsext.vf4 v16, v8592; RV64-NEXT:    vadd.vv v16, v16, v16593; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma594; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t595; RV64-NEXT:    ret596  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i16> %idxs597  %v = call <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)598  ret <vscale x 8 x i16> %v599}600 601define <vscale x 1 x i32> @vpgather_nxv1i32(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {602; RV32-LABEL: vpgather_nxv1i32:603; RV32:       # %bb.0:604; RV32-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma605; RV32-NEXT:    vluxei32.v v8, (zero), v8, v0.t606; RV32-NEXT:    ret607;608; RV64-LABEL: vpgather_nxv1i32:609; RV64:       # %bb.0:610; RV64-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma611; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t612; RV64-NEXT:    vmv1r.v v8, v9613; RV64-NEXT:    ret614  %v = call <vscale x 1 x i32> @llvm.vp.gather.nxv1i32.nxv1p0(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)615  ret <vscale x 1 x i32> %v616}617 618define <vscale x 2 x i32> @vpgather_nxv2i32(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {619; RV32-LABEL: vpgather_nxv2i32:620; RV32:       # %bb.0:621; RV32-NEXT:    vsetvli zero, a0, e32, m1, ta, ma622; RV32-NEXT:    vluxei32.v v8, (zero), v8, v0.t623; RV32-NEXT:    ret624;625; RV64-LABEL: vpgather_nxv2i32:626; RV64:       # %bb.0:627; RV64-NEXT:    vsetvli zero, a0, e32, m1, ta, ma628; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t629; RV64-NEXT:    vmv.v.v v8, v10630; RV64-NEXT:    ret631  %v = call <vscale x 2 x i32> @llvm.vp.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)632  ret <vscale x 2 x i32> %v633}634 635define <vscale x 2 x i64> @vpgather_nxv2i32_sextload_nxv2i64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {636; RV32-LABEL: vpgather_nxv2i32_sextload_nxv2i64:637; RV32:       # %bb.0:638; RV32-NEXT:    vsetvli zero, a0, e32, m1, ta, ma639; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t640; RV32-NEXT:    vsetvli a0, zero, e64, m2, ta, ma641; RV32-NEXT:    vsext.vf2 v8, v10642; RV32-NEXT:    ret643;644; RV64-LABEL: vpgather_nxv2i32_sextload_nxv2i64:645; RV64:       # %bb.0:646; RV64-NEXT:    vsetvli zero, a0, e32, m1, ta, ma647; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t648; RV64-NEXT:    vsetvli a0, zero, e64, m2, ta, ma649; RV64-NEXT:    vsext.vf2 v8, v10650; RV64-NEXT:    ret651  %v = call <vscale x 2 x i32> @llvm.vp.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)652  %ev = sext <vscale x 2 x i32> %v to <vscale x 2 x i64>653  ret <vscale x 2 x i64> %ev654}655 656define <vscale x 2 x i64> @vpgather_nxv2i32_zextload_nxv2i64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {657; RV32-LABEL: vpgather_nxv2i32_zextload_nxv2i64:658; RV32:       # %bb.0:659; RV32-NEXT:    vsetvli zero, a0, e32, m1, ta, ma660; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t661; RV32-NEXT:    vsetvli a0, zero, e64, m2, ta, ma662; RV32-NEXT:    vzext.vf2 v8, v10663; RV32-NEXT:    ret664;665; RV64-LABEL: vpgather_nxv2i32_zextload_nxv2i64:666; RV64:       # %bb.0:667; RV64-NEXT:    vsetvli zero, a0, e32, m1, ta, ma668; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t669; RV64-NEXT:    vsetvli a0, zero, e64, m2, ta, ma670; RV64-NEXT:    vzext.vf2 v8, v10671; RV64-NEXT:    ret672  %v = call <vscale x 2 x i32> @llvm.vp.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)673  %ev = zext <vscale x 2 x i32> %v to <vscale x 2 x i64>674  ret <vscale x 2 x i64> %ev675}676 677define <vscale x 4 x i32> @vpgather_nxv4i32(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {678; RV32-LABEL: vpgather_nxv4i32:679; RV32:       # %bb.0:680; RV32-NEXT:    vsetvli zero, a0, e32, m2, ta, ma681; RV32-NEXT:    vluxei32.v v8, (zero), v8, v0.t682; RV32-NEXT:    ret683;684; RV64-LABEL: vpgather_nxv4i32:685; RV64:       # %bb.0:686; RV64-NEXT:    vsetvli zero, a0, e32, m2, ta, ma687; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t688; RV64-NEXT:    vmv.v.v v8, v12689; RV64-NEXT:    ret690  %v = call <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)691  ret <vscale x 4 x i32> %v692}693 694define <vscale x 4 x i32> @vpgather_truemask_nxv4i32(<vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {695; RV32-LABEL: vpgather_truemask_nxv4i32:696; RV32:       # %bb.0:697; RV32-NEXT:    vsetvli zero, a0, e32, m2, ta, ma698; RV32-NEXT:    vluxei32.v v8, (zero), v8699; RV32-NEXT:    ret700;701; RV64-LABEL: vpgather_truemask_nxv4i32:702; RV64:       # %bb.0:703; RV64-NEXT:    vsetvli zero, a0, e32, m2, ta, ma704; RV64-NEXT:    vluxei64.v v12, (zero), v8705; RV64-NEXT:    vmv.v.v v8, v12706; RV64-NEXT:    ret707  %v = call <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)708  ret <vscale x 4 x i32> %v709}710 711define <vscale x 8 x i32> @vpgather_nxv8i32(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {712; RV32-LABEL: vpgather_nxv8i32:713; RV32:       # %bb.0:714; RV32-NEXT:    vsetvli zero, a0, e32, m4, ta, ma715; RV32-NEXT:    vluxei32.v v8, (zero), v8, v0.t716; RV32-NEXT:    ret717;718; RV64-LABEL: vpgather_nxv8i32:719; RV64:       # %bb.0:720; RV64-NEXT:    vsetvli zero, a0, e32, m4, ta, ma721; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t722; RV64-NEXT:    vmv.v.v v8, v16723; RV64-NEXT:    ret724  %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)725  ret <vscale x 8 x i32> %v726}727 728define <vscale x 8 x i32> @vpgather_baseidx_nxv8i8_nxv8i32(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {729; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8i32:730; RV32:       # %bb.0:731; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma732; RV32-NEXT:    vsext.vf4 v12, v8733; RV32-NEXT:    vsll.vi v8, v12, 2734; RV32-NEXT:    vluxei32.v v8, (a0), v8, v0.t735; RV32-NEXT:    ret736;737; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8i32:738; RV64:       # %bb.0:739; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma740; RV64-NEXT:    vsext.vf8 v16, v8741; RV64-NEXT:    vsll.vi v16, v16, 2742; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma743; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t744; RV64-NEXT:    ret745  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i8> %idxs746  %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)747  ret <vscale x 8 x i32> %v748}749 750define <vscale x 8 x i32> @vpgather_baseidx_sext_nxv8i8_nxv8i32(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {751; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i32:752; RV32:       # %bb.0:753; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma754; RV32-NEXT:    vsext.vf4 v12, v8755; RV32-NEXT:    vsll.vi v8, v12, 2756; RV32-NEXT:    vluxei32.v v8, (a0), v8, v0.t757; RV32-NEXT:    ret758;759; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i32:760; RV64:       # %bb.0:761; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma762; RV64-NEXT:    vsext.vf8 v16, v8763; RV64-NEXT:    vsll.vi v16, v16, 2764; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma765; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t766; RV64-NEXT:    ret767  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>768  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs769  %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)770  ret <vscale x 8 x i32> %v771}772 773define <vscale x 8 x i32> @vpgather_baseidx_zext_nxv8i8_nxv8i32(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {774; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i32:775; RV32:       # %bb.0:776; RV32-NEXT:    li a2, 4777; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma778; RV32-NEXT:    vwmulu.vx v12, v8, a2779; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma780; RV32-NEXT:    vluxei16.v v8, (a0), v12, v0.t781; RV32-NEXT:    ret782;783; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i32:784; RV64:       # %bb.0:785; RV64-NEXT:    li a2, 4786; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma787; RV64-NEXT:    vwmulu.vx v12, v8, a2788; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma789; RV64-NEXT:    vluxei16.v v8, (a0), v12, v0.t790; RV64-NEXT:    ret791  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>792  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs793  %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)794  ret <vscale x 8 x i32> %v795}796 797define <vscale x 8 x i32> @vpgather_baseidx_nxv8i16_nxv8i32(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {798; RV32-LABEL: vpgather_baseidx_nxv8i16_nxv8i32:799; RV32:       # %bb.0:800; RV32-NEXT:    li a2, 4801; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma802; RV32-NEXT:    vwmulsu.vx v12, v8, a2803; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma804; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t805; RV32-NEXT:    ret806;807; RV64-LABEL: vpgather_baseidx_nxv8i16_nxv8i32:808; RV64:       # %bb.0:809; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma810; RV64-NEXT:    vsext.vf4 v16, v8811; RV64-NEXT:    vsll.vi v16, v16, 2812; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma813; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t814; RV64-NEXT:    ret815  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i16> %idxs816  %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)817  ret <vscale x 8 x i32> %v818}819 820define <vscale x 8 x i32> @vpgather_baseidx_sext_nxv8i16_nxv8i32(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {821; RV32-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8i32:822; RV32:       # %bb.0:823; RV32-NEXT:    li a2, 4824; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma825; RV32-NEXT:    vwmulsu.vx v12, v8, a2826; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma827; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t828; RV32-NEXT:    ret829;830; RV64-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8i32:831; RV64:       # %bb.0:832; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma833; RV64-NEXT:    vsext.vf4 v16, v8834; RV64-NEXT:    vsll.vi v16, v16, 2835; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma836; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t837; RV64-NEXT:    ret838  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>839  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs840  %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)841  ret <vscale x 8 x i32> %v842}843 844define <vscale x 8 x i32> @vpgather_baseidx_zext_nxv8i16_nxv8i32(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {845; RV32-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8i32:846; RV32:       # %bb.0:847; RV32-NEXT:    li a2, 4848; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma849; RV32-NEXT:    vwmulu.vx v12, v8, a2850; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma851; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t852; RV32-NEXT:    ret853;854; RV64-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8i32:855; RV64:       # %bb.0:856; RV64-NEXT:    li a2, 4857; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, ma858; RV64-NEXT:    vwmulu.vx v12, v8, a2859; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma860; RV64-NEXT:    vluxei32.v v8, (a0), v12, v0.t861; RV64-NEXT:    ret862  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>863  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs864  %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)865  ret <vscale x 8 x i32> %v866}867 868define <vscale x 8 x i32> @vpgather_baseidx_nxv8i32(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {869; RV32-LABEL: vpgather_baseidx_nxv8i32:870; RV32:       # %bb.0:871; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma872; RV32-NEXT:    vsll.vi v8, v8, 2873; RV32-NEXT:    vluxei32.v v8, (a0), v8, v0.t874; RV32-NEXT:    ret875;876; RV64-LABEL: vpgather_baseidx_nxv8i32:877; RV64:       # %bb.0:878; RV64-NEXT:    li a2, 4879; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma880; RV64-NEXT:    vwmulsu.vx v16, v8, a2881; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t882; RV64-NEXT:    ret883  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %idxs884  %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)885  ret <vscale x 8 x i32> %v886}887 888define <vscale x 1 x i64> @vpgather_nxv1i64(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {889; RV32-LABEL: vpgather_nxv1i64:890; RV32:       # %bb.0:891; RV32-NEXT:    vsetvli zero, a0, e64, m1, ta, ma892; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t893; RV32-NEXT:    vmv.v.v v8, v9894; RV32-NEXT:    ret895;896; RV64-LABEL: vpgather_nxv1i64:897; RV64:       # %bb.0:898; RV64-NEXT:    vsetvli zero, a0, e64, m1, ta, ma899; RV64-NEXT:    vluxei64.v v8, (zero), v8, v0.t900; RV64-NEXT:    ret901  %v = call <vscale x 1 x i64> @llvm.vp.gather.nxv1i64.nxv1p0(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)902  ret <vscale x 1 x i64> %v903}904 905define <vscale x 2 x i64> @vpgather_nxv2i64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {906; RV32-LABEL: vpgather_nxv2i64:907; RV32:       # %bb.0:908; RV32-NEXT:    vsetvli zero, a0, e64, m2, ta, ma909; RV32-NEXT:    vmv1r.v v10, v8910; RV32-NEXT:    vluxei32.v v8, (zero), v10, v0.t911; RV32-NEXT:    ret912;913; RV64-LABEL: vpgather_nxv2i64:914; RV64:       # %bb.0:915; RV64-NEXT:    vsetvli zero, a0, e64, m2, ta, ma916; RV64-NEXT:    vluxei64.v v8, (zero), v8, v0.t917; RV64-NEXT:    ret918  %v = call <vscale x 2 x i64> @llvm.vp.gather.nxv2i64.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)919  ret <vscale x 2 x i64> %v920}921 922define <vscale x 4 x i64> @vpgather_nxv4i64(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {923; RV32-LABEL: vpgather_nxv4i64:924; RV32:       # %bb.0:925; RV32-NEXT:    vsetvli zero, a0, e64, m4, ta, ma926; RV32-NEXT:    vmv2r.v v12, v8927; RV32-NEXT:    vluxei32.v v8, (zero), v12, v0.t928; RV32-NEXT:    ret929;930; RV64-LABEL: vpgather_nxv4i64:931; RV64:       # %bb.0:932; RV64-NEXT:    vsetvli zero, a0, e64, m4, ta, ma933; RV64-NEXT:    vluxei64.v v8, (zero), v8, v0.t934; RV64-NEXT:    ret935  %v = call <vscale x 4 x i64> @llvm.vp.gather.nxv4i64.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)936  ret <vscale x 4 x i64> %v937}938 939define <vscale x 4 x i64> @vpgather_truemask_nxv4i64(<vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {940; RV32-LABEL: vpgather_truemask_nxv4i64:941; RV32:       # %bb.0:942; RV32-NEXT:    vsetvli zero, a0, e64, m4, ta, ma943; RV32-NEXT:    vmv2r.v v12, v8944; RV32-NEXT:    vluxei32.v v8, (zero), v12945; RV32-NEXT:    ret946;947; RV64-LABEL: vpgather_truemask_nxv4i64:948; RV64:       # %bb.0:949; RV64-NEXT:    vsetvli zero, a0, e64, m4, ta, ma950; RV64-NEXT:    vluxei64.v v8, (zero), v8951; RV64-NEXT:    ret952  %v = call <vscale x 4 x i64> @llvm.vp.gather.nxv4i64.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)953  ret <vscale x 4 x i64> %v954}955 956define <vscale x 8 x i64> @vpgather_nxv8i64(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {957; RV32-LABEL: vpgather_nxv8i64:958; RV32:       # %bb.0:959; RV32-NEXT:    vsetvli zero, a0, e64, m8, ta, ma960; RV32-NEXT:    vmv4r.v v16, v8961; RV32-NEXT:    vluxei32.v v8, (zero), v16, v0.t962; RV32-NEXT:    ret963;964; RV64-LABEL: vpgather_nxv8i64:965; RV64:       # %bb.0:966; RV64-NEXT:    vsetvli zero, a0, e64, m8, ta, ma967; RV64-NEXT:    vluxei64.v v8, (zero), v8, v0.t968; RV64-NEXT:    ret969  %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)970  ret <vscale x 8 x i64> %v971}972 973define <vscale x 8 x i64> @vpgather_baseidx_nxv8i8_nxv8i64(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {974; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8i64:975; RV32:       # %bb.0:976; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma977; RV32-NEXT:    vsext.vf4 v12, v8978; RV32-NEXT:    vsll.vi v16, v12, 3979; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma980; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t981; RV32-NEXT:    ret982;983; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8i64:984; RV64:       # %bb.0:985; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma986; RV64-NEXT:    vsext.vf8 v16, v8987; RV64-NEXT:    vsll.vi v8, v16, 3988; RV64-NEXT:    vluxei64.v v8, (a0), v8, v0.t989; RV64-NEXT:    ret990  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i8> %idxs991  %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)992  ret <vscale x 8 x i64> %v993}994 995define <vscale x 8 x i64> @vpgather_baseidx_sext_nxv8i8_nxv8i64(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {996; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i64:997; RV32:       # %bb.0:998; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma999; RV32-NEXT:    vsext.vf4 v12, v81000; RV32-NEXT:    vsll.vi v16, v12, 31001; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1002; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t1003; RV32-NEXT:    ret1004;1005; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i64:1006; RV64:       # %bb.0:1007; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1008; RV64-NEXT:    vsext.vf8 v16, v81009; RV64-NEXT:    vsll.vi v8, v16, 31010; RV64-NEXT:    vluxei64.v v8, (a0), v8, v0.t1011; RV64-NEXT:    ret1012  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>1013  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs1014  %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1015  ret <vscale x 8 x i64> %v1016}1017 1018define <vscale x 8 x i64> @vpgather_baseidx_zext_nxv8i8_nxv8i64(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1019; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i64:1020; RV32:       # %bb.0:1021; RV32-NEXT:    li a2, 81022; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1023; RV32-NEXT:    vwmulu.vx v16, v8, a21024; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1025; RV32-NEXT:    vluxei16.v v8, (a0), v16, v0.t1026; RV32-NEXT:    ret1027;1028; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i64:1029; RV64:       # %bb.0:1030; RV64-NEXT:    li a2, 81031; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1032; RV64-NEXT:    vwmulu.vx v16, v8, a21033; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1034; RV64-NEXT:    vluxei16.v v8, (a0), v16, v0.t1035; RV64-NEXT:    ret1036  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>1037  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs1038  %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1039  ret <vscale x 8 x i64> %v1040}1041 1042define <vscale x 8 x i64> @vpgather_baseidx_nxv8i16_nxv8i64(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1043; RV32-LABEL: vpgather_baseidx_nxv8i16_nxv8i64:1044; RV32:       # %bb.0:1045; RV32-NEXT:    li a2, 81046; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1047; RV32-NEXT:    vwmulsu.vx v16, v8, a21048; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1049; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t1050; RV32-NEXT:    ret1051;1052; RV64-LABEL: vpgather_baseidx_nxv8i16_nxv8i64:1053; RV64:       # %bb.0:1054; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1055; RV64-NEXT:    vsext.vf4 v16, v81056; RV64-NEXT:    vsll.vi v8, v16, 31057; RV64-NEXT:    vluxei64.v v8, (a0), v8, v0.t1058; RV64-NEXT:    ret1059  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i16> %idxs1060  %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1061  ret <vscale x 8 x i64> %v1062}1063 1064define <vscale x 8 x i64> @vpgather_baseidx_sext_nxv8i16_nxv8i64(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1065; RV32-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8i64:1066; RV32:       # %bb.0:1067; RV32-NEXT:    li a2, 81068; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1069; RV32-NEXT:    vwmulsu.vx v16, v8, a21070; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1071; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t1072; RV32-NEXT:    ret1073;1074; RV64-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8i64:1075; RV64:       # %bb.0:1076; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1077; RV64-NEXT:    vsext.vf4 v16, v81078; RV64-NEXT:    vsll.vi v8, v16, 31079; RV64-NEXT:    vluxei64.v v8, (a0), v8, v0.t1080; RV64-NEXT:    ret1081  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>1082  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs1083  %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1084  ret <vscale x 8 x i64> %v1085}1086 1087define <vscale x 8 x i64> @vpgather_baseidx_zext_nxv8i16_nxv8i64(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1088; RV32-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8i64:1089; RV32:       # %bb.0:1090; RV32-NEXT:    li a2, 81091; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1092; RV32-NEXT:    vwmulu.vx v16, v8, a21093; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1094; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t1095; RV32-NEXT:    ret1096;1097; RV64-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8i64:1098; RV64:       # %bb.0:1099; RV64-NEXT:    li a2, 81100; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1101; RV64-NEXT:    vwmulu.vx v16, v8, a21102; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1103; RV64-NEXT:    vluxei32.v v8, (a0), v16, v0.t1104; RV64-NEXT:    ret1105  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>1106  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs1107  %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1108  ret <vscale x 8 x i64> %v1109}1110 1111define <vscale x 8 x i64> @vpgather_baseidx_nxv8i32_nxv8i64(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1112; RV32-LABEL: vpgather_baseidx_nxv8i32_nxv8i64:1113; RV32:       # %bb.0:1114; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1115; RV32-NEXT:    vsll.vi v16, v8, 31116; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1117; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t1118; RV32-NEXT:    ret1119;1120; RV64-LABEL: vpgather_baseidx_nxv8i32_nxv8i64:1121; RV64:       # %bb.0:1122; RV64-NEXT:    li a2, 81123; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1124; RV64-NEXT:    vwmulsu.vx v16, v8, a21125; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1126; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t1127; RV64-NEXT:    ret1128  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i32> %idxs1129  %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1130  ret <vscale x 8 x i64> %v1131}1132 1133define <vscale x 8 x i64> @vpgather_baseidx_sext_nxv8i32_nxv8i64(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1134; RV32-LABEL: vpgather_baseidx_sext_nxv8i32_nxv8i64:1135; RV32:       # %bb.0:1136; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1137; RV32-NEXT:    vsll.vi v16, v8, 31138; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1139; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t1140; RV32-NEXT:    ret1141;1142; RV64-LABEL: vpgather_baseidx_sext_nxv8i32_nxv8i64:1143; RV64:       # %bb.0:1144; RV64-NEXT:    li a2, 81145; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1146; RV64-NEXT:    vwmulsu.vx v16, v8, a21147; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1148; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t1149; RV64-NEXT:    ret1150  %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>1151  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs1152  %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1153  ret <vscale x 8 x i64> %v1154}1155 1156define <vscale x 8 x i64> @vpgather_baseidx_zext_nxv8i32_nxv8i64(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1157; RV32-LABEL: vpgather_baseidx_zext_nxv8i32_nxv8i64:1158; RV32:       # %bb.0:1159; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1160; RV32-NEXT:    vsll.vi v16, v8, 31161; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1162; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t1163; RV32-NEXT:    ret1164;1165; RV64-LABEL: vpgather_baseidx_zext_nxv8i32_nxv8i64:1166; RV64:       # %bb.0:1167; RV64-NEXT:    li a2, 81168; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1169; RV64-NEXT:    vwmulu.vx v16, v8, a21170; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1171; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t1172; RV64-NEXT:    ret1173  %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>1174  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs1175  %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1176  ret <vscale x 8 x i64> %v1177}1178 1179define <vscale x 8 x i64> @vpgather_baseidx_nxv8i64(ptr %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1180; RV32-LABEL: vpgather_baseidx_nxv8i64:1181; RV32:       # %bb.0:1182; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1183; RV32-NEXT:    vnsrl.wi v16, v8, 01184; RV32-NEXT:    vsll.vi v16, v16, 31185; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1186; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t1187; RV32-NEXT:    ret1188;1189; RV64-LABEL: vpgather_baseidx_nxv8i64:1190; RV64:       # %bb.0:1191; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1192; RV64-NEXT:    vsll.vi v8, v8, 31193; RV64-NEXT:    vluxei64.v v8, (a0), v8, v0.t1194; RV64-NEXT:    ret1195  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %idxs1196  %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1197  ret <vscale x 8 x i64> %v1198}1199 1200define <vscale x 1 x bfloat> @vpgather_nxv1bf16(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {1201; RV32-LABEL: vpgather_nxv1bf16:1202; RV32:       # %bb.0:1203; RV32-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma1204; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t1205; RV32-NEXT:    vmv1r.v v8, v91206; RV32-NEXT:    ret1207;1208; RV64-LABEL: vpgather_nxv1bf16:1209; RV64:       # %bb.0:1210; RV64-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma1211; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t1212; RV64-NEXT:    vmv1r.v v8, v91213; RV64-NEXT:    ret1214  %v = call <vscale x 1 x bfloat> @llvm.vp.gather.nxv1bf16.nxv1p0(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)1215  ret <vscale x 1 x bfloat> %v1216}1217 1218define <vscale x 2 x bfloat> @vpgather_nxv2bf16(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {1219; RV32-LABEL: vpgather_nxv2bf16:1220; RV32:       # %bb.0:1221; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma1222; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t1223; RV32-NEXT:    vmv1r.v v8, v91224; RV32-NEXT:    ret1225;1226; RV64-LABEL: vpgather_nxv2bf16:1227; RV64:       # %bb.0:1228; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma1229; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t1230; RV64-NEXT:    vmv1r.v v8, v101231; RV64-NEXT:    ret1232  %v = call <vscale x 2 x bfloat> @llvm.vp.gather.nxv2bf16.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)1233  ret <vscale x 2 x bfloat> %v1234}1235 1236define <vscale x 4 x bfloat> @vpgather_nxv4bf16(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {1237; RV32-LABEL: vpgather_nxv4bf16:1238; RV32:       # %bb.0:1239; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1240; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t1241; RV32-NEXT:    vmv.v.v v8, v101242; RV32-NEXT:    ret1243;1244; RV64-LABEL: vpgather_nxv4bf16:1245; RV64:       # %bb.0:1246; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1247; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t1248; RV64-NEXT:    vmv.v.v v8, v121249; RV64-NEXT:    ret1250  %v = call <vscale x 4 x bfloat> @llvm.vp.gather.nxv4bf16.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)1251  ret <vscale x 4 x bfloat> %v1252}1253 1254define <vscale x 4 x bfloat> @vpgather_truemask_nxv4bf16(<vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {1255; RV32-LABEL: vpgather_truemask_nxv4bf16:1256; RV32:       # %bb.0:1257; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1258; RV32-NEXT:    vluxei32.v v10, (zero), v81259; RV32-NEXT:    vmv.v.v v8, v101260; RV32-NEXT:    ret1261;1262; RV64-LABEL: vpgather_truemask_nxv4bf16:1263; RV64:       # %bb.0:1264; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1265; RV64-NEXT:    vluxei64.v v12, (zero), v81266; RV64-NEXT:    vmv.v.v v8, v121267; RV64-NEXT:    ret1268  %v = call <vscale x 4 x bfloat> @llvm.vp.gather.nxv4bf16.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)1269  ret <vscale x 4 x bfloat> %v1270}1271 1272define <vscale x 8 x bfloat> @vpgather_nxv8bf16(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1273; RV32-LABEL: vpgather_nxv8bf16:1274; RV32:       # %bb.0:1275; RV32-NEXT:    vsetvli zero, a0, e16, m2, ta, ma1276; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t1277; RV32-NEXT:    vmv.v.v v8, v121278; RV32-NEXT:    ret1279;1280; RV64-LABEL: vpgather_nxv8bf16:1281; RV64:       # %bb.0:1282; RV64-NEXT:    vsetvli zero, a0, e16, m2, ta, ma1283; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t1284; RV64-NEXT:    vmv.v.v v8, v161285; RV64-NEXT:    ret1286  %v = call <vscale x 8 x bfloat> @llvm.vp.gather.nxv8bf16.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1287  ret <vscale x 8 x bfloat> %v1288}1289 1290define <vscale x 8 x bfloat> @vpgather_baseidx_nxv8i8_nxv8bf16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1291; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8bf16:1292; RV32:       # %bb.0:1293; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1294; RV32-NEXT:    vsext.vf4 v12, v81295; RV32-NEXT:    vadd.vv v12, v12, v121296; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1297; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t1298; RV32-NEXT:    ret1299;1300; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8bf16:1301; RV64:       # %bb.0:1302; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1303; RV64-NEXT:    vsext.vf8 v16, v81304; RV64-NEXT:    vadd.vv v16, v16, v161305; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1306; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t1307; RV64-NEXT:    ret1308  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i8> %idxs1309  %v = call <vscale x 8 x bfloat> @llvm.vp.gather.nxv8bf16.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1310  ret <vscale x 8 x bfloat> %v1311}1312 1313define <vscale x 8 x bfloat> @vpgather_baseidx_sext_nxv8i8_nxv8bf16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1314; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8bf16:1315; RV32:       # %bb.0:1316; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1317; RV32-NEXT:    vsext.vf4 v12, v81318; RV32-NEXT:    vadd.vv v12, v12, v121319; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1320; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t1321; RV32-NEXT:    ret1322;1323; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8bf16:1324; RV64:       # %bb.0:1325; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1326; RV64-NEXT:    vsext.vf8 v16, v81327; RV64-NEXT:    vadd.vv v16, v16, v161328; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1329; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t1330; RV64-NEXT:    ret1331  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1332  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i16> %eidxs1333  %v = call <vscale x 8 x bfloat> @llvm.vp.gather.nxv8bf16.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1334  ret <vscale x 8 x bfloat> %v1335}1336 1337define <vscale x 8 x bfloat> @vpgather_baseidx_zext_nxv8i8_nxv8bf16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1338; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8bf16:1339; RV32:       # %bb.0:1340; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1341; RV32-NEXT:    vwaddu.vv v10, v8, v81342; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1343; RV32-NEXT:    vluxei16.v v8, (a0), v10, v0.t1344; RV32-NEXT:    ret1345;1346; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8bf16:1347; RV64:       # %bb.0:1348; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1349; RV64-NEXT:    vwaddu.vv v10, v8, v81350; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1351; RV64-NEXT:    vluxei16.v v8, (a0), v10, v0.t1352; RV64-NEXT:    ret1353  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1354  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i16> %eidxs1355  %v = call <vscale x 8 x bfloat> @llvm.vp.gather.nxv8bf16.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1356  ret <vscale x 8 x bfloat> %v1357}1358 1359define <vscale x 8 x bfloat> @vpgather_baseidx_nxv8bf16(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1360; RV32-LABEL: vpgather_baseidx_nxv8bf16:1361; RV32:       # %bb.0:1362; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1363; RV32-NEXT:    vwadd.vv v12, v8, v81364; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t1365; RV32-NEXT:    ret1366;1367; RV64-LABEL: vpgather_baseidx_nxv8bf16:1368; RV64:       # %bb.0:1369; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1370; RV64-NEXT:    vsext.vf4 v16, v81371; RV64-NEXT:    vadd.vv v16, v16, v161372; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1373; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t1374; RV64-NEXT:    ret1375  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i16> %idxs1376  %v = call <vscale x 8 x bfloat> @llvm.vp.gather.nxv8bf16.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1377  ret <vscale x 8 x bfloat> %v1378}1379 1380define <vscale x 1 x half> @vpgather_nxv1f16(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {1381; RV32-LABEL: vpgather_nxv1f16:1382; RV32:       # %bb.0:1383; RV32-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma1384; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t1385; RV32-NEXT:    vmv1r.v v8, v91386; RV32-NEXT:    ret1387;1388; RV64-LABEL: vpgather_nxv1f16:1389; RV64:       # %bb.0:1390; RV64-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma1391; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t1392; RV64-NEXT:    vmv1r.v v8, v91393; RV64-NEXT:    ret1394  %v = call <vscale x 1 x half> @llvm.vp.gather.nxv1f16.nxv1p0(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)1395  ret <vscale x 1 x half> %v1396}1397 1398define <vscale x 2 x half> @vpgather_nxv2f16(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {1399; RV32-LABEL: vpgather_nxv2f16:1400; RV32:       # %bb.0:1401; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma1402; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t1403; RV32-NEXT:    vmv1r.v v8, v91404; RV32-NEXT:    ret1405;1406; RV64-LABEL: vpgather_nxv2f16:1407; RV64:       # %bb.0:1408; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma1409; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t1410; RV64-NEXT:    vmv1r.v v8, v101411; RV64-NEXT:    ret1412  %v = call <vscale x 2 x half> @llvm.vp.gather.nxv2f16.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)1413  ret <vscale x 2 x half> %v1414}1415 1416define <vscale x 4 x half> @vpgather_nxv4f16(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {1417; RV32-LABEL: vpgather_nxv4f16:1418; RV32:       # %bb.0:1419; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1420; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t1421; RV32-NEXT:    vmv.v.v v8, v101422; RV32-NEXT:    ret1423;1424; RV64-LABEL: vpgather_nxv4f16:1425; RV64:       # %bb.0:1426; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1427; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t1428; RV64-NEXT:    vmv.v.v v8, v121429; RV64-NEXT:    ret1430  %v = call <vscale x 4 x half> @llvm.vp.gather.nxv4f16.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)1431  ret <vscale x 4 x half> %v1432}1433 1434define <vscale x 4 x half> @vpgather_truemask_nxv4f16(<vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {1435; RV32-LABEL: vpgather_truemask_nxv4f16:1436; RV32:       # %bb.0:1437; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1438; RV32-NEXT:    vluxei32.v v10, (zero), v81439; RV32-NEXT:    vmv.v.v v8, v101440; RV32-NEXT:    ret1441;1442; RV64-LABEL: vpgather_truemask_nxv4f16:1443; RV64:       # %bb.0:1444; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1445; RV64-NEXT:    vluxei64.v v12, (zero), v81446; RV64-NEXT:    vmv.v.v v8, v121447; RV64-NEXT:    ret1448  %v = call <vscale x 4 x half> @llvm.vp.gather.nxv4f16.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)1449  ret <vscale x 4 x half> %v1450}1451 1452define <vscale x 8 x half> @vpgather_nxv8f16(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1453; RV32-LABEL: vpgather_nxv8f16:1454; RV32:       # %bb.0:1455; RV32-NEXT:    vsetvli zero, a0, e16, m2, ta, ma1456; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t1457; RV32-NEXT:    vmv.v.v v8, v121458; RV32-NEXT:    ret1459;1460; RV64-LABEL: vpgather_nxv8f16:1461; RV64:       # %bb.0:1462; RV64-NEXT:    vsetvli zero, a0, e16, m2, ta, ma1463; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t1464; RV64-NEXT:    vmv.v.v v8, v161465; RV64-NEXT:    ret1466  %v = call <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1467  ret <vscale x 8 x half> %v1468}1469 1470define <vscale x 8 x half> @vpgather_baseidx_nxv8i8_nxv8f16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1471; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8f16:1472; RV32:       # %bb.0:1473; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1474; RV32-NEXT:    vsext.vf4 v12, v81475; RV32-NEXT:    vadd.vv v12, v12, v121476; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1477; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t1478; RV32-NEXT:    ret1479;1480; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8f16:1481; RV64:       # %bb.0:1482; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1483; RV64-NEXT:    vsext.vf8 v16, v81484; RV64-NEXT:    vadd.vv v16, v16, v161485; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1486; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t1487; RV64-NEXT:    ret1488  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i8> %idxs1489  %v = call <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1490  ret <vscale x 8 x half> %v1491}1492 1493define <vscale x 8 x half> @vpgather_baseidx_sext_nxv8i8_nxv8f16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1494; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f16:1495; RV32:       # %bb.0:1496; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1497; RV32-NEXT:    vsext.vf4 v12, v81498; RV32-NEXT:    vadd.vv v12, v12, v121499; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1500; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t1501; RV32-NEXT:    ret1502;1503; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f16:1504; RV64:       # %bb.0:1505; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1506; RV64-NEXT:    vsext.vf8 v16, v81507; RV64-NEXT:    vadd.vv v16, v16, v161508; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1509; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t1510; RV64-NEXT:    ret1511  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1512  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i16> %eidxs1513  %v = call <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1514  ret <vscale x 8 x half> %v1515}1516 1517define <vscale x 8 x half> @vpgather_baseidx_zext_nxv8i8_nxv8f16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1518; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f16:1519; RV32:       # %bb.0:1520; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1521; RV32-NEXT:    vwaddu.vv v10, v8, v81522; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1523; RV32-NEXT:    vluxei16.v v8, (a0), v10, v0.t1524; RV32-NEXT:    ret1525;1526; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f16:1527; RV64:       # %bb.0:1528; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1529; RV64-NEXT:    vwaddu.vv v10, v8, v81530; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1531; RV64-NEXT:    vluxei16.v v8, (a0), v10, v0.t1532; RV64-NEXT:    ret1533  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1534  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i16> %eidxs1535  %v = call <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1536  ret <vscale x 8 x half> %v1537}1538 1539define <vscale x 8 x half> @vpgather_baseidx_nxv8f16(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1540; RV32-LABEL: vpgather_baseidx_nxv8f16:1541; RV32:       # %bb.0:1542; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1543; RV32-NEXT:    vwadd.vv v12, v8, v81544; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t1545; RV32-NEXT:    ret1546;1547; RV64-LABEL: vpgather_baseidx_nxv8f16:1548; RV64:       # %bb.0:1549; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1550; RV64-NEXT:    vsext.vf4 v16, v81551; RV64-NEXT:    vadd.vv v16, v16, v161552; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1553; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t1554; RV64-NEXT:    ret1555  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i16> %idxs1556  %v = call <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1557  ret <vscale x 8 x half> %v1558}1559 1560define <vscale x 1 x float> @vpgather_nxv1f32(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {1561; RV32-LABEL: vpgather_nxv1f32:1562; RV32:       # %bb.0:1563; RV32-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1564; RV32-NEXT:    vluxei32.v v8, (zero), v8, v0.t1565; RV32-NEXT:    ret1566;1567; RV64-LABEL: vpgather_nxv1f32:1568; RV64:       # %bb.0:1569; RV64-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1570; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t1571; RV64-NEXT:    vmv1r.v v8, v91572; RV64-NEXT:    ret1573  %v = call <vscale x 1 x float> @llvm.vp.gather.nxv1f32.nxv1p0(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)1574  ret <vscale x 1 x float> %v1575}1576 1577define <vscale x 2 x float> @vpgather_nxv2f32(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {1578; RV32-LABEL: vpgather_nxv2f32:1579; RV32:       # %bb.0:1580; RV32-NEXT:    vsetvli zero, a0, e32, m1, ta, ma1581; RV32-NEXT:    vluxei32.v v8, (zero), v8, v0.t1582; RV32-NEXT:    ret1583;1584; RV64-LABEL: vpgather_nxv2f32:1585; RV64:       # %bb.0:1586; RV64-NEXT:    vsetvli zero, a0, e32, m1, ta, ma1587; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t1588; RV64-NEXT:    vmv.v.v v8, v101589; RV64-NEXT:    ret1590  %v = call <vscale x 2 x float> @llvm.vp.gather.nxv2f32.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)1591  ret <vscale x 2 x float> %v1592}1593 1594define <vscale x 4 x float> @vpgather_nxv4f32(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {1595; RV32-LABEL: vpgather_nxv4f32:1596; RV32:       # %bb.0:1597; RV32-NEXT:    vsetvli zero, a0, e32, m2, ta, ma1598; RV32-NEXT:    vluxei32.v v8, (zero), v8, v0.t1599; RV32-NEXT:    ret1600;1601; RV64-LABEL: vpgather_nxv4f32:1602; RV64:       # %bb.0:1603; RV64-NEXT:    vsetvli zero, a0, e32, m2, ta, ma1604; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t1605; RV64-NEXT:    vmv.v.v v8, v121606; RV64-NEXT:    ret1607  %v = call <vscale x 4 x float> @llvm.vp.gather.nxv4f32.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)1608  ret <vscale x 4 x float> %v1609}1610 1611define <vscale x 4 x float> @vpgather_truemask_nxv4f32(<vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {1612; RV32-LABEL: vpgather_truemask_nxv4f32:1613; RV32:       # %bb.0:1614; RV32-NEXT:    vsetvli zero, a0, e32, m2, ta, ma1615; RV32-NEXT:    vluxei32.v v8, (zero), v81616; RV32-NEXT:    ret1617;1618; RV64-LABEL: vpgather_truemask_nxv4f32:1619; RV64:       # %bb.0:1620; RV64-NEXT:    vsetvli zero, a0, e32, m2, ta, ma1621; RV64-NEXT:    vluxei64.v v12, (zero), v81622; RV64-NEXT:    vmv.v.v v8, v121623; RV64-NEXT:    ret1624  %v = call <vscale x 4 x float> @llvm.vp.gather.nxv4f32.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)1625  ret <vscale x 4 x float> %v1626}1627 1628define <vscale x 8 x float> @vpgather_nxv8f32(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1629; RV32-LABEL: vpgather_nxv8f32:1630; RV32:       # %bb.0:1631; RV32-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1632; RV32-NEXT:    vluxei32.v v8, (zero), v8, v0.t1633; RV32-NEXT:    ret1634;1635; RV64-LABEL: vpgather_nxv8f32:1636; RV64:       # %bb.0:1637; RV64-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1638; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t1639; RV64-NEXT:    vmv.v.v v8, v161640; RV64-NEXT:    ret1641  %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1642  ret <vscale x 8 x float> %v1643}1644 1645define <vscale x 8 x float> @vpgather_baseidx_nxv8i8_nxv8f32(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1646; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8f32:1647; RV32:       # %bb.0:1648; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1649; RV32-NEXT:    vsext.vf4 v12, v81650; RV32-NEXT:    vsll.vi v8, v12, 21651; RV32-NEXT:    vluxei32.v v8, (a0), v8, v0.t1652; RV32-NEXT:    ret1653;1654; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8f32:1655; RV64:       # %bb.0:1656; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1657; RV64-NEXT:    vsext.vf8 v16, v81658; RV64-NEXT:    vsll.vi v16, v16, 21659; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1660; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t1661; RV64-NEXT:    ret1662  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i8> %idxs1663  %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1664  ret <vscale x 8 x float> %v1665}1666 1667define <vscale x 8 x float> @vpgather_baseidx_sext_nxv8i8_nxv8f32(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1668; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f32:1669; RV32:       # %bb.0:1670; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1671; RV32-NEXT:    vsext.vf4 v12, v81672; RV32-NEXT:    vsll.vi v8, v12, 21673; RV32-NEXT:    vluxei32.v v8, (a0), v8, v0.t1674; RV32-NEXT:    ret1675;1676; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f32:1677; RV64:       # %bb.0:1678; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1679; RV64-NEXT:    vsext.vf8 v16, v81680; RV64-NEXT:    vsll.vi v16, v16, 21681; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1682; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t1683; RV64-NEXT:    ret1684  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>1685  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1686  %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1687  ret <vscale x 8 x float> %v1688}1689 1690define <vscale x 8 x float> @vpgather_baseidx_zext_nxv8i8_nxv8f32(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1691; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f32:1692; RV32:       # %bb.0:1693; RV32-NEXT:    li a2, 41694; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1695; RV32-NEXT:    vwmulu.vx v12, v8, a21696; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1697; RV32-NEXT:    vluxei16.v v8, (a0), v12, v0.t1698; RV32-NEXT:    ret1699;1700; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f32:1701; RV64:       # %bb.0:1702; RV64-NEXT:    li a2, 41703; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1704; RV64-NEXT:    vwmulu.vx v12, v8, a21705; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1706; RV64-NEXT:    vluxei16.v v8, (a0), v12, v0.t1707; RV64-NEXT:    ret1708  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>1709  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1710  %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1711  ret <vscale x 8 x float> %v1712}1713 1714define <vscale x 8 x float> @vpgather_baseidx_nxv8i16_nxv8f32(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1715; RV32-LABEL: vpgather_baseidx_nxv8i16_nxv8f32:1716; RV32:       # %bb.0:1717; RV32-NEXT:    li a2, 41718; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1719; RV32-NEXT:    vwmulsu.vx v12, v8, a21720; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1721; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t1722; RV32-NEXT:    ret1723;1724; RV64-LABEL: vpgather_baseidx_nxv8i16_nxv8f32:1725; RV64:       # %bb.0:1726; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1727; RV64-NEXT:    vsext.vf4 v16, v81728; RV64-NEXT:    vsll.vi v16, v16, 21729; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1730; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t1731; RV64-NEXT:    ret1732  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i16> %idxs1733  %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1734  ret <vscale x 8 x float> %v1735}1736 1737define <vscale x 8 x float> @vpgather_baseidx_sext_nxv8i16_nxv8f32(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1738; RV32-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8f32:1739; RV32:       # %bb.0:1740; RV32-NEXT:    li a2, 41741; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1742; RV32-NEXT:    vwmulsu.vx v12, v8, a21743; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1744; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t1745; RV32-NEXT:    ret1746;1747; RV64-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8f32:1748; RV64:       # %bb.0:1749; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1750; RV64-NEXT:    vsext.vf4 v16, v81751; RV64-NEXT:    vsll.vi v16, v16, 21752; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1753; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t1754; RV64-NEXT:    ret1755  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>1756  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1757  %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1758  ret <vscale x 8 x float> %v1759}1760 1761define <vscale x 8 x float> @vpgather_baseidx_zext_nxv8i16_nxv8f32(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1762; RV32-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8f32:1763; RV32:       # %bb.0:1764; RV32-NEXT:    li a2, 41765; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1766; RV32-NEXT:    vwmulu.vx v12, v8, a21767; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1768; RV32-NEXT:    vluxei32.v v8, (a0), v12, v0.t1769; RV32-NEXT:    ret1770;1771; RV64-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8f32:1772; RV64:       # %bb.0:1773; RV64-NEXT:    li a2, 41774; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1775; RV64-NEXT:    vwmulu.vx v12, v8, a21776; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1777; RV64-NEXT:    vluxei32.v v8, (a0), v12, v0.t1778; RV64-NEXT:    ret1779  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>1780  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1781  %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1782  ret <vscale x 8 x float> %v1783}1784 1785define <vscale x 8 x float> @vpgather_baseidx_nxv8f32(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1786; RV32-LABEL: vpgather_baseidx_nxv8f32:1787; RV32:       # %bb.0:1788; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1789; RV32-NEXT:    vsll.vi v8, v8, 21790; RV32-NEXT:    vluxei32.v v8, (a0), v8, v0.t1791; RV32-NEXT:    ret1792;1793; RV64-LABEL: vpgather_baseidx_nxv8f32:1794; RV64:       # %bb.0:1795; RV64-NEXT:    li a2, 41796; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1797; RV64-NEXT:    vwmulsu.vx v16, v8, a21798; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t1799; RV64-NEXT:    ret1800  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %idxs1801  %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1802  ret <vscale x 8 x float> %v1803}1804 1805define <vscale x 1 x double> @vpgather_nxv1f64(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {1806; RV32-LABEL: vpgather_nxv1f64:1807; RV32:       # %bb.0:1808; RV32-NEXT:    vsetvli zero, a0, e64, m1, ta, ma1809; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t1810; RV32-NEXT:    vmv.v.v v8, v91811; RV32-NEXT:    ret1812;1813; RV64-LABEL: vpgather_nxv1f64:1814; RV64:       # %bb.0:1815; RV64-NEXT:    vsetvli zero, a0, e64, m1, ta, ma1816; RV64-NEXT:    vluxei64.v v8, (zero), v8, v0.t1817; RV64-NEXT:    ret1818  %v = call <vscale x 1 x double> @llvm.vp.gather.nxv1f64.nxv1p0(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)1819  ret <vscale x 1 x double> %v1820}1821 1822define <vscale x 2 x double> @vpgather_nxv2f64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {1823; RV32-LABEL: vpgather_nxv2f64:1824; RV32:       # %bb.0:1825; RV32-NEXT:    vsetvli zero, a0, e64, m2, ta, ma1826; RV32-NEXT:    vmv1r.v v10, v81827; RV32-NEXT:    vluxei32.v v8, (zero), v10, v0.t1828; RV32-NEXT:    ret1829;1830; RV64-LABEL: vpgather_nxv2f64:1831; RV64:       # %bb.0:1832; RV64-NEXT:    vsetvli zero, a0, e64, m2, ta, ma1833; RV64-NEXT:    vluxei64.v v8, (zero), v8, v0.t1834; RV64-NEXT:    ret1835  %v = call <vscale x 2 x double> @llvm.vp.gather.nxv2f64.nxv2p0(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)1836  ret <vscale x 2 x double> %v1837}1838 1839define <vscale x 4 x double> @vpgather_nxv4f64(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {1840; RV32-LABEL: vpgather_nxv4f64:1841; RV32:       # %bb.0:1842; RV32-NEXT:    vsetvli zero, a0, e64, m4, ta, ma1843; RV32-NEXT:    vmv2r.v v12, v81844; RV32-NEXT:    vluxei32.v v8, (zero), v12, v0.t1845; RV32-NEXT:    ret1846;1847; RV64-LABEL: vpgather_nxv4f64:1848; RV64:       # %bb.0:1849; RV64-NEXT:    vsetvli zero, a0, e64, m4, ta, ma1850; RV64-NEXT:    vluxei64.v v8, (zero), v8, v0.t1851; RV64-NEXT:    ret1852  %v = call <vscale x 4 x double> @llvm.vp.gather.nxv4f64.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)1853  ret <vscale x 4 x double> %v1854}1855 1856define <vscale x 4 x double> @vpgather_truemask_nxv4f64(<vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {1857; RV32-LABEL: vpgather_truemask_nxv4f64:1858; RV32:       # %bb.0:1859; RV32-NEXT:    vsetvli zero, a0, e64, m4, ta, ma1860; RV32-NEXT:    vmv2r.v v12, v81861; RV32-NEXT:    vluxei32.v v8, (zero), v121862; RV32-NEXT:    ret1863;1864; RV64-LABEL: vpgather_truemask_nxv4f64:1865; RV64:       # %bb.0:1866; RV64-NEXT:    vsetvli zero, a0, e64, m4, ta, ma1867; RV64-NEXT:    vluxei64.v v8, (zero), v81868; RV64-NEXT:    ret1869  %v = call <vscale x 4 x double> @llvm.vp.gather.nxv4f64.nxv4p0(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)1870  ret <vscale x 4 x double> %v1871}1872 1873define <vscale x 6 x double> @vpgather_nxv6f64(<vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1874; RV32-LABEL: vpgather_nxv6f64:1875; RV32:       # %bb.0:1876; RV32-NEXT:    vsetvli zero, a0, e64, m8, ta, ma1877; RV32-NEXT:    vmv4r.v v16, v81878; RV32-NEXT:    vluxei32.v v8, (zero), v16, v0.t1879; RV32-NEXT:    ret1880;1881; RV64-LABEL: vpgather_nxv6f64:1882; RV64:       # %bb.0:1883; RV64-NEXT:    vsetvli zero, a0, e64, m8, ta, ma1884; RV64-NEXT:    vluxei64.v v8, (zero), v8, v0.t1885; RV64-NEXT:    ret1886  %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0(<vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1887  ret <vscale x 6 x double> %v1888}1889 1890define <vscale x 6 x double> @vpgather_baseidx_nxv6i8_nxv6f64(ptr %base, <vscale x 6 x i8> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1891; RV32-LABEL: vpgather_baseidx_nxv6i8_nxv6f64:1892; RV32:       # %bb.0:1893; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1894; RV32-NEXT:    vsext.vf4 v12, v81895; RV32-NEXT:    vsll.vi v16, v12, 31896; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1897; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t1898; RV32-NEXT:    ret1899;1900; RV64-LABEL: vpgather_baseidx_nxv6i8_nxv6f64:1901; RV64:       # %bb.0:1902; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1903; RV64-NEXT:    vsext.vf8 v16, v81904; RV64-NEXT:    vsll.vi v8, v16, 31905; RV64-NEXT:    vluxei64.v v8, (a0), v8, v0.t1906; RV64-NEXT:    ret1907  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i8> %idxs1908  %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0(<vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1909  ret <vscale x 6 x double> %v1910}1911 1912define <vscale x 6 x double> @vpgather_baseidx_sext_nxv6i8_nxv6f64(ptr %base, <vscale x 6 x i8> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1913; RV32-LABEL: vpgather_baseidx_sext_nxv6i8_nxv6f64:1914; RV32:       # %bb.0:1915; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1916; RV32-NEXT:    vsext.vf4 v12, v81917; RV32-NEXT:    vsll.vi v16, v12, 31918; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1919; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t1920; RV32-NEXT:    ret1921;1922; RV64-LABEL: vpgather_baseidx_sext_nxv6i8_nxv6f64:1923; RV64:       # %bb.0:1924; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1925; RV64-NEXT:    vsext.vf8 v16, v81926; RV64-NEXT:    vsll.vi v8, v16, 31927; RV64-NEXT:    vluxei64.v v8, (a0), v8, v0.t1928; RV64-NEXT:    ret1929  %eidxs = sext <vscale x 6 x i8> %idxs to <vscale x 6 x i64>1930  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i64> %eidxs1931  %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0(<vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1932  ret <vscale x 6 x double> %v1933}1934 1935define <vscale x 6 x double> @vpgather_baseidx_zext_nxv6i8_nxv6f64(ptr %base, <vscale x 6 x i8> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1936; RV32-LABEL: vpgather_baseidx_zext_nxv6i8_nxv6f64:1937; RV32:       # %bb.0:1938; RV32-NEXT:    li a2, 81939; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1940; RV32-NEXT:    vwmulu.vx v16, v8, a21941; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1942; RV32-NEXT:    vluxei16.v v8, (a0), v16, v0.t1943; RV32-NEXT:    ret1944;1945; RV64-LABEL: vpgather_baseidx_zext_nxv6i8_nxv6f64:1946; RV64:       # %bb.0:1947; RV64-NEXT:    li a2, 81948; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1949; RV64-NEXT:    vwmulu.vx v16, v8, a21950; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1951; RV64-NEXT:    vluxei16.v v8, (a0), v16, v0.t1952; RV64-NEXT:    ret1953  %eidxs = zext <vscale x 6 x i8> %idxs to <vscale x 6 x i64>1954  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i64> %eidxs1955  %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0(<vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1956  ret <vscale x 6 x double> %v1957}1958 1959define <vscale x 6 x double> @vpgather_baseidx_nxv6i16_nxv6f64(ptr %base, <vscale x 6 x i16> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1960; RV32-LABEL: vpgather_baseidx_nxv6i16_nxv6f64:1961; RV32:       # %bb.0:1962; RV32-NEXT:    li a2, 81963; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1964; RV32-NEXT:    vwmulsu.vx v16, v8, a21965; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1966; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t1967; RV32-NEXT:    ret1968;1969; RV64-LABEL: vpgather_baseidx_nxv6i16_nxv6f64:1970; RV64:       # %bb.0:1971; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1972; RV64-NEXT:    vsext.vf4 v16, v81973; RV64-NEXT:    vsll.vi v8, v16, 31974; RV64-NEXT:    vluxei64.v v8, (a0), v8, v0.t1975; RV64-NEXT:    ret1976  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i16> %idxs1977  %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0(<vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1978  ret <vscale x 6 x double> %v1979}1980 1981define <vscale x 6 x double> @vpgather_baseidx_sext_nxv6i16_nxv6f64(ptr %base, <vscale x 6 x i16> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1982; RV32-LABEL: vpgather_baseidx_sext_nxv6i16_nxv6f64:1983; RV32:       # %bb.0:1984; RV32-NEXT:    li a2, 81985; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1986; RV32-NEXT:    vwmulsu.vx v16, v8, a21987; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1988; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t1989; RV32-NEXT:    ret1990;1991; RV64-LABEL: vpgather_baseidx_sext_nxv6i16_nxv6f64:1992; RV64:       # %bb.0:1993; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1994; RV64-NEXT:    vsext.vf4 v16, v81995; RV64-NEXT:    vsll.vi v8, v16, 31996; RV64-NEXT:    vluxei64.v v8, (a0), v8, v0.t1997; RV64-NEXT:    ret1998  %eidxs = sext <vscale x 6 x i16> %idxs to <vscale x 6 x i64>1999  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i64> %eidxs2000  %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0(<vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)2001  ret <vscale x 6 x double> %v2002}2003 2004define <vscale x 6 x double> @vpgather_baseidx_zext_nxv6i16_nxv6f64(ptr %base, <vscale x 6 x i16> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {2005; RV32-LABEL: vpgather_baseidx_zext_nxv6i16_nxv6f64:2006; RV32:       # %bb.0:2007; RV32-NEXT:    li a2, 82008; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2009; RV32-NEXT:    vwmulu.vx v16, v8, a22010; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2011; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t2012; RV32-NEXT:    ret2013;2014; RV64-LABEL: vpgather_baseidx_zext_nxv6i16_nxv6f64:2015; RV64:       # %bb.0:2016; RV64-NEXT:    li a2, 82017; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2018; RV64-NEXT:    vwmulu.vx v16, v8, a22019; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2020; RV64-NEXT:    vluxei32.v v8, (a0), v16, v0.t2021; RV64-NEXT:    ret2022  %eidxs = zext <vscale x 6 x i16> %idxs to <vscale x 6 x i64>2023  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i64> %eidxs2024  %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0(<vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)2025  ret <vscale x 6 x double> %v2026}2027 2028define <vscale x 6 x double> @vpgather_baseidx_nxv6i32_nxv6f64(ptr %base, <vscale x 6 x i32> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {2029; RV32-LABEL: vpgather_baseidx_nxv6i32_nxv6f64:2030; RV32:       # %bb.0:2031; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2032; RV32-NEXT:    vsll.vi v16, v8, 32033; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2034; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t2035; RV32-NEXT:    ret2036;2037; RV64-LABEL: vpgather_baseidx_nxv6i32_nxv6f64:2038; RV64:       # %bb.0:2039; RV64-NEXT:    li a2, 82040; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2041; RV64-NEXT:    vwmulsu.vx v16, v8, a22042; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2043; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t2044; RV64-NEXT:    ret2045  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i32> %idxs2046  %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0(<vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)2047  ret <vscale x 6 x double> %v2048}2049 2050define <vscale x 6 x double> @vpgather_baseidx_sext_nxv6i32_nxv6f64(ptr %base, <vscale x 6 x i32> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {2051; RV32-LABEL: vpgather_baseidx_sext_nxv6i32_nxv6f64:2052; RV32:       # %bb.0:2053; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2054; RV32-NEXT:    vsll.vi v16, v8, 32055; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2056; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t2057; RV32-NEXT:    ret2058;2059; RV64-LABEL: vpgather_baseidx_sext_nxv6i32_nxv6f64:2060; RV64:       # %bb.0:2061; RV64-NEXT:    li a2, 82062; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2063; RV64-NEXT:    vwmulsu.vx v16, v8, a22064; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2065; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t2066; RV64-NEXT:    ret2067  %eidxs = sext <vscale x 6 x i32> %idxs to <vscale x 6 x i64>2068  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i64> %eidxs2069  %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0(<vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)2070  ret <vscale x 6 x double> %v2071}2072 2073define <vscale x 6 x double> @vpgather_baseidx_zext_nxv6i32_nxv6f64(ptr %base, <vscale x 6 x i32> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {2074; RV32-LABEL: vpgather_baseidx_zext_nxv6i32_nxv6f64:2075; RV32:       # %bb.0:2076; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2077; RV32-NEXT:    vsll.vi v16, v8, 32078; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2079; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t2080; RV32-NEXT:    ret2081;2082; RV64-LABEL: vpgather_baseidx_zext_nxv6i32_nxv6f64:2083; RV64:       # %bb.0:2084; RV64-NEXT:    li a2, 82085; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2086; RV64-NEXT:    vwmulu.vx v16, v8, a22087; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2088; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t2089; RV64-NEXT:    ret2090  %eidxs = zext <vscale x 6 x i32> %idxs to <vscale x 6 x i64>2091  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i64> %eidxs2092  %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0(<vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)2093  ret <vscale x 6 x double> %v2094}2095 2096define <vscale x 6 x double> @vpgather_baseidx_nxv6f64(ptr %base, <vscale x 6 x i64> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {2097; RV32-LABEL: vpgather_baseidx_nxv6f64:2098; RV32:       # %bb.0:2099; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2100; RV32-NEXT:    vnsrl.wi v16, v8, 02101; RV32-NEXT:    vsll.vi v16, v16, 32102; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2103; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t2104; RV32-NEXT:    ret2105;2106; RV64-LABEL: vpgather_baseidx_nxv6f64:2107; RV64:       # %bb.0:2108; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2109; RV64-NEXT:    vsll.vi v8, v8, 32110; RV64-NEXT:    vluxei64.v v8, (a0), v8, v0.t2111; RV64-NEXT:    ret2112  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i64> %idxs2113  %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0(<vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)2114  ret <vscale x 6 x double> %v2115}2116 2117define <vscale x 8 x double> @vpgather_nxv8f64(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2118; RV32-LABEL: vpgather_nxv8f64:2119; RV32:       # %bb.0:2120; RV32-NEXT:    vsetvli zero, a0, e64, m8, ta, ma2121; RV32-NEXT:    vmv4r.v v16, v82122; RV32-NEXT:    vluxei32.v v8, (zero), v16, v0.t2123; RV32-NEXT:    ret2124;2125; RV64-LABEL: vpgather_nxv8f64:2126; RV64:       # %bb.0:2127; RV64-NEXT:    vsetvli zero, a0, e64, m8, ta, ma2128; RV64-NEXT:    vluxei64.v v8, (zero), v8, v0.t2129; RV64-NEXT:    ret2130  %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2131  ret <vscale x 8 x double> %v2132}2133 2134define <vscale x 8 x double> @vpgather_baseidx_nxv8i8_nxv8f64(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2135; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8f64:2136; RV32:       # %bb.0:2137; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2138; RV32-NEXT:    vsext.vf4 v12, v82139; RV32-NEXT:    vsll.vi v16, v12, 32140; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2141; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t2142; RV32-NEXT:    ret2143;2144; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8f64:2145; RV64:       # %bb.0:2146; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2147; RV64-NEXT:    vsext.vf8 v16, v82148; RV64-NEXT:    vsll.vi v8, v16, 32149; RV64-NEXT:    vluxei64.v v8, (a0), v8, v0.t2150; RV64-NEXT:    ret2151  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i8> %idxs2152  %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2153  ret <vscale x 8 x double> %v2154}2155 2156define <vscale x 8 x double> @vpgather_baseidx_sext_nxv8i8_nxv8f64(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2157; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f64:2158; RV32:       # %bb.0:2159; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2160; RV32-NEXT:    vsext.vf4 v12, v82161; RV32-NEXT:    vsll.vi v16, v12, 32162; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2163; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t2164; RV32-NEXT:    ret2165;2166; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f64:2167; RV64:       # %bb.0:2168; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2169; RV64-NEXT:    vsext.vf8 v16, v82170; RV64-NEXT:    vsll.vi v8, v16, 32171; RV64-NEXT:    vluxei64.v v8, (a0), v8, v0.t2172; RV64-NEXT:    ret2173  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>2174  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2175  %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2176  ret <vscale x 8 x double> %v2177}2178 2179define <vscale x 8 x double> @vpgather_baseidx_zext_nxv8i8_nxv8f64(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2180; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f64:2181; RV32:       # %bb.0:2182; RV32-NEXT:    li a2, 82183; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma2184; RV32-NEXT:    vwmulu.vx v16, v8, a22185; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2186; RV32-NEXT:    vluxei16.v v8, (a0), v16, v0.t2187; RV32-NEXT:    ret2188;2189; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f64:2190; RV64:       # %bb.0:2191; RV64-NEXT:    li a2, 82192; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma2193; RV64-NEXT:    vwmulu.vx v16, v8, a22194; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2195; RV64-NEXT:    vluxei16.v v8, (a0), v16, v0.t2196; RV64-NEXT:    ret2197  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>2198  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2199  %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2200  ret <vscale x 8 x double> %v2201}2202 2203define <vscale x 8 x double> @vpgather_baseidx_nxv8i16_nxv8f64(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2204; RV32-LABEL: vpgather_baseidx_nxv8i16_nxv8f64:2205; RV32:       # %bb.0:2206; RV32-NEXT:    li a2, 82207; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2208; RV32-NEXT:    vwmulsu.vx v16, v8, a22209; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2210; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t2211; RV32-NEXT:    ret2212;2213; RV64-LABEL: vpgather_baseidx_nxv8i16_nxv8f64:2214; RV64:       # %bb.0:2215; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2216; RV64-NEXT:    vsext.vf4 v16, v82217; RV64-NEXT:    vsll.vi v8, v16, 32218; RV64-NEXT:    vluxei64.v v8, (a0), v8, v0.t2219; RV64-NEXT:    ret2220  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i16> %idxs2221  %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2222  ret <vscale x 8 x double> %v2223}2224 2225define <vscale x 8 x double> @vpgather_baseidx_sext_nxv8i16_nxv8f64(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2226; RV32-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8f64:2227; RV32:       # %bb.0:2228; RV32-NEXT:    li a2, 82229; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2230; RV32-NEXT:    vwmulsu.vx v16, v8, a22231; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2232; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t2233; RV32-NEXT:    ret2234;2235; RV64-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8f64:2236; RV64:       # %bb.0:2237; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2238; RV64-NEXT:    vsext.vf4 v16, v82239; RV64-NEXT:    vsll.vi v8, v16, 32240; RV64-NEXT:    vluxei64.v v8, (a0), v8, v0.t2241; RV64-NEXT:    ret2242  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>2243  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2244  %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2245  ret <vscale x 8 x double> %v2246}2247 2248define <vscale x 8 x double> @vpgather_baseidx_zext_nxv8i16_nxv8f64(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2249; RV32-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8f64:2250; RV32:       # %bb.0:2251; RV32-NEXT:    li a2, 82252; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2253; RV32-NEXT:    vwmulu.vx v16, v8, a22254; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2255; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t2256; RV32-NEXT:    ret2257;2258; RV64-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8f64:2259; RV64:       # %bb.0:2260; RV64-NEXT:    li a2, 82261; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2262; RV64-NEXT:    vwmulu.vx v16, v8, a22263; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2264; RV64-NEXT:    vluxei32.v v8, (a0), v16, v0.t2265; RV64-NEXT:    ret2266  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>2267  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2268  %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2269  ret <vscale x 8 x double> %v2270}2271 2272define <vscale x 8 x double> @vpgather_baseidx_nxv8i32_nxv8f64(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2273; RV32-LABEL: vpgather_baseidx_nxv8i32_nxv8f64:2274; RV32:       # %bb.0:2275; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2276; RV32-NEXT:    vsll.vi v16, v8, 32277; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2278; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t2279; RV32-NEXT:    ret2280;2281; RV64-LABEL: vpgather_baseidx_nxv8i32_nxv8f64:2282; RV64:       # %bb.0:2283; RV64-NEXT:    li a2, 82284; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2285; RV64-NEXT:    vwmulsu.vx v16, v8, a22286; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2287; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t2288; RV64-NEXT:    ret2289  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i32> %idxs2290  %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2291  ret <vscale x 8 x double> %v2292}2293 2294define <vscale x 8 x double> @vpgather_baseidx_sext_nxv8i32_nxv8f64(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2295; RV32-LABEL: vpgather_baseidx_sext_nxv8i32_nxv8f64:2296; RV32:       # %bb.0:2297; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2298; RV32-NEXT:    vsll.vi v16, v8, 32299; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2300; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t2301; RV32-NEXT:    ret2302;2303; RV64-LABEL: vpgather_baseidx_sext_nxv8i32_nxv8f64:2304; RV64:       # %bb.0:2305; RV64-NEXT:    li a2, 82306; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2307; RV64-NEXT:    vwmulsu.vx v16, v8, a22308; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2309; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t2310; RV64-NEXT:    ret2311  %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>2312  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2313  %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2314  ret <vscale x 8 x double> %v2315}2316 2317define <vscale x 8 x double> @vpgather_baseidx_zext_nxv8i32_nxv8f64(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2318; RV32-LABEL: vpgather_baseidx_zext_nxv8i32_nxv8f64:2319; RV32:       # %bb.0:2320; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2321; RV32-NEXT:    vsll.vi v16, v8, 32322; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2323; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t2324; RV32-NEXT:    ret2325;2326; RV64-LABEL: vpgather_baseidx_zext_nxv8i32_nxv8f64:2327; RV64:       # %bb.0:2328; RV64-NEXT:    li a2, 82329; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2330; RV64-NEXT:    vwmulu.vx v16, v8, a22331; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2332; RV64-NEXT:    vluxei64.v v8, (a0), v16, v0.t2333; RV64-NEXT:    ret2334  %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>2335  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2336  %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2337  ret <vscale x 8 x double> %v2338}2339 2340define <vscale x 8 x double> @vpgather_baseidx_nxv8f64(ptr %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2341; RV32-LABEL: vpgather_baseidx_nxv8f64:2342; RV32:       # %bb.0:2343; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2344; RV32-NEXT:    vnsrl.wi v16, v8, 02345; RV32-NEXT:    vsll.vi v16, v16, 32346; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2347; RV32-NEXT:    vluxei32.v v8, (a0), v16, v0.t2348; RV32-NEXT:    ret2349;2350; RV64-LABEL: vpgather_baseidx_nxv8f64:2351; RV64:       # %bb.0:2352; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2353; RV64-NEXT:    vsll.vi v8, v8, 32354; RV64-NEXT:    vluxei64.v v8, (a0), v8, v0.t2355; RV64-NEXT:    ret2356  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %idxs2357  %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2358  ret <vscale x 8 x double> %v2359}2360 2361define <vscale x 16 x double> @vpgather_nxv16f64(<vscale x 16 x ptr> %ptrs, <vscale x 16 x i1> %m, i32 zeroext %evl) {2362; RV32-LABEL: vpgather_nxv16f64:2363; RV32:       # %bb.0:2364; RV32-NEXT:    vsetvli a1, zero, e8, mf4, ta, ma2365; RV32-NEXT:    vmv1r.v v24, v02366; RV32-NEXT:    csrr a1, vlenb2367; RV32-NEXT:    sub a2, a0, a12368; RV32-NEXT:    srli a3, a1, 32369; RV32-NEXT:    vslidedown.vx v0, v0, a32370; RV32-NEXT:    sltu a3, a0, a22371; RV32-NEXT:    addi a3, a3, -12372; RV32-NEXT:    and a2, a3, a22373; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma2374; RV32-NEXT:    vluxei32.v v16, (zero), v12, v0.t2375; RV32-NEXT:    bltu a0, a1, .LBB111_22376; RV32-NEXT:  # %bb.1:2377; RV32-NEXT:    mv a0, a12378; RV32-NEXT:  .LBB111_2:2379; RV32-NEXT:    vmv1r.v v0, v242380; RV32-NEXT:    vsetvli zero, a0, e64, m8, ta, ma2381; RV32-NEXT:    vluxei32.v v24, (zero), v8, v0.t2382; RV32-NEXT:    vmv.v.v v8, v242383; RV32-NEXT:    ret2384;2385; RV64-LABEL: vpgather_nxv16f64:2386; RV64:       # %bb.0:2387; RV64-NEXT:    vsetvli a1, zero, e8, mf4, ta, ma2388; RV64-NEXT:    vmv1r.v v24, v02389; RV64-NEXT:    csrr a1, vlenb2390; RV64-NEXT:    sub a2, a0, a12391; RV64-NEXT:    srli a3, a1, 32392; RV64-NEXT:    vslidedown.vx v0, v0, a32393; RV64-NEXT:    sltu a3, a0, a22394; RV64-NEXT:    addi a3, a3, -12395; RV64-NEXT:    and a2, a3, a22396; RV64-NEXT:    vsetvli zero, a2, e64, m8, ta, ma2397; RV64-NEXT:    vluxei64.v v16, (zero), v16, v0.t2398; RV64-NEXT:    bltu a0, a1, .LBB111_22399; RV64-NEXT:  # %bb.1:2400; RV64-NEXT:    mv a0, a12401; RV64-NEXT:  .LBB111_2:2402; RV64-NEXT:    vmv1r.v v0, v242403; RV64-NEXT:    vsetvli zero, a0, e64, m8, ta, ma2404; RV64-NEXT:    vluxei64.v v8, (zero), v8, v0.t2405; RV64-NEXT:    ret2406  %v = call <vscale x 16 x double> @llvm.vp.gather.nxv16f64.nxv16p0(<vscale x 16 x ptr> %ptrs, <vscale x 16 x i1> %m, i32 %evl)2407  ret <vscale x 16 x double> %v2408}2409 2410define <vscale x 16 x double> @vpgather_baseidx_nxv16i16_nxv16f64(ptr %base, <vscale x 16 x i16> %idxs, <vscale x 16 x i1> %m, i32 zeroext %evl) {2411; RV32-LABEL: vpgather_baseidx_nxv16i16_nxv16f64:2412; RV32:       # %bb.0:2413; RV32-NEXT:    li a3, 82414; RV32-NEXT:    csrr a2, vlenb2415; RV32-NEXT:    vsetvli a4, zero, e16, m4, ta, ma2416; RV32-NEXT:    vwmulsu.vx v24, v8, a32417; RV32-NEXT:    mv a3, a12418; RV32-NEXT:    bltu a1, a2, .LBB112_22419; RV32-NEXT:  # %bb.1:2420; RV32-NEXT:    mv a3, a22421; RV32-NEXT:  .LBB112_2:2422; RV32-NEXT:    vsetvli zero, a3, e64, m8, ta, ma2423; RV32-NEXT:    vluxei32.v v8, (a0), v24, v0.t2424; RV32-NEXT:    sub a3, a1, a22425; RV32-NEXT:    srli a2, a2, 32426; RV32-NEXT:    sltu a1, a1, a32427; RV32-NEXT:    addi a1, a1, -12428; RV32-NEXT:    vsetvli a4, zero, e8, mf4, ta, ma2429; RV32-NEXT:    vslidedown.vx v0, v0, a22430; RV32-NEXT:    and a1, a1, a32431; RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2432; RV32-NEXT:    vluxei32.v v16, (a0), v28, v0.t2433; RV32-NEXT:    ret2434;2435; RV64-LABEL: vpgather_baseidx_nxv16i16_nxv16f64:2436; RV64:       # %bb.0:2437; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, ma2438; RV64-NEXT:    vmv1r.v v12, v02439; RV64-NEXT:    vsext.vf4 v16, v102440; RV64-NEXT:    csrr a2, vlenb2441; RV64-NEXT:    vsll.vi v16, v16, 32442; RV64-NEXT:    sub a3, a1, a22443; RV64-NEXT:    srli a4, a2, 32444; RV64-NEXT:    vsetvli a5, zero, e8, mf4, ta, ma2445; RV64-NEXT:    vslidedown.vx v0, v0, a42446; RV64-NEXT:    sltu a4, a1, a32447; RV64-NEXT:    addi a4, a4, -12448; RV64-NEXT:    and a3, a4, a32449; RV64-NEXT:    vsetvli zero, a3, e64, m8, ta, ma2450; RV64-NEXT:    vluxei64.v v16, (a0), v16, v0.t2451; RV64-NEXT:    vsetvli a3, zero, e64, m8, ta, ma2452; RV64-NEXT:    vsext.vf4 v24, v82453; RV64-NEXT:    vsll.vi v24, v24, 32454; RV64-NEXT:    bltu a1, a2, .LBB112_22455; RV64-NEXT:  # %bb.1:2456; RV64-NEXT:    mv a1, a22457; RV64-NEXT:  .LBB112_2:2458; RV64-NEXT:    vmv1r.v v0, v122459; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2460; RV64-NEXT:    vluxei64.v v8, (a0), v24, v0.t2461; RV64-NEXT:    ret2462  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 16 x i16> %idxs2463  %v = call <vscale x 16 x double> @llvm.vp.gather.nxv16f64.nxv16p0(<vscale x 16 x ptr> %ptrs, <vscale x 16 x i1> %m, i32 %evl)2464  ret <vscale x 16 x double> %v2465}2466 2467define <vscale x 16 x double> @vpgather_baseidx_sext_nxv16i16_nxv16f64(ptr %base, <vscale x 16 x i16> %idxs, <vscale x 16 x i1> %m, i32 zeroext %evl) {2468; RV32-LABEL: vpgather_baseidx_sext_nxv16i16_nxv16f64:2469; RV32:       # %bb.0:2470; RV32-NEXT:    li a3, 82471; RV32-NEXT:    csrr a2, vlenb2472; RV32-NEXT:    vsetvli a4, zero, e16, m4, ta, ma2473; RV32-NEXT:    vwmulsu.vx v24, v8, a32474; RV32-NEXT:    mv a3, a12475; RV32-NEXT:    bltu a1, a2, .LBB113_22476; RV32-NEXT:  # %bb.1:2477; RV32-NEXT:    mv a3, a22478; RV32-NEXT:  .LBB113_2:2479; RV32-NEXT:    vsetvli zero, a3, e64, m8, ta, ma2480; RV32-NEXT:    vluxei32.v v8, (a0), v24, v0.t2481; RV32-NEXT:    sub a3, a1, a22482; RV32-NEXT:    srli a2, a2, 32483; RV32-NEXT:    sltu a1, a1, a32484; RV32-NEXT:    addi a1, a1, -12485; RV32-NEXT:    vsetvli a4, zero, e8, mf4, ta, ma2486; RV32-NEXT:    vslidedown.vx v0, v0, a22487; RV32-NEXT:    and a1, a1, a32488; RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2489; RV32-NEXT:    vluxei32.v v16, (a0), v28, v0.t2490; RV32-NEXT:    ret2491;2492; RV64-LABEL: vpgather_baseidx_sext_nxv16i16_nxv16f64:2493; RV64:       # %bb.0:2494; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, ma2495; RV64-NEXT:    vmv1r.v v12, v02496; RV64-NEXT:    vsext.vf4 v16, v102497; RV64-NEXT:    csrr a2, vlenb2498; RV64-NEXT:    vsll.vi v16, v16, 32499; RV64-NEXT:    sub a3, a1, a22500; RV64-NEXT:    srli a4, a2, 32501; RV64-NEXT:    vsetvli a5, zero, e8, mf4, ta, ma2502; RV64-NEXT:    vslidedown.vx v0, v0, a42503; RV64-NEXT:    sltu a4, a1, a32504; RV64-NEXT:    addi a4, a4, -12505; RV64-NEXT:    and a3, a4, a32506; RV64-NEXT:    vsetvli zero, a3, e64, m8, ta, ma2507; RV64-NEXT:    vluxei64.v v16, (a0), v16, v0.t2508; RV64-NEXT:    vsetvli a3, zero, e64, m8, ta, ma2509; RV64-NEXT:    vsext.vf4 v24, v82510; RV64-NEXT:    vsll.vi v24, v24, 32511; RV64-NEXT:    bltu a1, a2, .LBB113_22512; RV64-NEXT:  # %bb.1:2513; RV64-NEXT:    mv a1, a22514; RV64-NEXT:  .LBB113_2:2515; RV64-NEXT:    vmv1r.v v0, v122516; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2517; RV64-NEXT:    vluxei64.v v8, (a0), v24, v0.t2518; RV64-NEXT:    ret2519  %eidxs = sext <vscale x 16 x i16> %idxs to <vscale x 16 x i64>2520  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 16 x i64> %eidxs2521  %v = call <vscale x 16 x double> @llvm.vp.gather.nxv16f64.nxv16p0(<vscale x 16 x ptr> %ptrs, <vscale x 16 x i1> %m, i32 %evl)2522  ret <vscale x 16 x double> %v2523}2524 2525define <vscale x 16 x double> @vpgather_baseidx_zext_nxv16i16_nxv16f64(ptr %base, <vscale x 16 x i16> %idxs, <vscale x 16 x i1> %m, i32 zeroext %evl) {2526; RV32-LABEL: vpgather_baseidx_zext_nxv16i16_nxv16f64:2527; RV32:       # %bb.0:2528; RV32-NEXT:    li a3, 82529; RV32-NEXT:    csrr a2, vlenb2530; RV32-NEXT:    vsetvli a4, zero, e16, m4, ta, ma2531; RV32-NEXT:    vwmulu.vx v24, v8, a32532; RV32-NEXT:    mv a3, a12533; RV32-NEXT:    bltu a1, a2, .LBB114_22534; RV32-NEXT:  # %bb.1:2535; RV32-NEXT:    mv a3, a22536; RV32-NEXT:  .LBB114_2:2537; RV32-NEXT:    vsetvli zero, a3, e64, m8, ta, ma2538; RV32-NEXT:    vluxei32.v v8, (a0), v24, v0.t2539; RV32-NEXT:    sub a3, a1, a22540; RV32-NEXT:    srli a2, a2, 32541; RV32-NEXT:    sltu a1, a1, a32542; RV32-NEXT:    addi a1, a1, -12543; RV32-NEXT:    vsetvli a4, zero, e8, mf4, ta, ma2544; RV32-NEXT:    vslidedown.vx v0, v0, a22545; RV32-NEXT:    and a1, a1, a32546; RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2547; RV32-NEXT:    vluxei32.v v16, (a0), v28, v0.t2548; RV32-NEXT:    ret2549;2550; RV64-LABEL: vpgather_baseidx_zext_nxv16i16_nxv16f64:2551; RV64:       # %bb.0:2552; RV64-NEXT:    li a3, 82553; RV64-NEXT:    csrr a2, vlenb2554; RV64-NEXT:    vsetvli a4, zero, e16, m4, ta, ma2555; RV64-NEXT:    vwmulu.vx v24, v8, a32556; RV64-NEXT:    mv a3, a12557; RV64-NEXT:    bltu a1, a2, .LBB114_22558; RV64-NEXT:  # %bb.1:2559; RV64-NEXT:    mv a3, a22560; RV64-NEXT:  .LBB114_2:2561; RV64-NEXT:    vsetvli zero, a3, e64, m8, ta, ma2562; RV64-NEXT:    vluxei32.v v8, (a0), v24, v0.t2563; RV64-NEXT:    sub a3, a1, a22564; RV64-NEXT:    srli a2, a2, 32565; RV64-NEXT:    sltu a1, a1, a32566; RV64-NEXT:    addi a1, a1, -12567; RV64-NEXT:    vsetvli a4, zero, e8, mf4, ta, ma2568; RV64-NEXT:    vslidedown.vx v0, v0, a22569; RV64-NEXT:    and a1, a1, a32570; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2571; RV64-NEXT:    vluxei32.v v16, (a0), v28, v0.t2572; RV64-NEXT:    ret2573  %eidxs = zext <vscale x 16 x i16> %idxs to <vscale x 16 x i64>2574  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 16 x i64> %eidxs2575  %v = call <vscale x 16 x double> @llvm.vp.gather.nxv16f64.nxv16p0(<vscale x 16 x ptr> %ptrs, <vscale x 16 x i1> %m, i32 %evl)2576  ret <vscale x 16 x double> %v2577}2578