brintos / llvm-project-archived public Read only

1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+zvfbfmin,+v,+m \3; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV324; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+zvfbfmin,+v,+m \5; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV646; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfhmin,+zvfbfmin,+v,+m \7; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV328; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfhmin,+zvfbfmin,+v,+m \9; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV6410 11define void @vpscatter_nxv1i8(<vscale x 1 x i8> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {12; RV32-LABEL: vpscatter_nxv1i8:13; RV32:       # %bb.0:14; RV32-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma15; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t16; RV32-NEXT:    ret17;18; RV64-LABEL: vpscatter_nxv1i8:19; RV64:       # %bb.0:20; RV64-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma21; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t22; RV64-NEXT:    ret23  call void @llvm.vp.scatter.nxv1i8.nxv1p0(<vscale x 1 x i8> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)24  ret void25}26 27define void @vpscatter_nxv2i8(<vscale x 2 x i8> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {28; RV32-LABEL: vpscatter_nxv2i8:29; RV32:       # %bb.0:30; RV32-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma31; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t32; RV32-NEXT:    ret33;34; RV64-LABEL: vpscatter_nxv2i8:35; RV64:       # %bb.0:36; RV64-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma37; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t38; RV64-NEXT:    ret39  call void @llvm.vp.scatter.nxv2i8.nxv2p0(<vscale x 2 x i8> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)40  ret void41}42 43define void @vpscatter_nxv2i16_truncstore_nxv2i8(<vscale x 2 x i16> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {44; RV32-LABEL: vpscatter_nxv2i16_truncstore_nxv2i8:45; RV32:       # %bb.0:46; RV32-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma47; RV32-NEXT:    vnsrl.wi v8, v8, 048; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t49; RV32-NEXT:    ret50;51; RV64-LABEL: vpscatter_nxv2i16_truncstore_nxv2i8:52; RV64:       # %bb.0:53; RV64-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma54; RV64-NEXT:    vnsrl.wi v8, v8, 055; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t56; RV64-NEXT:    ret57  %tval = trunc <vscale x 2 x i16> %val to <vscale x 2 x i8>58  call void @llvm.vp.scatter.nxv2i8.nxv2p0(<vscale x 2 x i8> %tval, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)59  ret void60}61 62define void @vpscatter_nxv2i32_truncstore_nxv2i8(<vscale x 2 x i32> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {63; RV32-LABEL: vpscatter_nxv2i32_truncstore_nxv2i8:64; RV32:       # %bb.0:65; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma66; RV32-NEXT:    vnsrl.wi v8, v8, 067; RV32-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma68; RV32-NEXT:    vnsrl.wi v8, v8, 069; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t70; RV32-NEXT:    ret71;72; RV64-LABEL: vpscatter_nxv2i32_truncstore_nxv2i8:73; RV64:       # %bb.0:74; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma75; RV64-NEXT:    vnsrl.wi v8, v8, 076; RV64-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma77; RV64-NEXT:    vnsrl.wi v8, v8, 078; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t79; RV64-NEXT:    ret80  %tval = trunc <vscale x 2 x i32> %val to <vscale x 2 x i8>81  call void @llvm.vp.scatter.nxv2i8.nxv2p0(<vscale x 2 x i8> %tval, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)82  ret void83}84 85define void @vpscatter_nxv2i64_truncstore_nxv2i8(<vscale x 2 x i64> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {86; RV32-LABEL: vpscatter_nxv2i64_truncstore_nxv2i8:87; RV32:       # %bb.0:88; RV32-NEXT:    vsetvli zero, a0, e32, m1, ta, ma89; RV32-NEXT:    vnsrl.wi v11, v8, 090; RV32-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma91; RV32-NEXT:    vnsrl.wi v8, v11, 092; RV32-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma93; RV32-NEXT:    vnsrl.wi v8, v8, 094; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t95; RV32-NEXT:    ret96;97; RV64-LABEL: vpscatter_nxv2i64_truncstore_nxv2i8:98; RV64:       # %bb.0:99; RV64-NEXT:    vsetvli zero, a0, e32, m1, ta, ma100; RV64-NEXT:    vnsrl.wi v12, v8, 0101; RV64-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma102; RV64-NEXT:    vnsrl.wi v8, v12, 0103; RV64-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma104; RV64-NEXT:    vnsrl.wi v8, v8, 0105; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t106; RV64-NEXT:    ret107  %tval = trunc <vscale x 2 x i64> %val to <vscale x 2 x i8>108  call void @llvm.vp.scatter.nxv2i8.nxv2p0(<vscale x 2 x i8> %tval, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)109  ret void110}111 112define void @vpscatter_nxv4i8(<vscale x 4 x i8> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {113; RV32-LABEL: vpscatter_nxv4i8:114; RV32:       # %bb.0:115; RV32-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma116; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t117; RV32-NEXT:    ret118;119; RV64-LABEL: vpscatter_nxv4i8:120; RV64:       # %bb.0:121; RV64-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma122; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t123; RV64-NEXT:    ret124  call void @llvm.vp.scatter.nxv4i8.nxv4p0(<vscale x 4 x i8> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)125  ret void126}127 128define void @vpscatter_truemask_nxv4i8(<vscale x 4 x i8> %val, <vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {129; RV32-LABEL: vpscatter_truemask_nxv4i8:130; RV32:       # %bb.0:131; RV32-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma132; RV32-NEXT:    vsoxei32.v v8, (zero), v10133; RV32-NEXT:    ret134;135; RV64-LABEL: vpscatter_truemask_nxv4i8:136; RV64:       # %bb.0:137; RV64-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma138; RV64-NEXT:    vsoxei64.v v8, (zero), v12139; RV64-NEXT:    ret140  call void @llvm.vp.scatter.nxv4i8.nxv4p0(<vscale x 4 x i8> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)141  ret void142}143 144define void @vpscatter_nxv8i8(<vscale x 8 x i8> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {145; RV32-LABEL: vpscatter_nxv8i8:146; RV32:       # %bb.0:147; RV32-NEXT:    vsetvli zero, a0, e8, m1, ta, ma148; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t149; RV32-NEXT:    ret150;151; RV64-LABEL: vpscatter_nxv8i8:152; RV64:       # %bb.0:153; RV64-NEXT:    vsetvli zero, a0, e8, m1, ta, ma154; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t155; RV64-NEXT:    ret156  call void @llvm.vp.scatter.nxv8i8.nxv8p0(<vscale x 8 x i8> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)157  ret void158}159 160define void @vpscatter_baseidx_nxv8i8(<vscale x 8 x i8> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {161; RV32-LABEL: vpscatter_baseidx_nxv8i8:162; RV32:       # %bb.0:163; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma164; RV32-NEXT:    vsext.vf4 v12, v9165; RV32-NEXT:    vsetvli zero, zero, e8, m1, ta, ma166; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t167; RV32-NEXT:    ret168;169; RV64-LABEL: vpscatter_baseidx_nxv8i8:170; RV64:       # %bb.0:171; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma172; RV64-NEXT:    vsext.vf8 v16, v9173; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, ma174; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t175; RV64-NEXT:    ret176  %ptrs = getelementptr inbounds i8, ptr %base, <vscale x 8 x i8> %idxs177  call void @llvm.vp.scatter.nxv8i8.nxv8p0(<vscale x 8 x i8> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)178  ret void179}180 181define void @vpscatter_nxv1i16(<vscale x 1 x i16> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {182; RV32-LABEL: vpscatter_nxv1i16:183; RV32:       # %bb.0:184; RV32-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma185; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t186; RV32-NEXT:    ret187;188; RV64-LABEL: vpscatter_nxv1i16:189; RV64:       # %bb.0:190; RV64-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma191; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t192; RV64-NEXT:    ret193  call void @llvm.vp.scatter.nxv1i16.nxv1p0(<vscale x 1 x i16> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)194  ret void195}196 197define void @vpscatter_nxv2i16(<vscale x 2 x i16> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {198; RV32-LABEL: vpscatter_nxv2i16:199; RV32:       # %bb.0:200; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma201; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t202; RV32-NEXT:    ret203;204; RV64-LABEL: vpscatter_nxv2i16:205; RV64:       # %bb.0:206; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma207; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t208; RV64-NEXT:    ret209  call void @llvm.vp.scatter.nxv2i16.nxv2p0(<vscale x 2 x i16> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)210  ret void211}212 213define void @vpscatter_nxv2i32_truncstore_nxv2i16(<vscale x 2 x i32> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {214; RV32-LABEL: vpscatter_nxv2i32_truncstore_nxv2i16:215; RV32:       # %bb.0:216; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma217; RV32-NEXT:    vnsrl.wi v8, v8, 0218; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t219; RV32-NEXT:    ret220;221; RV64-LABEL: vpscatter_nxv2i32_truncstore_nxv2i16:222; RV64:       # %bb.0:223; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma224; RV64-NEXT:    vnsrl.wi v8, v8, 0225; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t226; RV64-NEXT:    ret227  %tval = trunc <vscale x 2 x i32> %val to <vscale x 2 x i16>228  call void @llvm.vp.scatter.nxv2i16.nxv2p0(<vscale x 2 x i16> %tval, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)229  ret void230}231 232define void @vpscatter_nxv2i64_truncstore_nxv2i16(<vscale x 2 x i64> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {233; RV32-LABEL: vpscatter_nxv2i64_truncstore_nxv2i16:234; RV32:       # %bb.0:235; RV32-NEXT:    vsetvli zero, a0, e32, m1, ta, ma236; RV32-NEXT:    vnsrl.wi v11, v8, 0237; RV32-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma238; RV32-NEXT:    vnsrl.wi v8, v11, 0239; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t240; RV32-NEXT:    ret241;242; RV64-LABEL: vpscatter_nxv2i64_truncstore_nxv2i16:243; RV64:       # %bb.0:244; RV64-NEXT:    vsetvli zero, a0, e32, m1, ta, ma245; RV64-NEXT:    vnsrl.wi v12, v8, 0246; RV64-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma247; RV64-NEXT:    vnsrl.wi v8, v12, 0248; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t249; RV64-NEXT:    ret250  %tval = trunc <vscale x 2 x i64> %val to <vscale x 2 x i16>251  call void @llvm.vp.scatter.nxv2i16.nxv2p0(<vscale x 2 x i16> %tval, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)252  ret void253}254 255define void @vpscatter_nxv4i16(<vscale x 4 x i16> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {256; RV32-LABEL: vpscatter_nxv4i16:257; RV32:       # %bb.0:258; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, ma259; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t260; RV32-NEXT:    ret261;262; RV64-LABEL: vpscatter_nxv4i16:263; RV64:       # %bb.0:264; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, ma265; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t266; RV64-NEXT:    ret267  call void @llvm.vp.scatter.nxv4i16.nxv4p0(<vscale x 4 x i16> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)268  ret void269}270 271define void @vpscatter_truemask_nxv4i16(<vscale x 4 x i16> %val, <vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {272; RV32-LABEL: vpscatter_truemask_nxv4i16:273; RV32:       # %bb.0:274; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, ma275; RV32-NEXT:    vsoxei32.v v8, (zero), v10276; RV32-NEXT:    ret277;278; RV64-LABEL: vpscatter_truemask_nxv4i16:279; RV64:       # %bb.0:280; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, ma281; RV64-NEXT:    vsoxei64.v v8, (zero), v12282; RV64-NEXT:    ret283  call void @llvm.vp.scatter.nxv4i16.nxv4p0(<vscale x 4 x i16> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)284  ret void285}286 287define void @vpscatter_nxv8i16(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {288; RV32-LABEL: vpscatter_nxv8i16:289; RV32:       # %bb.0:290; RV32-NEXT:    vsetvli zero, a0, e16, m2, ta, ma291; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t292; RV32-NEXT:    ret293;294; RV64-LABEL: vpscatter_nxv8i16:295; RV64:       # %bb.0:296; RV64-NEXT:    vsetvli zero, a0, e16, m2, ta, ma297; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t298; RV64-NEXT:    ret299  call void @llvm.vp.scatter.nxv8i16.nxv8p0(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)300  ret void301}302 303define void @vpscatter_baseidx_nxv8i8_nxv8i16(<vscale x 8 x i16> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {304; RV32-LABEL: vpscatter_baseidx_nxv8i8_nxv8i16:305; RV32:       # %bb.0:306; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma307; RV32-NEXT:    vsext.vf4 v12, v10308; RV32-NEXT:    vadd.vv v12, v12, v12309; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma310; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t311; RV32-NEXT:    ret312;313; RV64-LABEL: vpscatter_baseidx_nxv8i8_nxv8i16:314; RV64:       # %bb.0:315; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma316; RV64-NEXT:    vsext.vf8 v16, v10317; RV64-NEXT:    vadd.vv v16, v16, v16318; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma319; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t320; RV64-NEXT:    ret321  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i8> %idxs322  call void @llvm.vp.scatter.nxv8i16.nxv8p0(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)323  ret void324}325 326define void @vpscatter_baseidx_sext_nxv8i8_nxv8i16(<vscale x 8 x i16> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {327; RV32-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8i16:328; RV32:       # %bb.0:329; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma330; RV32-NEXT:    vsext.vf4 v12, v10331; RV32-NEXT:    vadd.vv v12, v12, v12332; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma333; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t334; RV32-NEXT:    ret335;336; RV64-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8i16:337; RV64:       # %bb.0:338; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma339; RV64-NEXT:    vsext.vf8 v16, v10340; RV64-NEXT:    vadd.vv v16, v16, v16341; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma342; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t343; RV64-NEXT:    ret344  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>345  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i16> %eidxs346  call void @llvm.vp.scatter.nxv8i16.nxv8p0(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)347  ret void348}349 350define void @vpscatter_baseidx_zext_nxv8i8_nxv8i16(<vscale x 8 x i16> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {351; RV32-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8i16:352; RV32:       # %bb.0:353; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma354; RV32-NEXT:    vwaddu.vv v12, v10, v10355; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma356; RV32-NEXT:    vsoxei16.v v8, (a0), v12, v0.t357; RV32-NEXT:    ret358;359; RV64-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8i16:360; RV64:       # %bb.0:361; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma362; RV64-NEXT:    vwaddu.vv v12, v10, v10363; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma364; RV64-NEXT:    vsoxei16.v v8, (a0), v12, v0.t365; RV64-NEXT:    ret366  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>367  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i16> %eidxs368  call void @llvm.vp.scatter.nxv8i16.nxv8p0(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)369  ret void370}371 372define void @vpscatter_baseidx_nxv8i16(<vscale x 8 x i16> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {373; RV32-LABEL: vpscatter_baseidx_nxv8i16:374; RV32:       # %bb.0:375; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma376; RV32-NEXT:    vwadd.vv v12, v10, v10377; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t378; RV32-NEXT:    ret379;380; RV64-LABEL: vpscatter_baseidx_nxv8i16:381; RV64:       # %bb.0:382; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma383; RV64-NEXT:    vsext.vf4 v16, v10384; RV64-NEXT:    vadd.vv v16, v16, v16385; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma386; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t387; RV64-NEXT:    ret388  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i16> %idxs389  call void @llvm.vp.scatter.nxv8i16.nxv8p0(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)390  ret void391}392 393define void @vpscatter_baseidx_vpsext_nxv8i16_nxv8i16(<vscale x 8 x i16> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {394; RV32-LABEL: vpscatter_baseidx_vpsext_nxv8i16_nxv8i16:395; RV32:       # %bb.0:396; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma397; RV32-NEXT:    vwadd.vv v12, v10, v10, v0.t398; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t399; RV32-NEXT:    ret400;401; RV64-LABEL: vpscatter_baseidx_vpsext_nxv8i16_nxv8i16:402; RV64:       # %bb.0:403; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma404; RV64-NEXT:    vsext.vf2 v12, v10, v0.t405; RV64-NEXT:    vwadd.vv v16, v12, v12406; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma407; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t408; RV64-NEXT:    ret409  %eidxs = call <vscale x 8 x i32> @llvm.vp.sext.nxv8i16.nxv8i32(<vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 %evl)410  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i32> %eidxs411  call void @llvm.vp.scatter.nxv8i16.nxv8p0(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)412  ret void413}414 415define void @vpscatter_baseidx_vpzext_nxv8i16_nxv8i16(<vscale x 8 x i16> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {416; RV32-LABEL: vpscatter_baseidx_vpzext_nxv8i16_nxv8i16:417; RV32:       # %bb.0:418; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma419; RV32-NEXT:    vwaddu.vv v12, v10, v10, v0.t420; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t421; RV32-NEXT:    ret422;423; RV64-LABEL: vpscatter_baseidx_vpzext_nxv8i16_nxv8i16:424; RV64:       # %bb.0:425; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma426; RV64-NEXT:    vzext.vf2 v12, v10, v0.t427; RV64-NEXT:    vwadd.vv v16, v12, v12428; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma429; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t430; RV64-NEXT:    ret431  %eidxs = call <vscale x 8 x i32> @llvm.vp.zext.nxv8i16.nxv8i32(<vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 %evl)432  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i32> %eidxs433  call void @llvm.vp.scatter.nxv8i16.nxv8p0(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)434  ret void435}436 437define void @vpscatter_baseidx_vpsext_nxv8i32_nxv8i16(<vscale x 8 x i16> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {438; RV32-LABEL: vpscatter_baseidx_vpsext_nxv8i32_nxv8i16:439; RV32:       # %bb.0:440; RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, ma441; RV32-NEXT:    vsext.vf2 v16, v12, v0.t442; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma443; RV32-NEXT:    vnsrl.wi v12, v16, 0444; RV32-NEXT:    vadd.vv v12, v12, v12445; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma446; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t447; RV32-NEXT:    ret448;449; RV64-LABEL: vpscatter_baseidx_vpsext_nxv8i32_nxv8i16:450; RV64:       # %bb.0:451; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma452; RV64-NEXT:    vwadd.vv v16, v12, v12, v0.t453; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma454; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t455; RV64-NEXT:    ret456  %eidxs = call <vscale x 8 x i64> @llvm.vp.sext.nxv8i32.nxv8i64(<vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 %evl)457  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i64> %eidxs458  call void @llvm.vp.scatter.nxv8i16.nxv8p0(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)459  ret void460}461 462define void @vpscatter_baseidx_vpzext_nxv8i32_nxv8i16(<vscale x 8 x i16> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {463; RV32-LABEL: vpscatter_baseidx_vpzext_nxv8i32_nxv8i16:464; RV32:       # %bb.0:465; RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, ma466; RV32-NEXT:    vzext.vf2 v16, v12, v0.t467; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma468; RV32-NEXT:    vnsrl.wi v12, v16, 0469; RV32-NEXT:    vadd.vv v12, v12, v12470; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma471; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t472; RV32-NEXT:    ret473;474; RV64-LABEL: vpscatter_baseidx_vpzext_nxv8i32_nxv8i16:475; RV64:       # %bb.0:476; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma477; RV64-NEXT:    vwaddu.vv v16, v12, v12, v0.t478; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma479; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t480; RV64-NEXT:    ret481  %eidxs = call <vscale x 8 x i64> @llvm.vp.zext.nxv8i32.nxv8i64(<vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 %evl)482  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i64> %eidxs483  call void @llvm.vp.scatter.nxv8i16.nxv8p0(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)484  ret void485}486 487define void @vpscatter_nxv1i32(<vscale x 1 x i32> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {488; RV32-LABEL: vpscatter_nxv1i32:489; RV32:       # %bb.0:490; RV32-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma491; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t492; RV32-NEXT:    ret493;494; RV64-LABEL: vpscatter_nxv1i32:495; RV64:       # %bb.0:496; RV64-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma497; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t498; RV64-NEXT:    ret499  call void @llvm.vp.scatter.nxv1i32.nxv1p0(<vscale x 1 x i32> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)500  ret void501}502 503define void @vpscatter_nxv2i32(<vscale x 2 x i32> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {504; RV32-LABEL: vpscatter_nxv2i32:505; RV32:       # %bb.0:506; RV32-NEXT:    vsetvli zero, a0, e32, m1, ta, ma507; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t508; RV32-NEXT:    ret509;510; RV64-LABEL: vpscatter_nxv2i32:511; RV64:       # %bb.0:512; RV64-NEXT:    vsetvli zero, a0, e32, m1, ta, ma513; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t514; RV64-NEXT:    ret515  call void @llvm.vp.scatter.nxv2i32.nxv2p0(<vscale x 2 x i32> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)516  ret void517}518 519define void @vpscatter_nxv2i64_truncstore_nxv2i32(<vscale x 2 x i64> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {520; RV32-LABEL: vpscatter_nxv2i64_truncstore_nxv2i32:521; RV32:       # %bb.0:522; RV32-NEXT:    vsetvli zero, a0, e32, m1, ta, ma523; RV32-NEXT:    vnsrl.wi v11, v8, 0524; RV32-NEXT:    vsoxei32.v v11, (zero), v10, v0.t525; RV32-NEXT:    ret526;527; RV64-LABEL: vpscatter_nxv2i64_truncstore_nxv2i32:528; RV64:       # %bb.0:529; RV64-NEXT:    vsetvli zero, a0, e32, m1, ta, ma530; RV64-NEXT:    vnsrl.wi v12, v8, 0531; RV64-NEXT:    vsoxei64.v v12, (zero), v10, v0.t532; RV64-NEXT:    ret533  %tval = trunc <vscale x 2 x i64> %val to <vscale x 2 x i32>534  call void @llvm.vp.scatter.nxv2i32.nxv2p0(<vscale x 2 x i32> %tval, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)535  ret void536}537 538define void @vpscatter_nxv4i32(<vscale x 4 x i32> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {539; RV32-LABEL: vpscatter_nxv4i32:540; RV32:       # %bb.0:541; RV32-NEXT:    vsetvli zero, a0, e32, m2, ta, ma542; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t543; RV32-NEXT:    ret544;545; RV64-LABEL: vpscatter_nxv4i32:546; RV64:       # %bb.0:547; RV64-NEXT:    vsetvli zero, a0, e32, m2, ta, ma548; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t549; RV64-NEXT:    ret550  call void @llvm.vp.scatter.nxv4i32.nxv4p0(<vscale x 4 x i32> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)551  ret void552}553 554define void @vpscatter_truemask_nxv4i32(<vscale x 4 x i32> %val, <vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {555; RV32-LABEL: vpscatter_truemask_nxv4i32:556; RV32:       # %bb.0:557; RV32-NEXT:    vsetvli zero, a0, e32, m2, ta, ma558; RV32-NEXT:    vsoxei32.v v8, (zero), v10559; RV32-NEXT:    ret560;561; RV64-LABEL: vpscatter_truemask_nxv4i32:562; RV64:       # %bb.0:563; RV64-NEXT:    vsetvli zero, a0, e32, m2, ta, ma564; RV64-NEXT:    vsoxei64.v v8, (zero), v12565; RV64-NEXT:    ret566  call void @llvm.vp.scatter.nxv4i32.nxv4p0(<vscale x 4 x i32> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)567  ret void568}569 570define void @vpscatter_nxv8i32(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {571; RV32-LABEL: vpscatter_nxv8i32:572; RV32:       # %bb.0:573; RV32-NEXT:    vsetvli zero, a0, e32, m4, ta, ma574; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t575; RV32-NEXT:    ret576;577; RV64-LABEL: vpscatter_nxv8i32:578; RV64:       # %bb.0:579; RV64-NEXT:    vsetvli zero, a0, e32, m4, ta, ma580; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t581; RV64-NEXT:    ret582  call void @llvm.vp.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)583  ret void584}585 586define void @vpscatter_baseidx_nxv8i8_nxv8i32(<vscale x 8 x i32> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {587; RV32-LABEL: vpscatter_baseidx_nxv8i8_nxv8i32:588; RV32:       # %bb.0:589; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma590; RV32-NEXT:    vsext.vf4 v16, v12591; RV32-NEXT:    vsll.vi v12, v16, 2592; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t593; RV32-NEXT:    ret594;595; RV64-LABEL: vpscatter_baseidx_nxv8i8_nxv8i32:596; RV64:       # %bb.0:597; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma598; RV64-NEXT:    vsext.vf8 v16, v12599; RV64-NEXT:    vsll.vi v16, v16, 2600; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma601; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t602; RV64-NEXT:    ret603  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i8> %idxs604  call void @llvm.vp.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)605  ret void606}607 608define void @vpscatter_baseidx_sext_nxv8i8_nxv8i32(<vscale x 8 x i32> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {609; RV32-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8i32:610; RV32:       # %bb.0:611; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma612; RV32-NEXT:    vsext.vf4 v16, v12613; RV32-NEXT:    vsll.vi v12, v16, 2614; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t615; RV32-NEXT:    ret616;617; RV64-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8i32:618; RV64:       # %bb.0:619; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma620; RV64-NEXT:    vsext.vf8 v16, v12621; RV64-NEXT:    vsll.vi v16, v16, 2622; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma623; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t624; RV64-NEXT:    ret625  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>626  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs627  call void @llvm.vp.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)628  ret void629}630 631define void @vpscatter_baseidx_zext_nxv8i8_nxv8i32(<vscale x 8 x i32> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {632; RV32-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8i32:633; RV32:       # %bb.0:634; RV32-NEXT:    li a2, 4635; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma636; RV32-NEXT:    vwmulu.vx v14, v12, a2637; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma638; RV32-NEXT:    vsoxei16.v v8, (a0), v14, v0.t639; RV32-NEXT:    ret640;641; RV64-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8i32:642; RV64:       # %bb.0:643; RV64-NEXT:    li a2, 4644; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma645; RV64-NEXT:    vwmulu.vx v14, v12, a2646; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma647; RV64-NEXT:    vsoxei16.v v8, (a0), v14, v0.t648; RV64-NEXT:    ret649  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>650  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs651  call void @llvm.vp.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)652  ret void653}654 655define void @vpscatter_baseidx_nxv8i16_nxv8i32(<vscale x 8 x i32> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {656; RV32-LABEL: vpscatter_baseidx_nxv8i16_nxv8i32:657; RV32:       # %bb.0:658; RV32-NEXT:    li a2, 4659; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma660; RV32-NEXT:    vwmulsu.vx v16, v12, a2661; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma662; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t663; RV32-NEXT:    ret664;665; RV64-LABEL: vpscatter_baseidx_nxv8i16_nxv8i32:666; RV64:       # %bb.0:667; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma668; RV64-NEXT:    vsext.vf4 v16, v12669; RV64-NEXT:    vsll.vi v16, v16, 2670; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma671; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t672; RV64-NEXT:    ret673  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i16> %idxs674  call void @llvm.vp.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)675  ret void676}677 678define void @vpscatter_baseidx_sext_nxv8i16_nxv8i32(<vscale x 8 x i32> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {679; RV32-LABEL: vpscatter_baseidx_sext_nxv8i16_nxv8i32:680; RV32:       # %bb.0:681; RV32-NEXT:    li a2, 4682; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma683; RV32-NEXT:    vwmulsu.vx v16, v12, a2684; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma685; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t686; RV32-NEXT:    ret687;688; RV64-LABEL: vpscatter_baseidx_sext_nxv8i16_nxv8i32:689; RV64:       # %bb.0:690; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma691; RV64-NEXT:    vsext.vf4 v16, v12692; RV64-NEXT:    vsll.vi v16, v16, 2693; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma694; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t695; RV64-NEXT:    ret696  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>697  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs698  call void @llvm.vp.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)699  ret void700}701 702define void @vpscatter_baseidx_zext_nxv8i16_nxv8i32(<vscale x 8 x i32> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {703; RV32-LABEL: vpscatter_baseidx_zext_nxv8i16_nxv8i32:704; RV32:       # %bb.0:705; RV32-NEXT:    li a2, 4706; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma707; RV32-NEXT:    vwmulu.vx v16, v12, a2708; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma709; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t710; RV32-NEXT:    ret711;712; RV64-LABEL: vpscatter_baseidx_zext_nxv8i16_nxv8i32:713; RV64:       # %bb.0:714; RV64-NEXT:    li a2, 4715; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, ma716; RV64-NEXT:    vwmulu.vx v16, v12, a2717; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma718; RV64-NEXT:    vsoxei32.v v8, (a0), v16, v0.t719; RV64-NEXT:    ret720  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>721  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs722  call void @llvm.vp.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)723  ret void724}725 726define void @vpscatter_baseidx_nxv8i32(<vscale x 8 x i32> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {727; RV32-LABEL: vpscatter_baseidx_nxv8i32:728; RV32:       # %bb.0:729; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma730; RV32-NEXT:    vsll.vi v12, v12, 2731; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t732; RV32-NEXT:    ret733;734; RV64-LABEL: vpscatter_baseidx_nxv8i32:735; RV64:       # %bb.0:736; RV64-NEXT:    li a2, 4737; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma738; RV64-NEXT:    vwmulsu.vx v16, v12, a2739; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t740; RV64-NEXT:    ret741  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %idxs742  call void @llvm.vp.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)743  ret void744}745 746define void @vpscatter_nxv1i64(<vscale x 1 x i64> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {747; RV32-LABEL: vpscatter_nxv1i64:748; RV32:       # %bb.0:749; RV32-NEXT:    vsetvli zero, a0, e64, m1, ta, ma750; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t751; RV32-NEXT:    ret752;753; RV64-LABEL: vpscatter_nxv1i64:754; RV64:       # %bb.0:755; RV64-NEXT:    vsetvli zero, a0, e64, m1, ta, ma756; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t757; RV64-NEXT:    ret758  call void @llvm.vp.scatter.nxv1i64.nxv1p0(<vscale x 1 x i64> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)759  ret void760}761 762define void @vpscatter_nxv2i64(<vscale x 2 x i64> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {763; RV32-LABEL: vpscatter_nxv2i64:764; RV32:       # %bb.0:765; RV32-NEXT:    vsetvli zero, a0, e64, m2, ta, ma766; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t767; RV32-NEXT:    ret768;769; RV64-LABEL: vpscatter_nxv2i64:770; RV64:       # %bb.0:771; RV64-NEXT:    vsetvli zero, a0, e64, m2, ta, ma772; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t773; RV64-NEXT:    ret774  call void @llvm.vp.scatter.nxv2i64.nxv2p0(<vscale x 2 x i64> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)775  ret void776}777 778define void @vpscatter_nxv4i64(<vscale x 4 x i64> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {779; RV32-LABEL: vpscatter_nxv4i64:780; RV32:       # %bb.0:781; RV32-NEXT:    vsetvli zero, a0, e64, m4, ta, ma782; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t783; RV32-NEXT:    ret784;785; RV64-LABEL: vpscatter_nxv4i64:786; RV64:       # %bb.0:787; RV64-NEXT:    vsetvli zero, a0, e64, m4, ta, ma788; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t789; RV64-NEXT:    ret790  call void @llvm.vp.scatter.nxv4i64.nxv4p0(<vscale x 4 x i64> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)791  ret void792}793 794define void @vpscatter_truemask_nxv4i64(<vscale x 4 x i64> %val, <vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {795; RV32-LABEL: vpscatter_truemask_nxv4i64:796; RV32:       # %bb.0:797; RV32-NEXT:    vsetvli zero, a0, e64, m4, ta, ma798; RV32-NEXT:    vsoxei32.v v8, (zero), v12799; RV32-NEXT:    ret800;801; RV64-LABEL: vpscatter_truemask_nxv4i64:802; RV64:       # %bb.0:803; RV64-NEXT:    vsetvli zero, a0, e64, m4, ta, ma804; RV64-NEXT:    vsoxei64.v v8, (zero), v12805; RV64-NEXT:    ret806  call void @llvm.vp.scatter.nxv4i64.nxv4p0(<vscale x 4 x i64> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)807  ret void808}809 810define void @vpscatter_nxv8i64(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {811; RV32-LABEL: vpscatter_nxv8i64:812; RV32:       # %bb.0:813; RV32-NEXT:    vsetvli zero, a0, e64, m8, ta, ma814; RV32-NEXT:    vsoxei32.v v8, (zero), v16, v0.t815; RV32-NEXT:    ret816;817; RV64-LABEL: vpscatter_nxv8i64:818; RV64:       # %bb.0:819; RV64-NEXT:    vsetvli zero, a0, e64, m8, ta, ma820; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t821; RV64-NEXT:    ret822  call void @llvm.vp.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)823  ret void824}825 826define void @vpscatter_baseidx_nxv8i8_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {827; RV32-LABEL: vpscatter_baseidx_nxv8i8_nxv8i64:828; RV32:       # %bb.0:829; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma830; RV32-NEXT:    vsext.vf4 v20, v16831; RV32-NEXT:    vsll.vi v16, v20, 3832; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma833; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t834; RV32-NEXT:    ret835;836; RV64-LABEL: vpscatter_baseidx_nxv8i8_nxv8i64:837; RV64:       # %bb.0:838; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma839; RV64-NEXT:    vsext.vf8 v24, v16840; RV64-NEXT:    vsll.vi v16, v24, 3841; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t842; RV64-NEXT:    ret843  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i8> %idxs844  call void @llvm.vp.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)845  ret void846}847 848define void @vpscatter_baseidx_sext_nxv8i8_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {849; RV32-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8i64:850; RV32:       # %bb.0:851; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma852; RV32-NEXT:    vsext.vf4 v20, v16853; RV32-NEXT:    vsll.vi v16, v20, 3854; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma855; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t856; RV32-NEXT:    ret857;858; RV64-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8i64:859; RV64:       # %bb.0:860; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma861; RV64-NEXT:    vsext.vf8 v24, v16862; RV64-NEXT:    vsll.vi v16, v24, 3863; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t864; RV64-NEXT:    ret865  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>866  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs867  call void @llvm.vp.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)868  ret void869}870 871define void @vpscatter_baseidx_zext_nxv8i8_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {872; RV32-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8i64:873; RV32:       # %bb.0:874; RV32-NEXT:    li a2, 8875; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma876; RV32-NEXT:    vwmulu.vx v18, v16, a2877; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma878; RV32-NEXT:    vsoxei16.v v8, (a0), v18, v0.t879; RV32-NEXT:    ret880;881; RV64-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8i64:882; RV64:       # %bb.0:883; RV64-NEXT:    li a2, 8884; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma885; RV64-NEXT:    vwmulu.vx v18, v16, a2886; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma887; RV64-NEXT:    vsoxei16.v v8, (a0), v18, v0.t888; RV64-NEXT:    ret889  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>890  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs891  call void @llvm.vp.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)892  ret void893}894 895define void @vpscatter_baseidx_nxv8i16_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {896; RV32-LABEL: vpscatter_baseidx_nxv8i16_nxv8i64:897; RV32:       # %bb.0:898; RV32-NEXT:    li a2, 8899; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma900; RV32-NEXT:    vwmulsu.vx v20, v16, a2901; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma902; RV32-NEXT:    vsoxei32.v v8, (a0), v20, v0.t903; RV32-NEXT:    ret904;905; RV64-LABEL: vpscatter_baseidx_nxv8i16_nxv8i64:906; RV64:       # %bb.0:907; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma908; RV64-NEXT:    vsext.vf4 v24, v16909; RV64-NEXT:    vsll.vi v16, v24, 3910; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t911; RV64-NEXT:    ret912  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i16> %idxs913  call void @llvm.vp.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)914  ret void915}916 917define void @vpscatter_baseidx_sext_nxv8i16_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {918; RV32-LABEL: vpscatter_baseidx_sext_nxv8i16_nxv8i64:919; RV32:       # %bb.0:920; RV32-NEXT:    li a2, 8921; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma922; RV32-NEXT:    vwmulsu.vx v20, v16, a2923; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma924; RV32-NEXT:    vsoxei32.v v8, (a0), v20, v0.t925; RV32-NEXT:    ret926;927; RV64-LABEL: vpscatter_baseidx_sext_nxv8i16_nxv8i64:928; RV64:       # %bb.0:929; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma930; RV64-NEXT:    vsext.vf4 v24, v16931; RV64-NEXT:    vsll.vi v16, v24, 3932; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t933; RV64-NEXT:    ret934  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>935  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs936  call void @llvm.vp.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)937  ret void938}939 940define void @vpscatter_baseidx_zext_nxv8i16_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {941; RV32-LABEL: vpscatter_baseidx_zext_nxv8i16_nxv8i64:942; RV32:       # %bb.0:943; RV32-NEXT:    li a2, 8944; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma945; RV32-NEXT:    vwmulu.vx v20, v16, a2946; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma947; RV32-NEXT:    vsoxei32.v v8, (a0), v20, v0.t948; RV32-NEXT:    ret949;950; RV64-LABEL: vpscatter_baseidx_zext_nxv8i16_nxv8i64:951; RV64:       # %bb.0:952; RV64-NEXT:    li a2, 8953; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, ma954; RV64-NEXT:    vwmulu.vx v20, v16, a2955; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma956; RV64-NEXT:    vsoxei32.v v8, (a0), v20, v0.t957; RV64-NEXT:    ret958  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>959  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs960  call void @llvm.vp.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)961  ret void962}963 964define void @vpscatter_baseidx_nxv8i32_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {965; RV32-LABEL: vpscatter_baseidx_nxv8i32_nxv8i64:966; RV32:       # %bb.0:967; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma968; RV32-NEXT:    vsll.vi v16, v16, 3969; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma970; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t971; RV32-NEXT:    ret972;973; RV64-LABEL: vpscatter_baseidx_nxv8i32_nxv8i64:974; RV64:       # %bb.0:975; RV64-NEXT:    li a2, 8976; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma977; RV64-NEXT:    vwmulsu.vx v24, v16, a2978; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma979; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t980; RV64-NEXT:    ret981  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i32> %idxs982  call void @llvm.vp.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)983  ret void984}985 986define void @vpscatter_baseidx_sext_nxv8i32_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {987; RV32-LABEL: vpscatter_baseidx_sext_nxv8i32_nxv8i64:988; RV32:       # %bb.0:989; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma990; RV32-NEXT:    vsll.vi v16, v16, 3991; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma992; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t993; RV32-NEXT:    ret994;995; RV64-LABEL: vpscatter_baseidx_sext_nxv8i32_nxv8i64:996; RV64:       # %bb.0:997; RV64-NEXT:    li a2, 8998; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma999; RV64-NEXT:    vwmulsu.vx v24, v16, a21000; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1001; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t1002; RV64-NEXT:    ret1003  %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>1004  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs1005  call void @llvm.vp.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1006  ret void1007}1008 1009define void @vpscatter_baseidx_zext_nxv8i32_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1010; RV32-LABEL: vpscatter_baseidx_zext_nxv8i32_nxv8i64:1011; RV32:       # %bb.0:1012; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1013; RV32-NEXT:    vsll.vi v16, v16, 31014; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1015; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1016; RV32-NEXT:    ret1017;1018; RV64-LABEL: vpscatter_baseidx_zext_nxv8i32_nxv8i64:1019; RV64:       # %bb.0:1020; RV64-NEXT:    li a2, 81021; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1022; RV64-NEXT:    vwmulu.vx v24, v16, a21023; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1024; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t1025; RV64-NEXT:    ret1026  %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>1027  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs1028  call void @llvm.vp.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1029  ret void1030}1031 1032define void @vpscatter_baseidx_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1033; RV32-LABEL: vpscatter_baseidx_nxv8i64:1034; RV32:       # %bb.0:1035; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1036; RV32-NEXT:    vnsrl.wi v24, v16, 01037; RV32-NEXT:    vsll.vi v16, v24, 31038; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1039; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1040; RV32-NEXT:    ret1041;1042; RV64-LABEL: vpscatter_baseidx_nxv8i64:1043; RV64:       # %bb.0:1044; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1045; RV64-NEXT:    vsll.vi v16, v16, 31046; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1047; RV64-NEXT:    ret1048  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %idxs1049  call void @llvm.vp.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1050  ret void1051}1052 1053define void @vpscatter_nxv1bf16(<vscale x 1 x bfloat> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {1054; RV32-LABEL: vpscatter_nxv1bf16:1055; RV32:       # %bb.0:1056; RV32-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma1057; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t1058; RV32-NEXT:    ret1059;1060; RV64-LABEL: vpscatter_nxv1bf16:1061; RV64:       # %bb.0:1062; RV64-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma1063; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t1064; RV64-NEXT:    ret1065  call void @llvm.vp.scatter.nxv1bf16.nxv1p0(<vscale x 1 x bfloat> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)1066  ret void1067}1068 1069define void @vpscatter_nxv2bf16(<vscale x 2 x bfloat> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {1070; RV32-LABEL: vpscatter_nxv2bf16:1071; RV32:       # %bb.0:1072; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma1073; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t1074; RV32-NEXT:    ret1075;1076; RV64-LABEL: vpscatter_nxv2bf16:1077; RV64:       # %bb.0:1078; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma1079; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t1080; RV64-NEXT:    ret1081  call void @llvm.vp.scatter.nxv2bf16.nxv2p0(<vscale x 2 x bfloat> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)1082  ret void1083}1084 1085define void @vpscatter_nxv4bf16(<vscale x 4 x bfloat> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {1086; RV32-LABEL: vpscatter_nxv4bf16:1087; RV32:       # %bb.0:1088; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1089; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t1090; RV32-NEXT:    ret1091;1092; RV64-LABEL: vpscatter_nxv4bf16:1093; RV64:       # %bb.0:1094; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1095; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t1096; RV64-NEXT:    ret1097  call void @llvm.vp.scatter.nxv4bf16.nxv4p0(<vscale x 4 x bfloat> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)1098  ret void1099}1100 1101define void @vpscatter_truemask_nxv4bf16(<vscale x 4 x bfloat> %val, <vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {1102; RV32-LABEL: vpscatter_truemask_nxv4bf16:1103; RV32:       # %bb.0:1104; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1105; RV32-NEXT:    vsoxei32.v v8, (zero), v101106; RV32-NEXT:    ret1107;1108; RV64-LABEL: vpscatter_truemask_nxv4bf16:1109; RV64:       # %bb.0:1110; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1111; RV64-NEXT:    vsoxei64.v v8, (zero), v121112; RV64-NEXT:    ret1113  call void @llvm.vp.scatter.nxv4bf16.nxv4p0(<vscale x 4 x bfloat> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)1114  ret void1115}1116 1117define void @vpscatter_nxv8bf16(<vscale x 8 x bfloat> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1118; RV32-LABEL: vpscatter_nxv8bf16:1119; RV32:       # %bb.0:1120; RV32-NEXT:    vsetvli zero, a0, e16, m2, ta, ma1121; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t1122; RV32-NEXT:    ret1123;1124; RV64-LABEL: vpscatter_nxv8bf16:1125; RV64:       # %bb.0:1126; RV64-NEXT:    vsetvli zero, a0, e16, m2, ta, ma1127; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t1128; RV64-NEXT:    ret1129  call void @llvm.vp.scatter.nxv8bf16.nxv8p0(<vscale x 8 x bfloat> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1130  ret void1131}1132 1133define void @vpscatter_baseidx_nxv8i8_nxv8bf16(<vscale x 8 x bfloat> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1134; RV32-LABEL: vpscatter_baseidx_nxv8i8_nxv8bf16:1135; RV32:       # %bb.0:1136; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1137; RV32-NEXT:    vsext.vf4 v12, v101138; RV32-NEXT:    vadd.vv v12, v12, v121139; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1140; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1141; RV32-NEXT:    ret1142;1143; RV64-LABEL: vpscatter_baseidx_nxv8i8_nxv8bf16:1144; RV64:       # %bb.0:1145; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1146; RV64-NEXT:    vsext.vf8 v16, v101147; RV64-NEXT:    vadd.vv v16, v16, v161148; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1149; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1150; RV64-NEXT:    ret1151  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i8> %idxs1152  call void @llvm.vp.scatter.nxv8bf16.nxv8p0(<vscale x 8 x bfloat> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1153  ret void1154}1155 1156define void @vpscatter_baseidx_sext_nxv8i8_nxv8bf16(<vscale x 8 x bfloat> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1157; RV32-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8bf16:1158; RV32:       # %bb.0:1159; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1160; RV32-NEXT:    vsext.vf4 v12, v101161; RV32-NEXT:    vadd.vv v12, v12, v121162; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1163; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1164; RV32-NEXT:    ret1165;1166; RV64-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8bf16:1167; RV64:       # %bb.0:1168; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1169; RV64-NEXT:    vsext.vf8 v16, v101170; RV64-NEXT:    vadd.vv v16, v16, v161171; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1172; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1173; RV64-NEXT:    ret1174  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1175  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i16> %eidxs1176  call void @llvm.vp.scatter.nxv8bf16.nxv8p0(<vscale x 8 x bfloat> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1177  ret void1178}1179 1180define void @vpscatter_baseidx_zext_nxv8i8_nxv8bf16(<vscale x 8 x bfloat> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1181; RV32-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8bf16:1182; RV32:       # %bb.0:1183; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1184; RV32-NEXT:    vwaddu.vv v12, v10, v101185; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1186; RV32-NEXT:    vsoxei16.v v8, (a0), v12, v0.t1187; RV32-NEXT:    ret1188;1189; RV64-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8bf16:1190; RV64:       # %bb.0:1191; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1192; RV64-NEXT:    vwaddu.vv v12, v10, v101193; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1194; RV64-NEXT:    vsoxei16.v v8, (a0), v12, v0.t1195; RV64-NEXT:    ret1196  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1197  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i16> %eidxs1198  call void @llvm.vp.scatter.nxv8bf16.nxv8p0(<vscale x 8 x bfloat> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1199  ret void1200}1201 1202define void @vpscatter_baseidx_nxv8bf16(<vscale x 8 x bfloat> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1203; RV32-LABEL: vpscatter_baseidx_nxv8bf16:1204; RV32:       # %bb.0:1205; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1206; RV32-NEXT:    vwadd.vv v12, v10, v101207; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1208; RV32-NEXT:    ret1209;1210; RV64-LABEL: vpscatter_baseidx_nxv8bf16:1211; RV64:       # %bb.0:1212; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1213; RV64-NEXT:    vsext.vf4 v16, v101214; RV64-NEXT:    vadd.vv v16, v16, v161215; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1216; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1217; RV64-NEXT:    ret1218  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i16> %idxs1219  call void @llvm.vp.scatter.nxv8bf16.nxv8p0(<vscale x 8 x bfloat> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1220  ret void1221}1222 1223define void @vpscatter_nxv1f16(<vscale x 1 x half> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {1224; RV32-LABEL: vpscatter_nxv1f16:1225; RV32:       # %bb.0:1226; RV32-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma1227; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t1228; RV32-NEXT:    ret1229;1230; RV64-LABEL: vpscatter_nxv1f16:1231; RV64:       # %bb.0:1232; RV64-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma1233; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t1234; RV64-NEXT:    ret1235  call void @llvm.vp.scatter.nxv1f16.nxv1p0(<vscale x 1 x half> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)1236  ret void1237}1238 1239define void @vpscatter_nxv2f16(<vscale x 2 x half> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {1240; RV32-LABEL: vpscatter_nxv2f16:1241; RV32:       # %bb.0:1242; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma1243; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t1244; RV32-NEXT:    ret1245;1246; RV64-LABEL: vpscatter_nxv2f16:1247; RV64:       # %bb.0:1248; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma1249; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t1250; RV64-NEXT:    ret1251  call void @llvm.vp.scatter.nxv2f16.nxv2p0(<vscale x 2 x half> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)1252  ret void1253}1254 1255define void @vpscatter_nxv4f16(<vscale x 4 x half> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {1256; RV32-LABEL: vpscatter_nxv4f16:1257; RV32:       # %bb.0:1258; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1259; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t1260; RV32-NEXT:    ret1261;1262; RV64-LABEL: vpscatter_nxv4f16:1263; RV64:       # %bb.0:1264; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1265; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t1266; RV64-NEXT:    ret1267  call void @llvm.vp.scatter.nxv4f16.nxv4p0(<vscale x 4 x half> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)1268  ret void1269}1270 1271define void @vpscatter_truemask_nxv4f16(<vscale x 4 x half> %val, <vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {1272; RV32-LABEL: vpscatter_truemask_nxv4f16:1273; RV32:       # %bb.0:1274; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1275; RV32-NEXT:    vsoxei32.v v8, (zero), v101276; RV32-NEXT:    ret1277;1278; RV64-LABEL: vpscatter_truemask_nxv4f16:1279; RV64:       # %bb.0:1280; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, ma1281; RV64-NEXT:    vsoxei64.v v8, (zero), v121282; RV64-NEXT:    ret1283  call void @llvm.vp.scatter.nxv4f16.nxv4p0(<vscale x 4 x half> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)1284  ret void1285}1286 1287define void @vpscatter_nxv8f16(<vscale x 8 x half> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1288; RV32-LABEL: vpscatter_nxv8f16:1289; RV32:       # %bb.0:1290; RV32-NEXT:    vsetvli zero, a0, e16, m2, ta, ma1291; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t1292; RV32-NEXT:    ret1293;1294; RV64-LABEL: vpscatter_nxv8f16:1295; RV64:       # %bb.0:1296; RV64-NEXT:    vsetvli zero, a0, e16, m2, ta, ma1297; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t1298; RV64-NEXT:    ret1299  call void @llvm.vp.scatter.nxv8f16.nxv8p0(<vscale x 8 x half> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1300  ret void1301}1302 1303define void @vpscatter_baseidx_nxv8i8_nxv8f16(<vscale x 8 x half> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1304; RV32-LABEL: vpscatter_baseidx_nxv8i8_nxv8f16:1305; RV32:       # %bb.0:1306; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1307; RV32-NEXT:    vsext.vf4 v12, v101308; RV32-NEXT:    vadd.vv v12, v12, v121309; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1310; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1311; RV32-NEXT:    ret1312;1313; RV64-LABEL: vpscatter_baseidx_nxv8i8_nxv8f16:1314; RV64:       # %bb.0:1315; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1316; RV64-NEXT:    vsext.vf8 v16, v101317; RV64-NEXT:    vadd.vv v16, v16, v161318; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1319; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1320; RV64-NEXT:    ret1321  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i8> %idxs1322  call void @llvm.vp.scatter.nxv8f16.nxv8p0(<vscale x 8 x half> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1323  ret void1324}1325 1326define void @vpscatter_baseidx_sext_nxv8i8_nxv8f16(<vscale x 8 x half> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1327; RV32-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8f16:1328; RV32:       # %bb.0:1329; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1330; RV32-NEXT:    vsext.vf4 v12, v101331; RV32-NEXT:    vadd.vv v12, v12, v121332; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1333; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1334; RV32-NEXT:    ret1335;1336; RV64-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8f16:1337; RV64:       # %bb.0:1338; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1339; RV64-NEXT:    vsext.vf8 v16, v101340; RV64-NEXT:    vadd.vv v16, v16, v161341; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1342; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1343; RV64-NEXT:    ret1344  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1345  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i16> %eidxs1346  call void @llvm.vp.scatter.nxv8f16.nxv8p0(<vscale x 8 x half> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1347  ret void1348}1349 1350define void @vpscatter_baseidx_zext_nxv8i8_nxv8f16(<vscale x 8 x half> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1351; RV32-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8f16:1352; RV32:       # %bb.0:1353; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1354; RV32-NEXT:    vwaddu.vv v12, v10, v101355; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1356; RV32-NEXT:    vsoxei16.v v8, (a0), v12, v0.t1357; RV32-NEXT:    ret1358;1359; RV64-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8f16:1360; RV64:       # %bb.0:1361; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1362; RV64-NEXT:    vwaddu.vv v12, v10, v101363; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1364; RV64-NEXT:    vsoxei16.v v8, (a0), v12, v0.t1365; RV64-NEXT:    ret1366  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1367  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i16> %eidxs1368  call void @llvm.vp.scatter.nxv8f16.nxv8p0(<vscale x 8 x half> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1369  ret void1370}1371 1372define void @vpscatter_baseidx_nxv8f16(<vscale x 8 x half> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1373; RV32-LABEL: vpscatter_baseidx_nxv8f16:1374; RV32:       # %bb.0:1375; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1376; RV32-NEXT:    vwadd.vv v12, v10, v101377; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1378; RV32-NEXT:    ret1379;1380; RV64-LABEL: vpscatter_baseidx_nxv8f16:1381; RV64:       # %bb.0:1382; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1383; RV64-NEXT:    vsext.vf4 v16, v101384; RV64-NEXT:    vadd.vv v16, v16, v161385; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1386; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1387; RV64-NEXT:    ret1388  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i16> %idxs1389  call void @llvm.vp.scatter.nxv8f16.nxv8p0(<vscale x 8 x half> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1390  ret void1391}1392 1393define void @vpscatter_nxv1f32(<vscale x 1 x float> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {1394; RV32-LABEL: vpscatter_nxv1f32:1395; RV32:       # %bb.0:1396; RV32-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1397; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t1398; RV32-NEXT:    ret1399;1400; RV64-LABEL: vpscatter_nxv1f32:1401; RV64:       # %bb.0:1402; RV64-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1403; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t1404; RV64-NEXT:    ret1405  call void @llvm.vp.scatter.nxv1f32.nxv1p0(<vscale x 1 x float> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)1406  ret void1407}1408 1409define void @vpscatter_nxv2f32(<vscale x 2 x float> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {1410; RV32-LABEL: vpscatter_nxv2f32:1411; RV32:       # %bb.0:1412; RV32-NEXT:    vsetvli zero, a0, e32, m1, ta, ma1413; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t1414; RV32-NEXT:    ret1415;1416; RV64-LABEL: vpscatter_nxv2f32:1417; RV64:       # %bb.0:1418; RV64-NEXT:    vsetvli zero, a0, e32, m1, ta, ma1419; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t1420; RV64-NEXT:    ret1421  call void @llvm.vp.scatter.nxv2f32.nxv2p0(<vscale x 2 x float> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)1422  ret void1423}1424 1425define void @vpscatter_nxv4f32(<vscale x 4 x float> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {1426; RV32-LABEL: vpscatter_nxv4f32:1427; RV32:       # %bb.0:1428; RV32-NEXT:    vsetvli zero, a0, e32, m2, ta, ma1429; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t1430; RV32-NEXT:    ret1431;1432; RV64-LABEL: vpscatter_nxv4f32:1433; RV64:       # %bb.0:1434; RV64-NEXT:    vsetvli zero, a0, e32, m2, ta, ma1435; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t1436; RV64-NEXT:    ret1437  call void @llvm.vp.scatter.nxv4f32.nxv4p0(<vscale x 4 x float> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)1438  ret void1439}1440 1441define void @vpscatter_truemask_nxv4f32(<vscale x 4 x float> %val, <vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {1442; RV32-LABEL: vpscatter_truemask_nxv4f32:1443; RV32:       # %bb.0:1444; RV32-NEXT:    vsetvli zero, a0, e32, m2, ta, ma1445; RV32-NEXT:    vsoxei32.v v8, (zero), v101446; RV32-NEXT:    ret1447;1448; RV64-LABEL: vpscatter_truemask_nxv4f32:1449; RV64:       # %bb.0:1450; RV64-NEXT:    vsetvli zero, a0, e32, m2, ta, ma1451; RV64-NEXT:    vsoxei64.v v8, (zero), v121452; RV64-NEXT:    ret1453  call void @llvm.vp.scatter.nxv4f32.nxv4p0(<vscale x 4 x float> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)1454  ret void1455}1456 1457define void @vpscatter_nxv8f32(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1458; RV32-LABEL: vpscatter_nxv8f32:1459; RV32:       # %bb.0:1460; RV32-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1461; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t1462; RV32-NEXT:    ret1463;1464; RV64-LABEL: vpscatter_nxv8f32:1465; RV64:       # %bb.0:1466; RV64-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1467; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t1468; RV64-NEXT:    ret1469  call void @llvm.vp.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1470  ret void1471}1472 1473define void @vpscatter_baseidx_nxv8i8_nxv8f32(<vscale x 8 x float> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1474; RV32-LABEL: vpscatter_baseidx_nxv8i8_nxv8f32:1475; RV32:       # %bb.0:1476; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1477; RV32-NEXT:    vsext.vf4 v16, v121478; RV32-NEXT:    vsll.vi v12, v16, 21479; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1480; RV32-NEXT:    ret1481;1482; RV64-LABEL: vpscatter_baseidx_nxv8i8_nxv8f32:1483; RV64:       # %bb.0:1484; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1485; RV64-NEXT:    vsext.vf8 v16, v121486; RV64-NEXT:    vsll.vi v16, v16, 21487; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1488; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1489; RV64-NEXT:    ret1490  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i8> %idxs1491  call void @llvm.vp.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1492  ret void1493}1494 1495define void @vpscatter_baseidx_sext_nxv8i8_nxv8f32(<vscale x 8 x float> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1496; RV32-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8f32:1497; RV32:       # %bb.0:1498; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1499; RV32-NEXT:    vsext.vf4 v16, v121500; RV32-NEXT:    vsll.vi v12, v16, 21501; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1502; RV32-NEXT:    ret1503;1504; RV64-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8f32:1505; RV64:       # %bb.0:1506; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1507; RV64-NEXT:    vsext.vf8 v16, v121508; RV64-NEXT:    vsll.vi v16, v16, 21509; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1510; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1511; RV64-NEXT:    ret1512  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>1513  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1514  call void @llvm.vp.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1515  ret void1516}1517 1518define void @vpscatter_baseidx_zext_nxv8i8_nxv8f32(<vscale x 8 x float> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1519; RV32-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8f32:1520; RV32:       # %bb.0:1521; RV32-NEXT:    li a2, 41522; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1523; RV32-NEXT:    vwmulu.vx v14, v12, a21524; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1525; RV32-NEXT:    vsoxei16.v v8, (a0), v14, v0.t1526; RV32-NEXT:    ret1527;1528; RV64-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8f32:1529; RV64:       # %bb.0:1530; RV64-NEXT:    li a2, 41531; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1532; RV64-NEXT:    vwmulu.vx v14, v12, a21533; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1534; RV64-NEXT:    vsoxei16.v v8, (a0), v14, v0.t1535; RV64-NEXT:    ret1536  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>1537  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1538  call void @llvm.vp.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1539  ret void1540}1541 1542define void @vpscatter_baseidx_nxv8i16_nxv8f32(<vscale x 8 x float> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1543; RV32-LABEL: vpscatter_baseidx_nxv8i16_nxv8f32:1544; RV32:       # %bb.0:1545; RV32-NEXT:    li a2, 41546; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1547; RV32-NEXT:    vwmulsu.vx v16, v12, a21548; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1549; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1550; RV32-NEXT:    ret1551;1552; RV64-LABEL: vpscatter_baseidx_nxv8i16_nxv8f32:1553; RV64:       # %bb.0:1554; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1555; RV64-NEXT:    vsext.vf4 v16, v121556; RV64-NEXT:    vsll.vi v16, v16, 21557; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1558; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1559; RV64-NEXT:    ret1560  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i16> %idxs1561  call void @llvm.vp.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1562  ret void1563}1564 1565define void @vpscatter_baseidx_sext_nxv8i16_nxv8f32(<vscale x 8 x float> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1566; RV32-LABEL: vpscatter_baseidx_sext_nxv8i16_nxv8f32:1567; RV32:       # %bb.0:1568; RV32-NEXT:    li a2, 41569; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1570; RV32-NEXT:    vwmulsu.vx v16, v12, a21571; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1572; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1573; RV32-NEXT:    ret1574;1575; RV64-LABEL: vpscatter_baseidx_sext_nxv8i16_nxv8f32:1576; RV64:       # %bb.0:1577; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1578; RV64-NEXT:    vsext.vf4 v16, v121579; RV64-NEXT:    vsll.vi v16, v16, 21580; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1581; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1582; RV64-NEXT:    ret1583  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>1584  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1585  call void @llvm.vp.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1586  ret void1587}1588 1589define void @vpscatter_baseidx_zext_nxv8i16_nxv8f32(<vscale x 8 x float> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1590; RV32-LABEL: vpscatter_baseidx_zext_nxv8i16_nxv8f32:1591; RV32:       # %bb.0:1592; RV32-NEXT:    li a2, 41593; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1594; RV32-NEXT:    vwmulu.vx v16, v12, a21595; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1596; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1597; RV32-NEXT:    ret1598;1599; RV64-LABEL: vpscatter_baseidx_zext_nxv8i16_nxv8f32:1600; RV64:       # %bb.0:1601; RV64-NEXT:    li a2, 41602; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1603; RV64-NEXT:    vwmulu.vx v16, v12, a21604; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1605; RV64-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1606; RV64-NEXT:    ret1607  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>1608  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1609  call void @llvm.vp.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1610  ret void1611}1612 1613define void @vpscatter_baseidx_nxv8f32(<vscale x 8 x float> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1614; RV32-LABEL: vpscatter_baseidx_nxv8f32:1615; RV32:       # %bb.0:1616; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1617; RV32-NEXT:    vsll.vi v12, v12, 21618; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1619; RV32-NEXT:    ret1620;1621; RV64-LABEL: vpscatter_baseidx_nxv8f32:1622; RV64:       # %bb.0:1623; RV64-NEXT:    li a2, 41624; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1625; RV64-NEXT:    vwmulsu.vx v16, v12, a21626; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1627; RV64-NEXT:    ret1628  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %idxs1629  call void @llvm.vp.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1630  ret void1631}1632 1633define void @vpscatter_nxv1f64(<vscale x 1 x double> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {1634; RV32-LABEL: vpscatter_nxv1f64:1635; RV32:       # %bb.0:1636; RV32-NEXT:    vsetvli zero, a0, e64, m1, ta, ma1637; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t1638; RV32-NEXT:    ret1639;1640; RV64-LABEL: vpscatter_nxv1f64:1641; RV64:       # %bb.0:1642; RV64-NEXT:    vsetvli zero, a0, e64, m1, ta, ma1643; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t1644; RV64-NEXT:    ret1645  call void @llvm.vp.scatter.nxv1f64.nxv1p0(<vscale x 1 x double> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, i32 %evl)1646  ret void1647}1648 1649define void @vpscatter_nxv2f64(<vscale x 2 x double> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {1650; RV32-LABEL: vpscatter_nxv2f64:1651; RV32:       # %bb.0:1652; RV32-NEXT:    vsetvli zero, a0, e64, m2, ta, ma1653; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t1654; RV32-NEXT:    ret1655;1656; RV64-LABEL: vpscatter_nxv2f64:1657; RV64:       # %bb.0:1658; RV64-NEXT:    vsetvli zero, a0, e64, m2, ta, ma1659; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t1660; RV64-NEXT:    ret1661  call void @llvm.vp.scatter.nxv2f64.nxv2p0(<vscale x 2 x double> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, i32 %evl)1662  ret void1663}1664 1665define void @vpscatter_nxv4f64(<vscale x 4 x double> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {1666; RV32-LABEL: vpscatter_nxv4f64:1667; RV32:       # %bb.0:1668; RV32-NEXT:    vsetvli zero, a0, e64, m4, ta, ma1669; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t1670; RV32-NEXT:    ret1671;1672; RV64-LABEL: vpscatter_nxv4f64:1673; RV64:       # %bb.0:1674; RV64-NEXT:    vsetvli zero, a0, e64, m4, ta, ma1675; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t1676; RV64-NEXT:    ret1677  call void @llvm.vp.scatter.nxv4f64.nxv4p0(<vscale x 4 x double> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, i32 %evl)1678  ret void1679}1680 1681define void @vpscatter_truemask_nxv4f64(<vscale x 4 x double> %val, <vscale x 4 x ptr> %ptrs, i32 zeroext %evl) {1682; RV32-LABEL: vpscatter_truemask_nxv4f64:1683; RV32:       # %bb.0:1684; RV32-NEXT:    vsetvli zero, a0, e64, m4, ta, ma1685; RV32-NEXT:    vsoxei32.v v8, (zero), v121686; RV32-NEXT:    ret1687;1688; RV64-LABEL: vpscatter_truemask_nxv4f64:1689; RV64:       # %bb.0:1690; RV64-NEXT:    vsetvli zero, a0, e64, m4, ta, ma1691; RV64-NEXT:    vsoxei64.v v8, (zero), v121692; RV64-NEXT:    ret1693  call void @llvm.vp.scatter.nxv4f64.nxv4p0(<vscale x 4 x double> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> splat (i1 1), i32 %evl)1694  ret void1695}1696 1697define void @vpscatter_nxv6f64(<vscale x 6 x double> %val, <vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1698; RV32-LABEL: vpscatter_nxv6f64:1699; RV32:       # %bb.0:1700; RV32-NEXT:    vsetvli zero, a0, e64, m8, ta, ma1701; RV32-NEXT:    vsoxei32.v v8, (zero), v16, v0.t1702; RV32-NEXT:    ret1703;1704; RV64-LABEL: vpscatter_nxv6f64:1705; RV64:       # %bb.0:1706; RV64-NEXT:    vsetvli zero, a0, e64, m8, ta, ma1707; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t1708; RV64-NEXT:    ret1709  call void @llvm.vp.scatter.nxv6f64.nxv6p0(<vscale x 6 x double> %val, <vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1710  ret void1711}1712 1713define void @vpscatter_baseidx_nxv6i8_nxv6f64(<vscale x 6 x double> %val, ptr %base, <vscale x 6 x i8> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1714; RV32-LABEL: vpscatter_baseidx_nxv6i8_nxv6f64:1715; RV32:       # %bb.0:1716; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1717; RV32-NEXT:    vsext.vf4 v20, v161718; RV32-NEXT:    vsll.vi v16, v20, 31719; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1720; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1721; RV32-NEXT:    ret1722;1723; RV64-LABEL: vpscatter_baseidx_nxv6i8_nxv6f64:1724; RV64:       # %bb.0:1725; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1726; RV64-NEXT:    vsext.vf8 v24, v161727; RV64-NEXT:    vsll.vi v16, v24, 31728; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1729; RV64-NEXT:    ret1730  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i8> %idxs1731  call void @llvm.vp.scatter.nxv6f64.nxv6p0(<vscale x 6 x double> %val, <vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1732  ret void1733}1734 1735define void @vpscatter_baseidx_sext_nxv6i8_nxv6f64(<vscale x 6 x double> %val, ptr %base, <vscale x 6 x i8> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1736; RV32-LABEL: vpscatter_baseidx_sext_nxv6i8_nxv6f64:1737; RV32:       # %bb.0:1738; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1739; RV32-NEXT:    vsext.vf4 v20, v161740; RV32-NEXT:    vsll.vi v16, v20, 31741; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1742; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1743; RV32-NEXT:    ret1744;1745; RV64-LABEL: vpscatter_baseidx_sext_nxv6i8_nxv6f64:1746; RV64:       # %bb.0:1747; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1748; RV64-NEXT:    vsext.vf8 v24, v161749; RV64-NEXT:    vsll.vi v16, v24, 31750; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1751; RV64-NEXT:    ret1752  %eidxs = sext <vscale x 6 x i8> %idxs to <vscale x 6 x i64>1753  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i64> %eidxs1754  call void @llvm.vp.scatter.nxv6f64.nxv6p0(<vscale x 6 x double> %val, <vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1755  ret void1756}1757 1758define void @vpscatter_baseidx_zext_nxv6i8_nxv6f64(<vscale x 6 x double> %val, ptr %base, <vscale x 6 x i8> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1759; RV32-LABEL: vpscatter_baseidx_zext_nxv6i8_nxv6f64:1760; RV32:       # %bb.0:1761; RV32-NEXT:    li a2, 81762; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1763; RV32-NEXT:    vwmulu.vx v18, v16, a21764; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1765; RV32-NEXT:    vsoxei16.v v8, (a0), v18, v0.t1766; RV32-NEXT:    ret1767;1768; RV64-LABEL: vpscatter_baseidx_zext_nxv6i8_nxv6f64:1769; RV64:       # %bb.0:1770; RV64-NEXT:    li a2, 81771; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1772; RV64-NEXT:    vwmulu.vx v18, v16, a21773; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1774; RV64-NEXT:    vsoxei16.v v8, (a0), v18, v0.t1775; RV64-NEXT:    ret1776  %eidxs = zext <vscale x 6 x i8> %idxs to <vscale x 6 x i64>1777  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i64> %eidxs1778  call void @llvm.vp.scatter.nxv6f64.nxv6p0(<vscale x 6 x double> %val, <vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1779  ret void1780}1781 1782define void @vpscatter_baseidx_nxv6i16_nxv6f64(<vscale x 6 x double> %val, ptr %base, <vscale x 6 x i16> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1783; RV32-LABEL: vpscatter_baseidx_nxv6i16_nxv6f64:1784; RV32:       # %bb.0:1785; RV32-NEXT:    li a2, 81786; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1787; RV32-NEXT:    vwmulsu.vx v20, v16, a21788; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1789; RV32-NEXT:    vsoxei32.v v8, (a0), v20, v0.t1790; RV32-NEXT:    ret1791;1792; RV64-LABEL: vpscatter_baseidx_nxv6i16_nxv6f64:1793; RV64:       # %bb.0:1794; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1795; RV64-NEXT:    vsext.vf4 v24, v161796; RV64-NEXT:    vsll.vi v16, v24, 31797; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1798; RV64-NEXT:    ret1799  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i16> %idxs1800  call void @llvm.vp.scatter.nxv6f64.nxv6p0(<vscale x 6 x double> %val, <vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1801  ret void1802}1803 1804define void @vpscatter_baseidx_sext_nxv6i16_nxv6f64(<vscale x 6 x double> %val, ptr %base, <vscale x 6 x i16> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1805; RV32-LABEL: vpscatter_baseidx_sext_nxv6i16_nxv6f64:1806; RV32:       # %bb.0:1807; RV32-NEXT:    li a2, 81808; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1809; RV32-NEXT:    vwmulsu.vx v20, v16, a21810; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1811; RV32-NEXT:    vsoxei32.v v8, (a0), v20, v0.t1812; RV32-NEXT:    ret1813;1814; RV64-LABEL: vpscatter_baseidx_sext_nxv6i16_nxv6f64:1815; RV64:       # %bb.0:1816; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1817; RV64-NEXT:    vsext.vf4 v24, v161818; RV64-NEXT:    vsll.vi v16, v24, 31819; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1820; RV64-NEXT:    ret1821  %eidxs = sext <vscale x 6 x i16> %idxs to <vscale x 6 x i64>1822  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i64> %eidxs1823  call void @llvm.vp.scatter.nxv6f64.nxv6p0(<vscale x 6 x double> %val, <vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1824  ret void1825}1826 1827define void @vpscatter_baseidx_zext_nxv6i16_nxv6f64(<vscale x 6 x double> %val, ptr %base, <vscale x 6 x i16> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1828; RV32-LABEL: vpscatter_baseidx_zext_nxv6i16_nxv6f64:1829; RV32:       # %bb.0:1830; RV32-NEXT:    li a2, 81831; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1832; RV32-NEXT:    vwmulu.vx v20, v16, a21833; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1834; RV32-NEXT:    vsoxei32.v v8, (a0), v20, v0.t1835; RV32-NEXT:    ret1836;1837; RV64-LABEL: vpscatter_baseidx_zext_nxv6i16_nxv6f64:1838; RV64:       # %bb.0:1839; RV64-NEXT:    li a2, 81840; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1841; RV64-NEXT:    vwmulu.vx v20, v16, a21842; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1843; RV64-NEXT:    vsoxei32.v v8, (a0), v20, v0.t1844; RV64-NEXT:    ret1845  %eidxs = zext <vscale x 6 x i16> %idxs to <vscale x 6 x i64>1846  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i64> %eidxs1847  call void @llvm.vp.scatter.nxv6f64.nxv6p0(<vscale x 6 x double> %val, <vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1848  ret void1849}1850 1851define void @vpscatter_baseidx_nxv6i32_nxv6f64(<vscale x 6 x double> %val, ptr %base, <vscale x 6 x i32> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1852; RV32-LABEL: vpscatter_baseidx_nxv6i32_nxv6f64:1853; RV32:       # %bb.0:1854; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1855; RV32-NEXT:    vsll.vi v16, v16, 31856; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1857; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1858; RV32-NEXT:    ret1859;1860; RV64-LABEL: vpscatter_baseidx_nxv6i32_nxv6f64:1861; RV64:       # %bb.0:1862; RV64-NEXT:    li a2, 81863; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1864; RV64-NEXT:    vwmulsu.vx v24, v16, a21865; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1866; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t1867; RV64-NEXT:    ret1868  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i32> %idxs1869  call void @llvm.vp.scatter.nxv6f64.nxv6p0(<vscale x 6 x double> %val, <vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1870  ret void1871}1872 1873define void @vpscatter_baseidx_sext_nxv6i32_nxv6f64(<vscale x 6 x double> %val, ptr %base, <vscale x 6 x i32> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1874; RV32-LABEL: vpscatter_baseidx_sext_nxv6i32_nxv6f64:1875; RV32:       # %bb.0:1876; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1877; RV32-NEXT:    vsll.vi v16, v16, 31878; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1879; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1880; RV32-NEXT:    ret1881;1882; RV64-LABEL: vpscatter_baseidx_sext_nxv6i32_nxv6f64:1883; RV64:       # %bb.0:1884; RV64-NEXT:    li a2, 81885; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1886; RV64-NEXT:    vwmulsu.vx v24, v16, a21887; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1888; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t1889; RV64-NEXT:    ret1890  %eidxs = sext <vscale x 6 x i32> %idxs to <vscale x 6 x i64>1891  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i64> %eidxs1892  call void @llvm.vp.scatter.nxv6f64.nxv6p0(<vscale x 6 x double> %val, <vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1893  ret void1894}1895 1896define void @vpscatter_baseidx_zext_nxv6i32_nxv6f64(<vscale x 6 x double> %val, ptr %base, <vscale x 6 x i32> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1897; RV32-LABEL: vpscatter_baseidx_zext_nxv6i32_nxv6f64:1898; RV32:       # %bb.0:1899; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1900; RV32-NEXT:    vsll.vi v16, v16, 31901; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1902; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1903; RV32-NEXT:    ret1904;1905; RV64-LABEL: vpscatter_baseidx_zext_nxv6i32_nxv6f64:1906; RV64:       # %bb.0:1907; RV64-NEXT:    li a2, 81908; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1909; RV64-NEXT:    vwmulu.vx v24, v16, a21910; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1911; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t1912; RV64-NEXT:    ret1913  %eidxs = zext <vscale x 6 x i32> %idxs to <vscale x 6 x i64>1914  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i64> %eidxs1915  call void @llvm.vp.scatter.nxv6f64.nxv6p0(<vscale x 6 x double> %val, <vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1916  ret void1917}1918 1919define void @vpscatter_baseidx_nxv6f64(<vscale x 6 x double> %val, ptr %base, <vscale x 6 x i64> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) {1920; RV32-LABEL: vpscatter_baseidx_nxv6f64:1921; RV32:       # %bb.0:1922; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1923; RV32-NEXT:    vnsrl.wi v24, v16, 01924; RV32-NEXT:    vsll.vi v16, v24, 31925; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1926; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1927; RV32-NEXT:    ret1928;1929; RV64-LABEL: vpscatter_baseidx_nxv6f64:1930; RV64:       # %bb.0:1931; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1932; RV64-NEXT:    vsll.vi v16, v16, 31933; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1934; RV64-NEXT:    ret1935  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 6 x i64> %idxs1936  call void @llvm.vp.scatter.nxv6f64.nxv6p0(<vscale x 6 x double> %val, <vscale x 6 x ptr> %ptrs, <vscale x 6 x i1> %m, i32 %evl)1937  ret void1938}1939 1940define void @vpscatter_nxv8f64(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1941; RV32-LABEL: vpscatter_nxv8f64:1942; RV32:       # %bb.0:1943; RV32-NEXT:    vsetvli zero, a0, e64, m8, ta, ma1944; RV32-NEXT:    vsoxei32.v v8, (zero), v16, v0.t1945; RV32-NEXT:    ret1946;1947; RV64-LABEL: vpscatter_nxv8f64:1948; RV64:       # %bb.0:1949; RV64-NEXT:    vsetvli zero, a0, e64, m8, ta, ma1950; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t1951; RV64-NEXT:    ret1952  call void @llvm.vp.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1953  ret void1954}1955 1956define void @vpscatter_baseidx_nxv8i8_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1957; RV32-LABEL: vpscatter_baseidx_nxv8i8_nxv8f64:1958; RV32:       # %bb.0:1959; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1960; RV32-NEXT:    vsext.vf4 v20, v161961; RV32-NEXT:    vsll.vi v16, v20, 31962; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1963; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1964; RV32-NEXT:    ret1965;1966; RV64-LABEL: vpscatter_baseidx_nxv8i8_nxv8f64:1967; RV64:       # %bb.0:1968; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1969; RV64-NEXT:    vsext.vf8 v24, v161970; RV64-NEXT:    vsll.vi v16, v24, 31971; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1972; RV64-NEXT:    ret1973  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i8> %idxs1974  call void @llvm.vp.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1975  ret void1976}1977 1978define void @vpscatter_baseidx_sext_nxv8i8_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {1979; RV32-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8f64:1980; RV32:       # %bb.0:1981; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1982; RV32-NEXT:    vsext.vf4 v20, v161983; RV32-NEXT:    vsll.vi v16, v20, 31984; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1985; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1986; RV32-NEXT:    ret1987;1988; RV64-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8f64:1989; RV64:       # %bb.0:1990; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma1991; RV64-NEXT:    vsext.vf8 v24, v161992; RV64-NEXT:    vsll.vi v16, v24, 31993; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1994; RV64-NEXT:    ret1995  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>1996  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs1997  call void @llvm.vp.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)1998  ret void1999}2000 2001define void @vpscatter_baseidx_zext_nxv8i8_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2002; RV32-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8f64:2003; RV32:       # %bb.0:2004; RV32-NEXT:    li a2, 82005; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, ma2006; RV32-NEXT:    vwmulu.vx v18, v16, a22007; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2008; RV32-NEXT:    vsoxei16.v v8, (a0), v18, v0.t2009; RV32-NEXT:    ret2010;2011; RV64-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8f64:2012; RV64:       # %bb.0:2013; RV64-NEXT:    li a2, 82014; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, ma2015; RV64-NEXT:    vwmulu.vx v18, v16, a22016; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2017; RV64-NEXT:    vsoxei16.v v8, (a0), v18, v0.t2018; RV64-NEXT:    ret2019  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>2020  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2021  call void @llvm.vp.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2022  ret void2023}2024 2025define void @vpscatter_baseidx_nxv8i16_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2026; RV32-LABEL: vpscatter_baseidx_nxv8i16_nxv8f64:2027; RV32:       # %bb.0:2028; RV32-NEXT:    li a2, 82029; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2030; RV32-NEXT:    vwmulsu.vx v20, v16, a22031; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2032; RV32-NEXT:    vsoxei32.v v8, (a0), v20, v0.t2033; RV32-NEXT:    ret2034;2035; RV64-LABEL: vpscatter_baseidx_nxv8i16_nxv8f64:2036; RV64:       # %bb.0:2037; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2038; RV64-NEXT:    vsext.vf4 v24, v162039; RV64-NEXT:    vsll.vi v16, v24, 32040; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t2041; RV64-NEXT:    ret2042  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i16> %idxs2043  call void @llvm.vp.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2044  ret void2045}2046 2047define void @vpscatter_baseidx_sext_nxv8i16_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2048; RV32-LABEL: vpscatter_baseidx_sext_nxv8i16_nxv8f64:2049; RV32:       # %bb.0:2050; RV32-NEXT:    li a2, 82051; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2052; RV32-NEXT:    vwmulsu.vx v20, v16, a22053; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2054; RV32-NEXT:    vsoxei32.v v8, (a0), v20, v0.t2055; RV32-NEXT:    ret2056;2057; RV64-LABEL: vpscatter_baseidx_sext_nxv8i16_nxv8f64:2058; RV64:       # %bb.0:2059; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2060; RV64-NEXT:    vsext.vf4 v24, v162061; RV64-NEXT:    vsll.vi v16, v24, 32062; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t2063; RV64-NEXT:    ret2064  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>2065  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2066  call void @llvm.vp.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2067  ret void2068}2069 2070define void @vpscatter_baseidx_zext_nxv8i16_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2071; RV32-LABEL: vpscatter_baseidx_zext_nxv8i16_nxv8f64:2072; RV32:       # %bb.0:2073; RV32-NEXT:    li a2, 82074; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2075; RV32-NEXT:    vwmulu.vx v20, v16, a22076; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2077; RV32-NEXT:    vsoxei32.v v8, (a0), v20, v0.t2078; RV32-NEXT:    ret2079;2080; RV64-LABEL: vpscatter_baseidx_zext_nxv8i16_nxv8f64:2081; RV64:       # %bb.0:2082; RV64-NEXT:    li a2, 82083; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2084; RV64-NEXT:    vwmulu.vx v20, v16, a22085; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2086; RV64-NEXT:    vsoxei32.v v8, (a0), v20, v0.t2087; RV64-NEXT:    ret2088  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>2089  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2090  call void @llvm.vp.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2091  ret void2092}2093 2094define void @vpscatter_baseidx_nxv8i32_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2095; RV32-LABEL: vpscatter_baseidx_nxv8i32_nxv8f64:2096; RV32:       # %bb.0:2097; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2098; RV32-NEXT:    vsll.vi v16, v16, 32099; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2100; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t2101; RV32-NEXT:    ret2102;2103; RV64-LABEL: vpscatter_baseidx_nxv8i32_nxv8f64:2104; RV64:       # %bb.0:2105; RV64-NEXT:    li a2, 82106; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2107; RV64-NEXT:    vwmulsu.vx v24, v16, a22108; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2109; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t2110; RV64-NEXT:    ret2111  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i32> %idxs2112  call void @llvm.vp.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2113  ret void2114}2115 2116define void @vpscatter_baseidx_sext_nxv8i32_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2117; RV32-LABEL: vpscatter_baseidx_sext_nxv8i32_nxv8f64:2118; RV32:       # %bb.0:2119; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2120; RV32-NEXT:    vsll.vi v16, v16, 32121; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2122; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t2123; RV32-NEXT:    ret2124;2125; RV64-LABEL: vpscatter_baseidx_sext_nxv8i32_nxv8f64:2126; RV64:       # %bb.0:2127; RV64-NEXT:    li a2, 82128; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2129; RV64-NEXT:    vwmulsu.vx v24, v16, a22130; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2131; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t2132; RV64-NEXT:    ret2133  %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>2134  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2135  call void @llvm.vp.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2136  ret void2137}2138 2139define void @vpscatter_baseidx_zext_nxv8i32_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2140; RV32-LABEL: vpscatter_baseidx_zext_nxv8i32_nxv8f64:2141; RV32:       # %bb.0:2142; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2143; RV32-NEXT:    vsll.vi v16, v16, 32144; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2145; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t2146; RV32-NEXT:    ret2147;2148; RV64-LABEL: vpscatter_baseidx_zext_nxv8i32_nxv8f64:2149; RV64:       # %bb.0:2150; RV64-NEXT:    li a2, 82151; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2152; RV64-NEXT:    vwmulu.vx v24, v16, a22153; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2154; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t2155; RV64-NEXT:    ret2156  %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>2157  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2158  call void @llvm.vp.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2159  ret void2160}2161 2162define void @vpscatter_baseidx_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {2163; RV32-LABEL: vpscatter_baseidx_nxv8f64:2164; RV32:       # %bb.0:2165; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2166; RV32-NEXT:    vnsrl.wi v24, v16, 02167; RV32-NEXT:    vsll.vi v16, v24, 32168; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2169; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t2170; RV32-NEXT:    ret2171;2172; RV64-LABEL: vpscatter_baseidx_nxv8f64:2173; RV64:       # %bb.0:2174; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2175; RV64-NEXT:    vsll.vi v16, v16, 32176; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t2177; RV64-NEXT:    ret2178  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %idxs2179  call void @llvm.vp.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, i32 %evl)2180  ret void2181}2182 2183define void @vpscatter_nxv16f64(<vscale x 16 x double> %val, <vscale x 16 x ptr> %ptrs, <vscale x 16 x i1> %m, i32 zeroext %evl) {2184; RV32-LABEL: vpscatter_nxv16f64:2185; RV32:       # %bb.0:2186; RV32-NEXT:    vl8re32.v v24, (a0)2187; RV32-NEXT:    csrr a0, vlenb2188; RV32-NEXT:    mv a2, a12189; RV32-NEXT:    bltu a1, a0, .LBB108_22190; RV32-NEXT:  # %bb.1:2191; RV32-NEXT:    mv a2, a02192; RV32-NEXT:  .LBB108_2:2193; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma2194; RV32-NEXT:    vsoxei32.v v8, (zero), v24, v0.t2195; RV32-NEXT:    sub a2, a1, a02196; RV32-NEXT:    srli a0, a0, 32197; RV32-NEXT:    sltu a1, a1, a22198; RV32-NEXT:    addi a1, a1, -12199; RV32-NEXT:    vsetvli a3, zero, e8, mf4, ta, ma2200; RV32-NEXT:    vslidedown.vx v0, v0, a02201; RV32-NEXT:    and a1, a1, a22202; RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, ma2203; RV32-NEXT:    vsoxei32.v v16, (zero), v28, v0.t2204; RV32-NEXT:    ret2205;2206; RV64-LABEL: vpscatter_nxv16f64:2207; RV64:       # %bb.0:2208; RV64-NEXT:    addi sp, sp, -162209; RV64-NEXT:    .cfi_def_cfa_offset 162210; RV64-NEXT:    csrr a1, vlenb2211; RV64-NEXT:    slli a1, a1, 32212; RV64-NEXT:    sub sp, sp, a12213; RV64-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb2214; RV64-NEXT:    addi a1, sp, 162215; RV64-NEXT:    vs8r.v v16, (a1) # vscale x 64-byte Folded Spill2216; RV64-NEXT:    csrr a1, vlenb2217; RV64-NEXT:    slli a3, a1, 32218; RV64-NEXT:    add a3, a0, a32219; RV64-NEXT:    vl8re64.v v16, (a3)2220; RV64-NEXT:    vl8re64.v v24, (a0)2221; RV64-NEXT:    mv a0, a22222; RV64-NEXT:    bltu a2, a1, .LBB108_22223; RV64-NEXT:  # %bb.1:2224; RV64-NEXT:    mv a0, a12225; RV64-NEXT:  .LBB108_2:2226; RV64-NEXT:    vsetvli zero, a0, e64, m8, ta, ma2227; RV64-NEXT:    vsoxei64.v v8, (zero), v24, v0.t2228; RV64-NEXT:    sub a0, a2, a12229; RV64-NEXT:    srli a1, a1, 32230; RV64-NEXT:    sltu a2, a2, a02231; RV64-NEXT:    addi a2, a2, -12232; RV64-NEXT:    vsetvli a3, zero, e8, mf4, ta, ma2233; RV64-NEXT:    vslidedown.vx v0, v0, a12234; RV64-NEXT:    and a0, a2, a02235; RV64-NEXT:    addi a1, sp, 162236; RV64-NEXT:    vl8r.v v8, (a1) # vscale x 64-byte Folded Reload2237; RV64-NEXT:    vsetvli zero, a0, e64, m8, ta, ma2238; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t2239; RV64-NEXT:    csrr a0, vlenb2240; RV64-NEXT:    slli a0, a0, 32241; RV64-NEXT:    add sp, sp, a02242; RV64-NEXT:    .cfi_def_cfa sp, 162243; RV64-NEXT:    addi sp, sp, 162244; RV64-NEXT:    .cfi_def_cfa_offset 02245; RV64-NEXT:    ret2246  call void @llvm.vp.scatter.nxv16f64.nxv16p0(<vscale x 16 x double> %val, <vscale x 16 x ptr> %ptrs, <vscale x 16 x i1> %m, i32 %evl)2247  ret void2248}2249 2250define void @vpscatter_baseidx_nxv16i16_nxv16f64(<vscale x 16 x double> %val, ptr %base, <vscale x 16 x i16> %idxs, <vscale x 16 x i1> %m, i32 zeroext %evl) {2251; RV32-LABEL: vpscatter_baseidx_nxv16i16_nxv16f64:2252; RV32:       # %bb.0:2253; RV32-NEXT:    vl4re16.v v4, (a1)2254; RV32-NEXT:    li a3, 82255; RV32-NEXT:    csrr a1, vlenb2256; RV32-NEXT:    vsetvli a4, zero, e16, m4, ta, ma2257; RV32-NEXT:    vwmulsu.vx v24, v4, a32258; RV32-NEXT:    mv a3, a22259; RV32-NEXT:    bltu a2, a1, .LBB109_22260; RV32-NEXT:  # %bb.1:2261; RV32-NEXT:    mv a3, a12262; RV32-NEXT:  .LBB109_2:2263; RV32-NEXT:    vsetvli zero, a3, e64, m8, ta, ma2264; RV32-NEXT:    vsoxei32.v v8, (a0), v24, v0.t2265; RV32-NEXT:    sub a3, a2, a12266; RV32-NEXT:    srli a1, a1, 32267; RV32-NEXT:    sltu a2, a2, a32268; RV32-NEXT:    addi a2, a2, -12269; RV32-NEXT:    vsetvli a4, zero, e8, mf4, ta, ma2270; RV32-NEXT:    vslidedown.vx v0, v0, a12271; RV32-NEXT:    and a2, a2, a32272; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma2273; RV32-NEXT:    vsoxei32.v v16, (a0), v28, v0.t2274; RV32-NEXT:    ret2275;2276; RV64-LABEL: vpscatter_baseidx_nxv16i16_nxv16f64:2277; RV64:       # %bb.0:2278; RV64-NEXT:    addi sp, sp, -162279; RV64-NEXT:    .cfi_def_cfa_offset 162280; RV64-NEXT:    csrr a3, vlenb2281; RV64-NEXT:    slli a3, a3, 32282; RV64-NEXT:    sub sp, sp, a32283; RV64-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb2284; RV64-NEXT:    addi a3, sp, 162285; RV64-NEXT:    vs8r.v v16, (a3) # vscale x 64-byte Folded Spill2286; RV64-NEXT:    vl4re16.v v4, (a1)2287; RV64-NEXT:    csrr a1, vlenb2288; RV64-NEXT:    vsetvli a3, zero, e64, m8, ta, ma2289; RV64-NEXT:    vsext.vf4 v16, v62290; RV64-NEXT:    vsll.vi v16, v16, 32291; RV64-NEXT:    vsext.vf4 v24, v42292; RV64-NEXT:    vsll.vi v24, v24, 32293; RV64-NEXT:    mv a3, a22294; RV64-NEXT:    bltu a2, a1, .LBB109_22295; RV64-NEXT:  # %bb.1:2296; RV64-NEXT:    mv a3, a12297; RV64-NEXT:  .LBB109_2:2298; RV64-NEXT:    vsetvli zero, a3, e64, m8, ta, ma2299; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t2300; RV64-NEXT:    sub a3, a2, a12301; RV64-NEXT:    srli a1, a1, 32302; RV64-NEXT:    sltu a2, a2, a32303; RV64-NEXT:    addi a2, a2, -12304; RV64-NEXT:    vsetvli a4, zero, e8, mf4, ta, ma2305; RV64-NEXT:    vslidedown.vx v0, v0, a12306; RV64-NEXT:    and a2, a2, a32307; RV64-NEXT:    addi a1, sp, 162308; RV64-NEXT:    vl8r.v v8, (a1) # vscale x 64-byte Folded Reload2309; RV64-NEXT:    vsetvli zero, a2, e64, m8, ta, ma2310; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t2311; RV64-NEXT:    csrr a0, vlenb2312; RV64-NEXT:    slli a0, a0, 32313; RV64-NEXT:    add sp, sp, a02314; RV64-NEXT:    .cfi_def_cfa sp, 162315; RV64-NEXT:    addi sp, sp, 162316; RV64-NEXT:    .cfi_def_cfa_offset 02317; RV64-NEXT:    ret2318  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 16 x i16> %idxs2319  call void @llvm.vp.scatter.nxv16f64.nxv16p0(<vscale x 16 x double> %val, <vscale x 16 x ptr> %ptrs, <vscale x 16 x i1> %m, i32 %evl)2320  ret void2321}2322 2323define void @vpscatter_baseidx_sext_nxv16i16_nxv16f64(<vscale x 16 x double> %val, ptr %base, <vscale x 16 x i16> %idxs, <vscale x 16 x i1> %m, i32 zeroext %evl) {2324; RV32-LABEL: vpscatter_baseidx_sext_nxv16i16_nxv16f64:2325; RV32:       # %bb.0:2326; RV32-NEXT:    vl4re16.v v4, (a1)2327; RV32-NEXT:    li a3, 82328; RV32-NEXT:    csrr a1, vlenb2329; RV32-NEXT:    vsetvli a4, zero, e16, m4, ta, ma2330; RV32-NEXT:    vwmulsu.vx v24, v4, a32331; RV32-NEXT:    mv a3, a22332; RV32-NEXT:    bltu a2, a1, .LBB110_22333; RV32-NEXT:  # %bb.1:2334; RV32-NEXT:    mv a3, a12335; RV32-NEXT:  .LBB110_2:2336; RV32-NEXT:    vsetvli zero, a3, e64, m8, ta, ma2337; RV32-NEXT:    vsoxei32.v v8, (a0), v24, v0.t2338; RV32-NEXT:    sub a3, a2, a12339; RV32-NEXT:    srli a1, a1, 32340; RV32-NEXT:    sltu a2, a2, a32341; RV32-NEXT:    addi a2, a2, -12342; RV32-NEXT:    vsetvli a4, zero, e8, mf4, ta, ma2343; RV32-NEXT:    vslidedown.vx v0, v0, a12344; RV32-NEXT:    and a2, a2, a32345; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma2346; RV32-NEXT:    vsoxei32.v v16, (a0), v28, v0.t2347; RV32-NEXT:    ret2348;2349; RV64-LABEL: vpscatter_baseidx_sext_nxv16i16_nxv16f64:2350; RV64:       # %bb.0:2351; RV64-NEXT:    addi sp, sp, -162352; RV64-NEXT:    .cfi_def_cfa_offset 162353; RV64-NEXT:    csrr a3, vlenb2354; RV64-NEXT:    slli a3, a3, 32355; RV64-NEXT:    sub sp, sp, a32356; RV64-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb2357; RV64-NEXT:    addi a3, sp, 162358; RV64-NEXT:    vs8r.v v16, (a3) # vscale x 64-byte Folded Spill2359; RV64-NEXT:    vl4re16.v v4, (a1)2360; RV64-NEXT:    csrr a1, vlenb2361; RV64-NEXT:    vsetvli a3, zero, e64, m8, ta, ma2362; RV64-NEXT:    vsext.vf4 v16, v62363; RV64-NEXT:    vsll.vi v16, v16, 32364; RV64-NEXT:    vsext.vf4 v24, v42365; RV64-NEXT:    vsll.vi v24, v24, 32366; RV64-NEXT:    mv a3, a22367; RV64-NEXT:    bltu a2, a1, .LBB110_22368; RV64-NEXT:  # %bb.1:2369; RV64-NEXT:    mv a3, a12370; RV64-NEXT:  .LBB110_2:2371; RV64-NEXT:    vsetvli zero, a3, e64, m8, ta, ma2372; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t2373; RV64-NEXT:    sub a3, a2, a12374; RV64-NEXT:    srli a1, a1, 32375; RV64-NEXT:    sltu a2, a2, a32376; RV64-NEXT:    addi a2, a2, -12377; RV64-NEXT:    vsetvli a4, zero, e8, mf4, ta, ma2378; RV64-NEXT:    vslidedown.vx v0, v0, a12379; RV64-NEXT:    and a2, a2, a32380; RV64-NEXT:    addi a1, sp, 162381; RV64-NEXT:    vl8r.v v8, (a1) # vscale x 64-byte Folded Reload2382; RV64-NEXT:    vsetvli zero, a2, e64, m8, ta, ma2383; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t2384; RV64-NEXT:    csrr a0, vlenb2385; RV64-NEXT:    slli a0, a0, 32386; RV64-NEXT:    add sp, sp, a02387; RV64-NEXT:    .cfi_def_cfa sp, 162388; RV64-NEXT:    addi sp, sp, 162389; RV64-NEXT:    .cfi_def_cfa_offset 02390; RV64-NEXT:    ret2391  %eidxs = sext <vscale x 16 x i16> %idxs to <vscale x 16 x i64>2392  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 16 x i64> %eidxs2393  call void @llvm.vp.scatter.nxv16f64.nxv16p0(<vscale x 16 x double> %val, <vscale x 16 x ptr> %ptrs, <vscale x 16 x i1> %m, i32 %evl)2394  ret void2395}2396 2397define void @vpscatter_baseidx_zext_nxv16i16_nxv16f64(<vscale x 16 x double> %val, ptr %base, <vscale x 16 x i16> %idxs, <vscale x 16 x i1> %m, i32 zeroext %evl) {2398; RV32-LABEL: vpscatter_baseidx_zext_nxv16i16_nxv16f64:2399; RV32:       # %bb.0:2400; RV32-NEXT:    vl4re16.v v4, (a1)2401; RV32-NEXT:    li a3, 82402; RV32-NEXT:    csrr a1, vlenb2403; RV32-NEXT:    vsetvli a4, zero, e16, m4, ta, ma2404; RV32-NEXT:    vwmulu.vx v24, v4, a32405; RV32-NEXT:    mv a3, a22406; RV32-NEXT:    bltu a2, a1, .LBB111_22407; RV32-NEXT:  # %bb.1:2408; RV32-NEXT:    mv a3, a12409; RV32-NEXT:  .LBB111_2:2410; RV32-NEXT:    vsetvli zero, a3, e64, m8, ta, ma2411; RV32-NEXT:    vsoxei32.v v8, (a0), v24, v0.t2412; RV32-NEXT:    sub a3, a2, a12413; RV32-NEXT:    srli a1, a1, 32414; RV32-NEXT:    sltu a2, a2, a32415; RV32-NEXT:    addi a2, a2, -12416; RV32-NEXT:    vsetvli a4, zero, e8, mf4, ta, ma2417; RV32-NEXT:    vslidedown.vx v0, v0, a12418; RV32-NEXT:    and a2, a2, a32419; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma2420; RV32-NEXT:    vsoxei32.v v16, (a0), v28, v0.t2421; RV32-NEXT:    ret2422;2423; RV64-LABEL: vpscatter_baseidx_zext_nxv16i16_nxv16f64:2424; RV64:       # %bb.0:2425; RV64-NEXT:    vl4re16.v v4, (a1)2426; RV64-NEXT:    li a3, 82427; RV64-NEXT:    csrr a1, vlenb2428; RV64-NEXT:    vsetvli a4, zero, e16, m4, ta, ma2429; RV64-NEXT:    vwmulu.vx v24, v4, a32430; RV64-NEXT:    mv a3, a22431; RV64-NEXT:    bltu a2, a1, .LBB111_22432; RV64-NEXT:  # %bb.1:2433; RV64-NEXT:    mv a3, a12434; RV64-NEXT:  .LBB111_2:2435; RV64-NEXT:    vsetvli zero, a3, e64, m8, ta, ma2436; RV64-NEXT:    vsoxei32.v v8, (a0), v24, v0.t2437; RV64-NEXT:    sub a3, a2, a12438; RV64-NEXT:    srli a1, a1, 32439; RV64-NEXT:    sltu a2, a2, a32440; RV64-NEXT:    addi a2, a2, -12441; RV64-NEXT:    vsetvli a4, zero, e8, mf4, ta, ma2442; RV64-NEXT:    vslidedown.vx v0, v0, a12443; RV64-NEXT:    and a2, a2, a32444; RV64-NEXT:    vsetvli zero, a2, e64, m8, ta, ma2445; RV64-NEXT:    vsoxei32.v v16, (a0), v28, v0.t2446; RV64-NEXT:    ret2447  %eidxs = zext <vscale x 16 x i16> %idxs to <vscale x 16 x i64>2448  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 16 x i64> %eidxs2449  call void @llvm.vp.scatter.nxv16f64.nxv16p0(<vscale x 16 x double> %val, <vscale x 16 x ptr> %ptrs, <vscale x 16 x i1> %m, i32 %evl)2450  ret void2451}2452