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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <vscale x 1 x i8> @vrsub_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vrsub_vx_nxv1i8:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma11; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t12; CHECK-NEXT: ret13 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 014 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer15 %v = call <vscale x 1 x i8> @llvm.vp.sub.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 %evl)16 ret <vscale x 1 x i8> %v17}18 19define <vscale x 1 x i8> @vrsub_vx_nxv1i8_unmasked(<vscale x 1 x i8> %va, i8 %b, i32 zeroext %evl) {20; CHECK-LABEL: vrsub_vx_nxv1i8_unmasked:21; CHECK: # %bb.0:22; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma23; CHECK-NEXT: vrsub.vx v8, v8, a024; CHECK-NEXT: ret25 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 026 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer27 %v = call <vscale x 1 x i8> @llvm.vp.sub.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)28 ret <vscale x 1 x i8> %v29}30 31define <vscale x 1 x i8> @vrsub_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {32; CHECK-LABEL: vrsub_vi_nxv1i8:33; CHECK: # %bb.0:34; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma35; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t36; CHECK-NEXT: ret37 %v = call <vscale x 1 x i8> @llvm.vp.sub.nxv1i8(<vscale x 1 x i8> splat (i8 2), <vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 %evl)38 ret <vscale x 1 x i8> %v39}40 41define <vscale x 1 x i8> @vrsub_vi_nxv1i8_unmasked(<vscale x 1 x i8> %va, i32 zeroext %evl) {42; CHECK-LABEL: vrsub_vi_nxv1i8_unmasked:43; CHECK: # %bb.0:44; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma45; CHECK-NEXT: vrsub.vi v8, v8, 246; CHECK-NEXT: ret47 %v = call <vscale x 1 x i8> @llvm.vp.sub.nxv1i8(<vscale x 1 x i8> splat (i8 2), <vscale x 1 x i8> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)48 ret <vscale x 1 x i8> %v49}50 51define <vscale x 2 x i8> @vrsub_vx_nxv2i8(<vscale x 2 x i8> %va, i8 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {52; CHECK-LABEL: vrsub_vx_nxv2i8:53; CHECK: # %bb.0:54; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma55; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t56; CHECK-NEXT: ret57 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 058 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer59 %v = call <vscale x 2 x i8> @llvm.vp.sub.nxv2i8(<vscale x 2 x i8> %vb, <vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 %evl)60 ret <vscale x 2 x i8> %v61}62 63define <vscale x 2 x i8> @vrsub_vx_nxv2i8_unmasked(<vscale x 2 x i8> %va, i8 %b, i32 zeroext %evl) {64; CHECK-LABEL: vrsub_vx_nxv2i8_unmasked:65; CHECK: # %bb.0:66; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma67; CHECK-NEXT: vrsub.vx v8, v8, a068; CHECK-NEXT: ret69 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 070 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer71 %v = call <vscale x 2 x i8> @llvm.vp.sub.nxv2i8(<vscale x 2 x i8> %vb, <vscale x 2 x i8> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)72 ret <vscale x 2 x i8> %v73}74 75define <vscale x 2 x i8> @vrsub_vi_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {76; CHECK-LABEL: vrsub_vi_nxv2i8:77; CHECK: # %bb.0:78; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma79; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t80; CHECK-NEXT: ret81 %v = call <vscale x 2 x i8> @llvm.vp.sub.nxv2i8(<vscale x 2 x i8> splat (i8 2), <vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 %evl)82 ret <vscale x 2 x i8> %v83}84 85define <vscale x 2 x i8> @vrsub_vi_nxv2i8_unmasked(<vscale x 2 x i8> %va, i32 zeroext %evl) {86; CHECK-LABEL: vrsub_vi_nxv2i8_unmasked:87; CHECK: # %bb.0:88; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma89; CHECK-NEXT: vrsub.vi v8, v8, 290; CHECK-NEXT: ret91 %v = call <vscale x 2 x i8> @llvm.vp.sub.nxv2i8(<vscale x 2 x i8> splat (i8 2), <vscale x 2 x i8> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)92 ret <vscale x 2 x i8> %v93}94 95define <vscale x 4 x i8> @vrsub_vx_nxv4i8(<vscale x 4 x i8> %va, i8 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {96; CHECK-LABEL: vrsub_vx_nxv4i8:97; CHECK: # %bb.0:98; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma99; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t100; CHECK-NEXT: ret101 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0102 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer103 %v = call <vscale x 4 x i8> @llvm.vp.sub.nxv4i8(<vscale x 4 x i8> %vb, <vscale x 4 x i8> %va, <vscale x 4 x i1> %m, i32 %evl)104 ret <vscale x 4 x i8> %v105}106 107define <vscale x 4 x i8> @vrsub_vx_nxv4i8_unmasked(<vscale x 4 x i8> %va, i8 %b, i32 zeroext %evl) {108; CHECK-LABEL: vrsub_vx_nxv4i8_unmasked:109; CHECK: # %bb.0:110; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma111; CHECK-NEXT: vrsub.vx v8, v8, a0112; CHECK-NEXT: ret113 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0114 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer115 %v = call <vscale x 4 x i8> @llvm.vp.sub.nxv4i8(<vscale x 4 x i8> %vb, <vscale x 4 x i8> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)116 ret <vscale x 4 x i8> %v117}118 119define <vscale x 4 x i8> @vrsub_vi_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {120; CHECK-LABEL: vrsub_vi_nxv4i8:121; CHECK: # %bb.0:122; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma123; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t124; CHECK-NEXT: ret125 %v = call <vscale x 4 x i8> @llvm.vp.sub.nxv4i8(<vscale x 4 x i8> splat (i8 2), <vscale x 4 x i8> %va, <vscale x 4 x i1> %m, i32 %evl)126 ret <vscale x 4 x i8> %v127}128 129define <vscale x 4 x i8> @vrsub_vi_nxv4i8_unmasked(<vscale x 4 x i8> %va, i32 zeroext %evl) {130; CHECK-LABEL: vrsub_vi_nxv4i8_unmasked:131; CHECK: # %bb.0:132; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma133; CHECK-NEXT: vrsub.vi v8, v8, 2134; CHECK-NEXT: ret135 %v = call <vscale x 4 x i8> @llvm.vp.sub.nxv4i8(<vscale x 4 x i8> splat (i8 2), <vscale x 4 x i8> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)136 ret <vscale x 4 x i8> %v137}138 139define <vscale x 8 x i8> @vrsub_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {140; CHECK-LABEL: vrsub_vx_nxv8i8:141; CHECK: # %bb.0:142; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma143; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t144; CHECK-NEXT: ret145 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0146 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer147 %v = call <vscale x 8 x i8> @llvm.vp.sub.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 %evl)148 ret <vscale x 8 x i8> %v149}150 151define <vscale x 8 x i8> @vrsub_vx_nxv8i8_unmasked(<vscale x 8 x i8> %va, i8 %b, i32 zeroext %evl) {152; CHECK-LABEL: vrsub_vx_nxv8i8_unmasked:153; CHECK: # %bb.0:154; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma155; CHECK-NEXT: vrsub.vx v8, v8, a0156; CHECK-NEXT: ret157 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0158 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer159 %v = call <vscale x 8 x i8> @llvm.vp.sub.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)160 ret <vscale x 8 x i8> %v161}162 163define <vscale x 8 x i8> @vrsub_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {164; CHECK-LABEL: vrsub_vi_nxv8i8:165; CHECK: # %bb.0:166; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma167; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t168; CHECK-NEXT: ret169 %v = call <vscale x 8 x i8> @llvm.vp.sub.nxv8i8(<vscale x 8 x i8> splat (i8 2), <vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 %evl)170 ret <vscale x 8 x i8> %v171}172 173define <vscale x 8 x i8> @vrsub_vi_nxv8i8_unmasked(<vscale x 8 x i8> %va, i32 zeroext %evl) {174; CHECK-LABEL: vrsub_vi_nxv8i8_unmasked:175; CHECK: # %bb.0:176; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma177; CHECK-NEXT: vrsub.vi v8, v8, 2178; CHECK-NEXT: ret179 %v = call <vscale x 8 x i8> @llvm.vp.sub.nxv8i8(<vscale x 8 x i8> splat (i8 2), <vscale x 8 x i8> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)180 ret <vscale x 8 x i8> %v181}182 183define <vscale x 16 x i8> @vrsub_vx_nxv16i8(<vscale x 16 x i8> %va, i8 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {184; CHECK-LABEL: vrsub_vx_nxv16i8:185; CHECK: # %bb.0:186; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma187; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t188; CHECK-NEXT: ret189 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0190 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer191 %v = call <vscale x 16 x i8> @llvm.vp.sub.nxv16i8(<vscale x 16 x i8> %vb, <vscale x 16 x i8> %va, <vscale x 16 x i1> %m, i32 %evl)192 ret <vscale x 16 x i8> %v193}194 195define <vscale x 16 x i8> @vrsub_vx_nxv16i8_unmasked(<vscale x 16 x i8> %va, i8 %b, i32 zeroext %evl) {196; CHECK-LABEL: vrsub_vx_nxv16i8_unmasked:197; CHECK: # %bb.0:198; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma199; CHECK-NEXT: vrsub.vx v8, v8, a0200; CHECK-NEXT: ret201 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0202 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer203 %v = call <vscale x 16 x i8> @llvm.vp.sub.nxv16i8(<vscale x 16 x i8> %vb, <vscale x 16 x i8> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)204 ret <vscale x 16 x i8> %v205}206 207define <vscale x 16 x i8> @vrsub_vi_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {208; CHECK-LABEL: vrsub_vi_nxv16i8:209; CHECK: # %bb.0:210; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma211; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t212; CHECK-NEXT: ret213 %v = call <vscale x 16 x i8> @llvm.vp.sub.nxv16i8(<vscale x 16 x i8> splat (i8 2), <vscale x 16 x i8> %va, <vscale x 16 x i1> %m, i32 %evl)214 ret <vscale x 16 x i8> %v215}216 217define <vscale x 16 x i8> @vrsub_vi_nxv16i8_unmasked(<vscale x 16 x i8> %va, i32 zeroext %evl) {218; CHECK-LABEL: vrsub_vi_nxv16i8_unmasked:219; CHECK: # %bb.0:220; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma221; CHECK-NEXT: vrsub.vi v8, v8, 2222; CHECK-NEXT: ret223 %v = call <vscale x 16 x i8> @llvm.vp.sub.nxv16i8(<vscale x 16 x i8> splat (i8 2), <vscale x 16 x i8> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)224 ret <vscale x 16 x i8> %v225}226 227define <vscale x 32 x i8> @vrsub_vx_nxv32i8(<vscale x 32 x i8> %va, i8 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {228; CHECK-LABEL: vrsub_vx_nxv32i8:229; CHECK: # %bb.0:230; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma231; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t232; CHECK-NEXT: ret233 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0234 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer235 %v = call <vscale x 32 x i8> @llvm.vp.sub.nxv32i8(<vscale x 32 x i8> %vb, <vscale x 32 x i8> %va, <vscale x 32 x i1> %m, i32 %evl)236 ret <vscale x 32 x i8> %v237}238 239define <vscale x 32 x i8> @vrsub_vx_nxv32i8_unmasked(<vscale x 32 x i8> %va, i8 %b, i32 zeroext %evl) {240; CHECK-LABEL: vrsub_vx_nxv32i8_unmasked:241; CHECK: # %bb.0:242; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma243; CHECK-NEXT: vrsub.vx v8, v8, a0244; CHECK-NEXT: ret245 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0246 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer247 %v = call <vscale x 32 x i8> @llvm.vp.sub.nxv32i8(<vscale x 32 x i8> %vb, <vscale x 32 x i8> %va, <vscale x 32 x i1> splat (i1 true), i32 %evl)248 ret <vscale x 32 x i8> %v249}250 251define <vscale x 32 x i8> @vrsub_vi_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {252; CHECK-LABEL: vrsub_vi_nxv32i8:253; CHECK: # %bb.0:254; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma255; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t256; CHECK-NEXT: ret257 %v = call <vscale x 32 x i8> @llvm.vp.sub.nxv32i8(<vscale x 32 x i8> splat (i8 2), <vscale x 32 x i8> %va, <vscale x 32 x i1> %m, i32 %evl)258 ret <vscale x 32 x i8> %v259}260 261define <vscale x 32 x i8> @vrsub_vi_nxv32i8_unmasked(<vscale x 32 x i8> %va, i32 zeroext %evl) {262; CHECK-LABEL: vrsub_vi_nxv32i8_unmasked:263; CHECK: # %bb.0:264; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma265; CHECK-NEXT: vrsub.vi v8, v8, 2266; CHECK-NEXT: ret267 %v = call <vscale x 32 x i8> @llvm.vp.sub.nxv32i8(<vscale x 32 x i8> splat (i8 2), <vscale x 32 x i8> %va, <vscale x 32 x i1> splat (i1 true), i32 %evl)268 ret <vscale x 32 x i8> %v269}270 271define <vscale x 64 x i8> @vrsub_vx_nxv64i8(<vscale x 64 x i8> %va, i8 %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {272; CHECK-LABEL: vrsub_vx_nxv64i8:273; CHECK: # %bb.0:274; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma275; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t276; CHECK-NEXT: ret277 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0278 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer279 %v = call <vscale x 64 x i8> @llvm.vp.sub.nxv64i8(<vscale x 64 x i8> %vb, <vscale x 64 x i8> %va, <vscale x 64 x i1> %m, i32 %evl)280 ret <vscale x 64 x i8> %v281}282 283define <vscale x 64 x i8> @vrsub_vx_nxv64i8_unmasked(<vscale x 64 x i8> %va, i8 %b, i32 zeroext %evl) {284; CHECK-LABEL: vrsub_vx_nxv64i8_unmasked:285; CHECK: # %bb.0:286; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma287; CHECK-NEXT: vrsub.vx v8, v8, a0288; CHECK-NEXT: ret289 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0290 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer291 %v = call <vscale x 64 x i8> @llvm.vp.sub.nxv64i8(<vscale x 64 x i8> %vb, <vscale x 64 x i8> %va, <vscale x 64 x i1> splat (i1 true), i32 %evl)292 ret <vscale x 64 x i8> %v293}294 295define <vscale x 64 x i8> @vrsub_vi_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i1> %m, i32 zeroext %evl) {296; CHECK-LABEL: vrsub_vi_nxv64i8:297; CHECK: # %bb.0:298; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma299; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t300; CHECK-NEXT: ret301 %v = call <vscale x 64 x i8> @llvm.vp.sub.nxv64i8(<vscale x 64 x i8> splat (i8 2), <vscale x 64 x i8> %va, <vscale x 64 x i1> %m, i32 %evl)302 ret <vscale x 64 x i8> %v303}304 305define <vscale x 64 x i8> @vrsub_vi_nxv64i8_unmasked(<vscale x 64 x i8> %va, i32 zeroext %evl) {306; CHECK-LABEL: vrsub_vi_nxv64i8_unmasked:307; CHECK: # %bb.0:308; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma309; CHECK-NEXT: vrsub.vi v8, v8, 2310; CHECK-NEXT: ret311 %v = call <vscale x 64 x i8> @llvm.vp.sub.nxv64i8(<vscale x 64 x i8> splat (i8 2), <vscale x 64 x i8> %va, <vscale x 64 x i1> splat (i1 true), i32 %evl)312 ret <vscale x 64 x i8> %v313}314 315define <vscale x 1 x i16> @vrsub_vx_nxv1i16(<vscale x 1 x i16> %va, i16 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {316; CHECK-LABEL: vrsub_vx_nxv1i16:317; CHECK: # %bb.0:318; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma319; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t320; CHECK-NEXT: ret321 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0322 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer323 %v = call <vscale x 1 x i16> @llvm.vp.sub.nxv1i16(<vscale x 1 x i16> %vb, <vscale x 1 x i16> %va, <vscale x 1 x i1> %m, i32 %evl)324 ret <vscale x 1 x i16> %v325}326 327define <vscale x 1 x i16> @vrsub_vx_nxv1i16_unmasked(<vscale x 1 x i16> %va, i16 %b, i32 zeroext %evl) {328; CHECK-LABEL: vrsub_vx_nxv1i16_unmasked:329; CHECK: # %bb.0:330; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma331; CHECK-NEXT: vrsub.vx v8, v8, a0332; CHECK-NEXT: ret333 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0334 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer335 %v = call <vscale x 1 x i16> @llvm.vp.sub.nxv1i16(<vscale x 1 x i16> %vb, <vscale x 1 x i16> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)336 ret <vscale x 1 x i16> %v337}338 339define <vscale x 1 x i16> @vrsub_vi_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {340; CHECK-LABEL: vrsub_vi_nxv1i16:341; CHECK: # %bb.0:342; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma343; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t344; CHECK-NEXT: ret345 %v = call <vscale x 1 x i16> @llvm.vp.sub.nxv1i16(<vscale x 1 x i16> splat (i16 2), <vscale x 1 x i16> %va, <vscale x 1 x i1> %m, i32 %evl)346 ret <vscale x 1 x i16> %v347}348 349define <vscale x 1 x i16> @vrsub_vi_nxv1i16_unmasked(<vscale x 1 x i16> %va, i32 zeroext %evl) {350; CHECK-LABEL: vrsub_vi_nxv1i16_unmasked:351; CHECK: # %bb.0:352; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma353; CHECK-NEXT: vrsub.vi v8, v8, 2354; CHECK-NEXT: ret355 %v = call <vscale x 1 x i16> @llvm.vp.sub.nxv1i16(<vscale x 1 x i16> splat (i16 2), <vscale x 1 x i16> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)356 ret <vscale x 1 x i16> %v357}358 359define <vscale x 2 x i16> @vrsub_vx_nxv2i16(<vscale x 2 x i16> %va, i16 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {360; CHECK-LABEL: vrsub_vx_nxv2i16:361; CHECK: # %bb.0:362; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma363; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t364; CHECK-NEXT: ret365 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0366 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer367 %v = call <vscale x 2 x i16> @llvm.vp.sub.nxv2i16(<vscale x 2 x i16> %vb, <vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 %evl)368 ret <vscale x 2 x i16> %v369}370 371define <vscale x 2 x i16> @vrsub_vx_nxv2i16_unmasked(<vscale x 2 x i16> %va, i16 %b, i32 zeroext %evl) {372; CHECK-LABEL: vrsub_vx_nxv2i16_unmasked:373; CHECK: # %bb.0:374; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma375; CHECK-NEXT: vrsub.vx v8, v8, a0376; CHECK-NEXT: ret377 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0378 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer379 %v = call <vscale x 2 x i16> @llvm.vp.sub.nxv2i16(<vscale x 2 x i16> %vb, <vscale x 2 x i16> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)380 ret <vscale x 2 x i16> %v381}382 383define <vscale x 2 x i16> @vrsub_vi_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {384; CHECK-LABEL: vrsub_vi_nxv2i16:385; CHECK: # %bb.0:386; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma387; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t388; CHECK-NEXT: ret389 %v = call <vscale x 2 x i16> @llvm.vp.sub.nxv2i16(<vscale x 2 x i16> splat (i16 2), <vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 %evl)390 ret <vscale x 2 x i16> %v391}392 393define <vscale x 2 x i16> @vrsub_vi_nxv2i16_unmasked(<vscale x 2 x i16> %va, i32 zeroext %evl) {394; CHECK-LABEL: vrsub_vi_nxv2i16_unmasked:395; CHECK: # %bb.0:396; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma397; CHECK-NEXT: vrsub.vi v8, v8, 2398; CHECK-NEXT: ret399 %v = call <vscale x 2 x i16> @llvm.vp.sub.nxv2i16(<vscale x 2 x i16> splat (i16 2), <vscale x 2 x i16> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)400 ret <vscale x 2 x i16> %v401}402 403define <vscale x 4 x i16> @vrsub_vx_nxv4i16(<vscale x 4 x i16> %va, i16 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {404; CHECK-LABEL: vrsub_vx_nxv4i16:405; CHECK: # %bb.0:406; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma407; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t408; CHECK-NEXT: ret409 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0410 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer411 %v = call <vscale x 4 x i16> @llvm.vp.sub.nxv4i16(<vscale x 4 x i16> %vb, <vscale x 4 x i16> %va, <vscale x 4 x i1> %m, i32 %evl)412 ret <vscale x 4 x i16> %v413}414 415define <vscale x 4 x i16> @vrsub_vx_nxv4i16_unmasked(<vscale x 4 x i16> %va, i16 %b, i32 zeroext %evl) {416; CHECK-LABEL: vrsub_vx_nxv4i16_unmasked:417; CHECK: # %bb.0:418; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma419; CHECK-NEXT: vrsub.vx v8, v8, a0420; CHECK-NEXT: ret421 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0422 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer423 %v = call <vscale x 4 x i16> @llvm.vp.sub.nxv4i16(<vscale x 4 x i16> %vb, <vscale x 4 x i16> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)424 ret <vscale x 4 x i16> %v425}426 427define <vscale x 4 x i16> @vrsub_vi_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {428; CHECK-LABEL: vrsub_vi_nxv4i16:429; CHECK: # %bb.0:430; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma431; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t432; CHECK-NEXT: ret433 %v = call <vscale x 4 x i16> @llvm.vp.sub.nxv4i16(<vscale x 4 x i16> splat (i16 2), <vscale x 4 x i16> %va, <vscale x 4 x i1> %m, i32 %evl)434 ret <vscale x 4 x i16> %v435}436 437define <vscale x 4 x i16> @vrsub_vi_nxv4i16_unmasked(<vscale x 4 x i16> %va, i32 zeroext %evl) {438; CHECK-LABEL: vrsub_vi_nxv4i16_unmasked:439; CHECK: # %bb.0:440; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma441; CHECK-NEXT: vrsub.vi v8, v8, 2442; CHECK-NEXT: ret443 %v = call <vscale x 4 x i16> @llvm.vp.sub.nxv4i16(<vscale x 4 x i16> splat (i16 2), <vscale x 4 x i16> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)444 ret <vscale x 4 x i16> %v445}446 447define <vscale x 8 x i16> @vrsub_vx_nxv8i16(<vscale x 8 x i16> %va, i16 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {448; CHECK-LABEL: vrsub_vx_nxv8i16:449; CHECK: # %bb.0:450; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma451; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t452; CHECK-NEXT: ret453 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0454 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer455 %v = call <vscale x 8 x i16> @llvm.vp.sub.nxv8i16(<vscale x 8 x i16> %vb, <vscale x 8 x i16> %va, <vscale x 8 x i1> %m, i32 %evl)456 ret <vscale x 8 x i16> %v457}458 459define <vscale x 8 x i16> @vrsub_vx_nxv8i16_unmasked(<vscale x 8 x i16> %va, i16 %b, i32 zeroext %evl) {460; CHECK-LABEL: vrsub_vx_nxv8i16_unmasked:461; CHECK: # %bb.0:462; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma463; CHECK-NEXT: vrsub.vx v8, v8, a0464; CHECK-NEXT: ret465 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0466 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer467 %v = call <vscale x 8 x i16> @llvm.vp.sub.nxv8i16(<vscale x 8 x i16> %vb, <vscale x 8 x i16> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)468 ret <vscale x 8 x i16> %v469}470 471define <vscale x 8 x i16> @vrsub_vi_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {472; CHECK-LABEL: vrsub_vi_nxv8i16:473; CHECK: # %bb.0:474; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma475; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t476; CHECK-NEXT: ret477 %v = call <vscale x 8 x i16> @llvm.vp.sub.nxv8i16(<vscale x 8 x i16> splat (i16 2), <vscale x 8 x i16> %va, <vscale x 8 x i1> %m, i32 %evl)478 ret <vscale x 8 x i16> %v479}480 481define <vscale x 8 x i16> @vrsub_vi_nxv8i16_unmasked(<vscale x 8 x i16> %va, i32 zeroext %evl) {482; CHECK-LABEL: vrsub_vi_nxv8i16_unmasked:483; CHECK: # %bb.0:484; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma485; CHECK-NEXT: vrsub.vi v8, v8, 2486; CHECK-NEXT: ret487 %v = call <vscale x 8 x i16> @llvm.vp.sub.nxv8i16(<vscale x 8 x i16> splat (i16 2), <vscale x 8 x i16> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)488 ret <vscale x 8 x i16> %v489}490 491define <vscale x 16 x i16> @vrsub_vx_nxv16i16(<vscale x 16 x i16> %va, i16 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {492; CHECK-LABEL: vrsub_vx_nxv16i16:493; CHECK: # %bb.0:494; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma495; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t496; CHECK-NEXT: ret497 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0498 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer499 %v = call <vscale x 16 x i16> @llvm.vp.sub.nxv16i16(<vscale x 16 x i16> %vb, <vscale x 16 x i16> %va, <vscale x 16 x i1> %m, i32 %evl)500 ret <vscale x 16 x i16> %v501}502 503define <vscale x 16 x i16> @vrsub_vx_nxv16i16_unmasked(<vscale x 16 x i16> %va, i16 %b, i32 zeroext %evl) {504; CHECK-LABEL: vrsub_vx_nxv16i16_unmasked:505; CHECK: # %bb.0:506; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma507; CHECK-NEXT: vrsub.vx v8, v8, a0508; CHECK-NEXT: ret509 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0510 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer511 %v = call <vscale x 16 x i16> @llvm.vp.sub.nxv16i16(<vscale x 16 x i16> %vb, <vscale x 16 x i16> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)512 ret <vscale x 16 x i16> %v513}514 515define <vscale x 16 x i16> @vrsub_vi_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {516; CHECK-LABEL: vrsub_vi_nxv16i16:517; CHECK: # %bb.0:518; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma519; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t520; CHECK-NEXT: ret521 %v = call <vscale x 16 x i16> @llvm.vp.sub.nxv16i16(<vscale x 16 x i16> splat (i16 2), <vscale x 16 x i16> %va, <vscale x 16 x i1> %m, i32 %evl)522 ret <vscale x 16 x i16> %v523}524 525define <vscale x 16 x i16> @vrsub_vi_nxv16i16_unmasked(<vscale x 16 x i16> %va, i32 zeroext %evl) {526; CHECK-LABEL: vrsub_vi_nxv16i16_unmasked:527; CHECK: # %bb.0:528; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma529; CHECK-NEXT: vrsub.vi v8, v8, 2530; CHECK-NEXT: ret531 %v = call <vscale x 16 x i16> @llvm.vp.sub.nxv16i16(<vscale x 16 x i16> splat (i16 2), <vscale x 16 x i16> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)532 ret <vscale x 16 x i16> %v533}534 535define <vscale x 32 x i16> @vrsub_vx_nxv32i16(<vscale x 32 x i16> %va, i16 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {536; CHECK-LABEL: vrsub_vx_nxv32i16:537; CHECK: # %bb.0:538; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma539; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t540; CHECK-NEXT: ret541 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0542 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer543 %v = call <vscale x 32 x i16> @llvm.vp.sub.nxv32i16(<vscale x 32 x i16> %vb, <vscale x 32 x i16> %va, <vscale x 32 x i1> %m, i32 %evl)544 ret <vscale x 32 x i16> %v545}546 547define <vscale x 32 x i16> @vrsub_vx_nxv32i16_unmasked(<vscale x 32 x i16> %va, i16 %b, i32 zeroext %evl) {548; CHECK-LABEL: vrsub_vx_nxv32i16_unmasked:549; CHECK: # %bb.0:550; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma551; CHECK-NEXT: vrsub.vx v8, v8, a0552; CHECK-NEXT: ret553 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0554 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer555 %v = call <vscale x 32 x i16> @llvm.vp.sub.nxv32i16(<vscale x 32 x i16> %vb, <vscale x 32 x i16> %va, <vscale x 32 x i1> splat (i1 true), i32 %evl)556 ret <vscale x 32 x i16> %v557}558 559define <vscale x 32 x i16> @vrsub_vi_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {560; CHECK-LABEL: vrsub_vi_nxv32i16:561; CHECK: # %bb.0:562; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma563; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t564; CHECK-NEXT: ret565 %v = call <vscale x 32 x i16> @llvm.vp.sub.nxv32i16(<vscale x 32 x i16> splat (i16 2), <vscale x 32 x i16> %va, <vscale x 32 x i1> %m, i32 %evl)566 ret <vscale x 32 x i16> %v567}568 569define <vscale x 32 x i16> @vrsub_vi_nxv32i16_unmasked(<vscale x 32 x i16> %va, i32 zeroext %evl) {570; CHECK-LABEL: vrsub_vi_nxv32i16_unmasked:571; CHECK: # %bb.0:572; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma573; CHECK-NEXT: vrsub.vi v8, v8, 2574; CHECK-NEXT: ret575 %v = call <vscale x 32 x i16> @llvm.vp.sub.nxv32i16(<vscale x 32 x i16> splat (i16 2), <vscale x 32 x i16> %va, <vscale x 32 x i1> splat (i1 true), i32 %evl)576 ret <vscale x 32 x i16> %v577}578 579define <vscale x 1 x i32> @vrsub_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {580; CHECK-LABEL: vrsub_vx_nxv1i32:581; CHECK: # %bb.0:582; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma583; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t584; CHECK-NEXT: ret585 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0586 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer587 %v = call <vscale x 1 x i32> @llvm.vp.sub.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 %evl)588 ret <vscale x 1 x i32> %v589}590 591define <vscale x 1 x i32> @vrsub_vx_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 %b, i32 zeroext %evl) {592; CHECK-LABEL: vrsub_vx_nxv1i32_unmasked:593; CHECK: # %bb.0:594; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma595; CHECK-NEXT: vrsub.vx v8, v8, a0596; CHECK-NEXT: ret597 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0598 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer599 %v = call <vscale x 1 x i32> @llvm.vp.sub.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)600 ret <vscale x 1 x i32> %v601}602 603define <vscale x 1 x i32> @vrsub_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {604; CHECK-LABEL: vrsub_vi_nxv1i32:605; CHECK: # %bb.0:606; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma607; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t608; CHECK-NEXT: ret609 %v = call <vscale x 1 x i32> @llvm.vp.sub.nxv1i32(<vscale x 1 x i32> splat (i32 2), <vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 %evl)610 ret <vscale x 1 x i32> %v611}612 613define <vscale x 1 x i32> @vrsub_vi_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 zeroext %evl) {614; CHECK-LABEL: vrsub_vi_nxv1i32_unmasked:615; CHECK: # %bb.0:616; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma617; CHECK-NEXT: vrsub.vi v8, v8, 2618; CHECK-NEXT: ret619 %v = call <vscale x 1 x i32> @llvm.vp.sub.nxv1i32(<vscale x 1 x i32> splat (i32 2), <vscale x 1 x i32> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)620 ret <vscale x 1 x i32> %v621}622 623define <vscale x 2 x i32> @vrsub_vx_nxv2i32(<vscale x 2 x i32> %va, i32 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {624; CHECK-LABEL: vrsub_vx_nxv2i32:625; CHECK: # %bb.0:626; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma627; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t628; CHECK-NEXT: ret629 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0630 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer631 %v = call <vscale x 2 x i32> @llvm.vp.sub.nxv2i32(<vscale x 2 x i32> %vb, <vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 %evl)632 ret <vscale x 2 x i32> %v633}634 635define <vscale x 2 x i32> @vrsub_vx_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 %b, i32 zeroext %evl) {636; CHECK-LABEL: vrsub_vx_nxv2i32_unmasked:637; CHECK: # %bb.0:638; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma639; CHECK-NEXT: vrsub.vx v8, v8, a0640; CHECK-NEXT: ret641 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0642 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer643 %v = call <vscale x 2 x i32> @llvm.vp.sub.nxv2i32(<vscale x 2 x i32> %vb, <vscale x 2 x i32> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)644 ret <vscale x 2 x i32> %v645}646 647define <vscale x 2 x i32> @vrsub_vi_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {648; CHECK-LABEL: vrsub_vi_nxv2i32:649; CHECK: # %bb.0:650; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma651; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t652; CHECK-NEXT: ret653 %v = call <vscale x 2 x i32> @llvm.vp.sub.nxv2i32(<vscale x 2 x i32> splat (i32 2), <vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 %evl)654 ret <vscale x 2 x i32> %v655}656 657define <vscale x 2 x i32> @vrsub_vi_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 zeroext %evl) {658; CHECK-LABEL: vrsub_vi_nxv2i32_unmasked:659; CHECK: # %bb.0:660; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma661; CHECK-NEXT: vrsub.vi v8, v8, 2662; CHECK-NEXT: ret663 %v = call <vscale x 2 x i32> @llvm.vp.sub.nxv2i32(<vscale x 2 x i32> splat (i32 2), <vscale x 2 x i32> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)664 ret <vscale x 2 x i32> %v665}666 667define <vscale x 4 x i32> @vrsub_vx_nxv4i32(<vscale x 4 x i32> %va, i32 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {668; CHECK-LABEL: vrsub_vx_nxv4i32:669; CHECK: # %bb.0:670; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma671; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t672; CHECK-NEXT: ret673 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0674 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer675 %v = call <vscale x 4 x i32> @llvm.vp.sub.nxv4i32(<vscale x 4 x i32> %vb, <vscale x 4 x i32> %va, <vscale x 4 x i1> %m, i32 %evl)676 ret <vscale x 4 x i32> %v677}678 679define <vscale x 4 x i32> @vrsub_vx_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 %b, i32 zeroext %evl) {680; CHECK-LABEL: vrsub_vx_nxv4i32_unmasked:681; CHECK: # %bb.0:682; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma683; CHECK-NEXT: vrsub.vx v8, v8, a0684; CHECK-NEXT: ret685 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0686 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer687 %v = call <vscale x 4 x i32> @llvm.vp.sub.nxv4i32(<vscale x 4 x i32> %vb, <vscale x 4 x i32> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)688 ret <vscale x 4 x i32> %v689}690 691define <vscale x 4 x i32> @vrsub_vi_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {692; CHECK-LABEL: vrsub_vi_nxv4i32:693; CHECK: # %bb.0:694; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma695; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t696; CHECK-NEXT: ret697 %v = call <vscale x 4 x i32> @llvm.vp.sub.nxv4i32(<vscale x 4 x i32> splat (i32 2), <vscale x 4 x i32> %va, <vscale x 4 x i1> %m, i32 %evl)698 ret <vscale x 4 x i32> %v699}700 701define <vscale x 4 x i32> @vrsub_vi_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 zeroext %evl) {702; CHECK-LABEL: vrsub_vi_nxv4i32_unmasked:703; CHECK: # %bb.0:704; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma705; CHECK-NEXT: vrsub.vi v8, v8, 2706; CHECK-NEXT: ret707 %v = call <vscale x 4 x i32> @llvm.vp.sub.nxv4i32(<vscale x 4 x i32> splat (i32 2), <vscale x 4 x i32> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)708 ret <vscale x 4 x i32> %v709}710 711define <vscale x 8 x i32> @vrsub_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {712; CHECK-LABEL: vrsub_vx_nxv8i32:713; CHECK: # %bb.0:714; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma715; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t716; CHECK-NEXT: ret717 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0718 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer719 %v = call <vscale x 8 x i32> @llvm.vp.sub.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 %evl)720 ret <vscale x 8 x i32> %v721}722 723define <vscale x 8 x i32> @vrsub_vx_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 %b, i32 zeroext %evl) {724; CHECK-LABEL: vrsub_vx_nxv8i32_unmasked:725; CHECK: # %bb.0:726; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma727; CHECK-NEXT: vrsub.vx v8, v8, a0728; CHECK-NEXT: ret729 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0730 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer731 %v = call <vscale x 8 x i32> @llvm.vp.sub.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)732 ret <vscale x 8 x i32> %v733}734 735define <vscale x 8 x i32> @vrsub_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {736; CHECK-LABEL: vrsub_vi_nxv8i32:737; CHECK: # %bb.0:738; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma739; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t740; CHECK-NEXT: ret741 %v = call <vscale x 8 x i32> @llvm.vp.sub.nxv8i32(<vscale x 8 x i32> splat (i32 2), <vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 %evl)742 ret <vscale x 8 x i32> %v743}744 745define <vscale x 8 x i32> @vrsub_vi_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 zeroext %evl) {746; CHECK-LABEL: vrsub_vi_nxv8i32_unmasked:747; CHECK: # %bb.0:748; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma749; CHECK-NEXT: vrsub.vi v8, v8, 2750; CHECK-NEXT: ret751 %v = call <vscale x 8 x i32> @llvm.vp.sub.nxv8i32(<vscale x 8 x i32> splat (i32 2), <vscale x 8 x i32> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)752 ret <vscale x 8 x i32> %v753}754 755define <vscale x 16 x i32> @vrsub_vx_nxv16i32(<vscale x 16 x i32> %va, i32 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {756; CHECK-LABEL: vrsub_vx_nxv16i32:757; CHECK: # %bb.0:758; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma759; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t760; CHECK-NEXT: ret761 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 0762 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer763 %v = call <vscale x 16 x i32> @llvm.vp.sub.nxv16i32(<vscale x 16 x i32> %vb, <vscale x 16 x i32> %va, <vscale x 16 x i1> %m, i32 %evl)764 ret <vscale x 16 x i32> %v765}766 767define <vscale x 16 x i32> @vrsub_vx_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 %b, i32 zeroext %evl) {768; CHECK-LABEL: vrsub_vx_nxv16i32_unmasked:769; CHECK: # %bb.0:770; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma771; CHECK-NEXT: vrsub.vx v8, v8, a0772; CHECK-NEXT: ret773 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 0774 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer775 %v = call <vscale x 16 x i32> @llvm.vp.sub.nxv16i32(<vscale x 16 x i32> %vb, <vscale x 16 x i32> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)776 ret <vscale x 16 x i32> %v777}778 779define <vscale x 16 x i32> @vrsub_vi_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {780; CHECK-LABEL: vrsub_vi_nxv16i32:781; CHECK: # %bb.0:782; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma783; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t784; CHECK-NEXT: ret785 %v = call <vscale x 16 x i32> @llvm.vp.sub.nxv16i32(<vscale x 16 x i32> splat (i32 2), <vscale x 16 x i32> %va, <vscale x 16 x i1> %m, i32 %evl)786 ret <vscale x 16 x i32> %v787}788 789define <vscale x 16 x i32> @vrsub_vi_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 zeroext %evl) {790; CHECK-LABEL: vrsub_vi_nxv16i32_unmasked:791; CHECK: # %bb.0:792; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma793; CHECK-NEXT: vrsub.vi v8, v8, 2794; CHECK-NEXT: ret795 %v = call <vscale x 16 x i32> @llvm.vp.sub.nxv16i32(<vscale x 16 x i32> splat (i32 2), <vscale x 16 x i32> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)796 ret <vscale x 16 x i32> %v797}798 799define <vscale x 1 x i64> @vrsub_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {800; RV32-LABEL: vrsub_vx_nxv1i64:801; RV32: # %bb.0:802; RV32-NEXT: addi sp, sp, -16803; RV32-NEXT: .cfi_def_cfa_offset 16804; RV32-NEXT: sw a0, 8(sp)805; RV32-NEXT: sw a1, 12(sp)806; RV32-NEXT: addi a0, sp, 8807; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma808; RV32-NEXT: vlse64.v v9, (a0), zero809; RV32-NEXT: vsub.vv v8, v9, v8, v0.t810; RV32-NEXT: addi sp, sp, 16811; RV32-NEXT: .cfi_def_cfa_offset 0812; RV32-NEXT: ret813;814; RV64-LABEL: vrsub_vx_nxv1i64:815; RV64: # %bb.0:816; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma817; RV64-NEXT: vrsub.vx v8, v8, a0, v0.t818; RV64-NEXT: ret819 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0820 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer821 %v = call <vscale x 1 x i64> @llvm.vp.sub.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 %evl)822 ret <vscale x 1 x i64> %v823}824 825define <vscale x 1 x i64> @vrsub_vx_nxv1i64_unmasked(<vscale x 1 x i64> %va, i64 %b, i32 zeroext %evl) {826; RV32-LABEL: vrsub_vx_nxv1i64_unmasked:827; RV32: # %bb.0:828; RV32-NEXT: addi sp, sp, -16829; RV32-NEXT: .cfi_def_cfa_offset 16830; RV32-NEXT: sw a0, 8(sp)831; RV32-NEXT: sw a1, 12(sp)832; RV32-NEXT: addi a0, sp, 8833; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma834; RV32-NEXT: vlse64.v v9, (a0), zero835; RV32-NEXT: vsub.vv v8, v9, v8836; RV32-NEXT: addi sp, sp, 16837; RV32-NEXT: .cfi_def_cfa_offset 0838; RV32-NEXT: ret839;840; RV64-LABEL: vrsub_vx_nxv1i64_unmasked:841; RV64: # %bb.0:842; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma843; RV64-NEXT: vrsub.vx v8, v8, a0844; RV64-NEXT: ret845 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0846 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer847 %v = call <vscale x 1 x i64> @llvm.vp.sub.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)848 ret <vscale x 1 x i64> %v849}850 851define <vscale x 1 x i64> @vrsub_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {852; CHECK-LABEL: vrsub_vi_nxv1i64:853; CHECK: # %bb.0:854; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma855; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t856; CHECK-NEXT: ret857 %v = call <vscale x 1 x i64> @llvm.vp.sub.nxv1i64(<vscale x 1 x i64> splat (i64 2), <vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 %evl)858 ret <vscale x 1 x i64> %v859}860 861define <vscale x 1 x i64> @vrsub_vi_nxv1i64_unmasked(<vscale x 1 x i64> %va, i32 zeroext %evl) {862; CHECK-LABEL: vrsub_vi_nxv1i64_unmasked:863; CHECK: # %bb.0:864; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma865; CHECK-NEXT: vrsub.vi v8, v8, 2866; CHECK-NEXT: ret867 %v = call <vscale x 1 x i64> @llvm.vp.sub.nxv1i64(<vscale x 1 x i64> splat (i64 2), <vscale x 1 x i64> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)868 ret <vscale x 1 x i64> %v869}870 871define <vscale x 2 x i64> @vrsub_vx_nxv2i64(<vscale x 2 x i64> %va, i64 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {872; RV32-LABEL: vrsub_vx_nxv2i64:873; RV32: # %bb.0:874; RV32-NEXT: addi sp, sp, -16875; RV32-NEXT: .cfi_def_cfa_offset 16876; RV32-NEXT: sw a0, 8(sp)877; RV32-NEXT: sw a1, 12(sp)878; RV32-NEXT: addi a0, sp, 8879; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma880; RV32-NEXT: vlse64.v v10, (a0), zero881; RV32-NEXT: vsub.vv v8, v10, v8, v0.t882; RV32-NEXT: addi sp, sp, 16883; RV32-NEXT: .cfi_def_cfa_offset 0884; RV32-NEXT: ret885;886; RV64-LABEL: vrsub_vx_nxv2i64:887; RV64: # %bb.0:888; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma889; RV64-NEXT: vrsub.vx v8, v8, a0, v0.t890; RV64-NEXT: ret891 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 0892 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer893 %v = call <vscale x 2 x i64> @llvm.vp.sub.nxv2i64(<vscale x 2 x i64> %vb, <vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 %evl)894 ret <vscale x 2 x i64> %v895}896 897define <vscale x 2 x i64> @vrsub_vx_nxv2i64_unmasked(<vscale x 2 x i64> %va, i64 %b, i32 zeroext %evl) {898; RV32-LABEL: vrsub_vx_nxv2i64_unmasked:899; RV32: # %bb.0:900; RV32-NEXT: addi sp, sp, -16901; RV32-NEXT: .cfi_def_cfa_offset 16902; RV32-NEXT: sw a0, 8(sp)903; RV32-NEXT: sw a1, 12(sp)904; RV32-NEXT: addi a0, sp, 8905; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma906; RV32-NEXT: vlse64.v v10, (a0), zero907; RV32-NEXT: vsub.vv v8, v10, v8908; RV32-NEXT: addi sp, sp, 16909; RV32-NEXT: .cfi_def_cfa_offset 0910; RV32-NEXT: ret911;912; RV64-LABEL: vrsub_vx_nxv2i64_unmasked:913; RV64: # %bb.0:914; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma915; RV64-NEXT: vrsub.vx v8, v8, a0916; RV64-NEXT: ret917 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 0918 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer919 %v = call <vscale x 2 x i64> @llvm.vp.sub.nxv2i64(<vscale x 2 x i64> %vb, <vscale x 2 x i64> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)920 ret <vscale x 2 x i64> %v921}922 923define <vscale x 2 x i64> @vrsub_vi_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {924; CHECK-LABEL: vrsub_vi_nxv2i64:925; CHECK: # %bb.0:926; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma927; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t928; CHECK-NEXT: ret929 %v = call <vscale x 2 x i64> @llvm.vp.sub.nxv2i64(<vscale x 2 x i64> splat (i64 2), <vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 %evl)930 ret <vscale x 2 x i64> %v931}932 933define <vscale x 2 x i64> @vrsub_vi_nxv2i64_unmasked(<vscale x 2 x i64> %va, i32 zeroext %evl) {934; CHECK-LABEL: vrsub_vi_nxv2i64_unmasked:935; CHECK: # %bb.0:936; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma937; CHECK-NEXT: vrsub.vi v8, v8, 2938; CHECK-NEXT: ret939 %v = call <vscale x 2 x i64> @llvm.vp.sub.nxv2i64(<vscale x 2 x i64> splat (i64 2), <vscale x 2 x i64> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)940 ret <vscale x 2 x i64> %v941}942 943define <vscale x 4 x i64> @vrsub_vx_nxv4i64(<vscale x 4 x i64> %va, i64 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {944; RV32-LABEL: vrsub_vx_nxv4i64:945; RV32: # %bb.0:946; RV32-NEXT: addi sp, sp, -16947; RV32-NEXT: .cfi_def_cfa_offset 16948; RV32-NEXT: sw a0, 8(sp)949; RV32-NEXT: sw a1, 12(sp)950; RV32-NEXT: addi a0, sp, 8951; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma952; RV32-NEXT: vlse64.v v12, (a0), zero953; RV32-NEXT: vsub.vv v8, v12, v8, v0.t954; RV32-NEXT: addi sp, sp, 16955; RV32-NEXT: .cfi_def_cfa_offset 0956; RV32-NEXT: ret957;958; RV64-LABEL: vrsub_vx_nxv4i64:959; RV64: # %bb.0:960; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma961; RV64-NEXT: vrsub.vx v8, v8, a0, v0.t962; RV64-NEXT: ret963 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 0964 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer965 %v = call <vscale x 4 x i64> @llvm.vp.sub.nxv4i64(<vscale x 4 x i64> %vb, <vscale x 4 x i64> %va, <vscale x 4 x i1> %m, i32 %evl)966 ret <vscale x 4 x i64> %v967}968 969define <vscale x 4 x i64> @vrsub_vx_nxv4i64_unmasked(<vscale x 4 x i64> %va, i64 %b, i32 zeroext %evl) {970; RV32-LABEL: vrsub_vx_nxv4i64_unmasked:971; RV32: # %bb.0:972; RV32-NEXT: addi sp, sp, -16973; RV32-NEXT: .cfi_def_cfa_offset 16974; RV32-NEXT: sw a0, 8(sp)975; RV32-NEXT: sw a1, 12(sp)976; RV32-NEXT: addi a0, sp, 8977; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma978; RV32-NEXT: vlse64.v v12, (a0), zero979; RV32-NEXT: vsub.vv v8, v12, v8980; RV32-NEXT: addi sp, sp, 16981; RV32-NEXT: .cfi_def_cfa_offset 0982; RV32-NEXT: ret983;984; RV64-LABEL: vrsub_vx_nxv4i64_unmasked:985; RV64: # %bb.0:986; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma987; RV64-NEXT: vrsub.vx v8, v8, a0988; RV64-NEXT: ret989 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 0990 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer991 %v = call <vscale x 4 x i64> @llvm.vp.sub.nxv4i64(<vscale x 4 x i64> %vb, <vscale x 4 x i64> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)992 ret <vscale x 4 x i64> %v993}994 995define <vscale x 4 x i64> @vrsub_vi_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {996; CHECK-LABEL: vrsub_vi_nxv4i64:997; CHECK: # %bb.0:998; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma999; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t1000; CHECK-NEXT: ret1001 %v = call <vscale x 4 x i64> @llvm.vp.sub.nxv4i64(<vscale x 4 x i64> splat (i64 2), <vscale x 4 x i64> %va, <vscale x 4 x i1> %m, i32 %evl)1002 ret <vscale x 4 x i64> %v1003}1004 1005define <vscale x 4 x i64> @vrsub_vi_nxv4i64_unmasked(<vscale x 4 x i64> %va, i32 zeroext %evl) {1006; CHECK-LABEL: vrsub_vi_nxv4i64_unmasked:1007; CHECK: # %bb.0:1008; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1009; CHECK-NEXT: vrsub.vi v8, v8, 21010; CHECK-NEXT: ret1011 %v = call <vscale x 4 x i64> @llvm.vp.sub.nxv4i64(<vscale x 4 x i64> splat (i64 2), <vscale x 4 x i64> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)1012 ret <vscale x 4 x i64> %v1013}1014 1015define <vscale x 8 x i64> @vrsub_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1016; RV32-LABEL: vrsub_vx_nxv8i64:1017; RV32: # %bb.0:1018; RV32-NEXT: addi sp, sp, -161019; RV32-NEXT: .cfi_def_cfa_offset 161020; RV32-NEXT: sw a0, 8(sp)1021; RV32-NEXT: sw a1, 12(sp)1022; RV32-NEXT: addi a0, sp, 81023; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1024; RV32-NEXT: vlse64.v v16, (a0), zero1025; RV32-NEXT: vsub.vv v8, v16, v8, v0.t1026; RV32-NEXT: addi sp, sp, 161027; RV32-NEXT: .cfi_def_cfa_offset 01028; RV32-NEXT: ret1029;1030; RV64-LABEL: vrsub_vx_nxv8i64:1031; RV64: # %bb.0:1032; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1033; RV64-NEXT: vrsub.vx v8, v8, a0, v0.t1034; RV64-NEXT: ret1035 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01036 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1037 %v = call <vscale x 8 x i64> @llvm.vp.sub.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 %evl)1038 ret <vscale x 8 x i64> %v1039}1040 1041define <vscale x 8 x i64> @vrsub_vx_nxv8i64_unmasked(<vscale x 8 x i64> %va, i64 %b, i32 zeroext %evl) {1042; RV32-LABEL: vrsub_vx_nxv8i64_unmasked:1043; RV32: # %bb.0:1044; RV32-NEXT: addi sp, sp, -161045; RV32-NEXT: .cfi_def_cfa_offset 161046; RV32-NEXT: sw a0, 8(sp)1047; RV32-NEXT: sw a1, 12(sp)1048; RV32-NEXT: addi a0, sp, 81049; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1050; RV32-NEXT: vlse64.v v16, (a0), zero1051; RV32-NEXT: vsub.vv v8, v16, v81052; RV32-NEXT: addi sp, sp, 161053; RV32-NEXT: .cfi_def_cfa_offset 01054; RV32-NEXT: ret1055;1056; RV64-LABEL: vrsub_vx_nxv8i64_unmasked:1057; RV64: # %bb.0:1058; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1059; RV64-NEXT: vrsub.vx v8, v8, a01060; RV64-NEXT: ret1061 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01062 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1063 %v = call <vscale x 8 x i64> @llvm.vp.sub.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)1064 ret <vscale x 8 x i64> %v1065}1066 1067define <vscale x 8 x i64> @vrsub_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1068; CHECK-LABEL: vrsub_vi_nxv8i64:1069; CHECK: # %bb.0:1070; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1071; CHECK-NEXT: vrsub.vi v8, v8, 2, v0.t1072; CHECK-NEXT: ret1073 %v = call <vscale x 8 x i64> @llvm.vp.sub.nxv8i64(<vscale x 8 x i64> splat (i64 2), <vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 %evl)1074 ret <vscale x 8 x i64> %v1075}1076 1077define <vscale x 8 x i64> @vrsub_vi_nxv8i64_unmasked(<vscale x 8 x i64> %va, i32 zeroext %evl) {1078; CHECK-LABEL: vrsub_vi_nxv8i64_unmasked:1079; CHECK: # %bb.0:1080; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1081; CHECK-NEXT: vrsub.vi v8, v8, 21082; CHECK-NEXT: ret1083 %v = call <vscale x 8 x i64> @llvm.vp.sub.nxv8i64(<vscale x 8 x i64> splat (i64 2), <vscale x 8 x i64> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)1084 ret <vscale x 8 x i64> %v1085}1086