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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <vscale x 8 x i7> @vsll_vx_nxv8i7(<vscale x 8 x i7> %a, i7 signext %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {8; CHECK-LABEL: vsll_vx_nxv8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma11; CHECK-NEXT: vmv.v.x v9, a012; CHECK-NEXT: li a0, 12713; CHECK-NEXT: vand.vx v9, v9, a0, v0.t14; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t15; CHECK-NEXT: ret16 %elt.head = insertelement <vscale x 8 x i7> poison, i7 %b, i32 017 %vb = shufflevector <vscale x 8 x i7> %elt.head, <vscale x 8 x i7> poison, <vscale x 8 x i32> zeroinitializer18 %v = call <vscale x 8 x i7> @llvm.vp.shl.nxv8i7(<vscale x 8 x i7> %a, <vscale x 8 x i7> %vb, <vscale x 8 x i1> %mask, i32 %evl)19 ret <vscale x 8 x i7> %v20}21 22define <vscale x 1 x i8> @vsll_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {23; CHECK-LABEL: vsll_vv_nxv1i8:24; CHECK: # %bb.0:25; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma26; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t27; CHECK-NEXT: ret28 %v = call <vscale x 1 x i8> @llvm.vp.shl.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 %evl)29 ret <vscale x 1 x i8> %v30}31 32define <vscale x 1 x i8> @vsll_vv_nxv1i8_unmasked(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, i32 zeroext %evl) {33; CHECK-LABEL: vsll_vv_nxv1i8_unmasked:34; CHECK: # %bb.0:35; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma36; CHECK-NEXT: vsll.vv v8, v8, v937; CHECK-NEXT: ret38 %v = call <vscale x 1 x i8> @llvm.vp.shl.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)39 ret <vscale x 1 x i8> %v40}41 42define <vscale x 1 x i8> @vsll_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {43; CHECK-LABEL: vsll_vx_nxv1i8:44; CHECK: # %bb.0:45; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma46; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t47; CHECK-NEXT: ret48 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 049 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer50 %v = call <vscale x 1 x i8> @llvm.vp.shl.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 %evl)51 ret <vscale x 1 x i8> %v52}53 54define <vscale x 1 x i8> @vsll_vx_nxv1i8_unmasked(<vscale x 1 x i8> %va, i8 %b, i32 zeroext %evl) {55; CHECK-LABEL: vsll_vx_nxv1i8_unmasked:56; CHECK: # %bb.0:57; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma58; CHECK-NEXT: vsll.vx v8, v8, a059; CHECK-NEXT: ret60 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 061 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer62 %v = call <vscale x 1 x i8> @llvm.vp.shl.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)63 ret <vscale x 1 x i8> %v64}65 66define <vscale x 1 x i8> @vsll_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {67; CHECK-LABEL: vsll_vi_nxv1i8:68; CHECK: # %bb.0:69; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma70; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t71; CHECK-NEXT: ret72 %v = call <vscale x 1 x i8> @llvm.vp.shl.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 3), <vscale x 1 x i1> %m, i32 %evl)73 ret <vscale x 1 x i8> %v74}75 76define <vscale x 1 x i8> @vsll_vi_nxv1i8_unmasked(<vscale x 1 x i8> %va, i32 zeroext %evl) {77; CHECK-LABEL: vsll_vi_nxv1i8_unmasked:78; CHECK: # %bb.0:79; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma80; CHECK-NEXT: vsll.vi v8, v8, 381; CHECK-NEXT: ret82 %v = call <vscale x 1 x i8> @llvm.vp.shl.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 3), <vscale x 1 x i1> splat (i1 true), i32 %evl)83 ret <vscale x 1 x i8> %v84}85 86define <vscale x 2 x i8> @vsll_vv_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {87; CHECK-LABEL: vsll_vv_nxv2i8:88; CHECK: # %bb.0:89; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma90; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t91; CHECK-NEXT: ret92 %v = call <vscale x 2 x i8> @llvm.vp.shl.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 %evl)93 ret <vscale x 2 x i8> %v94}95 96define <vscale x 2 x i8> @vsll_vv_nxv2i8_unmasked(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, i32 zeroext %evl) {97; CHECK-LABEL: vsll_vv_nxv2i8_unmasked:98; CHECK: # %bb.0:99; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma100; CHECK-NEXT: vsll.vv v8, v8, v9101; CHECK-NEXT: ret102 %v = call <vscale x 2 x i8> @llvm.vp.shl.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)103 ret <vscale x 2 x i8> %v104}105 106define <vscale x 2 x i8> @vsll_vx_nxv2i8(<vscale x 2 x i8> %va, i8 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {107; CHECK-LABEL: vsll_vx_nxv2i8:108; CHECK: # %bb.0:109; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma110; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t111; CHECK-NEXT: ret112 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0113 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer114 %v = call <vscale x 2 x i8> @llvm.vp.shl.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 %evl)115 ret <vscale x 2 x i8> %v116}117 118define <vscale x 2 x i8> @vsll_vx_nxv2i8_unmasked(<vscale x 2 x i8> %va, i8 %b, i32 zeroext %evl) {119; CHECK-LABEL: vsll_vx_nxv2i8_unmasked:120; CHECK: # %bb.0:121; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma122; CHECK-NEXT: vsll.vx v8, v8, a0123; CHECK-NEXT: ret124 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0125 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer126 %v = call <vscale x 2 x i8> @llvm.vp.shl.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)127 ret <vscale x 2 x i8> %v128}129 130define <vscale x 2 x i8> @vsll_vi_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {131; CHECK-LABEL: vsll_vi_nxv2i8:132; CHECK: # %bb.0:133; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma134; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t135; CHECK-NEXT: ret136 %v = call <vscale x 2 x i8> @llvm.vp.shl.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> splat (i8 3), <vscale x 2 x i1> %m, i32 %evl)137 ret <vscale x 2 x i8> %v138}139 140define <vscale x 2 x i8> @vsll_vi_nxv2i8_unmasked(<vscale x 2 x i8> %va, i32 zeroext %evl) {141; CHECK-LABEL: vsll_vi_nxv2i8_unmasked:142; CHECK: # %bb.0:143; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma144; CHECK-NEXT: vsll.vi v8, v8, 3145; CHECK-NEXT: ret146 %v = call <vscale x 2 x i8> @llvm.vp.shl.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> splat (i8 3), <vscale x 2 x i1> splat (i1 true), i32 %evl)147 ret <vscale x 2 x i8> %v148}149 150define <vscale x 4 x i8> @vsll_vv_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {151; CHECK-LABEL: vsll_vv_nxv4i8:152; CHECK: # %bb.0:153; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma154; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t155; CHECK-NEXT: ret156 %v = call <vscale x 4 x i8> @llvm.vp.shl.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 %evl)157 ret <vscale x 4 x i8> %v158}159 160define <vscale x 4 x i8> @vsll_vv_nxv4i8_unmasked(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, i32 zeroext %evl) {161; CHECK-LABEL: vsll_vv_nxv4i8_unmasked:162; CHECK: # %bb.0:163; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma164; CHECK-NEXT: vsll.vv v8, v8, v9165; CHECK-NEXT: ret166 %v = call <vscale x 4 x i8> @llvm.vp.shl.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)167 ret <vscale x 4 x i8> %v168}169 170define <vscale x 4 x i8> @vsll_vx_nxv4i8(<vscale x 4 x i8> %va, i8 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {171; CHECK-LABEL: vsll_vx_nxv4i8:172; CHECK: # %bb.0:173; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma174; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t175; CHECK-NEXT: ret176 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0177 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer178 %v = call <vscale x 4 x i8> @llvm.vp.shl.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 %evl)179 ret <vscale x 4 x i8> %v180}181 182define <vscale x 4 x i8> @vsll_vx_nxv4i8_unmasked(<vscale x 4 x i8> %va, i8 %b, i32 zeroext %evl) {183; CHECK-LABEL: vsll_vx_nxv4i8_unmasked:184; CHECK: # %bb.0:185; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma186; CHECK-NEXT: vsll.vx v8, v8, a0187; CHECK-NEXT: ret188 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0189 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer190 %v = call <vscale x 4 x i8> @llvm.vp.shl.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)191 ret <vscale x 4 x i8> %v192}193 194define <vscale x 4 x i8> @vsll_vi_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {195; CHECK-LABEL: vsll_vi_nxv4i8:196; CHECK: # %bb.0:197; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma198; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t199; CHECK-NEXT: ret200 %v = call <vscale x 4 x i8> @llvm.vp.shl.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> splat (i8 3), <vscale x 4 x i1> %m, i32 %evl)201 ret <vscale x 4 x i8> %v202}203 204define <vscale x 4 x i8> @vsll_vi_nxv4i8_unmasked(<vscale x 4 x i8> %va, i32 zeroext %evl) {205; CHECK-LABEL: vsll_vi_nxv4i8_unmasked:206; CHECK: # %bb.0:207; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma208; CHECK-NEXT: vsll.vi v8, v8, 3209; CHECK-NEXT: ret210 %v = call <vscale x 4 x i8> @llvm.vp.shl.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> splat (i8 3), <vscale x 4 x i1> splat (i1 true), i32 %evl)211 ret <vscale x 4 x i8> %v212}213 214define <vscale x 5 x i8> @vsll_vv_nxv5i8(<vscale x 5 x i8> %va, <vscale x 5 x i8> %b, <vscale x 5 x i1> %m, i32 zeroext %evl) {215; CHECK-LABEL: vsll_vv_nxv5i8:216; CHECK: # %bb.0:217; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma218; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t219; CHECK-NEXT: ret220 %v = call <vscale x 5 x i8> @llvm.vp.shl.nxv5i8(<vscale x 5 x i8> %va, <vscale x 5 x i8> %b, <vscale x 5 x i1> %m, i32 %evl)221 ret <vscale x 5 x i8> %v222}223 224define <vscale x 8 x i8> @vsll_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {225; CHECK-LABEL: vsll_vv_nxv8i8:226; CHECK: # %bb.0:227; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma228; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t229; CHECK-NEXT: ret230 %v = call <vscale x 8 x i8> @llvm.vp.shl.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 %evl)231 ret <vscale x 8 x i8> %v232}233 234define <vscale x 8 x i8> @vsll_vv_nxv8i8_unmasked(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, i32 zeroext %evl) {235; CHECK-LABEL: vsll_vv_nxv8i8_unmasked:236; CHECK: # %bb.0:237; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma238; CHECK-NEXT: vsll.vv v8, v8, v9239; CHECK-NEXT: ret240 %v = call <vscale x 8 x i8> @llvm.vp.shl.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)241 ret <vscale x 8 x i8> %v242}243 244define <vscale x 8 x i8> @vsll_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {245; CHECK-LABEL: vsll_vx_nxv8i8:246; CHECK: # %bb.0:247; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma248; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t249; CHECK-NEXT: ret250 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0251 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer252 %v = call <vscale x 8 x i8> @llvm.vp.shl.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 %evl)253 ret <vscale x 8 x i8> %v254}255 256define <vscale x 8 x i8> @vsll_vx_nxv8i8_unmasked(<vscale x 8 x i8> %va, i8 %b, i32 zeroext %evl) {257; CHECK-LABEL: vsll_vx_nxv8i8_unmasked:258; CHECK: # %bb.0:259; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma260; CHECK-NEXT: vsll.vx v8, v8, a0261; CHECK-NEXT: ret262 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0263 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer264 %v = call <vscale x 8 x i8> @llvm.vp.shl.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)265 ret <vscale x 8 x i8> %v266}267 268define <vscale x 8 x i8> @vsll_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {269; CHECK-LABEL: vsll_vi_nxv8i8:270; CHECK: # %bb.0:271; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma272; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t273; CHECK-NEXT: ret274 %v = call <vscale x 8 x i8> @llvm.vp.shl.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 3), <vscale x 8 x i1> %m, i32 %evl)275 ret <vscale x 8 x i8> %v276}277 278define <vscale x 8 x i8> @vsll_vi_nxv8i8_unmasked(<vscale x 8 x i8> %va, i32 zeroext %evl) {279; CHECK-LABEL: vsll_vi_nxv8i8_unmasked:280; CHECK: # %bb.0:281; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma282; CHECK-NEXT: vsll.vi v8, v8, 3283; CHECK-NEXT: ret284 %v = call <vscale x 8 x i8> @llvm.vp.shl.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 3), <vscale x 8 x i1> splat (i1 true), i32 %evl)285 ret <vscale x 8 x i8> %v286}287 288define <vscale x 16 x i8> @vsll_vv_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {289; CHECK-LABEL: vsll_vv_nxv16i8:290; CHECK: # %bb.0:291; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma292; CHECK-NEXT: vsll.vv v8, v8, v10, v0.t293; CHECK-NEXT: ret294 %v = call <vscale x 16 x i8> @llvm.vp.shl.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 %evl)295 ret <vscale x 16 x i8> %v296}297 298define <vscale x 16 x i8> @vsll_vv_nxv16i8_unmasked(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, i32 zeroext %evl) {299; CHECK-LABEL: vsll_vv_nxv16i8_unmasked:300; CHECK: # %bb.0:301; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma302; CHECK-NEXT: vsll.vv v8, v8, v10303; CHECK-NEXT: ret304 %v = call <vscale x 16 x i8> @llvm.vp.shl.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)305 ret <vscale x 16 x i8> %v306}307 308define <vscale x 16 x i8> @vsll_vx_nxv16i8(<vscale x 16 x i8> %va, i8 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {309; CHECK-LABEL: vsll_vx_nxv16i8:310; CHECK: # %bb.0:311; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma312; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t313; CHECK-NEXT: ret314 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0315 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer316 %v = call <vscale x 16 x i8> @llvm.vp.shl.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 %evl)317 ret <vscale x 16 x i8> %v318}319 320define <vscale x 16 x i8> @vsll_vx_nxv16i8_unmasked(<vscale x 16 x i8> %va, i8 %b, i32 zeroext %evl) {321; CHECK-LABEL: vsll_vx_nxv16i8_unmasked:322; CHECK: # %bb.0:323; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma324; CHECK-NEXT: vsll.vx v8, v8, a0325; CHECK-NEXT: ret326 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0327 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer328 %v = call <vscale x 16 x i8> @llvm.vp.shl.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)329 ret <vscale x 16 x i8> %v330}331 332define <vscale x 16 x i8> @vsll_vi_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {333; CHECK-LABEL: vsll_vi_nxv16i8:334; CHECK: # %bb.0:335; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma336; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t337; CHECK-NEXT: ret338 %v = call <vscale x 16 x i8> @llvm.vp.shl.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> splat (i8 3), <vscale x 16 x i1> %m, i32 %evl)339 ret <vscale x 16 x i8> %v340}341 342define <vscale x 16 x i8> @vsll_vi_nxv16i8_unmasked(<vscale x 16 x i8> %va, i32 zeroext %evl) {343; CHECK-LABEL: vsll_vi_nxv16i8_unmasked:344; CHECK: # %bb.0:345; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma346; CHECK-NEXT: vsll.vi v8, v8, 3347; CHECK-NEXT: ret348 %v = call <vscale x 16 x i8> @llvm.vp.shl.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> splat (i8 3), <vscale x 16 x i1> splat (i1 true), i32 %evl)349 ret <vscale x 16 x i8> %v350}351 352define <vscale x 32 x i8> @vsll_vv_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {353; CHECK-LABEL: vsll_vv_nxv32i8:354; CHECK: # %bb.0:355; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma356; CHECK-NEXT: vsll.vv v8, v8, v12, v0.t357; CHECK-NEXT: ret358 %v = call <vscale x 32 x i8> @llvm.vp.shl.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 %evl)359 ret <vscale x 32 x i8> %v360}361 362define <vscale x 32 x i8> @vsll_vv_nxv32i8_unmasked(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, i32 zeroext %evl) {363; CHECK-LABEL: vsll_vv_nxv32i8_unmasked:364; CHECK: # %bb.0:365; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma366; CHECK-NEXT: vsll.vv v8, v8, v12367; CHECK-NEXT: ret368 %v = call <vscale x 32 x i8> @llvm.vp.shl.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)369 ret <vscale x 32 x i8> %v370}371 372define <vscale x 32 x i8> @vsll_vx_nxv32i8(<vscale x 32 x i8> %va, i8 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {373; CHECK-LABEL: vsll_vx_nxv32i8:374; CHECK: # %bb.0:375; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma376; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t377; CHECK-NEXT: ret378 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0379 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer380 %v = call <vscale x 32 x i8> @llvm.vp.shl.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 %evl)381 ret <vscale x 32 x i8> %v382}383 384define <vscale x 32 x i8> @vsll_vx_nxv32i8_unmasked(<vscale x 32 x i8> %va, i8 %b, i32 zeroext %evl) {385; CHECK-LABEL: vsll_vx_nxv32i8_unmasked:386; CHECK: # %bb.0:387; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma388; CHECK-NEXT: vsll.vx v8, v8, a0389; CHECK-NEXT: ret390 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0391 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer392 %v = call <vscale x 32 x i8> @llvm.vp.shl.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)393 ret <vscale x 32 x i8> %v394}395 396define <vscale x 32 x i8> @vsll_vi_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {397; CHECK-LABEL: vsll_vi_nxv32i8:398; CHECK: # %bb.0:399; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma400; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t401; CHECK-NEXT: ret402 %v = call <vscale x 32 x i8> @llvm.vp.shl.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> splat (i8 3), <vscale x 32 x i1> %m, i32 %evl)403 ret <vscale x 32 x i8> %v404}405 406define <vscale x 32 x i8> @vsll_vi_nxv32i8_unmasked(<vscale x 32 x i8> %va, i32 zeroext %evl) {407; CHECK-LABEL: vsll_vi_nxv32i8_unmasked:408; CHECK: # %bb.0:409; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma410; CHECK-NEXT: vsll.vi v8, v8, 3411; CHECK-NEXT: ret412 %v = call <vscale x 32 x i8> @llvm.vp.shl.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> splat (i8 3), <vscale x 32 x i1> splat (i1 true), i32 %evl)413 ret <vscale x 32 x i8> %v414}415 416define <vscale x 64 x i8> @vsll_vv_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {417; CHECK-LABEL: vsll_vv_nxv64i8:418; CHECK: # %bb.0:419; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma420; CHECK-NEXT: vsll.vv v8, v8, v16, v0.t421; CHECK-NEXT: ret422 %v = call <vscale x 64 x i8> @llvm.vp.shl.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 %evl)423 ret <vscale x 64 x i8> %v424}425 426define <vscale x 64 x i8> @vsll_vv_nxv64i8_unmasked(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, i32 zeroext %evl) {427; CHECK-LABEL: vsll_vv_nxv64i8_unmasked:428; CHECK: # %bb.0:429; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma430; CHECK-NEXT: vsll.vv v8, v8, v16431; CHECK-NEXT: ret432 %v = call <vscale x 64 x i8> @llvm.vp.shl.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> splat (i1 true), i32 %evl)433 ret <vscale x 64 x i8> %v434}435 436define <vscale x 64 x i8> @vsll_vx_nxv64i8(<vscale x 64 x i8> %va, i8 %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {437; CHECK-LABEL: vsll_vx_nxv64i8:438; CHECK: # %bb.0:439; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma440; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t441; CHECK-NEXT: ret442 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0443 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer444 %v = call <vscale x 64 x i8> @llvm.vp.shl.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 %evl)445 ret <vscale x 64 x i8> %v446}447 448define <vscale x 64 x i8> @vsll_vx_nxv64i8_unmasked(<vscale x 64 x i8> %va, i8 %b, i32 zeroext %evl) {449; CHECK-LABEL: vsll_vx_nxv64i8_unmasked:450; CHECK: # %bb.0:451; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma452; CHECK-NEXT: vsll.vx v8, v8, a0453; CHECK-NEXT: ret454 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0455 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer456 %v = call <vscale x 64 x i8> @llvm.vp.shl.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> splat (i1 true), i32 %evl)457 ret <vscale x 64 x i8> %v458}459 460define <vscale x 64 x i8> @vsll_vi_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i1> %m, i32 zeroext %evl) {461; CHECK-LABEL: vsll_vi_nxv64i8:462; CHECK: # %bb.0:463; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma464; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t465; CHECK-NEXT: ret466 %v = call <vscale x 64 x i8> @llvm.vp.shl.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> splat (i8 3), <vscale x 64 x i1> %m, i32 %evl)467 ret <vscale x 64 x i8> %v468}469 470define <vscale x 64 x i8> @vsll_vi_nxv64i8_unmasked(<vscale x 64 x i8> %va, i32 zeroext %evl) {471; CHECK-LABEL: vsll_vi_nxv64i8_unmasked:472; CHECK: # %bb.0:473; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma474; CHECK-NEXT: vsll.vi v8, v8, 3475; CHECK-NEXT: ret476 %v = call <vscale x 64 x i8> @llvm.vp.shl.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> splat (i8 3), <vscale x 64 x i1> splat (i1 true), i32 %evl)477 ret <vscale x 64 x i8> %v478}479 480define <vscale x 1 x i16> @vsll_vv_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {481; CHECK-LABEL: vsll_vv_nxv1i16:482; CHECK: # %bb.0:483; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma484; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t485; CHECK-NEXT: ret486 %v = call <vscale x 1 x i16> @llvm.vp.shl.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 %evl)487 ret <vscale x 1 x i16> %v488}489 490define <vscale x 1 x i16> @vsll_vv_nxv1i16_unmasked(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, i32 zeroext %evl) {491; CHECK-LABEL: vsll_vv_nxv1i16_unmasked:492; CHECK: # %bb.0:493; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma494; CHECK-NEXT: vsll.vv v8, v8, v9495; CHECK-NEXT: ret496 %v = call <vscale x 1 x i16> @llvm.vp.shl.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)497 ret <vscale x 1 x i16> %v498}499 500define <vscale x 1 x i16> @vsll_vx_nxv1i16(<vscale x 1 x i16> %va, i16 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {501; CHECK-LABEL: vsll_vx_nxv1i16:502; CHECK: # %bb.0:503; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma504; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t505; CHECK-NEXT: ret506 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0507 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer508 %v = call <vscale x 1 x i16> @llvm.vp.shl.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 %evl)509 ret <vscale x 1 x i16> %v510}511 512define <vscale x 1 x i16> @vsll_vx_nxv1i16_unmasked(<vscale x 1 x i16> %va, i16 %b, i32 zeroext %evl) {513; CHECK-LABEL: vsll_vx_nxv1i16_unmasked:514; CHECK: # %bb.0:515; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma516; CHECK-NEXT: vsll.vx v8, v8, a0517; CHECK-NEXT: ret518 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0519 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer520 %v = call <vscale x 1 x i16> @llvm.vp.shl.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)521 ret <vscale x 1 x i16> %v522}523 524define <vscale x 1 x i16> @vsll_vi_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {525; CHECK-LABEL: vsll_vi_nxv1i16:526; CHECK: # %bb.0:527; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma528; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t529; CHECK-NEXT: ret530 %v = call <vscale x 1 x i16> @llvm.vp.shl.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> splat (i16 3), <vscale x 1 x i1> %m, i32 %evl)531 ret <vscale x 1 x i16> %v532}533 534define <vscale x 1 x i16> @vsll_vi_nxv1i16_unmasked(<vscale x 1 x i16> %va, i32 zeroext %evl) {535; CHECK-LABEL: vsll_vi_nxv1i16_unmasked:536; CHECK: # %bb.0:537; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma538; CHECK-NEXT: vsll.vi v8, v8, 3539; CHECK-NEXT: ret540 %v = call <vscale x 1 x i16> @llvm.vp.shl.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> splat (i16 3), <vscale x 1 x i1> splat (i1 true), i32 %evl)541 ret <vscale x 1 x i16> %v542}543 544define <vscale x 2 x i16> @vsll_vv_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {545; CHECK-LABEL: vsll_vv_nxv2i16:546; CHECK: # %bb.0:547; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma548; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t549; CHECK-NEXT: ret550 %v = call <vscale x 2 x i16> @llvm.vp.shl.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 %evl)551 ret <vscale x 2 x i16> %v552}553 554define <vscale x 2 x i16> @vsll_vv_nxv2i16_unmasked(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, i32 zeroext %evl) {555; CHECK-LABEL: vsll_vv_nxv2i16_unmasked:556; CHECK: # %bb.0:557; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma558; CHECK-NEXT: vsll.vv v8, v8, v9559; CHECK-NEXT: ret560 %v = call <vscale x 2 x i16> @llvm.vp.shl.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)561 ret <vscale x 2 x i16> %v562}563 564define <vscale x 2 x i16> @vsll_vx_nxv2i16(<vscale x 2 x i16> %va, i16 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {565; CHECK-LABEL: vsll_vx_nxv2i16:566; CHECK: # %bb.0:567; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma568; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t569; CHECK-NEXT: ret570 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0571 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer572 %v = call <vscale x 2 x i16> @llvm.vp.shl.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 %evl)573 ret <vscale x 2 x i16> %v574}575 576define <vscale x 2 x i16> @vsll_vx_nxv2i16_unmasked(<vscale x 2 x i16> %va, i16 %b, i32 zeroext %evl) {577; CHECK-LABEL: vsll_vx_nxv2i16_unmasked:578; CHECK: # %bb.0:579; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma580; CHECK-NEXT: vsll.vx v8, v8, a0581; CHECK-NEXT: ret582 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0583 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer584 %v = call <vscale x 2 x i16> @llvm.vp.shl.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)585 ret <vscale x 2 x i16> %v586}587 588define <vscale x 2 x i16> @vsll_vi_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {589; CHECK-LABEL: vsll_vi_nxv2i16:590; CHECK: # %bb.0:591; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma592; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t593; CHECK-NEXT: ret594 %v = call <vscale x 2 x i16> @llvm.vp.shl.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> splat (i16 3), <vscale x 2 x i1> %m, i32 %evl)595 ret <vscale x 2 x i16> %v596}597 598define <vscale x 2 x i16> @vsll_vi_nxv2i16_unmasked(<vscale x 2 x i16> %va, i32 zeroext %evl) {599; CHECK-LABEL: vsll_vi_nxv2i16_unmasked:600; CHECK: # %bb.0:601; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma602; CHECK-NEXT: vsll.vi v8, v8, 3603; CHECK-NEXT: ret604 %v = call <vscale x 2 x i16> @llvm.vp.shl.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> splat (i16 3), <vscale x 2 x i1> splat (i1 true), i32 %evl)605 ret <vscale x 2 x i16> %v606}607 608define <vscale x 4 x i16> @vsll_vv_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {609; CHECK-LABEL: vsll_vv_nxv4i16:610; CHECK: # %bb.0:611; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma612; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t613; CHECK-NEXT: ret614 %v = call <vscale x 4 x i16> @llvm.vp.shl.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 %evl)615 ret <vscale x 4 x i16> %v616}617 618define <vscale x 4 x i16> @vsll_vv_nxv4i16_unmasked(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, i32 zeroext %evl) {619; CHECK-LABEL: vsll_vv_nxv4i16_unmasked:620; CHECK: # %bb.0:621; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma622; CHECK-NEXT: vsll.vv v8, v8, v9623; CHECK-NEXT: ret624 %v = call <vscale x 4 x i16> @llvm.vp.shl.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)625 ret <vscale x 4 x i16> %v626}627 628define <vscale x 4 x i16> @vsll_vx_nxv4i16(<vscale x 4 x i16> %va, i16 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {629; CHECK-LABEL: vsll_vx_nxv4i16:630; CHECK: # %bb.0:631; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma632; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t633; CHECK-NEXT: ret634 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0635 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer636 %v = call <vscale x 4 x i16> @llvm.vp.shl.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 %evl)637 ret <vscale x 4 x i16> %v638}639 640define <vscale x 4 x i16> @vsll_vx_nxv4i16_unmasked(<vscale x 4 x i16> %va, i16 %b, i32 zeroext %evl) {641; CHECK-LABEL: vsll_vx_nxv4i16_unmasked:642; CHECK: # %bb.0:643; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma644; CHECK-NEXT: vsll.vx v8, v8, a0645; CHECK-NEXT: ret646 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0647 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer648 %v = call <vscale x 4 x i16> @llvm.vp.shl.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)649 ret <vscale x 4 x i16> %v650}651 652define <vscale x 4 x i16> @vsll_vi_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {653; CHECK-LABEL: vsll_vi_nxv4i16:654; CHECK: # %bb.0:655; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma656; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t657; CHECK-NEXT: ret658 %v = call <vscale x 4 x i16> @llvm.vp.shl.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> splat (i16 3), <vscale x 4 x i1> %m, i32 %evl)659 ret <vscale x 4 x i16> %v660}661 662define <vscale x 4 x i16> @vsll_vi_nxv4i16_unmasked(<vscale x 4 x i16> %va, i32 zeroext %evl) {663; CHECK-LABEL: vsll_vi_nxv4i16_unmasked:664; CHECK: # %bb.0:665; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma666; CHECK-NEXT: vsll.vi v8, v8, 3667; CHECK-NEXT: ret668 %v = call <vscale x 4 x i16> @llvm.vp.shl.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> splat (i16 3), <vscale x 4 x i1> splat (i1 true), i32 %evl)669 ret <vscale x 4 x i16> %v670}671 672define <vscale x 8 x i16> @vsll_vv_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {673; CHECK-LABEL: vsll_vv_nxv8i16:674; CHECK: # %bb.0:675; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma676; CHECK-NEXT: vsll.vv v8, v8, v10, v0.t677; CHECK-NEXT: ret678 %v = call <vscale x 8 x i16> @llvm.vp.shl.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 %evl)679 ret <vscale x 8 x i16> %v680}681 682define <vscale x 8 x i16> @vsll_vv_nxv8i16_unmasked(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, i32 zeroext %evl) {683; CHECK-LABEL: vsll_vv_nxv8i16_unmasked:684; CHECK: # %bb.0:685; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma686; CHECK-NEXT: vsll.vv v8, v8, v10687; CHECK-NEXT: ret688 %v = call <vscale x 8 x i16> @llvm.vp.shl.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)689 ret <vscale x 8 x i16> %v690}691 692define <vscale x 8 x i16> @vsll_vx_nxv8i16(<vscale x 8 x i16> %va, i16 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {693; CHECK-LABEL: vsll_vx_nxv8i16:694; CHECK: # %bb.0:695; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma696; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t697; CHECK-NEXT: ret698 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0699 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer700 %v = call <vscale x 8 x i16> @llvm.vp.shl.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 %evl)701 ret <vscale x 8 x i16> %v702}703 704define <vscale x 8 x i16> @vsll_vx_nxv8i16_unmasked(<vscale x 8 x i16> %va, i16 %b, i32 zeroext %evl) {705; CHECK-LABEL: vsll_vx_nxv8i16_unmasked:706; CHECK: # %bb.0:707; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma708; CHECK-NEXT: vsll.vx v8, v8, a0709; CHECK-NEXT: ret710 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0711 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer712 %v = call <vscale x 8 x i16> @llvm.vp.shl.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)713 ret <vscale x 8 x i16> %v714}715 716define <vscale x 8 x i16> @vsll_vi_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {717; CHECK-LABEL: vsll_vi_nxv8i16:718; CHECK: # %bb.0:719; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma720; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t721; CHECK-NEXT: ret722 %v = call <vscale x 8 x i16> @llvm.vp.shl.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> splat (i16 3), <vscale x 8 x i1> %m, i32 %evl)723 ret <vscale x 8 x i16> %v724}725 726define <vscale x 8 x i16> @vsll_vi_nxv8i16_unmasked(<vscale x 8 x i16> %va, i32 zeroext %evl) {727; CHECK-LABEL: vsll_vi_nxv8i16_unmasked:728; CHECK: # %bb.0:729; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma730; CHECK-NEXT: vsll.vi v8, v8, 3731; CHECK-NEXT: ret732 %v = call <vscale x 8 x i16> @llvm.vp.shl.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> splat (i16 3), <vscale x 8 x i1> splat (i1 true), i32 %evl)733 ret <vscale x 8 x i16> %v734}735 736define <vscale x 16 x i16> @vsll_vv_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {737; CHECK-LABEL: vsll_vv_nxv16i16:738; CHECK: # %bb.0:739; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma740; CHECK-NEXT: vsll.vv v8, v8, v12, v0.t741; CHECK-NEXT: ret742 %v = call <vscale x 16 x i16> @llvm.vp.shl.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 %evl)743 ret <vscale x 16 x i16> %v744}745 746define <vscale x 16 x i16> @vsll_vv_nxv16i16_unmasked(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, i32 zeroext %evl) {747; CHECK-LABEL: vsll_vv_nxv16i16_unmasked:748; CHECK: # %bb.0:749; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma750; CHECK-NEXT: vsll.vv v8, v8, v12751; CHECK-NEXT: ret752 %v = call <vscale x 16 x i16> @llvm.vp.shl.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)753 ret <vscale x 16 x i16> %v754}755 756define <vscale x 16 x i16> @vsll_vx_nxv16i16(<vscale x 16 x i16> %va, i16 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {757; CHECK-LABEL: vsll_vx_nxv16i16:758; CHECK: # %bb.0:759; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma760; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t761; CHECK-NEXT: ret762 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0763 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer764 %v = call <vscale x 16 x i16> @llvm.vp.shl.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 %evl)765 ret <vscale x 16 x i16> %v766}767 768define <vscale x 16 x i16> @vsll_vx_nxv16i16_unmasked(<vscale x 16 x i16> %va, i16 %b, i32 zeroext %evl) {769; CHECK-LABEL: vsll_vx_nxv16i16_unmasked:770; CHECK: # %bb.0:771; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma772; CHECK-NEXT: vsll.vx v8, v8, a0773; CHECK-NEXT: ret774 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0775 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer776 %v = call <vscale x 16 x i16> @llvm.vp.shl.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)777 ret <vscale x 16 x i16> %v778}779 780define <vscale x 16 x i16> @vsll_vi_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {781; CHECK-LABEL: vsll_vi_nxv16i16:782; CHECK: # %bb.0:783; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma784; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t785; CHECK-NEXT: ret786 %v = call <vscale x 16 x i16> @llvm.vp.shl.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> splat (i16 3), <vscale x 16 x i1> %m, i32 %evl)787 ret <vscale x 16 x i16> %v788}789 790define <vscale x 16 x i16> @vsll_vi_nxv16i16_unmasked(<vscale x 16 x i16> %va, i32 zeroext %evl) {791; CHECK-LABEL: vsll_vi_nxv16i16_unmasked:792; CHECK: # %bb.0:793; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma794; CHECK-NEXT: vsll.vi v8, v8, 3795; CHECK-NEXT: ret796 %v = call <vscale x 16 x i16> @llvm.vp.shl.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> splat (i16 3), <vscale x 16 x i1> splat (i1 true), i32 %evl)797 ret <vscale x 16 x i16> %v798}799 800define <vscale x 32 x i16> @vsll_vv_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {801; CHECK-LABEL: vsll_vv_nxv32i16:802; CHECK: # %bb.0:803; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma804; CHECK-NEXT: vsll.vv v8, v8, v16, v0.t805; CHECK-NEXT: ret806 %v = call <vscale x 32 x i16> @llvm.vp.shl.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 %evl)807 ret <vscale x 32 x i16> %v808}809 810define <vscale x 32 x i16> @vsll_vv_nxv32i16_unmasked(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, i32 zeroext %evl) {811; CHECK-LABEL: vsll_vv_nxv32i16_unmasked:812; CHECK: # %bb.0:813; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma814; CHECK-NEXT: vsll.vv v8, v8, v16815; CHECK-NEXT: ret816 %v = call <vscale x 32 x i16> @llvm.vp.shl.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)817 ret <vscale x 32 x i16> %v818}819 820define <vscale x 32 x i16> @vsll_vx_nxv32i16(<vscale x 32 x i16> %va, i16 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {821; CHECK-LABEL: vsll_vx_nxv32i16:822; CHECK: # %bb.0:823; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma824; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t825; CHECK-NEXT: ret826 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0827 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer828 %v = call <vscale x 32 x i16> @llvm.vp.shl.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 %evl)829 ret <vscale x 32 x i16> %v830}831 832define <vscale x 32 x i16> @vsll_vx_nxv32i16_unmasked(<vscale x 32 x i16> %va, i16 %b, i32 zeroext %evl) {833; CHECK-LABEL: vsll_vx_nxv32i16_unmasked:834; CHECK: # %bb.0:835; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma836; CHECK-NEXT: vsll.vx v8, v8, a0837; CHECK-NEXT: ret838 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0839 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer840 %v = call <vscale x 32 x i16> @llvm.vp.shl.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)841 ret <vscale x 32 x i16> %v842}843 844define <vscale x 32 x i16> @vsll_vi_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {845; CHECK-LABEL: vsll_vi_nxv32i16:846; CHECK: # %bb.0:847; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma848; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t849; CHECK-NEXT: ret850 %v = call <vscale x 32 x i16> @llvm.vp.shl.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> splat (i16 3), <vscale x 32 x i1> %m, i32 %evl)851 ret <vscale x 32 x i16> %v852}853 854define <vscale x 32 x i16> @vsll_vi_nxv32i16_unmasked(<vscale x 32 x i16> %va, i32 zeroext %evl) {855; CHECK-LABEL: vsll_vi_nxv32i16_unmasked:856; CHECK: # %bb.0:857; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma858; CHECK-NEXT: vsll.vi v8, v8, 3859; CHECK-NEXT: ret860 %v = call <vscale x 32 x i16> @llvm.vp.shl.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> splat (i16 3), <vscale x 32 x i1> splat (i1 true), i32 %evl)861 ret <vscale x 32 x i16> %v862}863 864define <vscale x 1 x i32> @vsll_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {865; CHECK-LABEL: vsll_vv_nxv1i32:866; CHECK: # %bb.0:867; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma868; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t869; CHECK-NEXT: ret870 %v = call <vscale x 1 x i32> @llvm.vp.shl.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 %evl)871 ret <vscale x 1 x i32> %v872}873 874define <vscale x 1 x i32> @vsll_vv_nxv1i32_unmasked(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, i32 zeroext %evl) {875; CHECK-LABEL: vsll_vv_nxv1i32_unmasked:876; CHECK: # %bb.0:877; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma878; CHECK-NEXT: vsll.vv v8, v8, v9879; CHECK-NEXT: ret880 %v = call <vscale x 1 x i32> @llvm.vp.shl.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)881 ret <vscale x 1 x i32> %v882}883 884define <vscale x 1 x i32> @vsll_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {885; CHECK-LABEL: vsll_vx_nxv1i32:886; CHECK: # %bb.0:887; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma888; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t889; CHECK-NEXT: ret890 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0891 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer892 %v = call <vscale x 1 x i32> @llvm.vp.shl.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 %evl)893 ret <vscale x 1 x i32> %v894}895 896define <vscale x 1 x i32> @vsll_vx_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 %b, i32 zeroext %evl) {897; CHECK-LABEL: vsll_vx_nxv1i32_unmasked:898; CHECK: # %bb.0:899; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma900; CHECK-NEXT: vsll.vx v8, v8, a0901; CHECK-NEXT: ret902 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0903 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer904 %v = call <vscale x 1 x i32> @llvm.vp.shl.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)905 ret <vscale x 1 x i32> %v906}907 908define <vscale x 1 x i32> @vsll_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {909; CHECK-LABEL: vsll_vi_nxv1i32:910; CHECK: # %bb.0:911; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma912; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t913; CHECK-NEXT: ret914 %v = call <vscale x 1 x i32> @llvm.vp.shl.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 3), <vscale x 1 x i1> %m, i32 %evl)915 ret <vscale x 1 x i32> %v916}917 918define <vscale x 1 x i32> @vsll_vi_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 zeroext %evl) {919; CHECK-LABEL: vsll_vi_nxv1i32_unmasked:920; CHECK: # %bb.0:921; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma922; CHECK-NEXT: vsll.vi v8, v8, 3923; CHECK-NEXT: ret924 %v = call <vscale x 1 x i32> @llvm.vp.shl.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 3), <vscale x 1 x i1> splat (i1 true), i32 %evl)925 ret <vscale x 1 x i32> %v926}927 928define <vscale x 2 x i32> @vsll_vv_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {929; CHECK-LABEL: vsll_vv_nxv2i32:930; CHECK: # %bb.0:931; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma932; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t933; CHECK-NEXT: ret934 %v = call <vscale x 2 x i32> @llvm.vp.shl.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 %evl)935 ret <vscale x 2 x i32> %v936}937 938define <vscale x 2 x i32> @vsll_vv_nxv2i32_unmasked(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, i32 zeroext %evl) {939; CHECK-LABEL: vsll_vv_nxv2i32_unmasked:940; CHECK: # %bb.0:941; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma942; CHECK-NEXT: vsll.vv v8, v8, v9943; CHECK-NEXT: ret944 %v = call <vscale x 2 x i32> @llvm.vp.shl.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)945 ret <vscale x 2 x i32> %v946}947 948define <vscale x 2 x i32> @vsll_vx_nxv2i32(<vscale x 2 x i32> %va, i32 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {949; CHECK-LABEL: vsll_vx_nxv2i32:950; CHECK: # %bb.0:951; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma952; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t953; CHECK-NEXT: ret954 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0955 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer956 %v = call <vscale x 2 x i32> @llvm.vp.shl.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 %evl)957 ret <vscale x 2 x i32> %v958}959 960define <vscale x 2 x i32> @vsll_vx_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 %b, i32 zeroext %evl) {961; CHECK-LABEL: vsll_vx_nxv2i32_unmasked:962; CHECK: # %bb.0:963; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma964; CHECK-NEXT: vsll.vx v8, v8, a0965; CHECK-NEXT: ret966 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0967 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer968 %v = call <vscale x 2 x i32> @llvm.vp.shl.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)969 ret <vscale x 2 x i32> %v970}971 972define <vscale x 2 x i32> @vsll_vi_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {973; CHECK-LABEL: vsll_vi_nxv2i32:974; CHECK: # %bb.0:975; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma976; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t977; CHECK-NEXT: ret978 %v = call <vscale x 2 x i32> @llvm.vp.shl.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> splat (i32 3), <vscale x 2 x i1> %m, i32 %evl)979 ret <vscale x 2 x i32> %v980}981 982define <vscale x 2 x i32> @vsll_vi_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 zeroext %evl) {983; CHECK-LABEL: vsll_vi_nxv2i32_unmasked:984; CHECK: # %bb.0:985; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma986; CHECK-NEXT: vsll.vi v8, v8, 3987; CHECK-NEXT: ret988 %v = call <vscale x 2 x i32> @llvm.vp.shl.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> splat (i32 3), <vscale x 2 x i1> splat (i1 true), i32 %evl)989 ret <vscale x 2 x i32> %v990}991 992define <vscale x 4 x i32> @vsll_vv_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {993; CHECK-LABEL: vsll_vv_nxv4i32:994; CHECK: # %bb.0:995; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma996; CHECK-NEXT: vsll.vv v8, v8, v10, v0.t997; CHECK-NEXT: ret998 %v = call <vscale x 4 x i32> @llvm.vp.shl.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 %evl)999 ret <vscale x 4 x i32> %v1000}1001 1002define <vscale x 4 x i32> @vsll_vv_nxv4i32_unmasked(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, i32 zeroext %evl) {1003; CHECK-LABEL: vsll_vv_nxv4i32_unmasked:1004; CHECK: # %bb.0:1005; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1006; CHECK-NEXT: vsll.vv v8, v8, v101007; CHECK-NEXT: ret1008 %v = call <vscale x 4 x i32> @llvm.vp.shl.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)1009 ret <vscale x 4 x i32> %v1010}1011 1012define <vscale x 4 x i32> @vsll_vx_nxv4i32(<vscale x 4 x i32> %va, i32 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1013; CHECK-LABEL: vsll_vx_nxv4i32:1014; CHECK: # %bb.0:1015; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma1016; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t1017; CHECK-NEXT: ret1018 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 01019 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer1020 %v = call <vscale x 4 x i32> @llvm.vp.shl.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 %evl)1021 ret <vscale x 4 x i32> %v1022}1023 1024define <vscale x 4 x i32> @vsll_vx_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 %b, i32 zeroext %evl) {1025; CHECK-LABEL: vsll_vx_nxv4i32_unmasked:1026; CHECK: # %bb.0:1027; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma1028; CHECK-NEXT: vsll.vx v8, v8, a01029; CHECK-NEXT: ret1030 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 01031 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer1032 %v = call <vscale x 4 x i32> @llvm.vp.shl.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)1033 ret <vscale x 4 x i32> %v1034}1035 1036define <vscale x 4 x i32> @vsll_vi_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {1037; CHECK-LABEL: vsll_vi_nxv4i32:1038; CHECK: # %bb.0:1039; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1040; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t1041; CHECK-NEXT: ret1042 %v = call <vscale x 4 x i32> @llvm.vp.shl.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> splat (i32 3), <vscale x 4 x i1> %m, i32 %evl)1043 ret <vscale x 4 x i32> %v1044}1045 1046define <vscale x 4 x i32> @vsll_vi_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 zeroext %evl) {1047; CHECK-LABEL: vsll_vi_nxv4i32_unmasked:1048; CHECK: # %bb.0:1049; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1050; CHECK-NEXT: vsll.vi v8, v8, 31051; CHECK-NEXT: ret1052 %v = call <vscale x 4 x i32> @llvm.vp.shl.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> splat (i32 3), <vscale x 4 x i1> splat (i1 true), i32 %evl)1053 ret <vscale x 4 x i32> %v1054}1055 1056define <vscale x 8 x i32> @vsll_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1057; CHECK-LABEL: vsll_vv_nxv8i32:1058; CHECK: # %bb.0:1059; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1060; CHECK-NEXT: vsll.vv v8, v8, v12, v0.t1061; CHECK-NEXT: ret1062 %v = call <vscale x 8 x i32> @llvm.vp.shl.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 %evl)1063 ret <vscale x 8 x i32> %v1064}1065 1066define <vscale x 8 x i32> @vsll_vv_nxv8i32_unmasked(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, i32 zeroext %evl) {1067; CHECK-LABEL: vsll_vv_nxv8i32_unmasked:1068; CHECK: # %bb.0:1069; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1070; CHECK-NEXT: vsll.vv v8, v8, v121071; CHECK-NEXT: ret1072 %v = call <vscale x 8 x i32> @llvm.vp.shl.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)1073 ret <vscale x 8 x i32> %v1074}1075 1076define <vscale x 8 x i32> @vsll_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1077; CHECK-LABEL: vsll_vx_nxv8i32:1078; CHECK: # %bb.0:1079; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma1080; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t1081; CHECK-NEXT: ret1082 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01083 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1084 %v = call <vscale x 8 x i32> @llvm.vp.shl.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 %evl)1085 ret <vscale x 8 x i32> %v1086}1087 1088define <vscale x 8 x i32> @vsll_vx_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 %b, i32 zeroext %evl) {1089; CHECK-LABEL: vsll_vx_nxv8i32_unmasked:1090; CHECK: # %bb.0:1091; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma1092; CHECK-NEXT: vsll.vx v8, v8, a01093; CHECK-NEXT: ret1094 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01095 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1096 %v = call <vscale x 8 x i32> @llvm.vp.shl.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)1097 ret <vscale x 8 x i32> %v1098}1099 1100define <vscale x 8 x i32> @vsll_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1101; CHECK-LABEL: vsll_vi_nxv8i32:1102; CHECK: # %bb.0:1103; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1104; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t1105; CHECK-NEXT: ret1106 %v = call <vscale x 8 x i32> @llvm.vp.shl.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 3), <vscale x 8 x i1> %m, i32 %evl)1107 ret <vscale x 8 x i32> %v1108}1109 1110define <vscale x 8 x i32> @vsll_vi_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 zeroext %evl) {1111; CHECK-LABEL: vsll_vi_nxv8i32_unmasked:1112; CHECK: # %bb.0:1113; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1114; CHECK-NEXT: vsll.vi v8, v8, 31115; CHECK-NEXT: ret1116 %v = call <vscale x 8 x i32> @llvm.vp.shl.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 3), <vscale x 8 x i1> splat (i1 true), i32 %evl)1117 ret <vscale x 8 x i32> %v1118}1119 1120define <vscale x 16 x i32> @vsll_vv_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {1121; CHECK-LABEL: vsll_vv_nxv16i32:1122; CHECK: # %bb.0:1123; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1124; CHECK-NEXT: vsll.vv v8, v8, v16, v0.t1125; CHECK-NEXT: ret1126 %v = call <vscale x 16 x i32> @llvm.vp.shl.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 %evl)1127 ret <vscale x 16 x i32> %v1128}1129 1130define <vscale x 16 x i32> @vsll_vv_nxv16i32_unmasked(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, i32 zeroext %evl) {1131; CHECK-LABEL: vsll_vv_nxv16i32_unmasked:1132; CHECK: # %bb.0:1133; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1134; CHECK-NEXT: vsll.vv v8, v8, v161135; CHECK-NEXT: ret1136 %v = call <vscale x 16 x i32> @llvm.vp.shl.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)1137 ret <vscale x 16 x i32> %v1138}1139 1140define <vscale x 16 x i32> @vsll_vx_nxv16i32(<vscale x 16 x i32> %va, i32 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {1141; CHECK-LABEL: vsll_vx_nxv16i32:1142; CHECK: # %bb.0:1143; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma1144; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t1145; CHECK-NEXT: ret1146 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 01147 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer1148 %v = call <vscale x 16 x i32> @llvm.vp.shl.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 %evl)1149 ret <vscale x 16 x i32> %v1150}1151 1152define <vscale x 16 x i32> @vsll_vx_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 %b, i32 zeroext %evl) {1153; CHECK-LABEL: vsll_vx_nxv16i32_unmasked:1154; CHECK: # %bb.0:1155; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma1156; CHECK-NEXT: vsll.vx v8, v8, a01157; CHECK-NEXT: ret1158 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 01159 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer1160 %v = call <vscale x 16 x i32> @llvm.vp.shl.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)1161 ret <vscale x 16 x i32> %v1162}1163 1164define <vscale x 16 x i32> @vsll_vi_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {1165; CHECK-LABEL: vsll_vi_nxv16i32:1166; CHECK: # %bb.0:1167; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1168; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t1169; CHECK-NEXT: ret1170 %v = call <vscale x 16 x i32> @llvm.vp.shl.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> splat (i32 3), <vscale x 16 x i1> %m, i32 %evl)1171 ret <vscale x 16 x i32> %v1172}1173 1174define <vscale x 16 x i32> @vsll_vi_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 zeroext %evl) {1175; CHECK-LABEL: vsll_vi_nxv16i32_unmasked:1176; CHECK: # %bb.0:1177; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1178; CHECK-NEXT: vsll.vi v8, v8, 31179; CHECK-NEXT: ret1180 %v = call <vscale x 16 x i32> @llvm.vp.shl.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> splat (i32 3), <vscale x 16 x i1> splat (i1 true), i32 %evl)1181 ret <vscale x 16 x i32> %v1182}1183 1184define <vscale x 1 x i64> @vsll_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1185; CHECK-LABEL: vsll_vv_nxv1i64:1186; CHECK: # %bb.0:1187; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1188; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t1189; CHECK-NEXT: ret1190 %v = call <vscale x 1 x i64> @llvm.vp.shl.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 %evl)1191 ret <vscale x 1 x i64> %v1192}1193 1194define <vscale x 1 x i64> @vsll_vv_nxv1i64_unmasked(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, i32 zeroext %evl) {1195; CHECK-LABEL: vsll_vv_nxv1i64_unmasked:1196; CHECK: # %bb.0:1197; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1198; CHECK-NEXT: vsll.vv v8, v8, v91199; CHECK-NEXT: ret1200 %v = call <vscale x 1 x i64> @llvm.vp.shl.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)1201 ret <vscale x 1 x i64> %v1202}1203 1204define <vscale x 1 x i64> @vsll_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1205; RV32-LABEL: vsll_vx_nxv1i64:1206; RV32: # %bb.0:1207; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma1208; RV32-NEXT: vsll.vx v8, v8, a0, v0.t1209; RV32-NEXT: ret1210;1211; RV64-LABEL: vsll_vx_nxv1i64:1212; RV64: # %bb.0:1213; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma1214; RV64-NEXT: vsll.vx v8, v8, a0, v0.t1215; RV64-NEXT: ret1216 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01217 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1218 %v = call <vscale x 1 x i64> @llvm.vp.shl.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 %evl)1219 ret <vscale x 1 x i64> %v1220}1221 1222define <vscale x 1 x i64> @vsll_vx_nxv1i64_unmasked(<vscale x 1 x i64> %va, i64 %b, i32 zeroext %evl) {1223; RV32-LABEL: vsll_vx_nxv1i64_unmasked:1224; RV32: # %bb.0:1225; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma1226; RV32-NEXT: vsll.vx v8, v8, a01227; RV32-NEXT: ret1228;1229; RV64-LABEL: vsll_vx_nxv1i64_unmasked:1230; RV64: # %bb.0:1231; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma1232; RV64-NEXT: vsll.vx v8, v8, a01233; RV64-NEXT: ret1234 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01235 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1236 %v = call <vscale x 1 x i64> @llvm.vp.shl.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)1237 ret <vscale x 1 x i64> %v1238}1239 1240define <vscale x 1 x i64> @vsll_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1241; CHECK-LABEL: vsll_vi_nxv1i64:1242; CHECK: # %bb.0:1243; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1244; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t1245; CHECK-NEXT: ret1246 %v = call <vscale x 1 x i64> @llvm.vp.shl.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 3), <vscale x 1 x i1> %m, i32 %evl)1247 ret <vscale x 1 x i64> %v1248}1249 1250define <vscale x 1 x i64> @vsll_vi_nxv1i64_unmasked(<vscale x 1 x i64> %va, i32 zeroext %evl) {1251; CHECK-LABEL: vsll_vi_nxv1i64_unmasked:1252; CHECK: # %bb.0:1253; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1254; CHECK-NEXT: vsll.vi v8, v8, 31255; CHECK-NEXT: ret1256 %v = call <vscale x 1 x i64> @llvm.vp.shl.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 3), <vscale x 1 x i1> splat (i1 true), i32 %evl)1257 ret <vscale x 1 x i64> %v1258}1259 1260define <vscale x 2 x i64> @vsll_vv_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1261; CHECK-LABEL: vsll_vv_nxv2i64:1262; CHECK: # %bb.0:1263; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1264; CHECK-NEXT: vsll.vv v8, v8, v10, v0.t1265; CHECK-NEXT: ret1266 %v = call <vscale x 2 x i64> @llvm.vp.shl.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 %evl)1267 ret <vscale x 2 x i64> %v1268}1269 1270define <vscale x 2 x i64> @vsll_vv_nxv2i64_unmasked(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, i32 zeroext %evl) {1271; CHECK-LABEL: vsll_vv_nxv2i64_unmasked:1272; CHECK: # %bb.0:1273; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1274; CHECK-NEXT: vsll.vv v8, v8, v101275; CHECK-NEXT: ret1276 %v = call <vscale x 2 x i64> @llvm.vp.shl.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)1277 ret <vscale x 2 x i64> %v1278}1279 1280define <vscale x 2 x i64> @vsll_vx_nxv2i64(<vscale x 2 x i64> %va, i64 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1281; RV32-LABEL: vsll_vx_nxv2i64:1282; RV32: # %bb.0:1283; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma1284; RV32-NEXT: vsll.vx v8, v8, a0, v0.t1285; RV32-NEXT: ret1286;1287; RV64-LABEL: vsll_vx_nxv2i64:1288; RV64: # %bb.0:1289; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma1290; RV64-NEXT: vsll.vx v8, v8, a0, v0.t1291; RV64-NEXT: ret1292 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01293 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1294 %v = call <vscale x 2 x i64> @llvm.vp.shl.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 %evl)1295 ret <vscale x 2 x i64> %v1296}1297 1298define <vscale x 2 x i64> @vsll_vx_nxv2i64_unmasked(<vscale x 2 x i64> %va, i64 %b, i32 zeroext %evl) {1299; RV32-LABEL: vsll_vx_nxv2i64_unmasked:1300; RV32: # %bb.0:1301; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma1302; RV32-NEXT: vsll.vx v8, v8, a01303; RV32-NEXT: ret1304;1305; RV64-LABEL: vsll_vx_nxv2i64_unmasked:1306; RV64: # %bb.0:1307; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma1308; RV64-NEXT: vsll.vx v8, v8, a01309; RV64-NEXT: ret1310 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01311 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1312 %v = call <vscale x 2 x i64> @llvm.vp.shl.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)1313 ret <vscale x 2 x i64> %v1314}1315 1316define <vscale x 2 x i64> @vsll_vi_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {1317; CHECK-LABEL: vsll_vi_nxv2i64:1318; CHECK: # %bb.0:1319; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1320; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t1321; CHECK-NEXT: ret1322 %v = call <vscale x 2 x i64> @llvm.vp.shl.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> splat (i64 3), <vscale x 2 x i1> %m, i32 %evl)1323 ret <vscale x 2 x i64> %v1324}1325 1326define <vscale x 2 x i64> @vsll_vi_nxv2i64_unmasked(<vscale x 2 x i64> %va, i32 zeroext %evl) {1327; CHECK-LABEL: vsll_vi_nxv2i64_unmasked:1328; CHECK: # %bb.0:1329; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1330; CHECK-NEXT: vsll.vi v8, v8, 31331; CHECK-NEXT: ret1332 %v = call <vscale x 2 x i64> @llvm.vp.shl.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> splat (i64 3), <vscale x 2 x i1> splat (i1 true), i32 %evl)1333 ret <vscale x 2 x i64> %v1334}1335 1336define <vscale x 4 x i64> @vsll_vv_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1337; CHECK-LABEL: vsll_vv_nxv4i64:1338; CHECK: # %bb.0:1339; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1340; CHECK-NEXT: vsll.vv v8, v8, v12, v0.t1341; CHECK-NEXT: ret1342 %v = call <vscale x 4 x i64> @llvm.vp.shl.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 %evl)1343 ret <vscale x 4 x i64> %v1344}1345 1346define <vscale x 4 x i64> @vsll_vv_nxv4i64_unmasked(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, i32 zeroext %evl) {1347; CHECK-LABEL: vsll_vv_nxv4i64_unmasked:1348; CHECK: # %bb.0:1349; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1350; CHECK-NEXT: vsll.vv v8, v8, v121351; CHECK-NEXT: ret1352 %v = call <vscale x 4 x i64> @llvm.vp.shl.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)1353 ret <vscale x 4 x i64> %v1354}1355 1356define <vscale x 4 x i64> @vsll_vx_nxv4i64(<vscale x 4 x i64> %va, i64 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1357; RV32-LABEL: vsll_vx_nxv4i64:1358; RV32: # %bb.0:1359; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1360; RV32-NEXT: vsll.vx v8, v8, a0, v0.t1361; RV32-NEXT: ret1362;1363; RV64-LABEL: vsll_vx_nxv4i64:1364; RV64: # %bb.0:1365; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1366; RV64-NEXT: vsll.vx v8, v8, a0, v0.t1367; RV64-NEXT: ret1368 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01369 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1370 %v = call <vscale x 4 x i64> @llvm.vp.shl.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 %evl)1371 ret <vscale x 4 x i64> %v1372}1373 1374define <vscale x 4 x i64> @vsll_vx_nxv4i64_unmasked(<vscale x 4 x i64> %va, i64 %b, i32 zeroext %evl) {1375; RV32-LABEL: vsll_vx_nxv4i64_unmasked:1376; RV32: # %bb.0:1377; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1378; RV32-NEXT: vsll.vx v8, v8, a01379; RV32-NEXT: ret1380;1381; RV64-LABEL: vsll_vx_nxv4i64_unmasked:1382; RV64: # %bb.0:1383; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1384; RV64-NEXT: vsll.vx v8, v8, a01385; RV64-NEXT: ret1386 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01387 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1388 %v = call <vscale x 4 x i64> @llvm.vp.shl.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)1389 ret <vscale x 4 x i64> %v1390}1391 1392define <vscale x 4 x i64> @vsll_vi_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {1393; CHECK-LABEL: vsll_vi_nxv4i64:1394; CHECK: # %bb.0:1395; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1396; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t1397; CHECK-NEXT: ret1398 %v = call <vscale x 4 x i64> @llvm.vp.shl.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> splat (i64 3), <vscale x 4 x i1> %m, i32 %evl)1399 ret <vscale x 4 x i64> %v1400}1401 1402define <vscale x 4 x i64> @vsll_vi_nxv4i64_unmasked(<vscale x 4 x i64> %va, i32 zeroext %evl) {1403; CHECK-LABEL: vsll_vi_nxv4i64_unmasked:1404; CHECK: # %bb.0:1405; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1406; CHECK-NEXT: vsll.vi v8, v8, 31407; CHECK-NEXT: ret1408 %v = call <vscale x 4 x i64> @llvm.vp.shl.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> splat (i64 3), <vscale x 4 x i1> splat (i1 true), i32 %evl)1409 ret <vscale x 4 x i64> %v1410}1411 1412define <vscale x 8 x i64> @vsll_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1413; CHECK-LABEL: vsll_vv_nxv8i64:1414; CHECK: # %bb.0:1415; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1416; CHECK-NEXT: vsll.vv v8, v8, v16, v0.t1417; CHECK-NEXT: ret1418 %v = call <vscale x 8 x i64> @llvm.vp.shl.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 %evl)1419 ret <vscale x 8 x i64> %v1420}1421 1422define <vscale x 8 x i64> @vsll_vv_nxv8i64_unmasked(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, i32 zeroext %evl) {1423; CHECK-LABEL: vsll_vv_nxv8i64_unmasked:1424; CHECK: # %bb.0:1425; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1426; CHECK-NEXT: vsll.vv v8, v8, v161427; CHECK-NEXT: ret1428 %v = call <vscale x 8 x i64> @llvm.vp.shl.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)1429 ret <vscale x 8 x i64> %v1430}1431 1432define <vscale x 8 x i64> @vsll_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1433; RV32-LABEL: vsll_vx_nxv8i64:1434; RV32: # %bb.0:1435; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1436; RV32-NEXT: vsll.vx v8, v8, a0, v0.t1437; RV32-NEXT: ret1438;1439; RV64-LABEL: vsll_vx_nxv8i64:1440; RV64: # %bb.0:1441; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1442; RV64-NEXT: vsll.vx v8, v8, a0, v0.t1443; RV64-NEXT: ret1444 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01445 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1446 %v = call <vscale x 8 x i64> @llvm.vp.shl.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 %evl)1447 ret <vscale x 8 x i64> %v1448}1449 1450define <vscale x 8 x i64> @vsll_vx_nxv8i64_unmasked(<vscale x 8 x i64> %va, i64 %b, i32 zeroext %evl) {1451; RV32-LABEL: vsll_vx_nxv8i64_unmasked:1452; RV32: # %bb.0:1453; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1454; RV32-NEXT: vsll.vx v8, v8, a01455; RV32-NEXT: ret1456;1457; RV64-LABEL: vsll_vx_nxv8i64_unmasked:1458; RV64: # %bb.0:1459; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1460; RV64-NEXT: vsll.vx v8, v8, a01461; RV64-NEXT: ret1462 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01463 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1464 %v = call <vscale x 8 x i64> @llvm.vp.shl.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)1465 ret <vscale x 8 x i64> %v1466}1467 1468define <vscale x 8 x i64> @vsll_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1469; CHECK-LABEL: vsll_vi_nxv8i64:1470; CHECK: # %bb.0:1471; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1472; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t1473; CHECK-NEXT: ret1474 %v = call <vscale x 8 x i64> @llvm.vp.shl.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 3), <vscale x 8 x i1> %m, i32 %evl)1475 ret <vscale x 8 x i64> %v1476}1477 1478define <vscale x 8 x i64> @vsll_vi_nxv8i64_unmasked(<vscale x 8 x i64> %va, i32 zeroext %evl) {1479; CHECK-LABEL: vsll_vi_nxv8i64_unmasked:1480; CHECK: # %bb.0:1481; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1482; CHECK-NEXT: vsll.vi v8, v8, 31483; CHECK-NEXT: ret1484 %v = call <vscale x 8 x i64> @llvm.vp.shl.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 3), <vscale x 8 x i1> splat (i1 true), i32 %evl)1485 ret <vscale x 8 x i64> %v1486}1487