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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v,+zvksh \3; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK4; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v,+zvksh \5; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK6 7define <vscale x 8 x i32> @intrinsic_vsm3c_vi_nxv8i32_i32(<vscale x 8 x i32> %0, <vscale x 8 x i32> %1, iXLen %2) nounwind {8; CHECK-LABEL: intrinsic_vsm3c_vi_nxv8i32_i32:9; CHECK: # %bb.0: # %entry10; CHECK-NEXT: vsetvli zero, a0, e32, m4, tu, ma11; CHECK-NEXT: vsm3c.vi v8, v12, 212; CHECK-NEXT: ret13entry:14 %a = call <vscale x 8 x i32> @llvm.riscv.vsm3c.nxv8i32.i32(15 <vscale x 8 x i32> %0,16 <vscale x 8 x i32> %1,17 iXLen 2,18 iXLen %2,19 iXLen 2)20 21 ret <vscale x 8 x i32> %a22}23 24define <vscale x 16 x i32> @intrinsic_vsm3c_vi_nxv16i32_i32(<vscale x 16 x i32> %0, <vscale x 16 x i32> %1, iXLen %2) nounwind {25; CHECK-LABEL: intrinsic_vsm3c_vi_nxv16i32_i32:26; CHECK: # %bb.0: # %entry27; CHECK-NEXT: vsetvli zero, a0, e32, m8, tu, ma28; CHECK-NEXT: vsm3c.vi v8, v16, 229; CHECK-NEXT: ret30entry:31 %a = call <vscale x 16 x i32> @llvm.riscv.vsm3c.nxv16i32.i32(32 <vscale x 16 x i32> %0,33 <vscale x 16 x i32> %1,34 iXLen 2,35 iXLen %2,36 iXLen 2)37 38 ret <vscale x 16 x i32> %a39}40