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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <vscale x 8 x i7> @vsrl_vx_nxv8i7(<vscale x 8 x i7> %a, i7 signext %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {8; CHECK-LABEL: vsrl_vx_nxv8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: li a2, 12711; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma12; CHECK-NEXT: vmv.v.x v9, a013; CHECK-NEXT: vand.vx v8, v8, a2, v0.t14; CHECK-NEXT: vand.vx v9, v9, a2, v0.t15; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t16; CHECK-NEXT: ret17 %elt.head = insertelement <vscale x 8 x i7> poison, i7 %b, i32 018 %vb = shufflevector <vscale x 8 x i7> %elt.head, <vscale x 8 x i7> poison, <vscale x 8 x i32> zeroinitializer19 %v = call <vscale x 8 x i7> @llvm.vp.lshr.nxv8i7(<vscale x 8 x i7> %a, <vscale x 8 x i7> %vb, <vscale x 8 x i1> %mask, i32 %evl)20 ret <vscale x 8 x i7> %v21}22 23define <vscale x 1 x i8> @vsrl_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {24; CHECK-LABEL: vsrl_vv_nxv1i8:25; CHECK: # %bb.0:26; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma27; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t28; CHECK-NEXT: ret29 %v = call <vscale x 1 x i8> @llvm.vp.lshr.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 %evl)30 ret <vscale x 1 x i8> %v31}32 33define <vscale x 1 x i8> @vsrl_vv_nxv1i8_unmasked(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, i32 zeroext %evl) {34; CHECK-LABEL: vsrl_vv_nxv1i8_unmasked:35; CHECK: # %bb.0:36; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma37; CHECK-NEXT: vsrl.vv v8, v8, v938; CHECK-NEXT: ret39 %v = call <vscale x 1 x i8> @llvm.vp.lshr.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)40 ret <vscale x 1 x i8> %v41}42 43define <vscale x 1 x i8> @vsrl_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {44; CHECK-LABEL: vsrl_vx_nxv1i8:45; CHECK: # %bb.0:46; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma47; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t48; CHECK-NEXT: ret49 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 050 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer51 %v = call <vscale x 1 x i8> @llvm.vp.lshr.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 %evl)52 ret <vscale x 1 x i8> %v53}54 55define <vscale x 1 x i8> @vsrl_vx_nxv1i8_unmasked(<vscale x 1 x i8> %va, i8 %b, i32 zeroext %evl) {56; CHECK-LABEL: vsrl_vx_nxv1i8_unmasked:57; CHECK: # %bb.0:58; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma59; CHECK-NEXT: vsrl.vx v8, v8, a060; CHECK-NEXT: ret61 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 062 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer63 %v = call <vscale x 1 x i8> @llvm.vp.lshr.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)64 ret <vscale x 1 x i8> %v65}66 67define <vscale x 1 x i8> @vsrl_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {68; CHECK-LABEL: vsrl_vi_nxv1i8:69; CHECK: # %bb.0:70; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma71; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t72; CHECK-NEXT: ret73 %v = call <vscale x 1 x i8> @llvm.vp.lshr.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), <vscale x 1 x i1> %m, i32 %evl)74 ret <vscale x 1 x i8> %v75}76 77define <vscale x 1 x i8> @vsrl_vi_nxv1i8_unmasked(<vscale x 1 x i8> %va, i32 zeroext %evl) {78; CHECK-LABEL: vsrl_vi_nxv1i8_unmasked:79; CHECK: # %bb.0:80; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma81; CHECK-NEXT: vsrl.vi v8, v8, 482; CHECK-NEXT: ret83 %v = call <vscale x 1 x i8> @llvm.vp.lshr.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), <vscale x 1 x i1> splat (i1 true), i32 %evl)84 ret <vscale x 1 x i8> %v85}86 87define <vscale x 2 x i8> @vsrl_vv_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {88; CHECK-LABEL: vsrl_vv_nxv2i8:89; CHECK: # %bb.0:90; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma91; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t92; CHECK-NEXT: ret93 %v = call <vscale x 2 x i8> @llvm.vp.lshr.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 %evl)94 ret <vscale x 2 x i8> %v95}96 97define <vscale x 2 x i8> @vsrl_vv_nxv2i8_unmasked(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, i32 zeroext %evl) {98; CHECK-LABEL: vsrl_vv_nxv2i8_unmasked:99; CHECK: # %bb.0:100; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma101; CHECK-NEXT: vsrl.vv v8, v8, v9102; CHECK-NEXT: ret103 %v = call <vscale x 2 x i8> @llvm.vp.lshr.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)104 ret <vscale x 2 x i8> %v105}106 107define <vscale x 2 x i8> @vsrl_vx_nxv2i8(<vscale x 2 x i8> %va, i8 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {108; CHECK-LABEL: vsrl_vx_nxv2i8:109; CHECK: # %bb.0:110; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma111; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t112; CHECK-NEXT: ret113 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0114 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer115 %v = call <vscale x 2 x i8> @llvm.vp.lshr.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 %evl)116 ret <vscale x 2 x i8> %v117}118 119define <vscale x 2 x i8> @vsrl_vx_nxv2i8_unmasked(<vscale x 2 x i8> %va, i8 %b, i32 zeroext %evl) {120; CHECK-LABEL: vsrl_vx_nxv2i8_unmasked:121; CHECK: # %bb.0:122; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma123; CHECK-NEXT: vsrl.vx v8, v8, a0124; CHECK-NEXT: ret125 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0126 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer127 %v = call <vscale x 2 x i8> @llvm.vp.lshr.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)128 ret <vscale x 2 x i8> %v129}130 131define <vscale x 2 x i8> @vsrl_vi_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {132; CHECK-LABEL: vsrl_vi_nxv2i8:133; CHECK: # %bb.0:134; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma135; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t136; CHECK-NEXT: ret137 %v = call <vscale x 2 x i8> @llvm.vp.lshr.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> splat (i8 4), <vscale x 2 x i1> %m, i32 %evl)138 ret <vscale x 2 x i8> %v139}140 141define <vscale x 2 x i8> @vsrl_vi_nxv2i8_unmasked(<vscale x 2 x i8> %va, i32 zeroext %evl) {142; CHECK-LABEL: vsrl_vi_nxv2i8_unmasked:143; CHECK: # %bb.0:144; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma145; CHECK-NEXT: vsrl.vi v8, v8, 4146; CHECK-NEXT: ret147 %v = call <vscale x 2 x i8> @llvm.vp.lshr.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> splat (i8 4), <vscale x 2 x i1> splat (i1 true), i32 %evl)148 ret <vscale x 2 x i8> %v149}150 151define <vscale x 4 x i8> @vsrl_vv_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {152; CHECK-LABEL: vsrl_vv_nxv4i8:153; CHECK: # %bb.0:154; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma155; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t156; CHECK-NEXT: ret157 %v = call <vscale x 4 x i8> @llvm.vp.lshr.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 %evl)158 ret <vscale x 4 x i8> %v159}160 161define <vscale x 4 x i8> @vsrl_vv_nxv4i8_unmasked(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, i32 zeroext %evl) {162; CHECK-LABEL: vsrl_vv_nxv4i8_unmasked:163; CHECK: # %bb.0:164; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma165; CHECK-NEXT: vsrl.vv v8, v8, v9166; CHECK-NEXT: ret167 %v = call <vscale x 4 x i8> @llvm.vp.lshr.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)168 ret <vscale x 4 x i8> %v169}170 171define <vscale x 4 x i8> @vsrl_vx_nxv4i8(<vscale x 4 x i8> %va, i8 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {172; CHECK-LABEL: vsrl_vx_nxv4i8:173; CHECK: # %bb.0:174; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma175; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t176; CHECK-NEXT: ret177 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0178 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer179 %v = call <vscale x 4 x i8> @llvm.vp.lshr.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 %evl)180 ret <vscale x 4 x i8> %v181}182 183define <vscale x 4 x i8> @vsrl_vx_nxv4i8_unmasked(<vscale x 4 x i8> %va, i8 %b, i32 zeroext %evl) {184; CHECK-LABEL: vsrl_vx_nxv4i8_unmasked:185; CHECK: # %bb.0:186; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma187; CHECK-NEXT: vsrl.vx v8, v8, a0188; CHECK-NEXT: ret189 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0190 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer191 %v = call <vscale x 4 x i8> @llvm.vp.lshr.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)192 ret <vscale x 4 x i8> %v193}194 195define <vscale x 4 x i8> @vsrl_vi_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {196; CHECK-LABEL: vsrl_vi_nxv4i8:197; CHECK: # %bb.0:198; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma199; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t200; CHECK-NEXT: ret201 %v = call <vscale x 4 x i8> @llvm.vp.lshr.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> splat (i8 4), <vscale x 4 x i1> %m, i32 %evl)202 ret <vscale x 4 x i8> %v203}204 205define <vscale x 4 x i8> @vsrl_vi_nxv4i8_unmasked(<vscale x 4 x i8> %va, i32 zeroext %evl) {206; CHECK-LABEL: vsrl_vi_nxv4i8_unmasked:207; CHECK: # %bb.0:208; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma209; CHECK-NEXT: vsrl.vi v8, v8, 4210; CHECK-NEXT: ret211 %v = call <vscale x 4 x i8> @llvm.vp.lshr.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> splat (i8 4), <vscale x 4 x i1> splat (i1 true), i32 %evl)212 ret <vscale x 4 x i8> %v213}214 215define <vscale x 8 x i8> @vsrl_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {216; CHECK-LABEL: vsrl_vv_nxv8i8:217; CHECK: # %bb.0:218; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma219; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t220; CHECK-NEXT: ret221 %v = call <vscale x 8 x i8> @llvm.vp.lshr.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 %evl)222 ret <vscale x 8 x i8> %v223}224 225define <vscale x 8 x i8> @vsrl_vv_nxv8i8_unmasked(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, i32 zeroext %evl) {226; CHECK-LABEL: vsrl_vv_nxv8i8_unmasked:227; CHECK: # %bb.0:228; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma229; CHECK-NEXT: vsrl.vv v8, v8, v9230; CHECK-NEXT: ret231 %v = call <vscale x 8 x i8> @llvm.vp.lshr.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)232 ret <vscale x 8 x i8> %v233}234 235define <vscale x 8 x i8> @vsrl_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {236; CHECK-LABEL: vsrl_vx_nxv8i8:237; CHECK: # %bb.0:238; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma239; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t240; CHECK-NEXT: ret241 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0242 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer243 %v = call <vscale x 8 x i8> @llvm.vp.lshr.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 %evl)244 ret <vscale x 8 x i8> %v245}246 247define <vscale x 8 x i8> @vsrl_vx_nxv8i8_unmasked(<vscale x 8 x i8> %va, i8 %b, i32 zeroext %evl) {248; CHECK-LABEL: vsrl_vx_nxv8i8_unmasked:249; CHECK: # %bb.0:250; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma251; CHECK-NEXT: vsrl.vx v8, v8, a0252; CHECK-NEXT: ret253 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0254 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer255 %v = call <vscale x 8 x i8> @llvm.vp.lshr.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)256 ret <vscale x 8 x i8> %v257}258 259define <vscale x 8 x i8> @vsrl_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {260; CHECK-LABEL: vsrl_vi_nxv8i8:261; CHECK: # %bb.0:262; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma263; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t264; CHECK-NEXT: ret265 %v = call <vscale x 8 x i8> @llvm.vp.lshr.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), <vscale x 8 x i1> %m, i32 %evl)266 ret <vscale x 8 x i8> %v267}268 269define <vscale x 8 x i8> @vsrl_vi_nxv8i8_unmasked(<vscale x 8 x i8> %va, i32 zeroext %evl) {270; CHECK-LABEL: vsrl_vi_nxv8i8_unmasked:271; CHECK: # %bb.0:272; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma273; CHECK-NEXT: vsrl.vi v8, v8, 4274; CHECK-NEXT: ret275 %v = call <vscale x 8 x i8> @llvm.vp.lshr.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), <vscale x 8 x i1> splat (i1 true), i32 %evl)276 ret <vscale x 8 x i8> %v277}278 279define <vscale x 16 x i8> @vsrl_vv_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {280; CHECK-LABEL: vsrl_vv_nxv16i8:281; CHECK: # %bb.0:282; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma283; CHECK-NEXT: vsrl.vv v8, v8, v10, v0.t284; CHECK-NEXT: ret285 %v = call <vscale x 16 x i8> @llvm.vp.lshr.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 %evl)286 ret <vscale x 16 x i8> %v287}288 289define <vscale x 16 x i8> @vsrl_vv_nxv16i8_unmasked(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, i32 zeroext %evl) {290; CHECK-LABEL: vsrl_vv_nxv16i8_unmasked:291; CHECK: # %bb.0:292; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma293; CHECK-NEXT: vsrl.vv v8, v8, v10294; CHECK-NEXT: ret295 %v = call <vscale x 16 x i8> @llvm.vp.lshr.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)296 ret <vscale x 16 x i8> %v297}298 299define <vscale x 16 x i8> @vsrl_vx_nxv16i8(<vscale x 16 x i8> %va, i8 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {300; CHECK-LABEL: vsrl_vx_nxv16i8:301; CHECK: # %bb.0:302; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma303; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t304; CHECK-NEXT: ret305 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0306 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer307 %v = call <vscale x 16 x i8> @llvm.vp.lshr.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 %evl)308 ret <vscale x 16 x i8> %v309}310 311define <vscale x 16 x i8> @vsrl_vx_nxv16i8_unmasked(<vscale x 16 x i8> %va, i8 %b, i32 zeroext %evl) {312; CHECK-LABEL: vsrl_vx_nxv16i8_unmasked:313; CHECK: # %bb.0:314; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma315; CHECK-NEXT: vsrl.vx v8, v8, a0316; CHECK-NEXT: ret317 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0318 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer319 %v = call <vscale x 16 x i8> @llvm.vp.lshr.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)320 ret <vscale x 16 x i8> %v321}322 323define <vscale x 16 x i8> @vsrl_vi_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {324; CHECK-LABEL: vsrl_vi_nxv16i8:325; CHECK: # %bb.0:326; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma327; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t328; CHECK-NEXT: ret329 %v = call <vscale x 16 x i8> @llvm.vp.lshr.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> splat (i8 4), <vscale x 16 x i1> %m, i32 %evl)330 ret <vscale x 16 x i8> %v331}332 333define <vscale x 16 x i8> @vsrl_vi_nxv16i8_unmasked(<vscale x 16 x i8> %va, i32 zeroext %evl) {334; CHECK-LABEL: vsrl_vi_nxv16i8_unmasked:335; CHECK: # %bb.0:336; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma337; CHECK-NEXT: vsrl.vi v8, v8, 4338; CHECK-NEXT: ret339 %v = call <vscale x 16 x i8> @llvm.vp.lshr.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> splat (i8 4), <vscale x 16 x i1> splat (i1 true), i32 %evl)340 ret <vscale x 16 x i8> %v341}342 343define <vscale x 32 x i8> @vsrl_vv_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {344; CHECK-LABEL: vsrl_vv_nxv32i8:345; CHECK: # %bb.0:346; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma347; CHECK-NEXT: vsrl.vv v8, v8, v12, v0.t348; CHECK-NEXT: ret349 %v = call <vscale x 32 x i8> @llvm.vp.lshr.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 %evl)350 ret <vscale x 32 x i8> %v351}352 353define <vscale x 32 x i8> @vsrl_vv_nxv32i8_unmasked(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, i32 zeroext %evl) {354; CHECK-LABEL: vsrl_vv_nxv32i8_unmasked:355; CHECK: # %bb.0:356; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma357; CHECK-NEXT: vsrl.vv v8, v8, v12358; CHECK-NEXT: ret359 %v = call <vscale x 32 x i8> @llvm.vp.lshr.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)360 ret <vscale x 32 x i8> %v361}362 363define <vscale x 32 x i8> @vsrl_vx_nxv32i8(<vscale x 32 x i8> %va, i8 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {364; CHECK-LABEL: vsrl_vx_nxv32i8:365; CHECK: # %bb.0:366; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma367; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t368; CHECK-NEXT: ret369 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0370 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer371 %v = call <vscale x 32 x i8> @llvm.vp.lshr.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 %evl)372 ret <vscale x 32 x i8> %v373}374 375define <vscale x 32 x i8> @vsrl_vx_nxv32i8_unmasked(<vscale x 32 x i8> %va, i8 %b, i32 zeroext %evl) {376; CHECK-LABEL: vsrl_vx_nxv32i8_unmasked:377; CHECK: # %bb.0:378; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma379; CHECK-NEXT: vsrl.vx v8, v8, a0380; CHECK-NEXT: ret381 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0382 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer383 %v = call <vscale x 32 x i8> @llvm.vp.lshr.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)384 ret <vscale x 32 x i8> %v385}386 387define <vscale x 32 x i8> @vsrl_vi_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {388; CHECK-LABEL: vsrl_vi_nxv32i8:389; CHECK: # %bb.0:390; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma391; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t392; CHECK-NEXT: ret393 %v = call <vscale x 32 x i8> @llvm.vp.lshr.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> splat (i8 4), <vscale x 32 x i1> %m, i32 %evl)394 ret <vscale x 32 x i8> %v395}396 397define <vscale x 32 x i8> @vsrl_vi_nxv32i8_unmasked(<vscale x 32 x i8> %va, i32 zeroext %evl) {398; CHECK-LABEL: vsrl_vi_nxv32i8_unmasked:399; CHECK: # %bb.0:400; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma401; CHECK-NEXT: vsrl.vi v8, v8, 4402; CHECK-NEXT: ret403 %v = call <vscale x 32 x i8> @llvm.vp.lshr.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> splat (i8 4), <vscale x 32 x i1> splat (i1 true), i32 %evl)404 ret <vscale x 32 x i8> %v405}406 407define <vscale x 64 x i8> @vsrl_vv_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {408; CHECK-LABEL: vsrl_vv_nxv64i8:409; CHECK: # %bb.0:410; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma411; CHECK-NEXT: vsrl.vv v8, v8, v16, v0.t412; CHECK-NEXT: ret413 %v = call <vscale x 64 x i8> @llvm.vp.lshr.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 %evl)414 ret <vscale x 64 x i8> %v415}416 417define <vscale x 64 x i8> @vsrl_vv_nxv64i8_unmasked(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, i32 zeroext %evl) {418; CHECK-LABEL: vsrl_vv_nxv64i8_unmasked:419; CHECK: # %bb.0:420; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma421; CHECK-NEXT: vsrl.vv v8, v8, v16422; CHECK-NEXT: ret423 %v = call <vscale x 64 x i8> @llvm.vp.lshr.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> splat (i1 true), i32 %evl)424 ret <vscale x 64 x i8> %v425}426 427define <vscale x 64 x i8> @vsrl_vx_nxv64i8(<vscale x 64 x i8> %va, i8 %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {428; CHECK-LABEL: vsrl_vx_nxv64i8:429; CHECK: # %bb.0:430; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma431; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t432; CHECK-NEXT: ret433 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0434 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer435 %v = call <vscale x 64 x i8> @llvm.vp.lshr.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 %evl)436 ret <vscale x 64 x i8> %v437}438 439define <vscale x 64 x i8> @vsrl_vx_nxv64i8_unmasked(<vscale x 64 x i8> %va, i8 %b, i32 zeroext %evl) {440; CHECK-LABEL: vsrl_vx_nxv64i8_unmasked:441; CHECK: # %bb.0:442; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma443; CHECK-NEXT: vsrl.vx v8, v8, a0444; CHECK-NEXT: ret445 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0446 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer447 %v = call <vscale x 64 x i8> @llvm.vp.lshr.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> splat (i1 true), i32 %evl)448 ret <vscale x 64 x i8> %v449}450 451define <vscale x 64 x i8> @vsrl_vi_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i1> %m, i32 zeroext %evl) {452; CHECK-LABEL: vsrl_vi_nxv64i8:453; CHECK: # %bb.0:454; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma455; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t456; CHECK-NEXT: ret457 %v = call <vscale x 64 x i8> @llvm.vp.lshr.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> splat (i8 4), <vscale x 64 x i1> %m, i32 %evl)458 ret <vscale x 64 x i8> %v459}460 461define <vscale x 64 x i8> @vsrl_vi_nxv64i8_unmasked(<vscale x 64 x i8> %va, i32 zeroext %evl) {462; CHECK-LABEL: vsrl_vi_nxv64i8_unmasked:463; CHECK: # %bb.0:464; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma465; CHECK-NEXT: vsrl.vi v8, v8, 4466; CHECK-NEXT: ret467 %v = call <vscale x 64 x i8> @llvm.vp.lshr.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> splat (i8 4), <vscale x 64 x i1> splat (i1 true), i32 %evl)468 ret <vscale x 64 x i8> %v469}470 471define <vscale x 1 x i16> @vsrl_vv_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {472; CHECK-LABEL: vsrl_vv_nxv1i16:473; CHECK: # %bb.0:474; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma475; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t476; CHECK-NEXT: ret477 %v = call <vscale x 1 x i16> @llvm.vp.lshr.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 %evl)478 ret <vscale x 1 x i16> %v479}480 481define <vscale x 1 x i16> @vsrl_vv_nxv1i16_unmasked(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, i32 zeroext %evl) {482; CHECK-LABEL: vsrl_vv_nxv1i16_unmasked:483; CHECK: # %bb.0:484; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma485; CHECK-NEXT: vsrl.vv v8, v8, v9486; CHECK-NEXT: ret487 %v = call <vscale x 1 x i16> @llvm.vp.lshr.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)488 ret <vscale x 1 x i16> %v489}490 491define <vscale x 1 x i16> @vsrl_vx_nxv1i16(<vscale x 1 x i16> %va, i16 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {492; CHECK-LABEL: vsrl_vx_nxv1i16:493; CHECK: # %bb.0:494; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma495; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t496; CHECK-NEXT: ret497 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0498 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer499 %v = call <vscale x 1 x i16> @llvm.vp.lshr.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 %evl)500 ret <vscale x 1 x i16> %v501}502 503define <vscale x 1 x i16> @vsrl_vx_nxv1i16_unmasked(<vscale x 1 x i16> %va, i16 %b, i32 zeroext %evl) {504; CHECK-LABEL: vsrl_vx_nxv1i16_unmasked:505; CHECK: # %bb.0:506; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma507; CHECK-NEXT: vsrl.vx v8, v8, a0508; CHECK-NEXT: ret509 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0510 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer511 %v = call <vscale x 1 x i16> @llvm.vp.lshr.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)512 ret <vscale x 1 x i16> %v513}514 515define <vscale x 1 x i16> @vsrl_vi_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {516; CHECK-LABEL: vsrl_vi_nxv1i16:517; CHECK: # %bb.0:518; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma519; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t520; CHECK-NEXT: ret521 %v = call <vscale x 1 x i16> @llvm.vp.lshr.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> splat (i16 4), <vscale x 1 x i1> %m, i32 %evl)522 ret <vscale x 1 x i16> %v523}524 525define <vscale x 1 x i16> @vsrl_vi_nxv1i16_unmasked(<vscale x 1 x i16> %va, i32 zeroext %evl) {526; CHECK-LABEL: vsrl_vi_nxv1i16_unmasked:527; CHECK: # %bb.0:528; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma529; CHECK-NEXT: vsrl.vi v8, v8, 4530; CHECK-NEXT: ret531 %v = call <vscale x 1 x i16> @llvm.vp.lshr.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> splat (i16 4), <vscale x 1 x i1> splat (i1 true), i32 %evl)532 ret <vscale x 1 x i16> %v533}534 535define <vscale x 2 x i16> @vsrl_vv_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {536; CHECK-LABEL: vsrl_vv_nxv2i16:537; CHECK: # %bb.0:538; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma539; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t540; CHECK-NEXT: ret541 %v = call <vscale x 2 x i16> @llvm.vp.lshr.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 %evl)542 ret <vscale x 2 x i16> %v543}544 545define <vscale x 2 x i16> @vsrl_vv_nxv2i16_unmasked(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, i32 zeroext %evl) {546; CHECK-LABEL: vsrl_vv_nxv2i16_unmasked:547; CHECK: # %bb.0:548; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma549; CHECK-NEXT: vsrl.vv v8, v8, v9550; CHECK-NEXT: ret551 %v = call <vscale x 2 x i16> @llvm.vp.lshr.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)552 ret <vscale x 2 x i16> %v553}554 555define <vscale x 2 x i16> @vsrl_vx_nxv2i16(<vscale x 2 x i16> %va, i16 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {556; CHECK-LABEL: vsrl_vx_nxv2i16:557; CHECK: # %bb.0:558; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma559; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t560; CHECK-NEXT: ret561 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0562 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer563 %v = call <vscale x 2 x i16> @llvm.vp.lshr.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 %evl)564 ret <vscale x 2 x i16> %v565}566 567define <vscale x 2 x i16> @vsrl_vx_nxv2i16_unmasked(<vscale x 2 x i16> %va, i16 %b, i32 zeroext %evl) {568; CHECK-LABEL: vsrl_vx_nxv2i16_unmasked:569; CHECK: # %bb.0:570; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma571; CHECK-NEXT: vsrl.vx v8, v8, a0572; CHECK-NEXT: ret573 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0574 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer575 %v = call <vscale x 2 x i16> @llvm.vp.lshr.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)576 ret <vscale x 2 x i16> %v577}578 579define <vscale x 2 x i16> @vsrl_vi_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {580; CHECK-LABEL: vsrl_vi_nxv2i16:581; CHECK: # %bb.0:582; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma583; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t584; CHECK-NEXT: ret585 %v = call <vscale x 2 x i16> @llvm.vp.lshr.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> splat (i16 4), <vscale x 2 x i1> %m, i32 %evl)586 ret <vscale x 2 x i16> %v587}588 589define <vscale x 2 x i16> @vsrl_vi_nxv2i16_unmasked(<vscale x 2 x i16> %va, i32 zeroext %evl) {590; CHECK-LABEL: vsrl_vi_nxv2i16_unmasked:591; CHECK: # %bb.0:592; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma593; CHECK-NEXT: vsrl.vi v8, v8, 4594; CHECK-NEXT: ret595 %v = call <vscale x 2 x i16> @llvm.vp.lshr.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> splat (i16 4), <vscale x 2 x i1> splat (i1 true), i32 %evl)596 ret <vscale x 2 x i16> %v597}598 599define <vscale x 4 x i16> @vsrl_vv_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {600; CHECK-LABEL: vsrl_vv_nxv4i16:601; CHECK: # %bb.0:602; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma603; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t604; CHECK-NEXT: ret605 %v = call <vscale x 4 x i16> @llvm.vp.lshr.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 %evl)606 ret <vscale x 4 x i16> %v607}608 609define <vscale x 4 x i16> @vsrl_vv_nxv4i16_unmasked(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, i32 zeroext %evl) {610; CHECK-LABEL: vsrl_vv_nxv4i16_unmasked:611; CHECK: # %bb.0:612; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma613; CHECK-NEXT: vsrl.vv v8, v8, v9614; CHECK-NEXT: ret615 %v = call <vscale x 4 x i16> @llvm.vp.lshr.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)616 ret <vscale x 4 x i16> %v617}618 619define <vscale x 4 x i16> @vsrl_vx_nxv4i16(<vscale x 4 x i16> %va, i16 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {620; CHECK-LABEL: vsrl_vx_nxv4i16:621; CHECK: # %bb.0:622; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma623; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t624; CHECK-NEXT: ret625 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0626 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer627 %v = call <vscale x 4 x i16> @llvm.vp.lshr.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 %evl)628 ret <vscale x 4 x i16> %v629}630 631define <vscale x 4 x i16> @vsrl_vx_nxv4i16_unmasked(<vscale x 4 x i16> %va, i16 %b, i32 zeroext %evl) {632; CHECK-LABEL: vsrl_vx_nxv4i16_unmasked:633; CHECK: # %bb.0:634; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma635; CHECK-NEXT: vsrl.vx v8, v8, a0636; CHECK-NEXT: ret637 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0638 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer639 %v = call <vscale x 4 x i16> @llvm.vp.lshr.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)640 ret <vscale x 4 x i16> %v641}642 643define <vscale x 4 x i16> @vsrl_vi_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {644; CHECK-LABEL: vsrl_vi_nxv4i16:645; CHECK: # %bb.0:646; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma647; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t648; CHECK-NEXT: ret649 %v = call <vscale x 4 x i16> @llvm.vp.lshr.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> splat (i16 4), <vscale x 4 x i1> %m, i32 %evl)650 ret <vscale x 4 x i16> %v651}652 653define <vscale x 4 x i16> @vsrl_vi_nxv4i16_unmasked(<vscale x 4 x i16> %va, i32 zeroext %evl) {654; CHECK-LABEL: vsrl_vi_nxv4i16_unmasked:655; CHECK: # %bb.0:656; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma657; CHECK-NEXT: vsrl.vi v8, v8, 4658; CHECK-NEXT: ret659 %v = call <vscale x 4 x i16> @llvm.vp.lshr.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> splat (i16 4), <vscale x 4 x i1> splat (i1 true), i32 %evl)660 ret <vscale x 4 x i16> %v661}662 663define <vscale x 8 x i16> @vsrl_vv_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {664; CHECK-LABEL: vsrl_vv_nxv8i16:665; CHECK: # %bb.0:666; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma667; CHECK-NEXT: vsrl.vv v8, v8, v10, v0.t668; CHECK-NEXT: ret669 %v = call <vscale x 8 x i16> @llvm.vp.lshr.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 %evl)670 ret <vscale x 8 x i16> %v671}672 673define <vscale x 8 x i16> @vsrl_vv_nxv8i16_unmasked(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, i32 zeroext %evl) {674; CHECK-LABEL: vsrl_vv_nxv8i16_unmasked:675; CHECK: # %bb.0:676; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma677; CHECK-NEXT: vsrl.vv v8, v8, v10678; CHECK-NEXT: ret679 %v = call <vscale x 8 x i16> @llvm.vp.lshr.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)680 ret <vscale x 8 x i16> %v681}682 683define <vscale x 8 x i16> @vsrl_vx_nxv8i16(<vscale x 8 x i16> %va, i16 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {684; CHECK-LABEL: vsrl_vx_nxv8i16:685; CHECK: # %bb.0:686; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma687; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t688; CHECK-NEXT: ret689 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0690 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer691 %v = call <vscale x 8 x i16> @llvm.vp.lshr.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 %evl)692 ret <vscale x 8 x i16> %v693}694 695define <vscale x 8 x i16> @vsrl_vx_nxv8i16_unmasked(<vscale x 8 x i16> %va, i16 %b, i32 zeroext %evl) {696; CHECK-LABEL: vsrl_vx_nxv8i16_unmasked:697; CHECK: # %bb.0:698; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma699; CHECK-NEXT: vsrl.vx v8, v8, a0700; CHECK-NEXT: ret701 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0702 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer703 %v = call <vscale x 8 x i16> @llvm.vp.lshr.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)704 ret <vscale x 8 x i16> %v705}706 707define <vscale x 8 x i16> @vsrl_vi_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {708; CHECK-LABEL: vsrl_vi_nxv8i16:709; CHECK: # %bb.0:710; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma711; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t712; CHECK-NEXT: ret713 %v = call <vscale x 8 x i16> @llvm.vp.lshr.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> splat (i16 4), <vscale x 8 x i1> %m, i32 %evl)714 ret <vscale x 8 x i16> %v715}716 717define <vscale x 8 x i16> @vsrl_vi_nxv8i16_unmasked(<vscale x 8 x i16> %va, i32 zeroext %evl) {718; CHECK-LABEL: vsrl_vi_nxv8i16_unmasked:719; CHECK: # %bb.0:720; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma721; CHECK-NEXT: vsrl.vi v8, v8, 4722; CHECK-NEXT: ret723 %v = call <vscale x 8 x i16> @llvm.vp.lshr.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> splat (i16 4), <vscale x 8 x i1> splat (i1 true), i32 %evl)724 ret <vscale x 8 x i16> %v725}726 727define <vscale x 16 x i16> @vsrl_vv_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {728; CHECK-LABEL: vsrl_vv_nxv16i16:729; CHECK: # %bb.0:730; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma731; CHECK-NEXT: vsrl.vv v8, v8, v12, v0.t732; CHECK-NEXT: ret733 %v = call <vscale x 16 x i16> @llvm.vp.lshr.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 %evl)734 ret <vscale x 16 x i16> %v735}736 737define <vscale x 16 x i16> @vsrl_vv_nxv16i16_unmasked(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, i32 zeroext %evl) {738; CHECK-LABEL: vsrl_vv_nxv16i16_unmasked:739; CHECK: # %bb.0:740; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma741; CHECK-NEXT: vsrl.vv v8, v8, v12742; CHECK-NEXT: ret743 %v = call <vscale x 16 x i16> @llvm.vp.lshr.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)744 ret <vscale x 16 x i16> %v745}746 747define <vscale x 16 x i16> @vsrl_vx_nxv16i16(<vscale x 16 x i16> %va, i16 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {748; CHECK-LABEL: vsrl_vx_nxv16i16:749; CHECK: # %bb.0:750; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma751; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t752; CHECK-NEXT: ret753 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0754 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer755 %v = call <vscale x 16 x i16> @llvm.vp.lshr.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 %evl)756 ret <vscale x 16 x i16> %v757}758 759define <vscale x 16 x i16> @vsrl_vx_nxv16i16_unmasked(<vscale x 16 x i16> %va, i16 %b, i32 zeroext %evl) {760; CHECK-LABEL: vsrl_vx_nxv16i16_unmasked:761; CHECK: # %bb.0:762; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma763; CHECK-NEXT: vsrl.vx v8, v8, a0764; CHECK-NEXT: ret765 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0766 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer767 %v = call <vscale x 16 x i16> @llvm.vp.lshr.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)768 ret <vscale x 16 x i16> %v769}770 771define <vscale x 16 x i16> @vsrl_vi_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {772; CHECK-LABEL: vsrl_vi_nxv16i16:773; CHECK: # %bb.0:774; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma775; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t776; CHECK-NEXT: ret777 %v = call <vscale x 16 x i16> @llvm.vp.lshr.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> splat (i16 4), <vscale x 16 x i1> %m, i32 %evl)778 ret <vscale x 16 x i16> %v779}780 781define <vscale x 16 x i16> @vsrl_vi_nxv16i16_unmasked(<vscale x 16 x i16> %va, i32 zeroext %evl) {782; CHECK-LABEL: vsrl_vi_nxv16i16_unmasked:783; CHECK: # %bb.0:784; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma785; CHECK-NEXT: vsrl.vi v8, v8, 4786; CHECK-NEXT: ret787 %v = call <vscale x 16 x i16> @llvm.vp.lshr.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> splat (i16 4), <vscale x 16 x i1> splat (i1 true), i32 %evl)788 ret <vscale x 16 x i16> %v789}790 791define <vscale x 32 x i16> @vsrl_vv_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {792; CHECK-LABEL: vsrl_vv_nxv32i16:793; CHECK: # %bb.0:794; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma795; CHECK-NEXT: vsrl.vv v8, v8, v16, v0.t796; CHECK-NEXT: ret797 %v = call <vscale x 32 x i16> @llvm.vp.lshr.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 %evl)798 ret <vscale x 32 x i16> %v799}800 801define <vscale x 32 x i16> @vsrl_vv_nxv32i16_unmasked(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, i32 zeroext %evl) {802; CHECK-LABEL: vsrl_vv_nxv32i16_unmasked:803; CHECK: # %bb.0:804; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma805; CHECK-NEXT: vsrl.vv v8, v8, v16806; CHECK-NEXT: ret807 %v = call <vscale x 32 x i16> @llvm.vp.lshr.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)808 ret <vscale x 32 x i16> %v809}810 811define <vscale x 32 x i16> @vsrl_vx_nxv32i16(<vscale x 32 x i16> %va, i16 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {812; CHECK-LABEL: vsrl_vx_nxv32i16:813; CHECK: # %bb.0:814; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma815; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t816; CHECK-NEXT: ret817 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0818 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer819 %v = call <vscale x 32 x i16> @llvm.vp.lshr.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 %evl)820 ret <vscale x 32 x i16> %v821}822 823define <vscale x 32 x i16> @vsrl_vx_nxv32i16_unmasked(<vscale x 32 x i16> %va, i16 %b, i32 zeroext %evl) {824; CHECK-LABEL: vsrl_vx_nxv32i16_unmasked:825; CHECK: # %bb.0:826; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma827; CHECK-NEXT: vsrl.vx v8, v8, a0828; CHECK-NEXT: ret829 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0830 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer831 %v = call <vscale x 32 x i16> @llvm.vp.lshr.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)832 ret <vscale x 32 x i16> %v833}834 835define <vscale x 32 x i16> @vsrl_vi_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {836; CHECK-LABEL: vsrl_vi_nxv32i16:837; CHECK: # %bb.0:838; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma839; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t840; CHECK-NEXT: ret841 %v = call <vscale x 32 x i16> @llvm.vp.lshr.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> splat (i16 4), <vscale x 32 x i1> %m, i32 %evl)842 ret <vscale x 32 x i16> %v843}844 845define <vscale x 32 x i16> @vsrl_vi_nxv32i16_unmasked(<vscale x 32 x i16> %va, i32 zeroext %evl) {846; CHECK-LABEL: vsrl_vi_nxv32i16_unmasked:847; CHECK: # %bb.0:848; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma849; CHECK-NEXT: vsrl.vi v8, v8, 4850; CHECK-NEXT: ret851 %v = call <vscale x 32 x i16> @llvm.vp.lshr.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> splat (i16 4), <vscale x 32 x i1> splat (i1 true), i32 %evl)852 ret <vscale x 32 x i16> %v853}854 855define <vscale x 1 x i32> @vsrl_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {856; CHECK-LABEL: vsrl_vv_nxv1i32:857; CHECK: # %bb.0:858; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma859; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t860; CHECK-NEXT: ret861 %v = call <vscale x 1 x i32> @llvm.vp.lshr.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 %evl)862 ret <vscale x 1 x i32> %v863}864 865define <vscale x 1 x i32> @vsrl_vv_nxv1i32_unmasked(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, i32 zeroext %evl) {866; CHECK-LABEL: vsrl_vv_nxv1i32_unmasked:867; CHECK: # %bb.0:868; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma869; CHECK-NEXT: vsrl.vv v8, v8, v9870; CHECK-NEXT: ret871 %v = call <vscale x 1 x i32> @llvm.vp.lshr.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)872 ret <vscale x 1 x i32> %v873}874 875define <vscale x 1 x i32> @vsrl_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {876; CHECK-LABEL: vsrl_vx_nxv1i32:877; CHECK: # %bb.0:878; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma879; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t880; CHECK-NEXT: ret881 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0882 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer883 %v = call <vscale x 1 x i32> @llvm.vp.lshr.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 %evl)884 ret <vscale x 1 x i32> %v885}886 887define <vscale x 1 x i32> @vsrl_vx_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 %b, i32 zeroext %evl) {888; CHECK-LABEL: vsrl_vx_nxv1i32_unmasked:889; CHECK: # %bb.0:890; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma891; CHECK-NEXT: vsrl.vx v8, v8, a0892; CHECK-NEXT: ret893 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0894 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer895 %v = call <vscale x 1 x i32> @llvm.vp.lshr.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)896 ret <vscale x 1 x i32> %v897}898 899define <vscale x 1 x i32> @vsrl_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {900; CHECK-LABEL: vsrl_vi_nxv1i32:901; CHECK: # %bb.0:902; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma903; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t904; CHECK-NEXT: ret905 %v = call <vscale x 1 x i32> @llvm.vp.lshr.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), <vscale x 1 x i1> %m, i32 %evl)906 ret <vscale x 1 x i32> %v907}908 909define <vscale x 1 x i32> @vsrl_vi_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 zeroext %evl) {910; CHECK-LABEL: vsrl_vi_nxv1i32_unmasked:911; CHECK: # %bb.0:912; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma913; CHECK-NEXT: vsrl.vi v8, v8, 4914; CHECK-NEXT: ret915 %v = call <vscale x 1 x i32> @llvm.vp.lshr.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), <vscale x 1 x i1> splat (i1 true), i32 %evl)916 ret <vscale x 1 x i32> %v917}918 919define <vscale x 2 x i32> @vsrl_vv_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {920; CHECK-LABEL: vsrl_vv_nxv2i32:921; CHECK: # %bb.0:922; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma923; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t924; CHECK-NEXT: ret925 %v = call <vscale x 2 x i32> @llvm.vp.lshr.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 %evl)926 ret <vscale x 2 x i32> %v927}928 929define <vscale x 2 x i32> @vsrl_vv_nxv2i32_unmasked(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, i32 zeroext %evl) {930; CHECK-LABEL: vsrl_vv_nxv2i32_unmasked:931; CHECK: # %bb.0:932; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma933; CHECK-NEXT: vsrl.vv v8, v8, v9934; CHECK-NEXT: ret935 %v = call <vscale x 2 x i32> @llvm.vp.lshr.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)936 ret <vscale x 2 x i32> %v937}938 939define <vscale x 2 x i32> @vsrl_vx_nxv2i32(<vscale x 2 x i32> %va, i32 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {940; CHECK-LABEL: vsrl_vx_nxv2i32:941; CHECK: # %bb.0:942; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma943; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t944; CHECK-NEXT: ret945 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0946 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer947 %v = call <vscale x 2 x i32> @llvm.vp.lshr.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 %evl)948 ret <vscale x 2 x i32> %v949}950 951define <vscale x 2 x i32> @vsrl_vx_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 %b, i32 zeroext %evl) {952; CHECK-LABEL: vsrl_vx_nxv2i32_unmasked:953; CHECK: # %bb.0:954; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma955; CHECK-NEXT: vsrl.vx v8, v8, a0956; CHECK-NEXT: ret957 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0958 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer959 %v = call <vscale x 2 x i32> @llvm.vp.lshr.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)960 ret <vscale x 2 x i32> %v961}962 963define <vscale x 2 x i32> @vsrl_vi_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {964; CHECK-LABEL: vsrl_vi_nxv2i32:965; CHECK: # %bb.0:966; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma967; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t968; CHECK-NEXT: ret969 %v = call <vscale x 2 x i32> @llvm.vp.lshr.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> splat (i32 4), <vscale x 2 x i1> %m, i32 %evl)970 ret <vscale x 2 x i32> %v971}972 973define <vscale x 2 x i32> @vsrl_vi_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 zeroext %evl) {974; CHECK-LABEL: vsrl_vi_nxv2i32_unmasked:975; CHECK: # %bb.0:976; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma977; CHECK-NEXT: vsrl.vi v8, v8, 4978; CHECK-NEXT: ret979 %v = call <vscale x 2 x i32> @llvm.vp.lshr.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> splat (i32 4), <vscale x 2 x i1> splat (i1 true), i32 %evl)980 ret <vscale x 2 x i32> %v981}982 983define <vscale x 4 x i32> @vsrl_vv_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {984; CHECK-LABEL: vsrl_vv_nxv4i32:985; CHECK: # %bb.0:986; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma987; CHECK-NEXT: vsrl.vv v8, v8, v10, v0.t988; CHECK-NEXT: ret989 %v = call <vscale x 4 x i32> @llvm.vp.lshr.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 %evl)990 ret <vscale x 4 x i32> %v991}992 993define <vscale x 4 x i32> @vsrl_vv_nxv4i32_unmasked(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, i32 zeroext %evl) {994; CHECK-LABEL: vsrl_vv_nxv4i32_unmasked:995; CHECK: # %bb.0:996; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma997; CHECK-NEXT: vsrl.vv v8, v8, v10998; CHECK-NEXT: ret999 %v = call <vscale x 4 x i32> @llvm.vp.lshr.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)1000 ret <vscale x 4 x i32> %v1001}1002 1003define <vscale x 4 x i32> @vsrl_vx_nxv4i32(<vscale x 4 x i32> %va, i32 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1004; CHECK-LABEL: vsrl_vx_nxv4i32:1005; CHECK: # %bb.0:1006; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma1007; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t1008; CHECK-NEXT: ret1009 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 01010 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer1011 %v = call <vscale x 4 x i32> @llvm.vp.lshr.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 %evl)1012 ret <vscale x 4 x i32> %v1013}1014 1015define <vscale x 4 x i32> @vsrl_vx_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 %b, i32 zeroext %evl) {1016; CHECK-LABEL: vsrl_vx_nxv4i32_unmasked:1017; CHECK: # %bb.0:1018; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma1019; CHECK-NEXT: vsrl.vx v8, v8, a01020; CHECK-NEXT: ret1021 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 01022 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer1023 %v = call <vscale x 4 x i32> @llvm.vp.lshr.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)1024 ret <vscale x 4 x i32> %v1025}1026 1027define <vscale x 4 x i32> @vsrl_vi_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {1028; CHECK-LABEL: vsrl_vi_nxv4i32:1029; CHECK: # %bb.0:1030; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1031; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t1032; CHECK-NEXT: ret1033 %v = call <vscale x 4 x i32> @llvm.vp.lshr.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> splat (i32 4), <vscale x 4 x i1> %m, i32 %evl)1034 ret <vscale x 4 x i32> %v1035}1036 1037define <vscale x 4 x i32> @vsrl_vi_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 zeroext %evl) {1038; CHECK-LABEL: vsrl_vi_nxv4i32_unmasked:1039; CHECK: # %bb.0:1040; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1041; CHECK-NEXT: vsrl.vi v8, v8, 41042; CHECK-NEXT: ret1043 %v = call <vscale x 4 x i32> @llvm.vp.lshr.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> splat (i32 4), <vscale x 4 x i1> splat (i1 true), i32 %evl)1044 ret <vscale x 4 x i32> %v1045}1046 1047define <vscale x 8 x i32> @vsrl_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1048; CHECK-LABEL: vsrl_vv_nxv8i32:1049; CHECK: # %bb.0:1050; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1051; CHECK-NEXT: vsrl.vv v8, v8, v12, v0.t1052; CHECK-NEXT: ret1053 %v = call <vscale x 8 x i32> @llvm.vp.lshr.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 %evl)1054 ret <vscale x 8 x i32> %v1055}1056 1057define <vscale x 8 x i32> @vsrl_vv_nxv8i32_unmasked(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, i32 zeroext %evl) {1058; CHECK-LABEL: vsrl_vv_nxv8i32_unmasked:1059; CHECK: # %bb.0:1060; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1061; CHECK-NEXT: vsrl.vv v8, v8, v121062; CHECK-NEXT: ret1063 %v = call <vscale x 8 x i32> @llvm.vp.lshr.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)1064 ret <vscale x 8 x i32> %v1065}1066 1067define <vscale x 8 x i32> @vsrl_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1068; CHECK-LABEL: vsrl_vx_nxv8i32:1069; CHECK: # %bb.0:1070; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma1071; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t1072; CHECK-NEXT: ret1073 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01074 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1075 %v = call <vscale x 8 x i32> @llvm.vp.lshr.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 %evl)1076 ret <vscale x 8 x i32> %v1077}1078 1079define <vscale x 8 x i32> @vsrl_vx_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 %b, i32 zeroext %evl) {1080; CHECK-LABEL: vsrl_vx_nxv8i32_unmasked:1081; CHECK: # %bb.0:1082; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma1083; CHECK-NEXT: vsrl.vx v8, v8, a01084; CHECK-NEXT: ret1085 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01086 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1087 %v = call <vscale x 8 x i32> @llvm.vp.lshr.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)1088 ret <vscale x 8 x i32> %v1089}1090 1091define <vscale x 8 x i32> @vsrl_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1092; CHECK-LABEL: vsrl_vi_nxv8i32:1093; CHECK: # %bb.0:1094; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1095; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t1096; CHECK-NEXT: ret1097 %v = call <vscale x 8 x i32> @llvm.vp.lshr.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), <vscale x 8 x i1> %m, i32 %evl)1098 ret <vscale x 8 x i32> %v1099}1100 1101define <vscale x 8 x i32> @vsrl_vi_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 zeroext %evl) {1102; CHECK-LABEL: vsrl_vi_nxv8i32_unmasked:1103; CHECK: # %bb.0:1104; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1105; CHECK-NEXT: vsrl.vi v8, v8, 41106; CHECK-NEXT: ret1107 %v = call <vscale x 8 x i32> @llvm.vp.lshr.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), <vscale x 8 x i1> splat (i1 true), i32 %evl)1108 ret <vscale x 8 x i32> %v1109}1110 1111define <vscale x 16 x i32> @vsrl_vv_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {1112; CHECK-LABEL: vsrl_vv_nxv16i32:1113; CHECK: # %bb.0:1114; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1115; CHECK-NEXT: vsrl.vv v8, v8, v16, v0.t1116; CHECK-NEXT: ret1117 %v = call <vscale x 16 x i32> @llvm.vp.lshr.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 %evl)1118 ret <vscale x 16 x i32> %v1119}1120 1121define <vscale x 16 x i32> @vsrl_vv_nxv16i32_unmasked(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, i32 zeroext %evl) {1122; CHECK-LABEL: vsrl_vv_nxv16i32_unmasked:1123; CHECK: # %bb.0:1124; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1125; CHECK-NEXT: vsrl.vv v8, v8, v161126; CHECK-NEXT: ret1127 %v = call <vscale x 16 x i32> @llvm.vp.lshr.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)1128 ret <vscale x 16 x i32> %v1129}1130 1131define <vscale x 16 x i32> @vsrl_vx_nxv16i32(<vscale x 16 x i32> %va, i32 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {1132; CHECK-LABEL: vsrl_vx_nxv16i32:1133; CHECK: # %bb.0:1134; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma1135; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t1136; CHECK-NEXT: ret1137 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 01138 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer1139 %v = call <vscale x 16 x i32> @llvm.vp.lshr.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 %evl)1140 ret <vscale x 16 x i32> %v1141}1142 1143define <vscale x 16 x i32> @vsrl_vx_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 %b, i32 zeroext %evl) {1144; CHECK-LABEL: vsrl_vx_nxv16i32_unmasked:1145; CHECK: # %bb.0:1146; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma1147; CHECK-NEXT: vsrl.vx v8, v8, a01148; CHECK-NEXT: ret1149 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 01150 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer1151 %v = call <vscale x 16 x i32> @llvm.vp.lshr.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)1152 ret <vscale x 16 x i32> %v1153}1154 1155define <vscale x 16 x i32> @vsrl_vi_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {1156; CHECK-LABEL: vsrl_vi_nxv16i32:1157; CHECK: # %bb.0:1158; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1159; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t1160; CHECK-NEXT: ret1161 %v = call <vscale x 16 x i32> @llvm.vp.lshr.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> splat (i32 4), <vscale x 16 x i1> %m, i32 %evl)1162 ret <vscale x 16 x i32> %v1163}1164 1165define <vscale x 16 x i32> @vsrl_vi_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 zeroext %evl) {1166; CHECK-LABEL: vsrl_vi_nxv16i32_unmasked:1167; CHECK: # %bb.0:1168; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1169; CHECK-NEXT: vsrl.vi v8, v8, 41170; CHECK-NEXT: ret1171 %v = call <vscale x 16 x i32> @llvm.vp.lshr.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> splat (i32 4), <vscale x 16 x i1> splat (i1 true), i32 %evl)1172 ret <vscale x 16 x i32> %v1173}1174 1175define <vscale x 1 x i64> @vsrl_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1176; CHECK-LABEL: vsrl_vv_nxv1i64:1177; CHECK: # %bb.0:1178; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1179; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t1180; CHECK-NEXT: ret1181 %v = call <vscale x 1 x i64> @llvm.vp.lshr.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 %evl)1182 ret <vscale x 1 x i64> %v1183}1184 1185define <vscale x 1 x i64> @vsrl_vv_nxv1i64_unmasked(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, i32 zeroext %evl) {1186; CHECK-LABEL: vsrl_vv_nxv1i64_unmasked:1187; CHECK: # %bb.0:1188; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1189; CHECK-NEXT: vsrl.vv v8, v8, v91190; CHECK-NEXT: ret1191 %v = call <vscale x 1 x i64> @llvm.vp.lshr.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)1192 ret <vscale x 1 x i64> %v1193}1194 1195define <vscale x 1 x i64> @vsrl_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1196; RV32-LABEL: vsrl_vx_nxv1i64:1197; RV32: # %bb.0:1198; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma1199; RV32-NEXT: vsrl.vx v8, v8, a0, v0.t1200; RV32-NEXT: ret1201;1202; RV64-LABEL: vsrl_vx_nxv1i64:1203; RV64: # %bb.0:1204; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma1205; RV64-NEXT: vsrl.vx v8, v8, a0, v0.t1206; RV64-NEXT: ret1207 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01208 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1209 %v = call <vscale x 1 x i64> @llvm.vp.lshr.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 %evl)1210 ret <vscale x 1 x i64> %v1211}1212 1213define <vscale x 1 x i64> @vsrl_vx_nxv1i64_unmasked(<vscale x 1 x i64> %va, i64 %b, i32 zeroext %evl) {1214; RV32-LABEL: vsrl_vx_nxv1i64_unmasked:1215; RV32: # %bb.0:1216; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma1217; RV32-NEXT: vsrl.vx v8, v8, a01218; RV32-NEXT: ret1219;1220; RV64-LABEL: vsrl_vx_nxv1i64_unmasked:1221; RV64: # %bb.0:1222; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma1223; RV64-NEXT: vsrl.vx v8, v8, a01224; RV64-NEXT: ret1225 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01226 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1227 %v = call <vscale x 1 x i64> @llvm.vp.lshr.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)1228 ret <vscale x 1 x i64> %v1229}1230 1231define <vscale x 1 x i64> @vsrl_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1232; CHECK-LABEL: vsrl_vi_nxv1i64:1233; CHECK: # %bb.0:1234; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1235; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t1236; CHECK-NEXT: ret1237 %v = call <vscale x 1 x i64> @llvm.vp.lshr.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), <vscale x 1 x i1> %m, i32 %evl)1238 ret <vscale x 1 x i64> %v1239}1240 1241define <vscale x 1 x i64> @vsrl_vi_nxv1i64_unmasked(<vscale x 1 x i64> %va, i32 zeroext %evl) {1242; CHECK-LABEL: vsrl_vi_nxv1i64_unmasked:1243; CHECK: # %bb.0:1244; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1245; CHECK-NEXT: vsrl.vi v8, v8, 41246; CHECK-NEXT: ret1247 %v = call <vscale x 1 x i64> @llvm.vp.lshr.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), <vscale x 1 x i1> splat (i1 true), i32 %evl)1248 ret <vscale x 1 x i64> %v1249}1250 1251define <vscale x 2 x i64> @vsrl_vv_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1252; CHECK-LABEL: vsrl_vv_nxv2i64:1253; CHECK: # %bb.0:1254; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1255; CHECK-NEXT: vsrl.vv v8, v8, v10, v0.t1256; CHECK-NEXT: ret1257 %v = call <vscale x 2 x i64> @llvm.vp.lshr.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 %evl)1258 ret <vscale x 2 x i64> %v1259}1260 1261define <vscale x 2 x i64> @vsrl_vv_nxv2i64_unmasked(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, i32 zeroext %evl) {1262; CHECK-LABEL: vsrl_vv_nxv2i64_unmasked:1263; CHECK: # %bb.0:1264; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1265; CHECK-NEXT: vsrl.vv v8, v8, v101266; CHECK-NEXT: ret1267 %v = call <vscale x 2 x i64> @llvm.vp.lshr.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)1268 ret <vscale x 2 x i64> %v1269}1270 1271define <vscale x 2 x i64> @vsrl_vx_nxv2i64(<vscale x 2 x i64> %va, i64 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1272; RV32-LABEL: vsrl_vx_nxv2i64:1273; RV32: # %bb.0:1274; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma1275; RV32-NEXT: vsrl.vx v8, v8, a0, v0.t1276; RV32-NEXT: ret1277;1278; RV64-LABEL: vsrl_vx_nxv2i64:1279; RV64: # %bb.0:1280; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma1281; RV64-NEXT: vsrl.vx v8, v8, a0, v0.t1282; RV64-NEXT: ret1283 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01284 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1285 %v = call <vscale x 2 x i64> @llvm.vp.lshr.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 %evl)1286 ret <vscale x 2 x i64> %v1287}1288 1289define <vscale x 2 x i64> @vsrl_vx_nxv2i64_unmasked(<vscale x 2 x i64> %va, i64 %b, i32 zeroext %evl) {1290; RV32-LABEL: vsrl_vx_nxv2i64_unmasked:1291; RV32: # %bb.0:1292; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma1293; RV32-NEXT: vsrl.vx v8, v8, a01294; RV32-NEXT: ret1295;1296; RV64-LABEL: vsrl_vx_nxv2i64_unmasked:1297; RV64: # %bb.0:1298; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma1299; RV64-NEXT: vsrl.vx v8, v8, a01300; RV64-NEXT: ret1301 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01302 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1303 %v = call <vscale x 2 x i64> @llvm.vp.lshr.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)1304 ret <vscale x 2 x i64> %v1305}1306 1307define <vscale x 2 x i64> @vsrl_vi_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {1308; CHECK-LABEL: vsrl_vi_nxv2i64:1309; CHECK: # %bb.0:1310; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1311; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t1312; CHECK-NEXT: ret1313 %v = call <vscale x 2 x i64> @llvm.vp.lshr.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> splat (i64 4), <vscale x 2 x i1> %m, i32 %evl)1314 ret <vscale x 2 x i64> %v1315}1316 1317define <vscale x 2 x i64> @vsrl_vi_nxv2i64_unmasked(<vscale x 2 x i64> %va, i32 zeroext %evl) {1318; CHECK-LABEL: vsrl_vi_nxv2i64_unmasked:1319; CHECK: # %bb.0:1320; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1321; CHECK-NEXT: vsrl.vi v8, v8, 41322; CHECK-NEXT: ret1323 %v = call <vscale x 2 x i64> @llvm.vp.lshr.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> splat (i64 4), <vscale x 2 x i1> splat (i1 true), i32 %evl)1324 ret <vscale x 2 x i64> %v1325}1326 1327define <vscale x 4 x i64> @vsrl_vv_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1328; CHECK-LABEL: vsrl_vv_nxv4i64:1329; CHECK: # %bb.0:1330; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1331; CHECK-NEXT: vsrl.vv v8, v8, v12, v0.t1332; CHECK-NEXT: ret1333 %v = call <vscale x 4 x i64> @llvm.vp.lshr.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 %evl)1334 ret <vscale x 4 x i64> %v1335}1336 1337define <vscale x 4 x i64> @vsrl_vv_nxv4i64_unmasked(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, i32 zeroext %evl) {1338; CHECK-LABEL: vsrl_vv_nxv4i64_unmasked:1339; CHECK: # %bb.0:1340; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1341; CHECK-NEXT: vsrl.vv v8, v8, v121342; CHECK-NEXT: ret1343 %v = call <vscale x 4 x i64> @llvm.vp.lshr.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)1344 ret <vscale x 4 x i64> %v1345}1346 1347define <vscale x 4 x i64> @vsrl_vx_nxv4i64(<vscale x 4 x i64> %va, i64 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1348; RV32-LABEL: vsrl_vx_nxv4i64:1349; RV32: # %bb.0:1350; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1351; RV32-NEXT: vsrl.vx v8, v8, a0, v0.t1352; RV32-NEXT: ret1353;1354; RV64-LABEL: vsrl_vx_nxv4i64:1355; RV64: # %bb.0:1356; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1357; RV64-NEXT: vsrl.vx v8, v8, a0, v0.t1358; RV64-NEXT: ret1359 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01360 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1361 %v = call <vscale x 4 x i64> @llvm.vp.lshr.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 %evl)1362 ret <vscale x 4 x i64> %v1363}1364 1365define <vscale x 4 x i64> @vsrl_vx_nxv4i64_unmasked(<vscale x 4 x i64> %va, i64 %b, i32 zeroext %evl) {1366; RV32-LABEL: vsrl_vx_nxv4i64_unmasked:1367; RV32: # %bb.0:1368; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1369; RV32-NEXT: vsrl.vx v8, v8, a01370; RV32-NEXT: ret1371;1372; RV64-LABEL: vsrl_vx_nxv4i64_unmasked:1373; RV64: # %bb.0:1374; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1375; RV64-NEXT: vsrl.vx v8, v8, a01376; RV64-NEXT: ret1377 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01378 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1379 %v = call <vscale x 4 x i64> @llvm.vp.lshr.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)1380 ret <vscale x 4 x i64> %v1381}1382 1383define <vscale x 4 x i64> @vsrl_vi_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {1384; CHECK-LABEL: vsrl_vi_nxv4i64:1385; CHECK: # %bb.0:1386; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1387; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t1388; CHECK-NEXT: ret1389 %v = call <vscale x 4 x i64> @llvm.vp.lshr.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> splat (i64 4), <vscale x 4 x i1> %m, i32 %evl)1390 ret <vscale x 4 x i64> %v1391}1392 1393define <vscale x 4 x i64> @vsrl_vi_nxv4i64_unmasked(<vscale x 4 x i64> %va, i32 zeroext %evl) {1394; CHECK-LABEL: vsrl_vi_nxv4i64_unmasked:1395; CHECK: # %bb.0:1396; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1397; CHECK-NEXT: vsrl.vi v8, v8, 41398; CHECK-NEXT: ret1399 %v = call <vscale x 4 x i64> @llvm.vp.lshr.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> splat (i64 4), <vscale x 4 x i1> splat (i1 true), i32 %evl)1400 ret <vscale x 4 x i64> %v1401}1402 1403define <vscale x 5 x i64> @vsrl_vv_nxv5i64(<vscale x 5 x i64> %va, <vscale x 5 x i64> %b, <vscale x 5 x i1> %m, i32 zeroext %evl) {1404; CHECK-LABEL: vsrl_vv_nxv5i64:1405; CHECK: # %bb.0:1406; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1407; CHECK-NEXT: vsrl.vv v8, v8, v16, v0.t1408; CHECK-NEXT: ret1409 %v = call <vscale x 5 x i64> @llvm.vp.lshr.nxv5i64(<vscale x 5 x i64> %va, <vscale x 5 x i64> %b, <vscale x 5 x i1> %m, i32 %evl)1410 ret <vscale x 5 x i64> %v1411}1412 1413define <vscale x 8 x i64> @vsrl_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1414; CHECK-LABEL: vsrl_vv_nxv8i64:1415; CHECK: # %bb.0:1416; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1417; CHECK-NEXT: vsrl.vv v8, v8, v16, v0.t1418; CHECK-NEXT: ret1419 %v = call <vscale x 8 x i64> @llvm.vp.lshr.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 %evl)1420 ret <vscale x 8 x i64> %v1421}1422 1423define <vscale x 8 x i64> @vsrl_vv_nxv8i64_unmasked(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, i32 zeroext %evl) {1424; CHECK-LABEL: vsrl_vv_nxv8i64_unmasked:1425; CHECK: # %bb.0:1426; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1427; CHECK-NEXT: vsrl.vv v8, v8, v161428; CHECK-NEXT: ret1429 %v = call <vscale x 8 x i64> @llvm.vp.lshr.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)1430 ret <vscale x 8 x i64> %v1431}1432 1433define <vscale x 8 x i64> @vsrl_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1434; RV32-LABEL: vsrl_vx_nxv8i64:1435; RV32: # %bb.0:1436; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1437; RV32-NEXT: vsrl.vx v8, v8, a0, v0.t1438; RV32-NEXT: ret1439;1440; RV64-LABEL: vsrl_vx_nxv8i64:1441; RV64: # %bb.0:1442; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1443; RV64-NEXT: vsrl.vx v8, v8, a0, v0.t1444; RV64-NEXT: ret1445 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01446 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1447 %v = call <vscale x 8 x i64> @llvm.vp.lshr.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 %evl)1448 ret <vscale x 8 x i64> %v1449}1450 1451define <vscale x 8 x i64> @vsrl_vx_nxv8i64_unmasked(<vscale x 8 x i64> %va, i64 %b, i32 zeroext %evl) {1452; RV32-LABEL: vsrl_vx_nxv8i64_unmasked:1453; RV32: # %bb.0:1454; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1455; RV32-NEXT: vsrl.vx v8, v8, a01456; RV32-NEXT: ret1457;1458; RV64-LABEL: vsrl_vx_nxv8i64_unmasked:1459; RV64: # %bb.0:1460; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1461; RV64-NEXT: vsrl.vx v8, v8, a01462; RV64-NEXT: ret1463 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01464 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1465 %v = call <vscale x 8 x i64> @llvm.vp.lshr.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)1466 ret <vscale x 8 x i64> %v1467}1468 1469define <vscale x 8 x i64> @vsrl_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1470; CHECK-LABEL: vsrl_vi_nxv8i64:1471; CHECK: # %bb.0:1472; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1473; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t1474; CHECK-NEXT: ret1475 %v = call <vscale x 8 x i64> @llvm.vp.lshr.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), <vscale x 8 x i1> %m, i32 %evl)1476 ret <vscale x 8 x i64> %v1477}1478 1479define <vscale x 8 x i64> @vsrl_vi_nxv8i64_unmasked(<vscale x 8 x i64> %va, i32 zeroext %evl) {1480; CHECK-LABEL: vsrl_vi_nxv8i64_unmasked:1481; CHECK: # %bb.0:1482; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1483; CHECK-NEXT: vsrl.vi v8, v8, 41484; CHECK-NEXT: ret1485 %v = call <vscale x 8 x i64> @llvm.vp.lshr.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), <vscale x 8 x i1> splat (i1 true), i32 %evl)1486 ret <vscale x 8 x i64> %v1487}1488