brintos / llvm-project-archived public Read only

1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -mattr=+zve64d,+f,+d,+zvfh,+zvfbfmin \3; RUN:     -verify-machineinstrs < %s | FileCheck %s4 5define void @test_vsseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) %val, ptr %base, i64 %vl) {6; CHECK-LABEL: test_vsseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t:7; CHECK:       # %bb.0: # %entry8; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma9; CHECK-NEXT:    vsseg2e8.v v8, (a0)10; CHECK-NEXT:    ret11entry:12  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv1i8_2t(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) %val, ptr %base, i64 %vl, i64 3)13  ret void14}15 16define void @test_vsseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {17; CHECK-LABEL: test_vsseg2_mask_nxv1i8_triscv.vector.tuple_nxv1i8_2t:18; CHECK:       # %bb.0: # %entry19; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma20; CHECK-NEXT:    vsseg2e8.v v8, (a0), v0.t21; CHECK-NEXT:    ret22entry:23  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 3)24  ret void25}26 27define void @test_vsseg2_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_2t(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {28; CHECK-LABEL: test_vsseg2_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_2t:29; CHECK:       # %bb.0: # %entry30; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma31; CHECK-NEXT:    vsseg2e8.v v8, (a0)32; CHECK-NEXT:    ret33entry:34  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) %val, ptr %base, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 3)35  ret void36}37 38define void @test_vsseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, i64 %vl) {39; CHECK-LABEL: test_vsseg2_nxv2i8_triscv.vector.tuple_nxv2i8_2t:40; CHECK:       # %bb.0: # %entry41; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma42; CHECK-NEXT:    vsseg2e8.v v8, (a0)43; CHECK-NEXT:    ret44entry:45  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv2i8_2t(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, i64 %vl, i64 3)46  ret void47}48 49define void @test_vsseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2t(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {50; CHECK-LABEL: test_vsseg2_mask_nxv2i8_triscv.vector.tuple_nxv2i8_2t:51; CHECK:       # %bb.0: # %entry52; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma53; CHECK-NEXT:    vsseg2e8.v v8, (a0), v0.t54; CHECK-NEXT:    ret55entry:56  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv2i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 3)57  ret void58}59 60define void @test_vsseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl) {61; CHECK-LABEL: test_vsseg2_nxv4i8_triscv.vector.tuple_nxv4i8_2t:62; CHECK:       # %bb.0: # %entry63; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma64; CHECK-NEXT:    vsseg2e8.v v8, (a0)65; CHECK-NEXT:    ret66entry:67  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl, i64 3)68  ret void69}70 71define void @test_vsseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {72; CHECK-LABEL: test_vsseg2_mask_nxv4i8_triscv.vector.tuple_nxv4i8_2t:73; CHECK:       # %bb.0: # %entry74; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma75; CHECK-NEXT:    vsseg2e8.v v8, (a0), v0.t76; CHECK-NEXT:    ret77entry:78  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv4i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 3)79  ret void80}81 82define void @test_vsseg2_nxv8i8_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl) {83; CHECK-LABEL: test_vsseg2_nxv8i8_triscv.vector.tuple_nxv8i8_2t:84; CHECK:       # %bb.0: # %entry85; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma86; CHECK-NEXT:    vsseg2e8.v v8, (a0)87; CHECK-NEXT:    ret88entry:89  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, i64 3)90  ret void91}92 93define void @test_vsseg2_mask_nxv8i8_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {94; CHECK-LABEL: test_vsseg2_mask_nxv8i8_triscv.vector.tuple_nxv8i8_2t:95; CHECK:       # %bb.0: # %entry96; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma97; CHECK-NEXT:    vsseg2e8.v v8, (a0), v0.t98; CHECK-NEXT:    ret99entry:100  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv8i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 3)101  ret void102}103 104define void @test_vsseg2_nxv16i8_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl) {105; CHECK-LABEL: test_vsseg2_nxv16i8_triscv.vector.tuple_nxv16i8_2t:106; CHECK:       # %bb.0: # %entry107; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, ma108; CHECK-NEXT:    vsseg2e8.v v8, (a0)109; CHECK-NEXT:    ret110entry:111  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, i64 3)112  ret void113}114 115define void @test_vsseg2_mask_nxv16i8_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 16 x i1> %mask) {116; CHECK-LABEL: test_vsseg2_mask_nxv16i8_triscv.vector.tuple_nxv16i8_2t:117; CHECK:       # %bb.0: # %entry118; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, ma119; CHECK-NEXT:    vsseg2e8.v v8, (a0), v0.t120; CHECK-NEXT:    ret121entry:122  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv16i8_2t.nxv16i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, <vscale x 16 x i1> %mask, i64 %vl, i64 3)123  ret void124}125 126define void @test_vsseg2_nxv32i8_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl) {127; CHECK-LABEL: test_vsseg2_nxv32i8_triscv.vector.tuple_nxv32i8_2t:128; CHECK:       # %bb.0: # %entry129; CHECK-NEXT:    vsetvli zero, a1, e8, m4, ta, ma130; CHECK-NEXT:    vsseg2e8.v v8, (a0)131; CHECK-NEXT:    ret132entry:133  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, i64 3)134  ret void135}136 137define void @test_vsseg2_mask_nxv32i8_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 32 x i1> %mask) {138; CHECK-LABEL: test_vsseg2_mask_nxv32i8_triscv.vector.tuple_nxv32i8_2t:139; CHECK:       # %bb.0: # %entry140; CHECK-NEXT:    vsetvli zero, a1, e8, m4, ta, ma141; CHECK-NEXT:    vsseg2e8.v v8, (a0), v0.t142; CHECK-NEXT:    ret143entry:144  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv32i8_2t.nxv32i1(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, <vscale x 32 x i1> %mask, i64 %vl, i64 3)145  ret void146}147 148define void @test_vsseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) %val, ptr %base, i64 %vl) {149; CHECK-LABEL: test_vsseg3_nxv1i8_triscv.vector.tuple_nxv1i8_3t:150; CHECK:       # %bb.0: # %entry151; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma152; CHECK-NEXT:    vsseg3e8.v v8, (a0)153; CHECK-NEXT:    ret154entry:155  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv1i8_3t(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) %val, ptr %base, i64 %vl, i64 3)156  ret void157}158 159define void @test_vsseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {160; CHECK-LABEL: test_vsseg3_mask_nxv1i8_triscv.vector.tuple_nxv1i8_3t:161; CHECK:       # %bb.0: # %entry162; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma163; CHECK-NEXT:    vsseg3e8.v v8, (a0), v0.t164; CHECK-NEXT:    ret165entry:166  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 3)167  ret void168}169 170define void @test_vsseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, i64 %vl) {171; CHECK-LABEL: test_vsseg3_nxv2i8_triscv.vector.tuple_nxv2i8_3t:172; CHECK:       # %bb.0: # %entry173; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma174; CHECK-NEXT:    vsseg3e8.v v8, (a0)175; CHECK-NEXT:    ret176entry:177  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv2i8_3t(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, i64 %vl, i64 3)178  ret void179}180 181define void @test_vsseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3t(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {182; CHECK-LABEL: test_vsseg3_mask_nxv2i8_triscv.vector.tuple_nxv2i8_3t:183; CHECK:       # %bb.0: # %entry184; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma185; CHECK-NEXT:    vsseg3e8.v v8, (a0), v0.t186; CHECK-NEXT:    ret187entry:188  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv2i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 3)189  ret void190}191 192define void @test_vsseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl) {193; CHECK-LABEL: test_vsseg3_nxv4i8_triscv.vector.tuple_nxv4i8_3t:194; CHECK:       # %bb.0: # %entry195; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma196; CHECK-NEXT:    vsseg3e8.v v8, (a0)197; CHECK-NEXT:    ret198entry:199  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl, i64 3)200  ret void201}202 203define void @test_vsseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {204; CHECK-LABEL: test_vsseg3_mask_nxv4i8_triscv.vector.tuple_nxv4i8_3t:205; CHECK:       # %bb.0: # %entry206; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma207; CHECK-NEXT:    vsseg3e8.v v8, (a0), v0.t208; CHECK-NEXT:    ret209entry:210  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv4i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 3)211  ret void212}213 214define void @test_vsseg3_nxv8i8_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl) {215; CHECK-LABEL: test_vsseg3_nxv8i8_triscv.vector.tuple_nxv8i8_3t:216; CHECK:       # %bb.0: # %entry217; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma218; CHECK-NEXT:    vsseg3e8.v v8, (a0)219; CHECK-NEXT:    ret220entry:221  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, i64 3)222  ret void223}224 225define void @test_vsseg3_mask_nxv8i8_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {226; CHECK-LABEL: test_vsseg3_mask_nxv8i8_triscv.vector.tuple_nxv8i8_3t:227; CHECK:       # %bb.0: # %entry228; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma229; CHECK-NEXT:    vsseg3e8.v v8, (a0), v0.t230; CHECK-NEXT:    ret231entry:232  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv8i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 3)233  ret void234}235 236define void @test_vsseg3_nxv16i8_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl) {237; CHECK-LABEL: test_vsseg3_nxv16i8_triscv.vector.tuple_nxv16i8_3t:238; CHECK:       # %bb.0: # %entry239; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, ma240; CHECK-NEXT:    vsseg3e8.v v8, (a0)241; CHECK-NEXT:    ret242entry:243  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, i64 3)244  ret void245}246 247define void @test_vsseg3_mask_nxv16i8_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 16 x i1> %mask) {248; CHECK-LABEL: test_vsseg3_mask_nxv16i8_triscv.vector.tuple_nxv16i8_3t:249; CHECK:       # %bb.0: # %entry250; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, ma251; CHECK-NEXT:    vsseg3e8.v v8, (a0), v0.t252; CHECK-NEXT:    ret253entry:254  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv16i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, <vscale x 16 x i1> %mask, i64 %vl, i64 3)255  ret void256}257 258define void @test_vsseg3_allonesmask_nxv16i8_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 16 x i1> %mask) {259; CHECK-LABEL: test_vsseg3_allonesmask_nxv16i8_triscv.vector.tuple_nxv16i8_3t:260; CHECK:       # %bb.0: # %entry261; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, ma262; CHECK-NEXT:    vsseg3e8.v v8, (a0)263; CHECK-NEXT:    ret264entry:265  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv16i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, <vscale x 16 x i1> splat (i1 true), i64 %vl, i64 3)266  ret void267}268 269define void @test_vsseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) %val, ptr %base, i64 %vl) {270; CHECK-LABEL: test_vsseg4_nxv1i8_triscv.vector.tuple_nxv1i8_4t:271; CHECK:       # %bb.0: # %entry272; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma273; CHECK-NEXT:    vsseg4e8.v v8, (a0)274; CHECK-NEXT:    ret275entry:276  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv1i8_4t(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) %val, ptr %base, i64 %vl, i64 3)277  ret void278}279 280define void @test_vsseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {281; CHECK-LABEL: test_vsseg4_mask_nxv1i8_triscv.vector.tuple_nxv1i8_4t:282; CHECK:       # %bb.0: # %entry283; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma284; CHECK-NEXT:    vsseg4e8.v v8, (a0), v0.t285; CHECK-NEXT:    ret286entry:287  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 3)288  ret void289}290 291define void @test_vsseg4_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_4t(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {292; CHECK-LABEL: test_vsseg4_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_4t:293; CHECK:       # %bb.0: # %entry294; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma295; CHECK-NEXT:    vsseg4e8.v v8, (a0)296; CHECK-NEXT:    ret297entry:298  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) %val, ptr %base, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 3)299  ret void300}301 302define void @test_vsseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, i64 %vl) {303; CHECK-LABEL: test_vsseg4_nxv2i8_triscv.vector.tuple_nxv2i8_4t:304; CHECK:       # %bb.0: # %entry305; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma306; CHECK-NEXT:    vsseg4e8.v v8, (a0)307; CHECK-NEXT:    ret308entry:309  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv2i8_4t(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, i64 %vl, i64 3)310  ret void311}312 313define void @test_vsseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4t(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {314; CHECK-LABEL: test_vsseg4_mask_nxv2i8_triscv.vector.tuple_nxv2i8_4t:315; CHECK:       # %bb.0: # %entry316; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma317; CHECK-NEXT:    vsseg4e8.v v8, (a0), v0.t318; CHECK-NEXT:    ret319entry:320  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv2i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 3)321  ret void322}323 324define void @test_vsseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl) {325; CHECK-LABEL: test_vsseg4_nxv4i8_triscv.vector.tuple_nxv4i8_4t:326; CHECK:       # %bb.0: # %entry327; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma328; CHECK-NEXT:    vsseg4e8.v v8, (a0)329; CHECK-NEXT:    ret330entry:331  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl, i64 3)332  ret void333}334 335define void @test_vsseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {336; CHECK-LABEL: test_vsseg4_mask_nxv4i8_triscv.vector.tuple_nxv4i8_4t:337; CHECK:       # %bb.0: # %entry338; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma339; CHECK-NEXT:    vsseg4e8.v v8, (a0), v0.t340; CHECK-NEXT:    ret341entry:342  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv4i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 3)343  ret void344}345 346define void @test_vsseg4_nxv8i8_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl) {347; CHECK-LABEL: test_vsseg4_nxv8i8_triscv.vector.tuple_nxv8i8_4t:348; CHECK:       # %bb.0: # %entry349; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma350; CHECK-NEXT:    vsseg4e8.v v8, (a0)351; CHECK-NEXT:    ret352entry:353  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, i64 3)354  ret void355}356 357define void @test_vsseg4_mask_nxv8i8_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {358; CHECK-LABEL: test_vsseg4_mask_nxv8i8_triscv.vector.tuple_nxv8i8_4t:359; CHECK:       # %bb.0: # %entry360; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma361; CHECK-NEXT:    vsseg4e8.v v8, (a0), v0.t362; CHECK-NEXT:    ret363entry:364  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv8i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 3)365  ret void366}367 368define void @test_vsseg4_nxv16i8_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl) {369; CHECK-LABEL: test_vsseg4_nxv16i8_triscv.vector.tuple_nxv16i8_4t:370; CHECK:       # %bb.0: # %entry371; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, ma372; CHECK-NEXT:    vsseg4e8.v v8, (a0)373; CHECK-NEXT:    ret374entry:375  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, i64 3)376  ret void377}378 379define void @test_vsseg4_mask_nxv16i8_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 16 x i1> %mask) {380; CHECK-LABEL: test_vsseg4_mask_nxv16i8_triscv.vector.tuple_nxv16i8_4t:381; CHECK:       # %bb.0: # %entry382; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, ma383; CHECK-NEXT:    vsseg4e8.v v8, (a0), v0.t384; CHECK-NEXT:    ret385entry:386  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv16i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, <vscale x 16 x i1> %mask, i64 %vl, i64 3)387  ret void388}389 390define void @test_vsseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) %val, ptr %base, i64 %vl) {391; CHECK-LABEL: test_vsseg5_nxv1i8_triscv.vector.tuple_nxv1i8_5t:392; CHECK:       # %bb.0: # %entry393; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma394; CHECK-NEXT:    vsseg5e8.v v8, (a0)395; CHECK-NEXT:    ret396entry:397  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv1i8_5t(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) %val, ptr %base, i64 %vl, i64 3)398  ret void399}400 401define void @test_vsseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {402; CHECK-LABEL: test_vsseg5_mask_nxv1i8_triscv.vector.tuple_nxv1i8_5t:403; CHECK:       # %bb.0: # %entry404; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma405; CHECK-NEXT:    vsseg5e8.v v8, (a0), v0.t406; CHECK-NEXT:    ret407entry:408  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 3)409  ret void410}411 412define void @test_vsseg5_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_5t(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {413; CHECK-LABEL: test_vsseg5_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_5t:414; CHECK:       # %bb.0: # %entry415; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma416; CHECK-NEXT:    vsseg5e8.v v8, (a0)417; CHECK-NEXT:    ret418entry:419  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) %val, ptr %base, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 3)420  ret void421}422 423define void @test_vsseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, i64 %vl) {424; CHECK-LABEL: test_vsseg5_nxv2i8_triscv.vector.tuple_nxv2i8_5t:425; CHECK:       # %bb.0: # %entry426; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma427; CHECK-NEXT:    vsseg5e8.v v8, (a0)428; CHECK-NEXT:    ret429entry:430  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv2i8_5t(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, i64 %vl, i64 3)431  ret void432}433 434define void @test_vsseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {435; CHECK-LABEL: test_vsseg5_mask_nxv2i8_triscv.vector.tuple_nxv2i8_5t:436; CHECK:       # %bb.0: # %entry437; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma438; CHECK-NEXT:    vsseg5e8.v v8, (a0), v0.t439; CHECK-NEXT:    ret440entry:441  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 3)442  ret void443}444 445define void @test_vsseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl) {446; CHECK-LABEL: test_vsseg5_nxv4i8_triscv.vector.tuple_nxv4i8_5t:447; CHECK:       # %bb.0: # %entry448; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma449; CHECK-NEXT:    vsseg5e8.v v8, (a0)450; CHECK-NEXT:    ret451entry:452  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl, i64 3)453  ret void454}455 456define void @test_vsseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {457; CHECK-LABEL: test_vsseg5_mask_nxv4i8_triscv.vector.tuple_nxv4i8_5t:458; CHECK:       # %bb.0: # %entry459; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma460; CHECK-NEXT:    vsseg5e8.v v8, (a0), v0.t461; CHECK-NEXT:    ret462entry:463  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv4i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 3)464  ret void465}466 467define void @test_vsseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl) {468; CHECK-LABEL: test_vsseg5_nxv8i8_triscv.vector.tuple_nxv8i8_5t:469; CHECK:       # %bb.0: # %entry470; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma471; CHECK-NEXT:    vsseg5e8.v v8, (a0)472; CHECK-NEXT:    ret473entry:474  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, i64 3)475  ret void476}477 478define void @test_vsseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {479; CHECK-LABEL: test_vsseg5_mask_nxv8i8_triscv.vector.tuple_nxv8i8_5t:480; CHECK:       # %bb.0: # %entry481; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma482; CHECK-NEXT:    vsseg5e8.v v8, (a0), v0.t483; CHECK-NEXT:    ret484entry:485  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv8i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 3)486  ret void487}488 489define void @test_vsseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) %val, ptr %base, i64 %vl) {490; CHECK-LABEL: test_vsseg6_nxv1i8_triscv.vector.tuple_nxv1i8_6t:491; CHECK:       # %bb.0: # %entry492; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma493; CHECK-NEXT:    vsseg6e8.v v8, (a0)494; CHECK-NEXT:    ret495entry:496  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv1i8_6t(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) %val, ptr %base, i64 %vl, i64 3)497  ret void498}499 500define void @test_vsseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {501; CHECK-LABEL: test_vsseg6_mask_nxv1i8_triscv.vector.tuple_nxv1i8_6t:502; CHECK:       # %bb.0: # %entry503; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma504; CHECK-NEXT:    vsseg6e8.v v8, (a0), v0.t505; CHECK-NEXT:    ret506entry:507  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 3)508  ret void509}510 511define void @test_vsseg6_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_6t(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {512; CHECK-LABEL: test_vsseg6_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_6t:513; CHECK:       # %bb.0: # %entry514; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma515; CHECK-NEXT:    vsseg6e8.v v8, (a0)516; CHECK-NEXT:    ret517entry:518  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) %val, ptr %base, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 3)519  ret void520}521 522define void @test_vsseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, i64 %vl) {523; CHECK-LABEL: test_vsseg6_nxv2i8_triscv.vector.tuple_nxv2i8_6t:524; CHECK:       # %bb.0: # %entry525; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma526; CHECK-NEXT:    vsseg6e8.v v8, (a0)527; CHECK-NEXT:    ret528entry:529  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv2i8_6t(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, i64 %vl, i64 3)530  ret void531}532 533define void @test_vsseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {534; CHECK-LABEL: test_vsseg6_mask_nxv2i8_triscv.vector.tuple_nxv2i8_6t:535; CHECK:       # %bb.0: # %entry536; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma537; CHECK-NEXT:    vsseg6e8.v v8, (a0), v0.t538; CHECK-NEXT:    ret539entry:540  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 3)541  ret void542}543 544define void @test_vsseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl) {545; CHECK-LABEL: test_vsseg6_nxv4i8_triscv.vector.tuple_nxv4i8_6t:546; CHECK:       # %bb.0: # %entry547; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma548; CHECK-NEXT:    vsseg6e8.v v8, (a0)549; CHECK-NEXT:    ret550entry:551  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl, i64 3)552  ret void553}554 555define void @test_vsseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {556; CHECK-LABEL: test_vsseg6_mask_nxv4i8_triscv.vector.tuple_nxv4i8_6t:557; CHECK:       # %bb.0: # %entry558; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma559; CHECK-NEXT:    vsseg6e8.v v8, (a0), v0.t560; CHECK-NEXT:    ret561entry:562  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv4i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 3)563  ret void564}565 566define void @test_vsseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl) {567; CHECK-LABEL: test_vsseg6_nxv8i8_triscv.vector.tuple_nxv8i8_6t:568; CHECK:       # %bb.0: # %entry569; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma570; CHECK-NEXT:    vsseg6e8.v v8, (a0)571; CHECK-NEXT:    ret572entry:573  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, i64 3)574  ret void575}576 577define void @test_vsseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {578; CHECK-LABEL: test_vsseg6_mask_nxv8i8_triscv.vector.tuple_nxv8i8_6t:579; CHECK:       # %bb.0: # %entry580; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma581; CHECK-NEXT:    vsseg6e8.v v8, (a0), v0.t582; CHECK-NEXT:    ret583entry:584  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv8i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 3)585  ret void586}587 588define void @test_vsseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) %val, ptr %base, i64 %vl) {589; CHECK-LABEL: test_vsseg7_nxv1i8_triscv.vector.tuple_nxv1i8_7t:590; CHECK:       # %bb.0: # %entry591; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma592; CHECK-NEXT:    vsseg7e8.v v8, (a0)593; CHECK-NEXT:    ret594entry:595  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv1i8_7t(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) %val, ptr %base, i64 %vl, i64 3)596  ret void597}598 599define void @test_vsseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {600; CHECK-LABEL: test_vsseg7_mask_nxv1i8_triscv.vector.tuple_nxv1i8_7t:601; CHECK:       # %bb.0: # %entry602; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma603; CHECK-NEXT:    vsseg7e8.v v8, (a0), v0.t604; CHECK-NEXT:    ret605entry:606  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 3)607  ret void608}609 610define void @test_vsseg7_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_7t(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {611; CHECK-LABEL: test_vsseg7_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_7t:612; CHECK:       # %bb.0: # %entry613; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma614; CHECK-NEXT:    vsseg7e8.v v8, (a0)615; CHECK-NEXT:    ret616entry:617  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) %val, ptr %base, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 3)618  ret void619}620 621define void @test_vsseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, i64 %vl) {622; CHECK-LABEL: test_vsseg7_nxv2i8_triscv.vector.tuple_nxv2i8_7t:623; CHECK:       # %bb.0: # %entry624; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma625; CHECK-NEXT:    vsseg7e8.v v8, (a0)626; CHECK-NEXT:    ret627entry:628  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv2i8_7t(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, i64 %vl, i64 3)629  ret void630}631 632define void @test_vsseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {633; CHECK-LABEL: test_vsseg7_mask_nxv2i8_triscv.vector.tuple_nxv2i8_7t:634; CHECK:       # %bb.0: # %entry635; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma636; CHECK-NEXT:    vsseg7e8.v v8, (a0), v0.t637; CHECK-NEXT:    ret638entry:639  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 3)640  ret void641}642 643define void @test_vsseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl) {644; CHECK-LABEL: test_vsseg7_nxv4i8_triscv.vector.tuple_nxv4i8_7t:645; CHECK:       # %bb.0: # %entry646; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma647; CHECK-NEXT:    vsseg7e8.v v8, (a0)648; CHECK-NEXT:    ret649entry:650  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl, i64 3)651  ret void652}653 654define void @test_vsseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {655; CHECK-LABEL: test_vsseg7_mask_nxv4i8_triscv.vector.tuple_nxv4i8_7t:656; CHECK:       # %bb.0: # %entry657; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma658; CHECK-NEXT:    vsseg7e8.v v8, (a0), v0.t659; CHECK-NEXT:    ret660entry:661  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv4i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 3)662  ret void663}664 665define void @test_vsseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl) {666; CHECK-LABEL: test_vsseg7_nxv8i8_triscv.vector.tuple_nxv8i8_7t:667; CHECK:       # %bb.0: # %entry668; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma669; CHECK-NEXT:    vsseg7e8.v v8, (a0)670; CHECK-NEXT:    ret671entry:672  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, i64 3)673  ret void674}675 676define void @test_vsseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {677; CHECK-LABEL: test_vsseg7_mask_nxv8i8_triscv.vector.tuple_nxv8i8_7t:678; CHECK:       # %bb.0: # %entry679; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma680; CHECK-NEXT:    vsseg7e8.v v8, (a0), v0.t681; CHECK-NEXT:    ret682entry:683  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv8i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 3)684  ret void685}686 687define void @test_vsseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) %val, ptr %base, i64 %vl) {688; CHECK-LABEL: test_vsseg8_nxv1i8_triscv.vector.tuple_nxv1i8_8t:689; CHECK:       # %bb.0: # %entry690; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma691; CHECK-NEXT:    vsseg8e8.v v8, (a0)692; CHECK-NEXT:    ret693entry:694  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv1i8_8t(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) %val, ptr %base, i64 %vl, i64 3)695  ret void696}697 698define void @test_vsseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {699; CHECK-LABEL: test_vsseg8_mask_nxv1i8_triscv.vector.tuple_nxv1i8_8t:700; CHECK:       # %bb.0: # %entry701; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma702; CHECK-NEXT:    vsseg8e8.v v8, (a0), v0.t703; CHECK-NEXT:    ret704entry:705  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 3)706  ret void707}708 709define void @test_vsseg8_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_8t(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {710; CHECK-LABEL: test_vsseg8_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_8t:711; CHECK:       # %bb.0: # %entry712; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma713; CHECK-NEXT:    vsseg8e8.v v8, (a0)714; CHECK-NEXT:    ret715entry:716  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) %val, ptr %base, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 3)717  ret void718}719 720define void @test_vsseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, i64 %vl) {721; CHECK-LABEL: test_vsseg8_nxv2i8_triscv.vector.tuple_nxv2i8_8t:722; CHECK:       # %bb.0: # %entry723; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma724; CHECK-NEXT:    vsseg8e8.v v8, (a0)725; CHECK-NEXT:    ret726entry:727  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv2i8_8t(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, i64 %vl, i64 3)728  ret void729}730 731define void @test_vsseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {732; CHECK-LABEL: test_vsseg8_mask_nxv2i8_triscv.vector.tuple_nxv2i8_8t:733; CHECK:       # %bb.0: # %entry734; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma735; CHECK-NEXT:    vsseg8e8.v v8, (a0), v0.t736; CHECK-NEXT:    ret737entry:738  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 3)739  ret void740}741 742define void @test_vsseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl) {743; CHECK-LABEL: test_vsseg8_nxv4i8_triscv.vector.tuple_nxv4i8_8t:744; CHECK:       # %bb.0: # %entry745; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma746; CHECK-NEXT:    vsseg8e8.v v8, (a0)747; CHECK-NEXT:    ret748entry:749  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl, i64 3)750  ret void751}752 753define void @test_vsseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {754; CHECK-LABEL: test_vsseg8_mask_nxv4i8_triscv.vector.tuple_nxv4i8_8t:755; CHECK:       # %bb.0: # %entry756; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma757; CHECK-NEXT:    vsseg8e8.v v8, (a0), v0.t758; CHECK-NEXT:    ret759entry:760  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv4i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 3)761  ret void762}763 764define void @test_vsseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl) {765; CHECK-LABEL: test_vsseg8_nxv8i8_triscv.vector.tuple_nxv8i8_8t:766; CHECK:       # %bb.0: # %entry767; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma768; CHECK-NEXT:    vsseg8e8.v v8, (a0)769; CHECK-NEXT:    ret770entry:771  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, i64 3)772  ret void773}774 775define void @test_vsseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {776; CHECK-LABEL: test_vsseg8_mask_nxv8i8_triscv.vector.tuple_nxv8i8_8t:777; CHECK:       # %bb.0: # %entry778; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma779; CHECK-NEXT:    vsseg8e8.v v8, (a0), v0.t780; CHECK-NEXT:    ret781entry:782  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv8i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 3)783  ret void784}785 786define void @test_vsseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, i64 %vl) {787; CHECK-LABEL: test_vsseg2_nxv1i16_triscv.vector.tuple_nxv2i8_2t:788; CHECK:       # %bb.0: # %entry789; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma790; CHECK-NEXT:    vsseg2e16.v v8, (a0)791; CHECK-NEXT:    ret792entry:793  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv2i8_2t(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, i64 %vl, i64 4)794  ret void795}796 797define void @test_vsseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {798; CHECK-LABEL: test_vsseg2_mask_nxv1i16_triscv.vector.tuple_nxv2i8_2t:799; CHECK:       # %bb.0: # %entry800; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma801; CHECK-NEXT:    vsseg2e16.v v8, (a0), v0.t802; CHECK-NEXT:    ret803entry:804  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)805  ret void806}807 808define void @test_vsseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl) {809; CHECK-LABEL: test_vsseg2_nxv2i16_triscv.vector.tuple_nxv4i8_2t:810; CHECK:       # %bb.0: # %entry811; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma812; CHECK-NEXT:    vsseg2e16.v v8, (a0)813; CHECK-NEXT:    ret814entry:815  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl, i64 4)816  ret void817}818 819define void @test_vsseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {820; CHECK-LABEL: test_vsseg2_mask_nxv2i16_triscv.vector.tuple_nxv4i8_2t:821; CHECK:       # %bb.0: # %entry822; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma823; CHECK-NEXT:    vsseg2e16.v v8, (a0), v0.t824; CHECK-NEXT:    ret825entry:826  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)827  ret void828}829 830define void @test_vsseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl) {831; CHECK-LABEL: test_vsseg2_nxv4i16_triscv.vector.tuple_nxv8i8_2t:832; CHECK:       # %bb.0: # %entry833; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma834; CHECK-NEXT:    vsseg2e16.v v8, (a0)835; CHECK-NEXT:    ret836entry:837  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, i64 4)838  ret void839}840 841define void @test_vsseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {842; CHECK-LABEL: test_vsseg2_mask_nxv4i16_triscv.vector.tuple_nxv8i8_2t:843; CHECK:       # %bb.0: # %entry844; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma845; CHECK-NEXT:    vsseg2e16.v v8, (a0), v0.t846; CHECK-NEXT:    ret847entry:848  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)849  ret void850}851 852define void @test_vsseg2_nxv8i16_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl) {853; CHECK-LABEL: test_vsseg2_nxv8i16_triscv.vector.tuple_nxv16i8_2t:854; CHECK:       # %bb.0: # %entry855; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma856; CHECK-NEXT:    vsseg2e16.v v8, (a0)857; CHECK-NEXT:    ret858entry:859  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, i64 4)860  ret void861}862 863define void @test_vsseg2_mask_nxv8i16_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {864; CHECK-LABEL: test_vsseg2_mask_nxv8i16_triscv.vector.tuple_nxv16i8_2t:865; CHECK:       # %bb.0: # %entry866; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma867; CHECK-NEXT:    vsseg2e16.v v8, (a0), v0.t868; CHECK-NEXT:    ret869entry:870  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv16i8_2t.nxv8i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 4)871  ret void872}873 874define void @test_vsseg2_nxv16i16_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl) {875; CHECK-LABEL: test_vsseg2_nxv16i16_triscv.vector.tuple_nxv32i8_2t:876; CHECK:       # %bb.0: # %entry877; CHECK-NEXT:    vsetvli zero, a1, e16, m4, ta, ma878; CHECK-NEXT:    vsseg2e16.v v8, (a0)879; CHECK-NEXT:    ret880entry:881  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, i64 4)882  ret void883}884 885define void @test_vsseg2_mask_nxv16i16_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 16 x i1> %mask) {886; CHECK-LABEL: test_vsseg2_mask_nxv16i16_triscv.vector.tuple_nxv32i8_2t:887; CHECK:       # %bb.0: # %entry888; CHECK-NEXT:    vsetvli zero, a1, e16, m4, ta, ma889; CHECK-NEXT:    vsseg2e16.v v8, (a0), v0.t890; CHECK-NEXT:    ret891entry:892  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv32i8_2t.nxv16i1(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, <vscale x 16 x i1> %mask, i64 %vl, i64 4)893  ret void894}895 896define void @test_vsseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, i64 %vl) {897; CHECK-LABEL: test_vsseg3_nxv1i16_triscv.vector.tuple_nxv2i8_3t:898; CHECK:       # %bb.0: # %entry899; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma900; CHECK-NEXT:    vsseg3e16.v v8, (a0)901; CHECK-NEXT:    ret902entry:903  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv2i8_3t(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, i64 %vl, i64 4)904  ret void905}906 907define void @test_vsseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {908; CHECK-LABEL: test_vsseg3_mask_nxv1i16_triscv.vector.tuple_nxv2i8_3t:909; CHECK:       # %bb.0: # %entry910; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma911; CHECK-NEXT:    vsseg3e16.v v8, (a0), v0.t912; CHECK-NEXT:    ret913entry:914  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)915  ret void916}917 918define void @test_vsseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl) {919; CHECK-LABEL: test_vsseg3_nxv2i16_triscv.vector.tuple_nxv4i8_3t:920; CHECK:       # %bb.0: # %entry921; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma922; CHECK-NEXT:    vsseg3e16.v v8, (a0)923; CHECK-NEXT:    ret924entry:925  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl, i64 4)926  ret void927}928 929define void @test_vsseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {930; CHECK-LABEL: test_vsseg3_mask_nxv2i16_triscv.vector.tuple_nxv4i8_3t:931; CHECK:       # %bb.0: # %entry932; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma933; CHECK-NEXT:    vsseg3e16.v v8, (a0), v0.t934; CHECK-NEXT:    ret935entry:936  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)937  ret void938}939 940define void @test_vsseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl) {941; CHECK-LABEL: test_vsseg3_nxv4i16_triscv.vector.tuple_nxv8i8_3t:942; CHECK:       # %bb.0: # %entry943; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma944; CHECK-NEXT:    vsseg3e16.v v8, (a0)945; CHECK-NEXT:    ret946entry:947  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, i64 4)948  ret void949}950 951define void @test_vsseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {952; CHECK-LABEL: test_vsseg3_mask_nxv4i16_triscv.vector.tuple_nxv8i8_3t:953; CHECK:       # %bb.0: # %entry954; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma955; CHECK-NEXT:    vsseg3e16.v v8, (a0), v0.t956; CHECK-NEXT:    ret957entry:958  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)959  ret void960}961 962define void @test_vsseg3_nxv8i16_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl) {963; CHECK-LABEL: test_vsseg3_nxv8i16_triscv.vector.tuple_nxv16i8_3t:964; CHECK:       # %bb.0: # %entry965; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma966; CHECK-NEXT:    vsseg3e16.v v8, (a0)967; CHECK-NEXT:    ret968entry:969  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, i64 4)970  ret void971}972 973define void @test_vsseg3_mask_nxv8i16_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {974; CHECK-LABEL: test_vsseg3_mask_nxv8i16_triscv.vector.tuple_nxv16i8_3t:975; CHECK:       # %bb.0: # %entry976; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma977; CHECK-NEXT:    vsseg3e16.v v8, (a0), v0.t978; CHECK-NEXT:    ret979entry:980  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv8i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 4)981  ret void982}983 984define void @test_vsseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, i64 %vl) {985; CHECK-LABEL: test_vsseg4_nxv1i16_triscv.vector.tuple_nxv2i8_4t:986; CHECK:       # %bb.0: # %entry987; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma988; CHECK-NEXT:    vsseg4e16.v v8, (a0)989; CHECK-NEXT:    ret990entry:991  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv2i8_4t(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, i64 %vl, i64 4)992  ret void993}994 995define void @test_vsseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {996; CHECK-LABEL: test_vsseg4_mask_nxv1i16_triscv.vector.tuple_nxv2i8_4t:997; CHECK:       # %bb.0: # %entry998; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma999; CHECK-NEXT:    vsseg4e16.v v8, (a0), v0.t1000; CHECK-NEXT:    ret1001entry:1002  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)1003  ret void1004}1005 1006define void @test_vsseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl) {1007; CHECK-LABEL: test_vsseg4_nxv2i16_triscv.vector.tuple_nxv4i8_4t:1008; CHECK:       # %bb.0: # %entry1009; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma1010; CHECK-NEXT:    vsseg4e16.v v8, (a0)1011; CHECK-NEXT:    ret1012entry:1013  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl, i64 4)1014  ret void1015}1016 1017define void @test_vsseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {1018; CHECK-LABEL: test_vsseg4_mask_nxv2i16_triscv.vector.tuple_nxv4i8_4t:1019; CHECK:       # %bb.0: # %entry1020; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma1021; CHECK-NEXT:    vsseg4e16.v v8, (a0), v0.t1022; CHECK-NEXT:    ret1023entry:1024  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)1025  ret void1026}1027 1028define void @test_vsseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl) {1029; CHECK-LABEL: test_vsseg4_nxv4i16_triscv.vector.tuple_nxv8i8_4t:1030; CHECK:       # %bb.0: # %entry1031; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma1032; CHECK-NEXT:    vsseg4e16.v v8, (a0)1033; CHECK-NEXT:    ret1034entry:1035  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, i64 4)1036  ret void1037}1038 1039define void @test_vsseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {1040; CHECK-LABEL: test_vsseg4_mask_nxv4i16_triscv.vector.tuple_nxv8i8_4t:1041; CHECK:       # %bb.0: # %entry1042; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma1043; CHECK-NEXT:    vsseg4e16.v v8, (a0), v0.t1044; CHECK-NEXT:    ret1045entry:1046  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)1047  ret void1048}1049 1050define void @test_vsseg4_nxv8i16_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl) {1051; CHECK-LABEL: test_vsseg4_nxv8i16_triscv.vector.tuple_nxv16i8_4t:1052; CHECK:       # %bb.0: # %entry1053; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1054; CHECK-NEXT:    vsseg4e16.v v8, (a0)1055; CHECK-NEXT:    ret1056entry:1057  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, i64 4)1058  ret void1059}1060 1061define void @test_vsseg4_mask_nxv8i16_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {1062; CHECK-LABEL: test_vsseg4_mask_nxv8i16_triscv.vector.tuple_nxv16i8_4t:1063; CHECK:       # %bb.0: # %entry1064; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma1065; CHECK-NEXT:    vsseg4e16.v v8, (a0), v0.t1066; CHECK-NEXT:    ret1067entry:1068  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv8i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 4)1069  ret void1070}1071 1072define void @test_vsseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, i64 %vl) {1073; CHECK-LABEL: test_vsseg5_nxv1i16_triscv.vector.tuple_nxv2i8_5t:1074; CHECK:       # %bb.0: # %entry1075; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma1076; CHECK-NEXT:    vsseg5e16.v v8, (a0)1077; CHECK-NEXT:    ret1078entry:1079  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv2i8_5t(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, i64 %vl, i64 4)1080  ret void1081}1082 1083define void @test_vsseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1084; CHECK-LABEL: test_vsseg5_mask_nxv1i16_triscv.vector.tuple_nxv2i8_5t:1085; CHECK:       # %bb.0: # %entry1086; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma1087; CHECK-NEXT:    vsseg5e16.v v8, (a0), v0.t1088; CHECK-NEXT:    ret1089entry:1090  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)1091  ret void1092}1093 1094define void @test_vsseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl) {1095; CHECK-LABEL: test_vsseg5_nxv2i16_triscv.vector.tuple_nxv4i8_5t:1096; CHECK:       # %bb.0: # %entry1097; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma1098; CHECK-NEXT:    vsseg5e16.v v8, (a0)1099; CHECK-NEXT:    ret1100entry:1101  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl, i64 4)1102  ret void1103}1104 1105define void @test_vsseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {1106; CHECK-LABEL: test_vsseg5_mask_nxv2i16_triscv.vector.tuple_nxv4i8_5t:1107; CHECK:       # %bb.0: # %entry1108; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma1109; CHECK-NEXT:    vsseg5e16.v v8, (a0), v0.t1110; CHECK-NEXT:    ret1111entry:1112  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)1113  ret void1114}1115 1116define void @test_vsseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl) {1117; CHECK-LABEL: test_vsseg5_nxv4i16_triscv.vector.tuple_nxv8i8_5t:1118; CHECK:       # %bb.0: # %entry1119; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma1120; CHECK-NEXT:    vsseg5e16.v v8, (a0)1121; CHECK-NEXT:    ret1122entry:1123  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, i64 4)1124  ret void1125}1126 1127define void @test_vsseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {1128; CHECK-LABEL: test_vsseg5_mask_nxv4i16_triscv.vector.tuple_nxv8i8_5t:1129; CHECK:       # %bb.0: # %entry1130; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma1131; CHECK-NEXT:    vsseg5e16.v v8, (a0), v0.t1132; CHECK-NEXT:    ret1133entry:1134  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)1135  ret void1136}1137 1138define void @test_vsseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, i64 %vl) {1139; CHECK-LABEL: test_vsseg6_nxv1i16_triscv.vector.tuple_nxv2i8_6t:1140; CHECK:       # %bb.0: # %entry1141; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma1142; CHECK-NEXT:    vsseg6e16.v v8, (a0)1143; CHECK-NEXT:    ret1144entry:1145  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv2i8_6t(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, i64 %vl, i64 4)1146  ret void1147}1148 1149define void @test_vsseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1150; CHECK-LABEL: test_vsseg6_mask_nxv1i16_triscv.vector.tuple_nxv2i8_6t:1151; CHECK:       # %bb.0: # %entry1152; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma1153; CHECK-NEXT:    vsseg6e16.v v8, (a0), v0.t1154; CHECK-NEXT:    ret1155entry:1156  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)1157  ret void1158}1159 1160define void @test_vsseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl) {1161; CHECK-LABEL: test_vsseg6_nxv2i16_triscv.vector.tuple_nxv4i8_6t:1162; CHECK:       # %bb.0: # %entry1163; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma1164; CHECK-NEXT:    vsseg6e16.v v8, (a0)1165; CHECK-NEXT:    ret1166entry:1167  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl, i64 4)1168  ret void1169}1170 1171define void @test_vsseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {1172; CHECK-LABEL: test_vsseg6_mask_nxv2i16_triscv.vector.tuple_nxv4i8_6t:1173; CHECK:       # %bb.0: # %entry1174; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma1175; CHECK-NEXT:    vsseg6e16.v v8, (a0), v0.t1176; CHECK-NEXT:    ret1177entry:1178  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)1179  ret void1180}1181 1182define void @test_vsseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl) {1183; CHECK-LABEL: test_vsseg6_nxv4i16_triscv.vector.tuple_nxv8i8_6t:1184; CHECK:       # %bb.0: # %entry1185; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma1186; CHECK-NEXT:    vsseg6e16.v v8, (a0)1187; CHECK-NEXT:    ret1188entry:1189  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, i64 4)1190  ret void1191}1192 1193define void @test_vsseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {1194; CHECK-LABEL: test_vsseg6_mask_nxv4i16_triscv.vector.tuple_nxv8i8_6t:1195; CHECK:       # %bb.0: # %entry1196; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma1197; CHECK-NEXT:    vsseg6e16.v v8, (a0), v0.t1198; CHECK-NEXT:    ret1199entry:1200  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)1201  ret void1202}1203 1204define void @test_vsseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, i64 %vl) {1205; CHECK-LABEL: test_vsseg7_nxv1i16_triscv.vector.tuple_nxv2i8_7t:1206; CHECK:       # %bb.0: # %entry1207; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma1208; CHECK-NEXT:    vsseg7e16.v v8, (a0)1209; CHECK-NEXT:    ret1210entry:1211  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv2i8_7t(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, i64 %vl, i64 4)1212  ret void1213}1214 1215define void @test_vsseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1216; CHECK-LABEL: test_vsseg7_mask_nxv1i16_triscv.vector.tuple_nxv2i8_7t:1217; CHECK:       # %bb.0: # %entry1218; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma1219; CHECK-NEXT:    vsseg7e16.v v8, (a0), v0.t1220; CHECK-NEXT:    ret1221entry:1222  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)1223  ret void1224}1225 1226define void @test_vsseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl) {1227; CHECK-LABEL: test_vsseg7_nxv2i16_triscv.vector.tuple_nxv4i8_7t:1228; CHECK:       # %bb.0: # %entry1229; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma1230; CHECK-NEXT:    vsseg7e16.v v8, (a0)1231; CHECK-NEXT:    ret1232entry:1233  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl, i64 4)1234  ret void1235}1236 1237define void @test_vsseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {1238; CHECK-LABEL: test_vsseg7_mask_nxv2i16_triscv.vector.tuple_nxv4i8_7t:1239; CHECK:       # %bb.0: # %entry1240; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma1241; CHECK-NEXT:    vsseg7e16.v v8, (a0), v0.t1242; CHECK-NEXT:    ret1243entry:1244  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)1245  ret void1246}1247 1248define void @test_vsseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl) {1249; CHECK-LABEL: test_vsseg7_nxv4i16_triscv.vector.tuple_nxv8i8_7t:1250; CHECK:       # %bb.0: # %entry1251; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma1252; CHECK-NEXT:    vsseg7e16.v v8, (a0)1253; CHECK-NEXT:    ret1254entry:1255  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, i64 4)1256  ret void1257}1258 1259define void @test_vsseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {1260; CHECK-LABEL: test_vsseg7_mask_nxv4i16_triscv.vector.tuple_nxv8i8_7t:1261; CHECK:       # %bb.0: # %entry1262; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma1263; CHECK-NEXT:    vsseg7e16.v v8, (a0), v0.t1264; CHECK-NEXT:    ret1265entry:1266  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)1267  ret void1268}1269 1270define void @test_vsseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, i64 %vl) {1271; CHECK-LABEL: test_vsseg8_nxv1i16_triscv.vector.tuple_nxv2i8_8t:1272; CHECK:       # %bb.0: # %entry1273; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma1274; CHECK-NEXT:    vsseg8e16.v v8, (a0)1275; CHECK-NEXT:    ret1276entry:1277  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv2i8_8t(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, i64 %vl, i64 4)1278  ret void1279}1280 1281define void @test_vsseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1282; CHECK-LABEL: test_vsseg8_mask_nxv1i16_triscv.vector.tuple_nxv2i8_8t:1283; CHECK:       # %bb.0: # %entry1284; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma1285; CHECK-NEXT:    vsseg8e16.v v8, (a0), v0.t1286; CHECK-NEXT:    ret1287entry:1288  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)1289  ret void1290}1291 1292define void @test_vsseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl) {1293; CHECK-LABEL: test_vsseg8_nxv2i16_triscv.vector.tuple_nxv4i8_8t:1294; CHECK:       # %bb.0: # %entry1295; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma1296; CHECK-NEXT:    vsseg8e16.v v8, (a0)1297; CHECK-NEXT:    ret1298entry:1299  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl, i64 4)1300  ret void1301}1302 1303define void @test_vsseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {1304; CHECK-LABEL: test_vsseg8_mask_nxv2i16_triscv.vector.tuple_nxv4i8_8t:1305; CHECK:       # %bb.0: # %entry1306; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma1307; CHECK-NEXT:    vsseg8e16.v v8, (a0), v0.t1308; CHECK-NEXT:    ret1309entry:1310  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)1311  ret void1312}1313 1314define void @test_vsseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl) {1315; CHECK-LABEL: test_vsseg8_nxv4i16_triscv.vector.tuple_nxv8i8_8t:1316; CHECK:       # %bb.0: # %entry1317; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma1318; CHECK-NEXT:    vsseg8e16.v v8, (a0)1319; CHECK-NEXT:    ret1320entry:1321  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, i64 4)1322  ret void1323}1324 1325define void @test_vsseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {1326; CHECK-LABEL: test_vsseg8_mask_nxv4i16_triscv.vector.tuple_nxv8i8_8t:1327; CHECK:       # %bb.0: # %entry1328; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma1329; CHECK-NEXT:    vsseg8e16.v v8, (a0), v0.t1330; CHECK-NEXT:    ret1331entry:1332  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)1333  ret void1334}1335 1336define void @test_vsseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl) {1337; CHECK-LABEL: test_vsseg2_nxv1i32_triscv.vector.tuple_nxv4i8_2t:1338; CHECK:       # %bb.0: # %entry1339; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1340; CHECK-NEXT:    vsseg2e32.v v8, (a0)1341; CHECK-NEXT:    ret1342entry:1343  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl, i64 5)1344  ret void1345}1346 1347define void @test_vsseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1348; CHECK-LABEL: test_vsseg2_mask_nxv1i32_triscv.vector.tuple_nxv4i8_2t:1349; CHECK:       # %bb.0: # %entry1350; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1351; CHECK-NEXT:    vsseg2e32.v v8, (a0), v0.t1352; CHECK-NEXT:    ret1353entry:1354  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 5)1355  ret void1356}1357 1358define void @test_vsseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl) {1359; CHECK-LABEL: test_vsseg2_nxv2i32_triscv.vector.tuple_nxv8i8_2t:1360; CHECK:       # %bb.0: # %entry1361; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma1362; CHECK-NEXT:    vsseg2e32.v v8, (a0)1363; CHECK-NEXT:    ret1364entry:1365  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, i64 5)1366  ret void1367}1368 1369define void @test_vsseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {1370; CHECK-LABEL: test_vsseg2_mask_nxv2i32_triscv.vector.tuple_nxv8i8_2t:1371; CHECK:       # %bb.0: # %entry1372; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma1373; CHECK-NEXT:    vsseg2e32.v v8, (a0), v0.t1374; CHECK-NEXT:    ret1375entry:1376  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 5)1377  ret void1378}1379 1380define void @test_vsseg2_nxv4i32_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl) {1381; CHECK-LABEL: test_vsseg2_nxv4i32_triscv.vector.tuple_nxv16i8_2t:1382; CHECK:       # %bb.0: # %entry1383; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma1384; CHECK-NEXT:    vsseg2e32.v v8, (a0)1385; CHECK-NEXT:    ret1386entry:1387  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, i64 5)1388  ret void1389}1390 1391define void @test_vsseg2_mask_nxv4i32_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {1392; CHECK-LABEL: test_vsseg2_mask_nxv4i32_triscv.vector.tuple_nxv16i8_2t:1393; CHECK:       # %bb.0: # %entry1394; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma1395; CHECK-NEXT:    vsseg2e32.v v8, (a0), v0.t1396; CHECK-NEXT:    ret1397entry:1398  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv16i8_2t.nxv4i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 5)1399  ret void1400}1401 1402define void @test_vsseg2_nxv8i32_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl) {1403; CHECK-LABEL: test_vsseg2_nxv8i32_triscv.vector.tuple_nxv32i8_2t:1404; CHECK:       # %bb.0: # %entry1405; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1406; CHECK-NEXT:    vsseg2e32.v v8, (a0)1407; CHECK-NEXT:    ret1408entry:1409  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, i64 5)1410  ret void1411}1412 1413define void @test_vsseg2_mask_nxv8i32_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {1414; CHECK-LABEL: test_vsseg2_mask_nxv8i32_triscv.vector.tuple_nxv32i8_2t:1415; CHECK:       # %bb.0: # %entry1416; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1417; CHECK-NEXT:    vsseg2e32.v v8, (a0), v0.t1418; CHECK-NEXT:    ret1419entry:1420  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv32i8_2t.nxv8i1(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 5)1421  ret void1422}1423 1424define void @test_vsseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl) {1425; CHECK-LABEL: test_vsseg3_nxv1i32_triscv.vector.tuple_nxv4i8_3t:1426; CHECK:       # %bb.0: # %entry1427; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1428; CHECK-NEXT:    vsseg3e32.v v8, (a0)1429; CHECK-NEXT:    ret1430entry:1431  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl, i64 5)1432  ret void1433}1434 1435define void @test_vsseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1436; CHECK-LABEL: test_vsseg3_mask_nxv1i32_triscv.vector.tuple_nxv4i8_3t:1437; CHECK:       # %bb.0: # %entry1438; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1439; CHECK-NEXT:    vsseg3e32.v v8, (a0), v0.t1440; CHECK-NEXT:    ret1441entry:1442  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 5)1443  ret void1444}1445 1446define void @test_vsseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl) {1447; CHECK-LABEL: test_vsseg3_nxv2i32_triscv.vector.tuple_nxv8i8_3t:1448; CHECK:       # %bb.0: # %entry1449; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma1450; CHECK-NEXT:    vsseg3e32.v v8, (a0)1451; CHECK-NEXT:    ret1452entry:1453  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, i64 5)1454  ret void1455}1456 1457define void @test_vsseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {1458; CHECK-LABEL: test_vsseg3_mask_nxv2i32_triscv.vector.tuple_nxv8i8_3t:1459; CHECK:       # %bb.0: # %entry1460; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma1461; CHECK-NEXT:    vsseg3e32.v v8, (a0), v0.t1462; CHECK-NEXT:    ret1463entry:1464  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 5)1465  ret void1466}1467 1468define void @test_vsseg3_nxv4i32_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl) {1469; CHECK-LABEL: test_vsseg3_nxv4i32_triscv.vector.tuple_nxv16i8_3t:1470; CHECK:       # %bb.0: # %entry1471; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma1472; CHECK-NEXT:    vsseg3e32.v v8, (a0)1473; CHECK-NEXT:    ret1474entry:1475  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, i64 5)1476  ret void1477}1478 1479define void @test_vsseg3_mask_nxv4i32_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {1480; CHECK-LABEL: test_vsseg3_mask_nxv4i32_triscv.vector.tuple_nxv16i8_3t:1481; CHECK:       # %bb.0: # %entry1482; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma1483; CHECK-NEXT:    vsseg3e32.v v8, (a0), v0.t1484; CHECK-NEXT:    ret1485entry:1486  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv4i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 5)1487  ret void1488}1489 1490define void @test_vsseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl) {1491; CHECK-LABEL: test_vsseg4_nxv1i32_triscv.vector.tuple_nxv4i8_4t:1492; CHECK:       # %bb.0: # %entry1493; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1494; CHECK-NEXT:    vsseg4e32.v v8, (a0)1495; CHECK-NEXT:    ret1496entry:1497  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl, i64 5)1498  ret void1499}1500 1501define void @test_vsseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1502; CHECK-LABEL: test_vsseg4_mask_nxv1i32_triscv.vector.tuple_nxv4i8_4t:1503; CHECK:       # %bb.0: # %entry1504; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1505; CHECK-NEXT:    vsseg4e32.v v8, (a0), v0.t1506; CHECK-NEXT:    ret1507entry:1508  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 5)1509  ret void1510}1511 1512define void @test_vsseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl) {1513; CHECK-LABEL: test_vsseg4_nxv2i32_triscv.vector.tuple_nxv8i8_4t:1514; CHECK:       # %bb.0: # %entry1515; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma1516; CHECK-NEXT:    vsseg4e32.v v8, (a0)1517; CHECK-NEXT:    ret1518entry:1519  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, i64 5)1520  ret void1521}1522 1523define void @test_vsseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {1524; CHECK-LABEL: test_vsseg4_mask_nxv2i32_triscv.vector.tuple_nxv8i8_4t:1525; CHECK:       # %bb.0: # %entry1526; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma1527; CHECK-NEXT:    vsseg4e32.v v8, (a0), v0.t1528; CHECK-NEXT:    ret1529entry:1530  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 5)1531  ret void1532}1533 1534define void @test_vsseg4_nxv4i32_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl) {1535; CHECK-LABEL: test_vsseg4_nxv4i32_triscv.vector.tuple_nxv16i8_4t:1536; CHECK:       # %bb.0: # %entry1537; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma1538; CHECK-NEXT:    vsseg4e32.v v8, (a0)1539; CHECK-NEXT:    ret1540entry:1541  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, i64 5)1542  ret void1543}1544 1545define void @test_vsseg4_mask_nxv4i32_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {1546; CHECK-LABEL: test_vsseg4_mask_nxv4i32_triscv.vector.tuple_nxv16i8_4t:1547; CHECK:       # %bb.0: # %entry1548; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma1549; CHECK-NEXT:    vsseg4e32.v v8, (a0), v0.t1550; CHECK-NEXT:    ret1551entry:1552  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv4i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 5)1553  ret void1554}1555 1556define void @test_vsseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl) {1557; CHECK-LABEL: test_vsseg5_nxv1i32_triscv.vector.tuple_nxv4i8_5t:1558; CHECK:       # %bb.0: # %entry1559; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1560; CHECK-NEXT:    vsseg5e32.v v8, (a0)1561; CHECK-NEXT:    ret1562entry:1563  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl, i64 5)1564  ret void1565}1566 1567define void @test_vsseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1568; CHECK-LABEL: test_vsseg5_mask_nxv1i32_triscv.vector.tuple_nxv4i8_5t:1569; CHECK:       # %bb.0: # %entry1570; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1571; CHECK-NEXT:    vsseg5e32.v v8, (a0), v0.t1572; CHECK-NEXT:    ret1573entry:1574  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 5)1575  ret void1576}1577 1578define void @test_vsseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl) {1579; CHECK-LABEL: test_vsseg5_nxv2i32_triscv.vector.tuple_nxv8i8_5t:1580; CHECK:       # %bb.0: # %entry1581; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma1582; CHECK-NEXT:    vsseg5e32.v v8, (a0)1583; CHECK-NEXT:    ret1584entry:1585  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, i64 5)1586  ret void1587}1588 1589define void @test_vsseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {1590; CHECK-LABEL: test_vsseg5_mask_nxv2i32_triscv.vector.tuple_nxv8i8_5t:1591; CHECK:       # %bb.0: # %entry1592; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma1593; CHECK-NEXT:    vsseg5e32.v v8, (a0), v0.t1594; CHECK-NEXT:    ret1595entry:1596  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 5)1597  ret void1598}1599 1600define void @test_vsseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl) {1601; CHECK-LABEL: test_vsseg6_nxv1i32_triscv.vector.tuple_nxv4i8_6t:1602; CHECK:       # %bb.0: # %entry1603; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1604; CHECK-NEXT:    vsseg6e32.v v8, (a0)1605; CHECK-NEXT:    ret1606entry:1607  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl, i64 5)1608  ret void1609}1610 1611define void @test_vsseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1612; CHECK-LABEL: test_vsseg6_mask_nxv1i32_triscv.vector.tuple_nxv4i8_6t:1613; CHECK:       # %bb.0: # %entry1614; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1615; CHECK-NEXT:    vsseg6e32.v v8, (a0), v0.t1616; CHECK-NEXT:    ret1617entry:1618  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 5)1619  ret void1620}1621 1622define void @test_vsseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl) {1623; CHECK-LABEL: test_vsseg6_nxv2i32_triscv.vector.tuple_nxv8i8_6t:1624; CHECK:       # %bb.0: # %entry1625; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma1626; CHECK-NEXT:    vsseg6e32.v v8, (a0)1627; CHECK-NEXT:    ret1628entry:1629  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, i64 5)1630  ret void1631}1632 1633define void @test_vsseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {1634; CHECK-LABEL: test_vsseg6_mask_nxv2i32_triscv.vector.tuple_nxv8i8_6t:1635; CHECK:       # %bb.0: # %entry1636; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma1637; CHECK-NEXT:    vsseg6e32.v v8, (a0), v0.t1638; CHECK-NEXT:    ret1639entry:1640  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 5)1641  ret void1642}1643 1644define void @test_vsseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl) {1645; CHECK-LABEL: test_vsseg7_nxv1i32_triscv.vector.tuple_nxv4i8_7t:1646; CHECK:       # %bb.0: # %entry1647; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1648; CHECK-NEXT:    vsseg7e32.v v8, (a0)1649; CHECK-NEXT:    ret1650entry:1651  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl, i64 5)1652  ret void1653}1654 1655define void @test_vsseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1656; CHECK-LABEL: test_vsseg7_mask_nxv1i32_triscv.vector.tuple_nxv4i8_7t:1657; CHECK:       # %bb.0: # %entry1658; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1659; CHECK-NEXT:    vsseg7e32.v v8, (a0), v0.t1660; CHECK-NEXT:    ret1661entry:1662  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 5)1663  ret void1664}1665 1666define void @test_vsseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl) {1667; CHECK-LABEL: test_vsseg7_nxv2i32_triscv.vector.tuple_nxv8i8_7t:1668; CHECK:       # %bb.0: # %entry1669; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma1670; CHECK-NEXT:    vsseg7e32.v v8, (a0)1671; CHECK-NEXT:    ret1672entry:1673  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, i64 5)1674  ret void1675}1676 1677define void @test_vsseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {1678; CHECK-LABEL: test_vsseg7_mask_nxv2i32_triscv.vector.tuple_nxv8i8_7t:1679; CHECK:       # %bb.0: # %entry1680; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma1681; CHECK-NEXT:    vsseg7e32.v v8, (a0), v0.t1682; CHECK-NEXT:    ret1683entry:1684  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 5)1685  ret void1686}1687 1688define void @test_vsseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl) {1689; CHECK-LABEL: test_vsseg8_nxv1i32_triscv.vector.tuple_nxv4i8_8t:1690; CHECK:       # %bb.0: # %entry1691; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1692; CHECK-NEXT:    vsseg8e32.v v8, (a0)1693; CHECK-NEXT:    ret1694entry:1695  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl, i64 5)1696  ret void1697}1698 1699define void @test_vsseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1700; CHECK-LABEL: test_vsseg8_mask_nxv1i32_triscv.vector.tuple_nxv4i8_8t:1701; CHECK:       # %bb.0: # %entry1702; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1703; CHECK-NEXT:    vsseg8e32.v v8, (a0), v0.t1704; CHECK-NEXT:    ret1705entry:1706  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 5)1707  ret void1708}1709 1710define void @test_vsseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl) {1711; CHECK-LABEL: test_vsseg8_nxv2i32_triscv.vector.tuple_nxv8i8_8t:1712; CHECK:       # %bb.0: # %entry1713; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma1714; CHECK-NEXT:    vsseg8e32.v v8, (a0)1715; CHECK-NEXT:    ret1716entry:1717  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, i64 5)1718  ret void1719}1720 1721define void @test_vsseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {1722; CHECK-LABEL: test_vsseg8_mask_nxv2i32_triscv.vector.tuple_nxv8i8_8t:1723; CHECK:       # %bb.0: # %entry1724; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma1725; CHECK-NEXT:    vsseg8e32.v v8, (a0), v0.t1726; CHECK-NEXT:    ret1727entry:1728  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 5)1729  ret void1730}1731 1732define void @test_vsseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl) {1733; CHECK-LABEL: test_vsseg2_nxv1i64_triscv.vector.tuple_nxv8i8_2t:1734; CHECK:       # %bb.0: # %entry1735; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma1736; CHECK-NEXT:    vsseg2e64.v v8, (a0)1737; CHECK-NEXT:    ret1738entry:1739  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, i64 6)1740  ret void1741}1742 1743define void @test_vsseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1744; CHECK-LABEL: test_vsseg2_mask_nxv1i64_triscv.vector.tuple_nxv8i8_2t:1745; CHECK:       # %bb.0: # %entry1746; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma1747; CHECK-NEXT:    vsseg2e64.v v8, (a0), v0.t1748; CHECK-NEXT:    ret1749entry:1750  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 6)1751  ret void1752}1753 1754define void @test_vsseg2_nxv2i64_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl) {1755; CHECK-LABEL: test_vsseg2_nxv2i64_triscv.vector.tuple_nxv16i8_2t:1756; CHECK:       # %bb.0: # %entry1757; CHECK-NEXT:    vsetvli zero, a1, e64, m2, ta, ma1758; CHECK-NEXT:    vsseg2e64.v v8, (a0)1759; CHECK-NEXT:    ret1760entry:1761  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, i64 6)1762  ret void1763}1764 1765define void @test_vsseg2_mask_nxv2i64_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {1766; CHECK-LABEL: test_vsseg2_mask_nxv2i64_triscv.vector.tuple_nxv16i8_2t:1767; CHECK:       # %bb.0: # %entry1768; CHECK-NEXT:    vsetvli zero, a1, e64, m2, ta, ma1769; CHECK-NEXT:    vsseg2e64.v v8, (a0), v0.t1770; CHECK-NEXT:    ret1771entry:1772  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv16i8_2t.nxv2i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 6)1773  ret void1774}1775 1776define void @test_vsseg2_nxv4i64_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl) {1777; CHECK-LABEL: test_vsseg2_nxv4i64_triscv.vector.tuple_nxv32i8_2t:1778; CHECK:       # %bb.0: # %entry1779; CHECK-NEXT:    vsetvli zero, a1, e64, m4, ta, ma1780; CHECK-NEXT:    vsseg2e64.v v8, (a0)1781; CHECK-NEXT:    ret1782entry:1783  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, i64 6)1784  ret void1785}1786 1787define void @test_vsseg2_mask_nxv4i64_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {1788; CHECK-LABEL: test_vsseg2_mask_nxv4i64_triscv.vector.tuple_nxv32i8_2t:1789; CHECK:       # %bb.0: # %entry1790; CHECK-NEXT:    vsetvli zero, a1, e64, m4, ta, ma1791; CHECK-NEXT:    vsseg2e64.v v8, (a0), v0.t1792; CHECK-NEXT:    ret1793entry:1794  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv32i8_2t.nxv4i1(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 6)1795  ret void1796}1797 1798define void @test_vsseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl) {1799; CHECK-LABEL: test_vsseg3_nxv1i64_triscv.vector.tuple_nxv8i8_3t:1800; CHECK:       # %bb.0: # %entry1801; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma1802; CHECK-NEXT:    vsseg3e64.v v8, (a0)1803; CHECK-NEXT:    ret1804entry:1805  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, i64 6)1806  ret void1807}1808 1809define void @test_vsseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1810; CHECK-LABEL: test_vsseg3_mask_nxv1i64_triscv.vector.tuple_nxv8i8_3t:1811; CHECK:       # %bb.0: # %entry1812; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma1813; CHECK-NEXT:    vsseg3e64.v v8, (a0), v0.t1814; CHECK-NEXT:    ret1815entry:1816  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 6)1817  ret void1818}1819 1820define void @test_vsseg3_nxv2i64_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl) {1821; CHECK-LABEL: test_vsseg3_nxv2i64_triscv.vector.tuple_nxv16i8_3t:1822; CHECK:       # %bb.0: # %entry1823; CHECK-NEXT:    vsetvli zero, a1, e64, m2, ta, ma1824; CHECK-NEXT:    vsseg3e64.v v8, (a0)1825; CHECK-NEXT:    ret1826entry:1827  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, i64 6)1828  ret void1829}1830 1831define void @test_vsseg3_mask_nxv2i64_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {1832; CHECK-LABEL: test_vsseg3_mask_nxv2i64_triscv.vector.tuple_nxv16i8_3t:1833; CHECK:       # %bb.0: # %entry1834; CHECK-NEXT:    vsetvli zero, a1, e64, m2, ta, ma1835; CHECK-NEXT:    vsseg3e64.v v8, (a0), v0.t1836; CHECK-NEXT:    ret1837entry:1838  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv2i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 6)1839  ret void1840}1841 1842define void @test_vsseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl) {1843; CHECK-LABEL: test_vsseg4_nxv1i64_triscv.vector.tuple_nxv8i8_4t:1844; CHECK:       # %bb.0: # %entry1845; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma1846; CHECK-NEXT:    vsseg4e64.v v8, (a0)1847; CHECK-NEXT:    ret1848entry:1849  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, i64 6)1850  ret void1851}1852 1853define void @test_vsseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1854; CHECK-LABEL: test_vsseg4_mask_nxv1i64_triscv.vector.tuple_nxv8i8_4t:1855; CHECK:       # %bb.0: # %entry1856; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma1857; CHECK-NEXT:    vsseg4e64.v v8, (a0), v0.t1858; CHECK-NEXT:    ret1859entry:1860  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 6)1861  ret void1862}1863 1864define void @test_vsseg4_nxv2i64_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl) {1865; CHECK-LABEL: test_vsseg4_nxv2i64_triscv.vector.tuple_nxv16i8_4t:1866; CHECK:       # %bb.0: # %entry1867; CHECK-NEXT:    vsetvli zero, a1, e64, m2, ta, ma1868; CHECK-NEXT:    vsseg4e64.v v8, (a0)1869; CHECK-NEXT:    ret1870entry:1871  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, i64 6)1872  ret void1873}1874 1875define void @test_vsseg4_mask_nxv2i64_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {1876; CHECK-LABEL: test_vsseg4_mask_nxv2i64_triscv.vector.tuple_nxv16i8_4t:1877; CHECK:       # %bb.0: # %entry1878; CHECK-NEXT:    vsetvli zero, a1, e64, m2, ta, ma1879; CHECK-NEXT:    vsseg4e64.v v8, (a0), v0.t1880; CHECK-NEXT:    ret1881entry:1882  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv2i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 6)1883  ret void1884}1885 1886define void @test_vsseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl) {1887; CHECK-LABEL: test_vsseg5_nxv1i64_triscv.vector.tuple_nxv8i8_5t:1888; CHECK:       # %bb.0: # %entry1889; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma1890; CHECK-NEXT:    vsseg5e64.v v8, (a0)1891; CHECK-NEXT:    ret1892entry:1893  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, i64 6)1894  ret void1895}1896 1897define void @test_vsseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1898; CHECK-LABEL: test_vsseg5_mask_nxv1i64_triscv.vector.tuple_nxv8i8_5t:1899; CHECK:       # %bb.0: # %entry1900; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma1901; CHECK-NEXT:    vsseg5e64.v v8, (a0), v0.t1902; CHECK-NEXT:    ret1903entry:1904  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 6)1905  ret void1906}1907 1908define void @test_vsseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl) {1909; CHECK-LABEL: test_vsseg6_nxv1i64_triscv.vector.tuple_nxv8i8_6t:1910; CHECK:       # %bb.0: # %entry1911; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma1912; CHECK-NEXT:    vsseg6e64.v v8, (a0)1913; CHECK-NEXT:    ret1914entry:1915  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, i64 6)1916  ret void1917}1918 1919define void @test_vsseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1920; CHECK-LABEL: test_vsseg6_mask_nxv1i64_triscv.vector.tuple_nxv8i8_6t:1921; CHECK:       # %bb.0: # %entry1922; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma1923; CHECK-NEXT:    vsseg6e64.v v8, (a0), v0.t1924; CHECK-NEXT:    ret1925entry:1926  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 6)1927  ret void1928}1929 1930define void @test_vsseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl) {1931; CHECK-LABEL: test_vsseg7_nxv1i64_triscv.vector.tuple_nxv8i8_7t:1932; CHECK:       # %bb.0: # %entry1933; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma1934; CHECK-NEXT:    vsseg7e64.v v8, (a0)1935; CHECK-NEXT:    ret1936entry:1937  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, i64 6)1938  ret void1939}1940 1941define void @test_vsseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1942; CHECK-LABEL: test_vsseg7_mask_nxv1i64_triscv.vector.tuple_nxv8i8_7t:1943; CHECK:       # %bb.0: # %entry1944; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma1945; CHECK-NEXT:    vsseg7e64.v v8, (a0), v0.t1946; CHECK-NEXT:    ret1947entry:1948  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 6)1949  ret void1950}1951 1952define void @test_vsseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl) {1953; CHECK-LABEL: test_vsseg8_nxv1i64_triscv.vector.tuple_nxv8i8_8t:1954; CHECK:       # %bb.0: # %entry1955; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma1956; CHECK-NEXT:    vsseg8e64.v v8, (a0)1957; CHECK-NEXT:    ret1958entry:1959  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, i64 6)1960  ret void1961}1962 1963define void @test_vsseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1964; CHECK-LABEL: test_vsseg8_mask_nxv1i64_triscv.vector.tuple_nxv8i8_8t:1965; CHECK:       # %bb.0: # %entry1966; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma1967; CHECK-NEXT:    vsseg8e64.v v8, (a0), v0.t1968; CHECK-NEXT:    ret1969entry:1970  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 6)1971  ret void1972}1973 1974define void @test_vsseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, i64 %vl) {1975; CHECK-LABEL: test_vsseg2_nxv1f16_triscv.vector.tuple_nxv2i8_2t:1976; CHECK:       # %bb.0: # %entry1977; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma1978; CHECK-NEXT:    vsseg2e16.v v8, (a0)1979; CHECK-NEXT:    ret1980entry:1981  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv2i8_2t(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, i64 %vl, i64 4)1982  ret void1983}1984 1985define void @test_vsseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {1986; CHECK-LABEL: test_vsseg2_mask_nxv1f16_triscv.vector.tuple_nxv2i8_2t:1987; CHECK:       # %bb.0: # %entry1988; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma1989; CHECK-NEXT:    vsseg2e16.v v8, (a0), v0.t1990; CHECK-NEXT:    ret1991entry:1992  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)1993  ret void1994}1995 1996define void @test_vsseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl) {1997; CHECK-LABEL: test_vsseg2_nxv2f16_triscv.vector.tuple_nxv4i8_2t:1998; CHECK:       # %bb.0: # %entry1999; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma2000; CHECK-NEXT:    vsseg2e16.v v8, (a0)2001; CHECK-NEXT:    ret2002entry:2003  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl, i64 4)2004  ret void2005}2006 2007define void @test_vsseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {2008; CHECK-LABEL: test_vsseg2_mask_nxv2f16_triscv.vector.tuple_nxv4i8_2t:2009; CHECK:       # %bb.0: # %entry2010; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma2011; CHECK-NEXT:    vsseg2e16.v v8, (a0), v0.t2012; CHECK-NEXT:    ret2013entry:2014  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)2015  ret void2016}2017 2018define void @test_vsseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl) {2019; CHECK-LABEL: test_vsseg2_nxv4f16_triscv.vector.tuple_nxv8i8_2t:2020; CHECK:       # %bb.0: # %entry2021; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma2022; CHECK-NEXT:    vsseg2e16.v v8, (a0)2023; CHECK-NEXT:    ret2024entry:2025  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, i64 4)2026  ret void2027}2028 2029define void @test_vsseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {2030; CHECK-LABEL: test_vsseg2_mask_nxv4f16_triscv.vector.tuple_nxv8i8_2t:2031; CHECK:       # %bb.0: # %entry2032; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma2033; CHECK-NEXT:    vsseg2e16.v v8, (a0), v0.t2034; CHECK-NEXT:    ret2035entry:2036  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)2037  ret void2038}2039 2040define void @test_vsseg2_nxv8f16_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl) {2041; CHECK-LABEL: test_vsseg2_nxv8f16_triscv.vector.tuple_nxv16i8_2t:2042; CHECK:       # %bb.0: # %entry2043; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2044; CHECK-NEXT:    vsseg2e16.v v8, (a0)2045; CHECK-NEXT:    ret2046entry:2047  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, i64 4)2048  ret void2049}2050 2051define void @test_vsseg2_mask_nxv8f16_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {2052; CHECK-LABEL: test_vsseg2_mask_nxv8f16_triscv.vector.tuple_nxv16i8_2t:2053; CHECK:       # %bb.0: # %entry2054; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2055; CHECK-NEXT:    vsseg2e16.v v8, (a0), v0.t2056; CHECK-NEXT:    ret2057entry:2058  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv16i8_2t.nxv8i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 4)2059  ret void2060}2061 2062define void @test_vsseg2_nxv16f16_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl) {2063; CHECK-LABEL: test_vsseg2_nxv16f16_triscv.vector.tuple_nxv32i8_2t:2064; CHECK:       # %bb.0: # %entry2065; CHECK-NEXT:    vsetvli zero, a1, e16, m4, ta, ma2066; CHECK-NEXT:    vsseg2e16.v v8, (a0)2067; CHECK-NEXT:    ret2068entry:2069  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, i64 4)2070  ret void2071}2072 2073define void @test_vsseg2_mask_nxv16f16_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 16 x i1> %mask) {2074; CHECK-LABEL: test_vsseg2_mask_nxv16f16_triscv.vector.tuple_nxv32i8_2t:2075; CHECK:       # %bb.0: # %entry2076; CHECK-NEXT:    vsetvli zero, a1, e16, m4, ta, ma2077; CHECK-NEXT:    vsseg2e16.v v8, (a0), v0.t2078; CHECK-NEXT:    ret2079entry:2080  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv32i8_2t.nxv16i1(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, <vscale x 16 x i1> %mask, i64 %vl, i64 4)2081  ret void2082}2083 2084define void @test_vsseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, i64 %vl) {2085; CHECK-LABEL: test_vsseg3_nxv1f16_triscv.vector.tuple_nxv2i8_3t:2086; CHECK:       # %bb.0: # %entry2087; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma2088; CHECK-NEXT:    vsseg3e16.v v8, (a0)2089; CHECK-NEXT:    ret2090entry:2091  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv2i8_3t(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, i64 %vl, i64 4)2092  ret void2093}2094 2095define void @test_vsseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {2096; CHECK-LABEL: test_vsseg3_mask_nxv1f16_triscv.vector.tuple_nxv2i8_3t:2097; CHECK:       # %bb.0: # %entry2098; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma2099; CHECK-NEXT:    vsseg3e16.v v8, (a0), v0.t2100; CHECK-NEXT:    ret2101entry:2102  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)2103  ret void2104}2105 2106define void @test_vsseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl) {2107; CHECK-LABEL: test_vsseg3_nxv2f16_triscv.vector.tuple_nxv4i8_3t:2108; CHECK:       # %bb.0: # %entry2109; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma2110; CHECK-NEXT:    vsseg3e16.v v8, (a0)2111; CHECK-NEXT:    ret2112entry:2113  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl, i64 4)2114  ret void2115}2116 2117define void @test_vsseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {2118; CHECK-LABEL: test_vsseg3_mask_nxv2f16_triscv.vector.tuple_nxv4i8_3t:2119; CHECK:       # %bb.0: # %entry2120; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma2121; CHECK-NEXT:    vsseg3e16.v v8, (a0), v0.t2122; CHECK-NEXT:    ret2123entry:2124  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)2125  ret void2126}2127 2128define void @test_vsseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl) {2129; CHECK-LABEL: test_vsseg3_nxv4f16_triscv.vector.tuple_nxv8i8_3t:2130; CHECK:       # %bb.0: # %entry2131; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma2132; CHECK-NEXT:    vsseg3e16.v v8, (a0)2133; CHECK-NEXT:    ret2134entry:2135  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, i64 4)2136  ret void2137}2138 2139define void @test_vsseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {2140; CHECK-LABEL: test_vsseg3_mask_nxv4f16_triscv.vector.tuple_nxv8i8_3t:2141; CHECK:       # %bb.0: # %entry2142; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma2143; CHECK-NEXT:    vsseg3e16.v v8, (a0), v0.t2144; CHECK-NEXT:    ret2145entry:2146  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)2147  ret void2148}2149 2150define void @test_vsseg3_nxv8f16_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl) {2151; CHECK-LABEL: test_vsseg3_nxv8f16_triscv.vector.tuple_nxv16i8_3t:2152; CHECK:       # %bb.0: # %entry2153; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2154; CHECK-NEXT:    vsseg3e16.v v8, (a0)2155; CHECK-NEXT:    ret2156entry:2157  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, i64 4)2158  ret void2159}2160 2161define void @test_vsseg3_mask_nxv8f16_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {2162; CHECK-LABEL: test_vsseg3_mask_nxv8f16_triscv.vector.tuple_nxv16i8_3t:2163; CHECK:       # %bb.0: # %entry2164; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2165; CHECK-NEXT:    vsseg3e16.v v8, (a0), v0.t2166; CHECK-NEXT:    ret2167entry:2168  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv8i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 4)2169  ret void2170}2171 2172define void @test_vsseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, i64 %vl) {2173; CHECK-LABEL: test_vsseg4_nxv1f16_triscv.vector.tuple_nxv2i8_4t:2174; CHECK:       # %bb.0: # %entry2175; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma2176; CHECK-NEXT:    vsseg4e16.v v8, (a0)2177; CHECK-NEXT:    ret2178entry:2179  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv2i8_4t(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, i64 %vl, i64 4)2180  ret void2181}2182 2183define void @test_vsseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {2184; CHECK-LABEL: test_vsseg4_mask_nxv1f16_triscv.vector.tuple_nxv2i8_4t:2185; CHECK:       # %bb.0: # %entry2186; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma2187; CHECK-NEXT:    vsseg4e16.v v8, (a0), v0.t2188; CHECK-NEXT:    ret2189entry:2190  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)2191  ret void2192}2193 2194define void @test_vsseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl) {2195; CHECK-LABEL: test_vsseg4_nxv2f16_triscv.vector.tuple_nxv4i8_4t:2196; CHECK:       # %bb.0: # %entry2197; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma2198; CHECK-NEXT:    vsseg4e16.v v8, (a0)2199; CHECK-NEXT:    ret2200entry:2201  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl, i64 4)2202  ret void2203}2204 2205define void @test_vsseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {2206; CHECK-LABEL: test_vsseg4_mask_nxv2f16_triscv.vector.tuple_nxv4i8_4t:2207; CHECK:       # %bb.0: # %entry2208; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma2209; CHECK-NEXT:    vsseg4e16.v v8, (a0), v0.t2210; CHECK-NEXT:    ret2211entry:2212  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)2213  ret void2214}2215 2216define void @test_vsseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl) {2217; CHECK-LABEL: test_vsseg4_nxv4f16_triscv.vector.tuple_nxv8i8_4t:2218; CHECK:       # %bb.0: # %entry2219; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma2220; CHECK-NEXT:    vsseg4e16.v v8, (a0)2221; CHECK-NEXT:    ret2222entry:2223  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, i64 4)2224  ret void2225}2226 2227define void @test_vsseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {2228; CHECK-LABEL: test_vsseg4_mask_nxv4f16_triscv.vector.tuple_nxv8i8_4t:2229; CHECK:       # %bb.0: # %entry2230; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma2231; CHECK-NEXT:    vsseg4e16.v v8, (a0), v0.t2232; CHECK-NEXT:    ret2233entry:2234  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)2235  ret void2236}2237 2238define void @test_vsseg4_nxv8f16_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl) {2239; CHECK-LABEL: test_vsseg4_nxv8f16_triscv.vector.tuple_nxv16i8_4t:2240; CHECK:       # %bb.0: # %entry2241; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2242; CHECK-NEXT:    vsseg4e16.v v8, (a0)2243; CHECK-NEXT:    ret2244entry:2245  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, i64 4)2246  ret void2247}2248 2249define void @test_vsseg4_mask_nxv8f16_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {2250; CHECK-LABEL: test_vsseg4_mask_nxv8f16_triscv.vector.tuple_nxv16i8_4t:2251; CHECK:       # %bb.0: # %entry2252; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma2253; CHECK-NEXT:    vsseg4e16.v v8, (a0), v0.t2254; CHECK-NEXT:    ret2255entry:2256  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv8i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 4)2257  ret void2258}2259 2260define void @test_vsseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, i64 %vl) {2261; CHECK-LABEL: test_vsseg5_nxv1f16_triscv.vector.tuple_nxv2i8_5t:2262; CHECK:       # %bb.0: # %entry2263; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma2264; CHECK-NEXT:    vsseg5e16.v v8, (a0)2265; CHECK-NEXT:    ret2266entry:2267  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv2i8_5t(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, i64 %vl, i64 4)2268  ret void2269}2270 2271define void @test_vsseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {2272; CHECK-LABEL: test_vsseg5_mask_nxv1f16_triscv.vector.tuple_nxv2i8_5t:2273; CHECK:       # %bb.0: # %entry2274; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma2275; CHECK-NEXT:    vsseg5e16.v v8, (a0), v0.t2276; CHECK-NEXT:    ret2277entry:2278  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)2279  ret void2280}2281 2282define void @test_vsseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl) {2283; CHECK-LABEL: test_vsseg5_nxv2f16_triscv.vector.tuple_nxv4i8_5t:2284; CHECK:       # %bb.0: # %entry2285; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma2286; CHECK-NEXT:    vsseg5e16.v v8, (a0)2287; CHECK-NEXT:    ret2288entry:2289  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl, i64 4)2290  ret void2291}2292 2293define void @test_vsseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {2294; CHECK-LABEL: test_vsseg5_mask_nxv2f16_triscv.vector.tuple_nxv4i8_5t:2295; CHECK:       # %bb.0: # %entry2296; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma2297; CHECK-NEXT:    vsseg5e16.v v8, (a0), v0.t2298; CHECK-NEXT:    ret2299entry:2300  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)2301  ret void2302}2303 2304define void @test_vsseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl) {2305; CHECK-LABEL: test_vsseg5_nxv4f16_triscv.vector.tuple_nxv8i8_5t:2306; CHECK:       # %bb.0: # %entry2307; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma2308; CHECK-NEXT:    vsseg5e16.v v8, (a0)2309; CHECK-NEXT:    ret2310entry:2311  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, i64 4)2312  ret void2313}2314 2315define void @test_vsseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {2316; CHECK-LABEL: test_vsseg5_mask_nxv4f16_triscv.vector.tuple_nxv8i8_5t:2317; CHECK:       # %bb.0: # %entry2318; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma2319; CHECK-NEXT:    vsseg5e16.v v8, (a0), v0.t2320; CHECK-NEXT:    ret2321entry:2322  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)2323  ret void2324}2325 2326define void @test_vsseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, i64 %vl) {2327; CHECK-LABEL: test_vsseg6_nxv1f16_triscv.vector.tuple_nxv2i8_6t:2328; CHECK:       # %bb.0: # %entry2329; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma2330; CHECK-NEXT:    vsseg6e16.v v8, (a0)2331; CHECK-NEXT:    ret2332entry:2333  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv2i8_6t(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, i64 %vl, i64 4)2334  ret void2335}2336 2337define void @test_vsseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {2338; CHECK-LABEL: test_vsseg6_mask_nxv1f16_triscv.vector.tuple_nxv2i8_6t:2339; CHECK:       # %bb.0: # %entry2340; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma2341; CHECK-NEXT:    vsseg6e16.v v8, (a0), v0.t2342; CHECK-NEXT:    ret2343entry:2344  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)2345  ret void2346}2347 2348define void @test_vsseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl) {2349; CHECK-LABEL: test_vsseg6_nxv2f16_triscv.vector.tuple_nxv4i8_6t:2350; CHECK:       # %bb.0: # %entry2351; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma2352; CHECK-NEXT:    vsseg6e16.v v8, (a0)2353; CHECK-NEXT:    ret2354entry:2355  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl, i64 4)2356  ret void2357}2358 2359define void @test_vsseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {2360; CHECK-LABEL: test_vsseg6_mask_nxv2f16_triscv.vector.tuple_nxv4i8_6t:2361; CHECK:       # %bb.0: # %entry2362; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma2363; CHECK-NEXT:    vsseg6e16.v v8, (a0), v0.t2364; CHECK-NEXT:    ret2365entry:2366  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)2367  ret void2368}2369 2370define void @test_vsseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl) {2371; CHECK-LABEL: test_vsseg6_nxv4f16_triscv.vector.tuple_nxv8i8_6t:2372; CHECK:       # %bb.0: # %entry2373; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma2374; CHECK-NEXT:    vsseg6e16.v v8, (a0)2375; CHECK-NEXT:    ret2376entry:2377  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, i64 4)2378  ret void2379}2380 2381define void @test_vsseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {2382; CHECK-LABEL: test_vsseg6_mask_nxv4f16_triscv.vector.tuple_nxv8i8_6t:2383; CHECK:       # %bb.0: # %entry2384; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma2385; CHECK-NEXT:    vsseg6e16.v v8, (a0), v0.t2386; CHECK-NEXT:    ret2387entry:2388  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)2389  ret void2390}2391 2392define void @test_vsseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, i64 %vl) {2393; CHECK-LABEL: test_vsseg7_nxv1f16_triscv.vector.tuple_nxv2i8_7t:2394; CHECK:       # %bb.0: # %entry2395; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma2396; CHECK-NEXT:    vsseg7e16.v v8, (a0)2397; CHECK-NEXT:    ret2398entry:2399  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv2i8_7t(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, i64 %vl, i64 4)2400  ret void2401}2402 2403define void @test_vsseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {2404; CHECK-LABEL: test_vsseg7_mask_nxv1f16_triscv.vector.tuple_nxv2i8_7t:2405; CHECK:       # %bb.0: # %entry2406; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma2407; CHECK-NEXT:    vsseg7e16.v v8, (a0), v0.t2408; CHECK-NEXT:    ret2409entry:2410  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)2411  ret void2412}2413 2414define void @test_vsseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl) {2415; CHECK-LABEL: test_vsseg7_nxv2f16_triscv.vector.tuple_nxv4i8_7t:2416; CHECK:       # %bb.0: # %entry2417; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma2418; CHECK-NEXT:    vsseg7e16.v v8, (a0)2419; CHECK-NEXT:    ret2420entry:2421  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl, i64 4)2422  ret void2423}2424 2425define void @test_vsseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {2426; CHECK-LABEL: test_vsseg7_mask_nxv2f16_triscv.vector.tuple_nxv4i8_7t:2427; CHECK:       # %bb.0: # %entry2428; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma2429; CHECK-NEXT:    vsseg7e16.v v8, (a0), v0.t2430; CHECK-NEXT:    ret2431entry:2432  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)2433  ret void2434}2435 2436define void @test_vsseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl) {2437; CHECK-LABEL: test_vsseg7_nxv4f16_triscv.vector.tuple_nxv8i8_7t:2438; CHECK:       # %bb.0: # %entry2439; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma2440; CHECK-NEXT:    vsseg7e16.v v8, (a0)2441; CHECK-NEXT:    ret2442entry:2443  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, i64 4)2444  ret void2445}2446 2447define void @test_vsseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {2448; CHECK-LABEL: test_vsseg7_mask_nxv4f16_triscv.vector.tuple_nxv8i8_7t:2449; CHECK:       # %bb.0: # %entry2450; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma2451; CHECK-NEXT:    vsseg7e16.v v8, (a0), v0.t2452; CHECK-NEXT:    ret2453entry:2454  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)2455  ret void2456}2457 2458define void @test_vsseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, i64 %vl) {2459; CHECK-LABEL: test_vsseg8_nxv1f16_triscv.vector.tuple_nxv2i8_8t:2460; CHECK:       # %bb.0: # %entry2461; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma2462; CHECK-NEXT:    vsseg8e16.v v8, (a0)2463; CHECK-NEXT:    ret2464entry:2465  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv2i8_8t(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, i64 %vl, i64 4)2466  ret void2467}2468 2469define void @test_vsseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {2470; CHECK-LABEL: test_vsseg8_mask_nxv1f16_triscv.vector.tuple_nxv2i8_8t:2471; CHECK:       # %bb.0: # %entry2472; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma2473; CHECK-NEXT:    vsseg8e16.v v8, (a0), v0.t2474; CHECK-NEXT:    ret2475entry:2476  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)2477  ret void2478}2479 2480define void @test_vsseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl) {2481; CHECK-LABEL: test_vsseg8_nxv2f16_triscv.vector.tuple_nxv4i8_8t:2482; CHECK:       # %bb.0: # %entry2483; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma2484; CHECK-NEXT:    vsseg8e16.v v8, (a0)2485; CHECK-NEXT:    ret2486entry:2487  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl, i64 4)2488  ret void2489}2490 2491define void @test_vsseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {2492; CHECK-LABEL: test_vsseg8_mask_nxv2f16_triscv.vector.tuple_nxv4i8_8t:2493; CHECK:       # %bb.0: # %entry2494; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma2495; CHECK-NEXT:    vsseg8e16.v v8, (a0), v0.t2496; CHECK-NEXT:    ret2497entry:2498  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)2499  ret void2500}2501 2502define void @test_vsseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl) {2503; CHECK-LABEL: test_vsseg8_nxv4f16_triscv.vector.tuple_nxv8i8_8t:2504; CHECK:       # %bb.0: # %entry2505; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma2506; CHECK-NEXT:    vsseg8e16.v v8, (a0)2507; CHECK-NEXT:    ret2508entry:2509  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, i64 4)2510  ret void2511}2512 2513define void @test_vsseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {2514; CHECK-LABEL: test_vsseg8_mask_nxv4f16_triscv.vector.tuple_nxv8i8_8t:2515; CHECK:       # %bb.0: # %entry2516; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma2517; CHECK-NEXT:    vsseg8e16.v v8, (a0), v0.t2518; CHECK-NEXT:    ret2519entry:2520  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)2521  ret void2522}2523 2524define void @test_vsseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl) {2525; CHECK-LABEL: test_vsseg2_nxv1f32_triscv.vector.tuple_nxv4i8_2t:2526; CHECK:       # %bb.0: # %entry2527; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma2528; CHECK-NEXT:    vsseg2e32.v v8, (a0)2529; CHECK-NEXT:    ret2530entry:2531  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl, i64 5)2532  ret void2533}2534 2535define void @test_vsseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {2536; CHECK-LABEL: test_vsseg2_mask_nxv1f32_triscv.vector.tuple_nxv4i8_2t:2537; CHECK:       # %bb.0: # %entry2538; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma2539; CHECK-NEXT:    vsseg2e32.v v8, (a0), v0.t2540; CHECK-NEXT:    ret2541entry:2542  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv1i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 5)2543  ret void2544}2545 2546define void @test_vsseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl) {2547; CHECK-LABEL: test_vsseg2_nxv2f32_triscv.vector.tuple_nxv8i8_2t:2548; CHECK:       # %bb.0: # %entry2549; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma2550; CHECK-NEXT:    vsseg2e32.v v8, (a0)2551; CHECK-NEXT:    ret2552entry:2553  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, i64 5)2554  ret void2555}2556 2557define void @test_vsseg2_mask_nxv2f32_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {2558; CHECK-LABEL: test_vsseg2_mask_nxv2f32_triscv.vector.tuple_nxv8i8_2t:2559; CHECK:       # %bb.0: # %entry2560; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma2561; CHECK-NEXT:    vsseg2e32.v v8, (a0), v0.t2562; CHECK-NEXT:    ret2563entry:2564  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv2i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 5)2565  ret void2566}2567 2568define void @test_vsseg2_nxv4f32_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl) {2569; CHECK-LABEL: test_vsseg2_nxv4f32_triscv.vector.tuple_nxv16i8_2t:2570; CHECK:       # %bb.0: # %entry2571; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma2572; CHECK-NEXT:    vsseg2e32.v v8, (a0)2573; CHECK-NEXT:    ret2574entry:2575  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, i64 5)2576  ret void2577}2578 2579define void @test_vsseg2_mask_nxv4f32_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {2580; CHECK-LABEL: test_vsseg2_mask_nxv4f32_triscv.vector.tuple_nxv16i8_2t:2581; CHECK:       # %bb.0: # %entry2582; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma2583; CHECK-NEXT:    vsseg2e32.v v8, (a0), v0.t2584; CHECK-NEXT:    ret2585entry:2586  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv16i8_2t.nxv4i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 5)2587  ret void2588}2589 2590define void @test_vsseg2_nxv8f32_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl) {2591; CHECK-LABEL: test_vsseg2_nxv8f32_triscv.vector.tuple_nxv32i8_2t:2592; CHECK:       # %bb.0: # %entry2593; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2594; CHECK-NEXT:    vsseg2e32.v v8, (a0)2595; CHECK-NEXT:    ret2596entry:2597  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, i64 5)2598  ret void2599}2600 2601define void @test_vsseg2_mask_nxv8f32_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {2602; CHECK-LABEL: test_vsseg2_mask_nxv8f32_triscv.vector.tuple_nxv32i8_2t:2603; CHECK:       # %bb.0: # %entry2604; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2605; CHECK-NEXT:    vsseg2e32.v v8, (a0), v0.t2606; CHECK-NEXT:    ret2607entry:2608  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv32i8_2t.nxv8i1(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 5)2609  ret void2610}2611 2612define void @test_vsseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl) {2613; CHECK-LABEL: test_vsseg3_nxv1f32_triscv.vector.tuple_nxv4i8_3t:2614; CHECK:       # %bb.0: # %entry2615; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma2616; CHECK-NEXT:    vsseg3e32.v v8, (a0)2617; CHECK-NEXT:    ret2618entry:2619  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl, i64 5)2620  ret void2621}2622 2623define void @test_vsseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {2624; CHECK-LABEL: test_vsseg3_mask_nxv1f32_triscv.vector.tuple_nxv4i8_3t:2625; CHECK:       # %bb.0: # %entry2626; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma2627; CHECK-NEXT:    vsseg3e32.v v8, (a0), v0.t2628; CHECK-NEXT:    ret2629entry:2630  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv1i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 5)2631  ret void2632}2633 2634define void @test_vsseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl) {2635; CHECK-LABEL: test_vsseg3_nxv2f32_triscv.vector.tuple_nxv8i8_3t:2636; CHECK:       # %bb.0: # %entry2637; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma2638; CHECK-NEXT:    vsseg3e32.v v8, (a0)2639; CHECK-NEXT:    ret2640entry:2641  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, i64 5)2642  ret void2643}2644 2645define void @test_vsseg3_mask_nxv2f32_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {2646; CHECK-LABEL: test_vsseg3_mask_nxv2f32_triscv.vector.tuple_nxv8i8_3t:2647; CHECK:       # %bb.0: # %entry2648; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma2649; CHECK-NEXT:    vsseg3e32.v v8, (a0), v0.t2650; CHECK-NEXT:    ret2651entry:2652  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv2i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 5)2653  ret void2654}2655 2656define void @test_vsseg3_nxv4f32_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl) {2657; CHECK-LABEL: test_vsseg3_nxv4f32_triscv.vector.tuple_nxv16i8_3t:2658; CHECK:       # %bb.0: # %entry2659; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma2660; CHECK-NEXT:    vsseg3e32.v v8, (a0)2661; CHECK-NEXT:    ret2662entry:2663  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, i64 5)2664  ret void2665}2666 2667define void @test_vsseg3_mask_nxv4f32_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {2668; CHECK-LABEL: test_vsseg3_mask_nxv4f32_triscv.vector.tuple_nxv16i8_3t:2669; CHECK:       # %bb.0: # %entry2670; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma2671; CHECK-NEXT:    vsseg3e32.v v8, (a0), v0.t2672; CHECK-NEXT:    ret2673entry:2674  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv4i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 5)2675  ret void2676}2677 2678define void @test_vsseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl) {2679; CHECK-LABEL: test_vsseg4_nxv1f32_triscv.vector.tuple_nxv4i8_4t:2680; CHECK:       # %bb.0: # %entry2681; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma2682; CHECK-NEXT:    vsseg4e32.v v8, (a0)2683; CHECK-NEXT:    ret2684entry:2685  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl, i64 5)2686  ret void2687}2688 2689define void @test_vsseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {2690; CHECK-LABEL: test_vsseg4_mask_nxv1f32_triscv.vector.tuple_nxv4i8_4t:2691; CHECK:       # %bb.0: # %entry2692; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma2693; CHECK-NEXT:    vsseg4e32.v v8, (a0), v0.t2694; CHECK-NEXT:    ret2695entry:2696  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv1i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 5)2697  ret void2698}2699 2700define void @test_vsseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl) {2701; CHECK-LABEL: test_vsseg4_nxv2f32_triscv.vector.tuple_nxv8i8_4t:2702; CHECK:       # %bb.0: # %entry2703; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma2704; CHECK-NEXT:    vsseg4e32.v v8, (a0)2705; CHECK-NEXT:    ret2706entry:2707  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, i64 5)2708  ret void2709}2710 2711define void @test_vsseg4_mask_nxv2f32_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {2712; CHECK-LABEL: test_vsseg4_mask_nxv2f32_triscv.vector.tuple_nxv8i8_4t:2713; CHECK:       # %bb.0: # %entry2714; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma2715; CHECK-NEXT:    vsseg4e32.v v8, (a0), v0.t2716; CHECK-NEXT:    ret2717entry:2718  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv2i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 5)2719  ret void2720}2721 2722define void @test_vsseg4_nxv4f32_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl) {2723; CHECK-LABEL: test_vsseg4_nxv4f32_triscv.vector.tuple_nxv16i8_4t:2724; CHECK:       # %bb.0: # %entry2725; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma2726; CHECK-NEXT:    vsseg4e32.v v8, (a0)2727; CHECK-NEXT:    ret2728entry:2729  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, i64 5)2730  ret void2731}2732 2733define void @test_vsseg4_mask_nxv4f32_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {2734; CHECK-LABEL: test_vsseg4_mask_nxv4f32_triscv.vector.tuple_nxv16i8_4t:2735; CHECK:       # %bb.0: # %entry2736; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma2737; CHECK-NEXT:    vsseg4e32.v v8, (a0), v0.t2738; CHECK-NEXT:    ret2739entry:2740  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv4i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 5)2741  ret void2742}2743 2744define void @test_vsseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl) {2745; CHECK-LABEL: test_vsseg5_nxv1f32_triscv.vector.tuple_nxv4i8_5t:2746; CHECK:       # %bb.0: # %entry2747; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma2748; CHECK-NEXT:    vsseg5e32.v v8, (a0)2749; CHECK-NEXT:    ret2750entry:2751  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl, i64 5)2752  ret void2753}2754 2755define void @test_vsseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {2756; CHECK-LABEL: test_vsseg5_mask_nxv1f32_triscv.vector.tuple_nxv4i8_5t:2757; CHECK:       # %bb.0: # %entry2758; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma2759; CHECK-NEXT:    vsseg5e32.v v8, (a0), v0.t2760; CHECK-NEXT:    ret2761entry:2762  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv1i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 5)2763  ret void2764}2765 2766define void @test_vsseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl) {2767; CHECK-LABEL: test_vsseg5_nxv2f32_triscv.vector.tuple_nxv8i8_5t:2768; CHECK:       # %bb.0: # %entry2769; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma2770; CHECK-NEXT:    vsseg5e32.v v8, (a0)2771; CHECK-NEXT:    ret2772entry:2773  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, i64 5)2774  ret void2775}2776 2777define void @test_vsseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {2778; CHECK-LABEL: test_vsseg5_mask_nxv2f32_triscv.vector.tuple_nxv8i8_5t:2779; CHECK:       # %bb.0: # %entry2780; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma2781; CHECK-NEXT:    vsseg5e32.v v8, (a0), v0.t2782; CHECK-NEXT:    ret2783entry:2784  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv2i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 5)2785  ret void2786}2787 2788define void @test_vsseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl) {2789; CHECK-LABEL: test_vsseg6_nxv1f32_triscv.vector.tuple_nxv4i8_6t:2790; CHECK:       # %bb.0: # %entry2791; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma2792; CHECK-NEXT:    vsseg6e32.v v8, (a0)2793; CHECK-NEXT:    ret2794entry:2795  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl, i64 5)2796  ret void2797}2798 2799define void @test_vsseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {2800; CHECK-LABEL: test_vsseg6_mask_nxv1f32_triscv.vector.tuple_nxv4i8_6t:2801; CHECK:       # %bb.0: # %entry2802; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma2803; CHECK-NEXT:    vsseg6e32.v v8, (a0), v0.t2804; CHECK-NEXT:    ret2805entry:2806  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv1i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 5)2807  ret void2808}2809 2810define void @test_vsseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl) {2811; CHECK-LABEL: test_vsseg6_nxv2f32_triscv.vector.tuple_nxv8i8_6t:2812; CHECK:       # %bb.0: # %entry2813; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma2814; CHECK-NEXT:    vsseg6e32.v v8, (a0)2815; CHECK-NEXT:    ret2816entry:2817  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, i64 5)2818  ret void2819}2820 2821define void @test_vsseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {2822; CHECK-LABEL: test_vsseg6_mask_nxv2f32_triscv.vector.tuple_nxv8i8_6t:2823; CHECK:       # %bb.0: # %entry2824; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma2825; CHECK-NEXT:    vsseg6e32.v v8, (a0), v0.t2826; CHECK-NEXT:    ret2827entry:2828  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv2i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 5)2829  ret void2830}2831 2832define void @test_vsseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl) {2833; CHECK-LABEL: test_vsseg7_nxv1f32_triscv.vector.tuple_nxv4i8_7t:2834; CHECK:       # %bb.0: # %entry2835; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma2836; CHECK-NEXT:    vsseg7e32.v v8, (a0)2837; CHECK-NEXT:    ret2838entry:2839  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl, i64 5)2840  ret void2841}2842 2843define void @test_vsseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {2844; CHECK-LABEL: test_vsseg7_mask_nxv1f32_triscv.vector.tuple_nxv4i8_7t:2845; CHECK:       # %bb.0: # %entry2846; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma2847; CHECK-NEXT:    vsseg7e32.v v8, (a0), v0.t2848; CHECK-NEXT:    ret2849entry:2850  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv1i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 5)2851  ret void2852}2853 2854define void @test_vsseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl) {2855; CHECK-LABEL: test_vsseg7_nxv2f32_triscv.vector.tuple_nxv8i8_7t:2856; CHECK:       # %bb.0: # %entry2857; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma2858; CHECK-NEXT:    vsseg7e32.v v8, (a0)2859; CHECK-NEXT:    ret2860entry:2861  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, i64 5)2862  ret void2863}2864 2865define void @test_vsseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {2866; CHECK-LABEL: test_vsseg7_mask_nxv2f32_triscv.vector.tuple_nxv8i8_7t:2867; CHECK:       # %bb.0: # %entry2868; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma2869; CHECK-NEXT:    vsseg7e32.v v8, (a0), v0.t2870; CHECK-NEXT:    ret2871entry:2872  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv2i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 5)2873  ret void2874}2875 2876define void @test_vsseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl) {2877; CHECK-LABEL: test_vsseg8_nxv1f32_triscv.vector.tuple_nxv4i8_8t:2878; CHECK:       # %bb.0: # %entry2879; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma2880; CHECK-NEXT:    vsseg8e32.v v8, (a0)2881; CHECK-NEXT:    ret2882entry:2883  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl, i64 5)2884  ret void2885}2886 2887define void @test_vsseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {2888; CHECK-LABEL: test_vsseg8_mask_nxv1f32_triscv.vector.tuple_nxv4i8_8t:2889; CHECK:       # %bb.0: # %entry2890; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma2891; CHECK-NEXT:    vsseg8e32.v v8, (a0), v0.t2892; CHECK-NEXT:    ret2893entry:2894  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv1i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 5)2895  ret void2896}2897 2898define void @test_vsseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl) {2899; CHECK-LABEL: test_vsseg8_nxv2f32_triscv.vector.tuple_nxv8i8_8t:2900; CHECK:       # %bb.0: # %entry2901; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma2902; CHECK-NEXT:    vsseg8e32.v v8, (a0)2903; CHECK-NEXT:    ret2904entry:2905  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, i64 5)2906  ret void2907}2908 2909define void @test_vsseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {2910; CHECK-LABEL: test_vsseg8_mask_nxv2f32_triscv.vector.tuple_nxv8i8_8t:2911; CHECK:       # %bb.0: # %entry2912; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma2913; CHECK-NEXT:    vsseg8e32.v v8, (a0), v0.t2914; CHECK-NEXT:    ret2915entry:2916  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv2i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 5)2917  ret void2918}2919 2920define void @test_vsseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl) {2921; CHECK-LABEL: test_vsseg2_nxv1f64_triscv.vector.tuple_nxv8i8_2t:2922; CHECK:       # %bb.0: # %entry2923; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2924; CHECK-NEXT:    vsseg2e64.v v8, (a0)2925; CHECK-NEXT:    ret2926entry:2927  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, i64 6)2928  ret void2929}2930 2931define void @test_vsseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {2932; CHECK-LABEL: test_vsseg2_mask_nxv1f64_triscv.vector.tuple_nxv8i8_2t:2933; CHECK:       # %bb.0: # %entry2934; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2935; CHECK-NEXT:    vsseg2e64.v v8, (a0), v0.t2936; CHECK-NEXT:    ret2937entry:2938  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv1i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 6)2939  ret void2940}2941 2942define void @test_vsseg2_nxv2f64_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl) {2943; CHECK-LABEL: test_vsseg2_nxv2f64_triscv.vector.tuple_nxv16i8_2t:2944; CHECK:       # %bb.0: # %entry2945; CHECK-NEXT:    vsetvli zero, a1, e64, m2, ta, ma2946; CHECK-NEXT:    vsseg2e64.v v8, (a0)2947; CHECK-NEXT:    ret2948entry:2949  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, i64 6)2950  ret void2951}2952 2953define void @test_vsseg2_mask_nxv2f64_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {2954; CHECK-LABEL: test_vsseg2_mask_nxv2f64_triscv.vector.tuple_nxv16i8_2t:2955; CHECK:       # %bb.0: # %entry2956; CHECK-NEXT:    vsetvli zero, a1, e64, m2, ta, ma2957; CHECK-NEXT:    vsseg2e64.v v8, (a0), v0.t2958; CHECK-NEXT:    ret2959entry:2960  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv16i8_2t.nxv2i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 6)2961  ret void2962}2963 2964define void @test_vsseg2_nxv4f64_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl) {2965; CHECK-LABEL: test_vsseg2_nxv4f64_triscv.vector.tuple_nxv32i8_2t:2966; CHECK:       # %bb.0: # %entry2967; CHECK-NEXT:    vsetvli zero, a1, e64, m4, ta, ma2968; CHECK-NEXT:    vsseg2e64.v v8, (a0)2969; CHECK-NEXT:    ret2970entry:2971  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, i64 6)2972  ret void2973}2974 2975define void @test_vsseg2_mask_nxv4f64_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {2976; CHECK-LABEL: test_vsseg2_mask_nxv4f64_triscv.vector.tuple_nxv32i8_2t:2977; CHECK:       # %bb.0: # %entry2978; CHECK-NEXT:    vsetvli zero, a1, e64, m4, ta, ma2979; CHECK-NEXT:    vsseg2e64.v v8, (a0), v0.t2980; CHECK-NEXT:    ret2981entry:2982  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv32i8_2t.nxv4i1(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 6)2983  ret void2984}2985 2986define void @test_vsseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl) {2987; CHECK-LABEL: test_vsseg3_nxv1f64_triscv.vector.tuple_nxv8i8_3t:2988; CHECK:       # %bb.0: # %entry2989; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2990; CHECK-NEXT:    vsseg3e64.v v8, (a0)2991; CHECK-NEXT:    ret2992entry:2993  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, i64 6)2994  ret void2995}2996 2997define void @test_vsseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {2998; CHECK-LABEL: test_vsseg3_mask_nxv1f64_triscv.vector.tuple_nxv8i8_3t:2999; CHECK:       # %bb.0: # %entry3000; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma3001; CHECK-NEXT:    vsseg3e64.v v8, (a0), v0.t3002; CHECK-NEXT:    ret3003entry:3004  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv1i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 6)3005  ret void3006}3007 3008define void @test_vsseg3_nxv2f64_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl) {3009; CHECK-LABEL: test_vsseg3_nxv2f64_triscv.vector.tuple_nxv16i8_3t:3010; CHECK:       # %bb.0: # %entry3011; CHECK-NEXT:    vsetvli zero, a1, e64, m2, ta, ma3012; CHECK-NEXT:    vsseg3e64.v v8, (a0)3013; CHECK-NEXT:    ret3014entry:3015  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, i64 6)3016  ret void3017}3018 3019define void @test_vsseg3_mask_nxv2f64_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {3020; CHECK-LABEL: test_vsseg3_mask_nxv2f64_triscv.vector.tuple_nxv16i8_3t:3021; CHECK:       # %bb.0: # %entry3022; CHECK-NEXT:    vsetvli zero, a1, e64, m2, ta, ma3023; CHECK-NEXT:    vsseg3e64.v v8, (a0), v0.t3024; CHECK-NEXT:    ret3025entry:3026  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv2i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 6)3027  ret void3028}3029 3030define void @test_vsseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl) {3031; CHECK-LABEL: test_vsseg4_nxv1f64_triscv.vector.tuple_nxv8i8_4t:3032; CHECK:       # %bb.0: # %entry3033; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma3034; CHECK-NEXT:    vsseg4e64.v v8, (a0)3035; CHECK-NEXT:    ret3036entry:3037  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, i64 6)3038  ret void3039}3040 3041define void @test_vsseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {3042; CHECK-LABEL: test_vsseg4_mask_nxv1f64_triscv.vector.tuple_nxv8i8_4t:3043; CHECK:       # %bb.0: # %entry3044; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma3045; CHECK-NEXT:    vsseg4e64.v v8, (a0), v0.t3046; CHECK-NEXT:    ret3047entry:3048  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv1i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 6)3049  ret void3050}3051 3052define void @test_vsseg4_nxv2f64_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl) {3053; CHECK-LABEL: test_vsseg4_nxv2f64_triscv.vector.tuple_nxv16i8_4t:3054; CHECK:       # %bb.0: # %entry3055; CHECK-NEXT:    vsetvli zero, a1, e64, m2, ta, ma3056; CHECK-NEXT:    vsseg4e64.v v8, (a0)3057; CHECK-NEXT:    ret3058entry:3059  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, i64 6)3060  ret void3061}3062 3063define void @test_vsseg4_mask_nxv2f64_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {3064; CHECK-LABEL: test_vsseg4_mask_nxv2f64_triscv.vector.tuple_nxv16i8_4t:3065; CHECK:       # %bb.0: # %entry3066; CHECK-NEXT:    vsetvli zero, a1, e64, m2, ta, ma3067; CHECK-NEXT:    vsseg4e64.v v8, (a0), v0.t3068; CHECK-NEXT:    ret3069entry:3070  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv2i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 6)3071  ret void3072}3073 3074define void @test_vsseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl) {3075; CHECK-LABEL: test_vsseg5_nxv1f64_triscv.vector.tuple_nxv8i8_5t:3076; CHECK:       # %bb.0: # %entry3077; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma3078; CHECK-NEXT:    vsseg5e64.v v8, (a0)3079; CHECK-NEXT:    ret3080entry:3081  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, i64 6)3082  ret void3083}3084 3085define void @test_vsseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {3086; CHECK-LABEL: test_vsseg5_mask_nxv1f64_triscv.vector.tuple_nxv8i8_5t:3087; CHECK:       # %bb.0: # %entry3088; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma3089; CHECK-NEXT:    vsseg5e64.v v8, (a0), v0.t3090; CHECK-NEXT:    ret3091entry:3092  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv1i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 6)3093  ret void3094}3095 3096define void @test_vsseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl) {3097; CHECK-LABEL: test_vsseg6_nxv1f64_triscv.vector.tuple_nxv8i8_6t:3098; CHECK:       # %bb.0: # %entry3099; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma3100; CHECK-NEXT:    vsseg6e64.v v8, (a0)3101; CHECK-NEXT:    ret3102entry:3103  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, i64 6)3104  ret void3105}3106 3107define void @test_vsseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {3108; CHECK-LABEL: test_vsseg6_mask_nxv1f64_triscv.vector.tuple_nxv8i8_6t:3109; CHECK:       # %bb.0: # %entry3110; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma3111; CHECK-NEXT:    vsseg6e64.v v8, (a0), v0.t3112; CHECK-NEXT:    ret3113entry:3114  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv1i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 6)3115  ret void3116}3117 3118define void @test_vsseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl) {3119; CHECK-LABEL: test_vsseg7_nxv1f64_triscv.vector.tuple_nxv8i8_7t:3120; CHECK:       # %bb.0: # %entry3121; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma3122; CHECK-NEXT:    vsseg7e64.v v8, (a0)3123; CHECK-NEXT:    ret3124entry:3125  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, i64 6)3126  ret void3127}3128 3129define void @test_vsseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {3130; CHECK-LABEL: test_vsseg7_mask_nxv1f64_triscv.vector.tuple_nxv8i8_7t:3131; CHECK:       # %bb.0: # %entry3132; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma3133; CHECK-NEXT:    vsseg7e64.v v8, (a0), v0.t3134; CHECK-NEXT:    ret3135entry:3136  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv1i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 6)3137  ret void3138}3139 3140define void @test_vsseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl) {3141; CHECK-LABEL: test_vsseg8_nxv1f64_triscv.vector.tuple_nxv8i8_8t:3142; CHECK:       # %bb.0: # %entry3143; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma3144; CHECK-NEXT:    vsseg8e64.v v8, (a0)3145; CHECK-NEXT:    ret3146entry:3147  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, i64 6)3148  ret void3149}3150 3151define void @test_vsseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {3152; CHECK-LABEL: test_vsseg8_mask_nxv1f64_triscv.vector.tuple_nxv8i8_8t:3153; CHECK:       # %bb.0: # %entry3154; CHECK-NEXT:    vsetvli zero, a1, e64, m1, ta, ma3155; CHECK-NEXT:    vsseg8e64.v v8, (a0), v0.t3156; CHECK-NEXT:    ret3157entry:3158  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv1i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 6)3159  ret void3160}3161 3162define void @test_vsseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, i64 %vl) {3163; CHECK-LABEL: test_vsseg2_nxv1bf16_triscv.vector.tuple_nxv2i8_2t:3164; CHECK:       # %bb.0: # %entry3165; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma3166; CHECK-NEXT:    vsseg2e16.v v8, (a0)3167; CHECK-NEXT:    ret3168entry:3169  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv2i8_2t(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, i64 %vl, i64 4)3170  ret void3171}3172 3173define void @test_vsseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {3174; CHECK-LABEL: test_vsseg2_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_2t:3175; CHECK:       # %bb.0: # %entry3176; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma3177; CHECK-NEXT:    vsseg2e16.v v8, (a0), v0.t3178; CHECK-NEXT:    ret3179entry:3180  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)3181  ret void3182}3183 3184define void @test_vsseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl) {3185; CHECK-LABEL: test_vsseg2_nxv2bf16_triscv.vector.tuple_nxv4i8_2t:3186; CHECK:       # %bb.0: # %entry3187; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma3188; CHECK-NEXT:    vsseg2e16.v v8, (a0)3189; CHECK-NEXT:    ret3190entry:3191  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl, i64 4)3192  ret void3193}3194 3195define void @test_vsseg2_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {3196; CHECK-LABEL: test_vsseg2_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_2t:3197; CHECK:       # %bb.0: # %entry3198; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma3199; CHECK-NEXT:    vsseg2e16.v v8, (a0), v0.t3200; CHECK-NEXT:    ret3201entry:3202  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv4i8_2t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)3203  ret void3204}3205 3206define void @test_vsseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl) {3207; CHECK-LABEL: test_vsseg2_nxv4bf16_triscv.vector.tuple_nxv8i8_2t:3208; CHECK:       # %bb.0: # %entry3209; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma3210; CHECK-NEXT:    vsseg2e16.v v8, (a0)3211; CHECK-NEXT:    ret3212entry:3213  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, i64 4)3214  ret void3215}3216 3217define void @test_vsseg2_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {3218; CHECK-LABEL: test_vsseg2_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_2t:3219; CHECK:       # %bb.0: # %entry3220; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma3221; CHECK-NEXT:    vsseg2e16.v v8, (a0), v0.t3222; CHECK-NEXT:    ret3223entry:3224  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv8i8_2t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)3225  ret void3226}3227 3228define void @test_vsseg2_nxv8bf16_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl) {3229; CHECK-LABEL: test_vsseg2_nxv8bf16_triscv.vector.tuple_nxv16i8_2t:3230; CHECK:       # %bb.0: # %entry3231; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma3232; CHECK-NEXT:    vsseg2e16.v v8, (a0)3233; CHECK-NEXT:    ret3234entry:3235  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, i64 4)3236  ret void3237}3238 3239define void @test_vsseg2_mask_nxv8bf16_triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {3240; CHECK-LABEL: test_vsseg2_mask_nxv8bf16_triscv.vector.tuple_nxv16i8_2t:3241; CHECK:       # %bb.0: # %entry3242; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma3243; CHECK-NEXT:    vsseg2e16.v v8, (a0), v0.t3244; CHECK-NEXT:    ret3245entry:3246  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv16i8_2t.nxv8i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 4)3247  ret void3248}3249 3250define void @test_vsseg2_nxv16bf16_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl) {3251; CHECK-LABEL: test_vsseg2_nxv16bf16_triscv.vector.tuple_nxv32i8_2t:3252; CHECK:       # %bb.0: # %entry3253; CHECK-NEXT:    vsetvli zero, a1, e16, m4, ta, ma3254; CHECK-NEXT:    vsseg2e16.v v8, (a0)3255; CHECK-NEXT:    ret3256entry:3257  tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, i64 4)3258  ret void3259}3260 3261define void @test_vsseg2_mask_nxv16bf16_triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, i64 %vl, <vscale x 16 x i1> %mask) {3262; CHECK-LABEL: test_vsseg2_mask_nxv16bf16_triscv.vector.tuple_nxv32i8_2t:3263; CHECK:       # %bb.0: # %entry3264; CHECK-NEXT:    vsetvli zero, a1, e16, m4, ta, ma3265; CHECK-NEXT:    vsseg2e16.v v8, (a0), v0.t3266; CHECK-NEXT:    ret3267entry:3268  tail call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv32i8_2t.nxv16i1(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %val, ptr %base, <vscale x 16 x i1> %mask, i64 %vl, i64 4)3269  ret void3270}3271 3272define void @test_vsseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, i64 %vl) {3273; CHECK-LABEL: test_vsseg3_nxv1bf16_triscv.vector.tuple_nxv2i8_3t:3274; CHECK:       # %bb.0: # %entry3275; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma3276; CHECK-NEXT:    vsseg3e16.v v8, (a0)3277; CHECK-NEXT:    ret3278entry:3279  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv2i8_3t(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, i64 %vl, i64 4)3280  ret void3281}3282 3283define void @test_vsseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {3284; CHECK-LABEL: test_vsseg3_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_3t:3285; CHECK:       # %bb.0: # %entry3286; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma3287; CHECK-NEXT:    vsseg3e16.v v8, (a0), v0.t3288; CHECK-NEXT:    ret3289entry:3290  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)3291  ret void3292}3293 3294define void @test_vsseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl) {3295; CHECK-LABEL: test_vsseg3_nxv2bf16_triscv.vector.tuple_nxv4i8_3t:3296; CHECK:       # %bb.0: # %entry3297; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma3298; CHECK-NEXT:    vsseg3e16.v v8, (a0)3299; CHECK-NEXT:    ret3300entry:3301  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl, i64 4)3302  ret void3303}3304 3305define void @test_vsseg3_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_3t(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {3306; CHECK-LABEL: test_vsseg3_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_3t:3307; CHECK:       # %bb.0: # %entry3308; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma3309; CHECK-NEXT:    vsseg3e16.v v8, (a0), v0.t3310; CHECK-NEXT:    ret3311entry:3312  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv4i8_3t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)3313  ret void3314}3315 3316define void @test_vsseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl) {3317; CHECK-LABEL: test_vsseg3_nxv4bf16_triscv.vector.tuple_nxv8i8_3t:3318; CHECK:       # %bb.0: # %entry3319; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma3320; CHECK-NEXT:    vsseg3e16.v v8, (a0)3321; CHECK-NEXT:    ret3322entry:3323  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, i64 4)3324  ret void3325}3326 3327define void @test_vsseg3_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {3328; CHECK-LABEL: test_vsseg3_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_3t:3329; CHECK:       # %bb.0: # %entry3330; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma3331; CHECK-NEXT:    vsseg3e16.v v8, (a0), v0.t3332; CHECK-NEXT:    ret3333entry:3334  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv8i8_3t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)3335  ret void3336}3337 3338define void @test_vsseg3_nxv8bf16_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl) {3339; CHECK-LABEL: test_vsseg3_nxv8bf16_triscv.vector.tuple_nxv16i8_3t:3340; CHECK:       # %bb.0: # %entry3341; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma3342; CHECK-NEXT:    vsseg3e16.v v8, (a0)3343; CHECK-NEXT:    ret3344entry:3345  tail call void @llvm.riscv.vsseg3.triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, i64 4)3346  ret void3347}3348 3349define void @test_vsseg3_mask_nxv8bf16_triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {3350; CHECK-LABEL: test_vsseg3_mask_nxv8bf16_triscv.vector.tuple_nxv16i8_3t:3351; CHECK:       # %bb.0: # %entry3352; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma3353; CHECK-NEXT:    vsseg3e16.v v8, (a0), v0.t3354; CHECK-NEXT:    ret3355entry:3356  tail call void @llvm.riscv.vsseg3.mask.triscv.vector.tuple_nxv16i8_3t.nxv8i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 4)3357  ret void3358}3359 3360define void @test_vsseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, i64 %vl) {3361; CHECK-LABEL: test_vsseg4_nxv1bf16_triscv.vector.tuple_nxv2i8_4t:3362; CHECK:       # %bb.0: # %entry3363; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma3364; CHECK-NEXT:    vsseg4e16.v v8, (a0)3365; CHECK-NEXT:    ret3366entry:3367  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv2i8_4t(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, i64 %vl, i64 4)3368  ret void3369}3370 3371define void @test_vsseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {3372; CHECK-LABEL: test_vsseg4_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_4t:3373; CHECK:       # %bb.0: # %entry3374; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma3375; CHECK-NEXT:    vsseg4e16.v v8, (a0), v0.t3376; CHECK-NEXT:    ret3377entry:3378  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)3379  ret void3380}3381 3382define void @test_vsseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl) {3383; CHECK-LABEL: test_vsseg4_nxv2bf16_triscv.vector.tuple_nxv4i8_4t:3384; CHECK:       # %bb.0: # %entry3385; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma3386; CHECK-NEXT:    vsseg4e16.v v8, (a0)3387; CHECK-NEXT:    ret3388entry:3389  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl, i64 4)3390  ret void3391}3392 3393define void @test_vsseg4_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_4t(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {3394; CHECK-LABEL: test_vsseg4_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_4t:3395; CHECK:       # %bb.0: # %entry3396; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma3397; CHECK-NEXT:    vsseg4e16.v v8, (a0), v0.t3398; CHECK-NEXT:    ret3399entry:3400  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv4i8_4t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)3401  ret void3402}3403 3404define void @test_vsseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl) {3405; CHECK-LABEL: test_vsseg4_nxv4bf16_triscv.vector.tuple_nxv8i8_4t:3406; CHECK:       # %bb.0: # %entry3407; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma3408; CHECK-NEXT:    vsseg4e16.v v8, (a0)3409; CHECK-NEXT:    ret3410entry:3411  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, i64 4)3412  ret void3413}3414 3415define void @test_vsseg4_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_4t(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {3416; CHECK-LABEL: test_vsseg4_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_4t:3417; CHECK:       # %bb.0: # %entry3418; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma3419; CHECK-NEXT:    vsseg4e16.v v8, (a0), v0.t3420; CHECK-NEXT:    ret3421entry:3422  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv8i8_4t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)3423  ret void3424}3425 3426define void @test_vsseg4_nxv8bf16_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl) {3427; CHECK-LABEL: test_vsseg4_nxv8bf16_triscv.vector.tuple_nxv16i8_4t:3428; CHECK:       # %bb.0: # %entry3429; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma3430; CHECK-NEXT:    vsseg4e16.v v8, (a0)3431; CHECK-NEXT:    ret3432entry:3433  tail call void @llvm.riscv.vsseg4.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, i64 4)3434  ret void3435}3436 3437define void @test_vsseg4_mask_nxv8bf16_triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, i64 %vl, <vscale x 8 x i1> %mask) {3438; CHECK-LABEL: test_vsseg4_mask_nxv8bf16_triscv.vector.tuple_nxv16i8_4t:3439; CHECK:       # %bb.0: # %entry3440; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma3441; CHECK-NEXT:    vsseg4e16.v v8, (a0), v0.t3442; CHECK-NEXT:    ret3443entry:3444  tail call void @llvm.riscv.vsseg4.mask.triscv.vector.tuple_nxv16i8_4t.nxv8i1(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) %val, ptr %base, <vscale x 8 x i1> %mask, i64 %vl, i64 4)3445  ret void3446}3447 3448define void @test_vsseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, i64 %vl) {3449; CHECK-LABEL: test_vsseg5_nxv1bf16_triscv.vector.tuple_nxv2i8_5t:3450; CHECK:       # %bb.0: # %entry3451; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma3452; CHECK-NEXT:    vsseg5e16.v v8, (a0)3453; CHECK-NEXT:    ret3454entry:3455  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv2i8_5t(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, i64 %vl, i64 4)3456  ret void3457}3458 3459define void @test_vsseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {3460; CHECK-LABEL: test_vsseg5_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_5t:3461; CHECK:       # %bb.0: # %entry3462; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma3463; CHECK-NEXT:    vsseg5e16.v v8, (a0), v0.t3464; CHECK-NEXT:    ret3465entry:3466  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)3467  ret void3468}3469 3470define void @test_vsseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl) {3471; CHECK-LABEL: test_vsseg5_nxv2bf16_triscv.vector.tuple_nxv4i8_5t:3472; CHECK:       # %bb.0: # %entry3473; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma3474; CHECK-NEXT:    vsseg5e16.v v8, (a0)3475; CHECK-NEXT:    ret3476entry:3477  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl, i64 4)3478  ret void3479}3480 3481define void @test_vsseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {3482; CHECK-LABEL: test_vsseg5_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_5t:3483; CHECK:       # %bb.0: # %entry3484; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma3485; CHECK-NEXT:    vsseg5e16.v v8, (a0), v0.t3486; CHECK-NEXT:    ret3487entry:3488  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv4i8_5t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)3489  ret void3490}3491 3492define void @test_vsseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl) {3493; CHECK-LABEL: test_vsseg5_nxv4bf16_triscv.vector.tuple_nxv8i8_5t:3494; CHECK:       # %bb.0: # %entry3495; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma3496; CHECK-NEXT:    vsseg5e16.v v8, (a0)3497; CHECK-NEXT:    ret3498entry:3499  tail call void @llvm.riscv.vsseg5.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, i64 4)3500  ret void3501}3502 3503define void @test_vsseg5_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {3504; CHECK-LABEL: test_vsseg5_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_5t:3505; CHECK:       # %bb.0: # %entry3506; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma3507; CHECK-NEXT:    vsseg5e16.v v8, (a0), v0.t3508; CHECK-NEXT:    ret3509entry:3510  tail call void @llvm.riscv.vsseg5.mask.triscv.vector.tuple_nxv8i8_5t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)3511  ret void3512}3513 3514define void @test_vsseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, i64 %vl) {3515; CHECK-LABEL: test_vsseg6_nxv1bf16_triscv.vector.tuple_nxv2i8_6t:3516; CHECK:       # %bb.0: # %entry3517; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma3518; CHECK-NEXT:    vsseg6e16.v v8, (a0)3519; CHECK-NEXT:    ret3520entry:3521  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv2i8_6t(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, i64 %vl, i64 4)3522  ret void3523}3524 3525define void @test_vsseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {3526; CHECK-LABEL: test_vsseg6_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_6t:3527; CHECK:       # %bb.0: # %entry3528; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma3529; CHECK-NEXT:    vsseg6e16.v v8, (a0), v0.t3530; CHECK-NEXT:    ret3531entry:3532  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)3533  ret void3534}3535 3536define void @test_vsseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl) {3537; CHECK-LABEL: test_vsseg6_nxv2bf16_triscv.vector.tuple_nxv4i8_6t:3538; CHECK:       # %bb.0: # %entry3539; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma3540; CHECK-NEXT:    vsseg6e16.v v8, (a0)3541; CHECK-NEXT:    ret3542entry:3543  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl, i64 4)3544  ret void3545}3546 3547define void @test_vsseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {3548; CHECK-LABEL: test_vsseg6_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_6t:3549; CHECK:       # %bb.0: # %entry3550; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma3551; CHECK-NEXT:    vsseg6e16.v v8, (a0), v0.t3552; CHECK-NEXT:    ret3553entry:3554  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv4i8_6t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)3555  ret void3556}3557 3558define void @test_vsseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl) {3559; CHECK-LABEL: test_vsseg6_nxv4bf16_triscv.vector.tuple_nxv8i8_6t:3560; CHECK:       # %bb.0: # %entry3561; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma3562; CHECK-NEXT:    vsseg6e16.v v8, (a0)3563; CHECK-NEXT:    ret3564entry:3565  tail call void @llvm.riscv.vsseg6.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, i64 4)3566  ret void3567}3568 3569define void @test_vsseg6_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {3570; CHECK-LABEL: test_vsseg6_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_6t:3571; CHECK:       # %bb.0: # %entry3572; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma3573; CHECK-NEXT:    vsseg6e16.v v8, (a0), v0.t3574; CHECK-NEXT:    ret3575entry:3576  tail call void @llvm.riscv.vsseg6.mask.triscv.vector.tuple_nxv8i8_6t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)3577  ret void3578}3579 3580define void @test_vsseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, i64 %vl) {3581; CHECK-LABEL: test_vsseg7_nxv1bf16_triscv.vector.tuple_nxv2i8_7t:3582; CHECK:       # %bb.0: # %entry3583; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma3584; CHECK-NEXT:    vsseg7e16.v v8, (a0)3585; CHECK-NEXT:    ret3586entry:3587  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv2i8_7t(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, i64 %vl, i64 4)3588  ret void3589}3590 3591define void @test_vsseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {3592; CHECK-LABEL: test_vsseg7_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_7t:3593; CHECK:       # %bb.0: # %entry3594; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma3595; CHECK-NEXT:    vsseg7e16.v v8, (a0), v0.t3596; CHECK-NEXT:    ret3597entry:3598  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)3599  ret void3600}3601 3602define void @test_vsseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl) {3603; CHECK-LABEL: test_vsseg7_nxv2bf16_triscv.vector.tuple_nxv4i8_7t:3604; CHECK:       # %bb.0: # %entry3605; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma3606; CHECK-NEXT:    vsseg7e16.v v8, (a0)3607; CHECK-NEXT:    ret3608entry:3609  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl, i64 4)3610  ret void3611}3612 3613define void @test_vsseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {3614; CHECK-LABEL: test_vsseg7_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_7t:3615; CHECK:       # %bb.0: # %entry3616; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma3617; CHECK-NEXT:    vsseg7e16.v v8, (a0), v0.t3618; CHECK-NEXT:    ret3619entry:3620  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv4i8_7t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)3621  ret void3622}3623 3624define void @test_vsseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl) {3625; CHECK-LABEL: test_vsseg7_nxv4bf16_triscv.vector.tuple_nxv8i8_7t:3626; CHECK:       # %bb.0: # %entry3627; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma3628; CHECK-NEXT:    vsseg7e16.v v8, (a0)3629; CHECK-NEXT:    ret3630entry:3631  tail call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, i64 4)3632  ret void3633}3634 3635define void @test_vsseg7_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {3636; CHECK-LABEL: test_vsseg7_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_7t:3637; CHECK:       # %bb.0: # %entry3638; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma3639; CHECK-NEXT:    vsseg7e16.v v8, (a0), v0.t3640; CHECK-NEXT:    ret3641entry:3642  tail call void @llvm.riscv.vsseg7.mask.triscv.vector.tuple_nxv8i8_7t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)3643  ret void3644}3645 3646define void @test_vsseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, i64 %vl) {3647; CHECK-LABEL: test_vsseg8_nxv1bf16_triscv.vector.tuple_nxv2i8_8t:3648; CHECK:       # %bb.0: # %entry3649; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma3650; CHECK-NEXT:    vsseg8e16.v v8, (a0)3651; CHECK-NEXT:    ret3652entry:3653  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv2i8_8t(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, i64 %vl, i64 4)3654  ret void3655}3656 3657define void @test_vsseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {3658; CHECK-LABEL: test_vsseg8_mask_nxv1bf16_triscv.vector.tuple_nxv2i8_8t:3659; CHECK:       # %bb.0: # %entry3660; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma3661; CHECK-NEXT:    vsseg8e16.v v8, (a0), v0.t3662; CHECK-NEXT:    ret3663entry:3664  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) %val, ptr %base, <vscale x 1 x i1> %mask, i64 %vl, i64 4)3665  ret void3666}3667 3668define void @test_vsseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl) {3669; CHECK-LABEL: test_vsseg8_nxv2bf16_triscv.vector.tuple_nxv4i8_8t:3670; CHECK:       # %bb.0: # %entry3671; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma3672; CHECK-NEXT:    vsseg8e16.v v8, (a0)3673; CHECK-NEXT:    ret3674entry:3675  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl, i64 4)3676  ret void3677}3678 3679define void @test_vsseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 2 x i1> %mask) {3680; CHECK-LABEL: test_vsseg8_mask_nxv2bf16_triscv.vector.tuple_nxv4i8_8t:3681; CHECK:       # %bb.0: # %entry3682; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma3683; CHECK-NEXT:    vsseg8e16.v v8, (a0), v0.t3684; CHECK-NEXT:    ret3685entry:3686  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv4i8_8t.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %val, ptr %base, <vscale x 2 x i1> %mask, i64 %vl, i64 4)3687  ret void3688}3689 3690define void @test_vsseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl) {3691; CHECK-LABEL: test_vsseg8_nxv4bf16_triscv.vector.tuple_nxv8i8_8t:3692; CHECK:       # %bb.0: # %entry3693; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma3694; CHECK-NEXT:    vsseg8e16.v v8, (a0)3695; CHECK-NEXT:    ret3696entry:3697  tail call void @llvm.riscv.vsseg8.triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, i64 4)3698  ret void3699}3700 3701define void @test_vsseg8_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_8t(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, i64 %vl, <vscale x 4 x i1> %mask) {3702; CHECK-LABEL: test_vsseg8_mask_nxv4bf16_triscv.vector.tuple_nxv8i8_8t:3703; CHECK:       # %bb.0: # %entry3704; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma3705; CHECK-NEXT:    vsseg8e16.v v8, (a0), v0.t3706; CHECK-NEXT:    ret3707entry:3708  tail call void @llvm.riscv.vsseg8.mask.triscv.vector.tuple_nxv8i8_8t.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %val, ptr %base, <vscale x 4 x i1> %mask, i64 %vl, i64 4)3709  ret void3710}3711 3712