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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <vscale x 8 x i7> @vsub_vx_nxv8i7(<vscale x 8 x i7> %a, i7 signext %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {8; CHECK-LABEL: vsub_vx_nxv8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma11; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t12; CHECK-NEXT: ret13 %elt.head = insertelement <vscale x 8 x i7> poison, i7 %b, i32 014 %vb = shufflevector <vscale x 8 x i7> %elt.head, <vscale x 8 x i7> poison, <vscale x 8 x i32> zeroinitializer15 %v = call <vscale x 8 x i7> @llvm.vp.sub.nxv8i7(<vscale x 8 x i7> %a, <vscale x 8 x i7> %vb, <vscale x 8 x i1> %mask, i32 %evl)16 ret <vscale x 8 x i7> %v17}18 19define <vscale x 1 x i8> @vsub_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {20; CHECK-LABEL: vsub_vv_nxv1i8:21; CHECK: # %bb.0:22; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma23; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t24; CHECK-NEXT: ret25 %v = call <vscale x 1 x i8> @llvm.vp.sub.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 %evl)26 ret <vscale x 1 x i8> %v27}28 29define <vscale x 1 x i8> @vsub_vv_nxv1i8_unmasked(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, i32 zeroext %evl) {30; CHECK-LABEL: vsub_vv_nxv1i8_unmasked:31; CHECK: # %bb.0:32; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma33; CHECK-NEXT: vsub.vv v8, v8, v934; CHECK-NEXT: ret35 %v = call <vscale x 1 x i8> @llvm.vp.sub.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)36 ret <vscale x 1 x i8> %v37}38 39define <vscale x 1 x i8> @vsub_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {40; CHECK-LABEL: vsub_vx_nxv1i8:41; CHECK: # %bb.0:42; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma43; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t44; CHECK-NEXT: ret45 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 046 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer47 %v = call <vscale x 1 x i8> @llvm.vp.sub.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 %evl)48 ret <vscale x 1 x i8> %v49}50 51define <vscale x 1 x i8> @vsub_vx_nxv1i8_unmasked(<vscale x 1 x i8> %va, i8 %b, i32 zeroext %evl) {52; CHECK-LABEL: vsub_vx_nxv1i8_unmasked:53; CHECK: # %bb.0:54; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma55; CHECK-NEXT: vsub.vx v8, v8, a056; CHECK-NEXT: ret57 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 058 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer59 %v = call <vscale x 1 x i8> @llvm.vp.sub.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)60 ret <vscale x 1 x i8> %v61}62 63define <vscale x 2 x i8> @vsub_vv_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {64; CHECK-LABEL: vsub_vv_nxv2i8:65; CHECK: # %bb.0:66; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma67; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t68; CHECK-NEXT: ret69 %v = call <vscale x 2 x i8> @llvm.vp.sub.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 %evl)70 ret <vscale x 2 x i8> %v71}72 73define <vscale x 2 x i8> @vsub_vv_nxv2i8_unmasked(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, i32 zeroext %evl) {74; CHECK-LABEL: vsub_vv_nxv2i8_unmasked:75; CHECK: # %bb.0:76; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma77; CHECK-NEXT: vsub.vv v8, v8, v978; CHECK-NEXT: ret79 %v = call <vscale x 2 x i8> @llvm.vp.sub.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)80 ret <vscale x 2 x i8> %v81}82 83define <vscale x 2 x i8> @vsub_vx_nxv2i8(<vscale x 2 x i8> %va, i8 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {84; CHECK-LABEL: vsub_vx_nxv2i8:85; CHECK: # %bb.0:86; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma87; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t88; CHECK-NEXT: ret89 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 090 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer91 %v = call <vscale x 2 x i8> @llvm.vp.sub.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 %evl)92 ret <vscale x 2 x i8> %v93}94 95define <vscale x 2 x i8> @vsub_vx_nxv2i8_unmasked(<vscale x 2 x i8> %va, i8 %b, i32 zeroext %evl) {96; CHECK-LABEL: vsub_vx_nxv2i8_unmasked:97; CHECK: # %bb.0:98; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma99; CHECK-NEXT: vsub.vx v8, v8, a0100; CHECK-NEXT: ret101 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0102 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer103 %v = call <vscale x 2 x i8> @llvm.vp.sub.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)104 ret <vscale x 2 x i8> %v105}106 107define <vscale x 4 x i8> @vsub_vv_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {108; CHECK-LABEL: vsub_vv_nxv4i8:109; CHECK: # %bb.0:110; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma111; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t112; CHECK-NEXT: ret113 %v = call <vscale x 4 x i8> @llvm.vp.sub.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 %evl)114 ret <vscale x 4 x i8> %v115}116 117define <vscale x 4 x i8> @vsub_vv_nxv4i8_unmasked(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, i32 zeroext %evl) {118; CHECK-LABEL: vsub_vv_nxv4i8_unmasked:119; CHECK: # %bb.0:120; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma121; CHECK-NEXT: vsub.vv v8, v8, v9122; CHECK-NEXT: ret123 %v = call <vscale x 4 x i8> @llvm.vp.sub.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)124 ret <vscale x 4 x i8> %v125}126 127define <vscale x 4 x i8> @vsub_vx_nxv4i8(<vscale x 4 x i8> %va, i8 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {128; CHECK-LABEL: vsub_vx_nxv4i8:129; CHECK: # %bb.0:130; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma131; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t132; CHECK-NEXT: ret133 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0134 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer135 %v = call <vscale x 4 x i8> @llvm.vp.sub.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 %evl)136 ret <vscale x 4 x i8> %v137}138 139define <vscale x 4 x i8> @vsub_vx_nxv4i8_unmasked(<vscale x 4 x i8> %va, i8 %b, i32 zeroext %evl) {140; CHECK-LABEL: vsub_vx_nxv4i8_unmasked:141; CHECK: # %bb.0:142; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma143; CHECK-NEXT: vsub.vx v8, v8, a0144; CHECK-NEXT: ret145 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0146 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer147 %v = call <vscale x 4 x i8> @llvm.vp.sub.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)148 ret <vscale x 4 x i8> %v149}150 151define <vscale x 5 x i8> @vsub_vv_nxv5i8(<vscale x 5 x i8> %va, <vscale x 5 x i8> %b, <vscale x 5 x i1> %m, i32 zeroext %evl) {152; CHECK-LABEL: vsub_vv_nxv5i8:153; CHECK: # %bb.0:154; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma155; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t156; CHECK-NEXT: ret157 %v = call <vscale x 5 x i8> @llvm.vp.sub.nxv5i8(<vscale x 5 x i8> %va, <vscale x 5 x i8> %b, <vscale x 5 x i1> %m, i32 %evl)158 ret <vscale x 5 x i8> %v159}160 161define <vscale x 5 x i8> @vsub_vv_nxv5i8_unmasked(<vscale x 5 x i8> %va, <vscale x 5 x i8> %b, i32 zeroext %evl) {162; CHECK-LABEL: vsub_vv_nxv5i8_unmasked:163; CHECK: # %bb.0:164; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma165; CHECK-NEXT: vsub.vv v8, v8, v9166; CHECK-NEXT: ret167 %v = call <vscale x 5 x i8> @llvm.vp.sub.nxv5i8(<vscale x 5 x i8> %va, <vscale x 5 x i8> %b, <vscale x 5 x i1> splat (i1 true), i32 %evl)168 ret <vscale x 5 x i8> %v169}170 171define <vscale x 5 x i8> @vsub_vx_nxv5i8(<vscale x 5 x i8> %va, i8 %b, <vscale x 5 x i1> %m, i32 zeroext %evl) {172; CHECK-LABEL: vsub_vx_nxv5i8:173; CHECK: # %bb.0:174; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma175; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t176; CHECK-NEXT: ret177 %elt.head = insertelement <vscale x 5 x i8> poison, i8 %b, i32 0178 %vb = shufflevector <vscale x 5 x i8> %elt.head, <vscale x 5 x i8> poison, <vscale x 5 x i32> zeroinitializer179 %v = call <vscale x 5 x i8> @llvm.vp.sub.nxv5i8(<vscale x 5 x i8> %va, <vscale x 5 x i8> %vb, <vscale x 5 x i1> %m, i32 %evl)180 ret <vscale x 5 x i8> %v181}182 183define <vscale x 5 x i8> @vsub_vx_nxv5i8_unmasked(<vscale x 5 x i8> %va, i8 %b, i32 zeroext %evl) {184; CHECK-LABEL: vsub_vx_nxv5i8_unmasked:185; CHECK: # %bb.0:186; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma187; CHECK-NEXT: vsub.vx v8, v8, a0188; CHECK-NEXT: ret189 %elt.head = insertelement <vscale x 5 x i8> poison, i8 %b, i32 0190 %vb = shufflevector <vscale x 5 x i8> %elt.head, <vscale x 5 x i8> poison, <vscale x 5 x i32> zeroinitializer191 %v = call <vscale x 5 x i8> @llvm.vp.sub.nxv5i8(<vscale x 5 x i8> %va, <vscale x 5 x i8> %vb, <vscale x 5 x i1> splat (i1 true), i32 %evl)192 ret <vscale x 5 x i8> %v193}194 195define <vscale x 8 x i8> @vsub_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {196; CHECK-LABEL: vsub_vv_nxv8i8:197; CHECK: # %bb.0:198; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma199; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t200; CHECK-NEXT: ret201 %v = call <vscale x 8 x i8> @llvm.vp.sub.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 %evl)202 ret <vscale x 8 x i8> %v203}204 205define <vscale x 8 x i8> @vsub_vv_nxv8i8_unmasked(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, i32 zeroext %evl) {206; CHECK-LABEL: vsub_vv_nxv8i8_unmasked:207; CHECK: # %bb.0:208; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma209; CHECK-NEXT: vsub.vv v8, v8, v9210; CHECK-NEXT: ret211 %v = call <vscale x 8 x i8> @llvm.vp.sub.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)212 ret <vscale x 8 x i8> %v213}214 215define <vscale x 8 x i8> @vsub_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {216; CHECK-LABEL: vsub_vx_nxv8i8:217; CHECK: # %bb.0:218; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma219; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t220; CHECK-NEXT: ret221 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0222 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer223 %v = call <vscale x 8 x i8> @llvm.vp.sub.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 %evl)224 ret <vscale x 8 x i8> %v225}226 227define <vscale x 8 x i8> @vsub_vx_nxv8i8_unmasked(<vscale x 8 x i8> %va, i8 %b, i32 zeroext %evl) {228; CHECK-LABEL: vsub_vx_nxv8i8_unmasked:229; CHECK: # %bb.0:230; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma231; CHECK-NEXT: vsub.vx v8, v8, a0232; CHECK-NEXT: ret233 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0234 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer235 %v = call <vscale x 8 x i8> @llvm.vp.sub.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)236 ret <vscale x 8 x i8> %v237}238 239define <vscale x 16 x i8> @vsub_vv_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {240; CHECK-LABEL: vsub_vv_nxv16i8:241; CHECK: # %bb.0:242; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma243; CHECK-NEXT: vsub.vv v8, v8, v10, v0.t244; CHECK-NEXT: ret245 %v = call <vscale x 16 x i8> @llvm.vp.sub.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 %evl)246 ret <vscale x 16 x i8> %v247}248 249define <vscale x 16 x i8> @vsub_vv_nxv16i8_unmasked(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, i32 zeroext %evl) {250; CHECK-LABEL: vsub_vv_nxv16i8_unmasked:251; CHECK: # %bb.0:252; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma253; CHECK-NEXT: vsub.vv v8, v8, v10254; CHECK-NEXT: ret255 %v = call <vscale x 16 x i8> @llvm.vp.sub.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)256 ret <vscale x 16 x i8> %v257}258 259define <vscale x 16 x i8> @vsub_vx_nxv16i8(<vscale x 16 x i8> %va, i8 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {260; CHECK-LABEL: vsub_vx_nxv16i8:261; CHECK: # %bb.0:262; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma263; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t264; CHECK-NEXT: ret265 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0266 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer267 %v = call <vscale x 16 x i8> @llvm.vp.sub.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 %evl)268 ret <vscale x 16 x i8> %v269}270 271define <vscale x 16 x i8> @vsub_vx_nxv16i8_unmasked(<vscale x 16 x i8> %va, i8 %b, i32 zeroext %evl) {272; CHECK-LABEL: vsub_vx_nxv16i8_unmasked:273; CHECK: # %bb.0:274; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma275; CHECK-NEXT: vsub.vx v8, v8, a0276; CHECK-NEXT: ret277 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0278 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer279 %v = call <vscale x 16 x i8> @llvm.vp.sub.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)280 ret <vscale x 16 x i8> %v281}282 283define <vscale x 32 x i8> @vsub_vv_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {284; CHECK-LABEL: vsub_vv_nxv32i8:285; CHECK: # %bb.0:286; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma287; CHECK-NEXT: vsub.vv v8, v8, v12, v0.t288; CHECK-NEXT: ret289 %v = call <vscale x 32 x i8> @llvm.vp.sub.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 %evl)290 ret <vscale x 32 x i8> %v291}292 293define <vscale x 32 x i8> @vsub_vv_nxv32i8_unmasked(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, i32 zeroext %evl) {294; CHECK-LABEL: vsub_vv_nxv32i8_unmasked:295; CHECK: # %bb.0:296; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma297; CHECK-NEXT: vsub.vv v8, v8, v12298; CHECK-NEXT: ret299 %v = call <vscale x 32 x i8> @llvm.vp.sub.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)300 ret <vscale x 32 x i8> %v301}302 303define <vscale x 32 x i8> @vsub_vx_nxv32i8(<vscale x 32 x i8> %va, i8 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {304; CHECK-LABEL: vsub_vx_nxv32i8:305; CHECK: # %bb.0:306; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma307; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t308; CHECK-NEXT: ret309 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0310 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer311 %v = call <vscale x 32 x i8> @llvm.vp.sub.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 %evl)312 ret <vscale x 32 x i8> %v313}314 315define <vscale x 32 x i8> @vsub_vx_nxv32i8_unmasked(<vscale x 32 x i8> %va, i8 %b, i32 zeroext %evl) {316; CHECK-LABEL: vsub_vx_nxv32i8_unmasked:317; CHECK: # %bb.0:318; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma319; CHECK-NEXT: vsub.vx v8, v8, a0320; CHECK-NEXT: ret321 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0322 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer323 %v = call <vscale x 32 x i8> @llvm.vp.sub.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)324 ret <vscale x 32 x i8> %v325}326 327define <vscale x 64 x i8> @vsub_vv_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {328; CHECK-LABEL: vsub_vv_nxv64i8:329; CHECK: # %bb.0:330; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma331; CHECK-NEXT: vsub.vv v8, v8, v16, v0.t332; CHECK-NEXT: ret333 %v = call <vscale x 64 x i8> @llvm.vp.sub.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 %evl)334 ret <vscale x 64 x i8> %v335}336 337define <vscale x 64 x i8> @vsub_vv_nxv64i8_unmasked(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, i32 zeroext %evl) {338; CHECK-LABEL: vsub_vv_nxv64i8_unmasked:339; CHECK: # %bb.0:340; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma341; CHECK-NEXT: vsub.vv v8, v8, v16342; CHECK-NEXT: ret343 %v = call <vscale x 64 x i8> @llvm.vp.sub.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> splat (i1 true), i32 %evl)344 ret <vscale x 64 x i8> %v345}346 347define <vscale x 64 x i8> @vsub_vx_nxv64i8(<vscale x 64 x i8> %va, i8 %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {348; CHECK-LABEL: vsub_vx_nxv64i8:349; CHECK: # %bb.0:350; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma351; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t352; CHECK-NEXT: ret353 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0354 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer355 %v = call <vscale x 64 x i8> @llvm.vp.sub.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 %evl)356 ret <vscale x 64 x i8> %v357}358 359define <vscale x 64 x i8> @vsub_vx_nxv64i8_unmasked(<vscale x 64 x i8> %va, i8 %b, i32 zeroext %evl) {360; CHECK-LABEL: vsub_vx_nxv64i8_unmasked:361; CHECK: # %bb.0:362; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma363; CHECK-NEXT: vsub.vx v8, v8, a0364; CHECK-NEXT: ret365 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0366 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer367 %v = call <vscale x 64 x i8> @llvm.vp.sub.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> splat (i1 true), i32 %evl)368 ret <vscale x 64 x i8> %v369}370 371define <vscale x 1 x i16> @vsub_vv_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {372; CHECK-LABEL: vsub_vv_nxv1i16:373; CHECK: # %bb.0:374; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma375; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t376; CHECK-NEXT: ret377 %v = call <vscale x 1 x i16> @llvm.vp.sub.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 %evl)378 ret <vscale x 1 x i16> %v379}380 381define <vscale x 1 x i16> @vsub_vv_nxv1i16_unmasked(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, i32 zeroext %evl) {382; CHECK-LABEL: vsub_vv_nxv1i16_unmasked:383; CHECK: # %bb.0:384; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma385; CHECK-NEXT: vsub.vv v8, v8, v9386; CHECK-NEXT: ret387 %v = call <vscale x 1 x i16> @llvm.vp.sub.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)388 ret <vscale x 1 x i16> %v389}390 391define <vscale x 1 x i16> @vsub_vx_nxv1i16(<vscale x 1 x i16> %va, i16 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {392; CHECK-LABEL: vsub_vx_nxv1i16:393; CHECK: # %bb.0:394; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma395; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t396; CHECK-NEXT: ret397 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0398 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer399 %v = call <vscale x 1 x i16> @llvm.vp.sub.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 %evl)400 ret <vscale x 1 x i16> %v401}402 403define <vscale x 1 x i16> @vsub_vx_nxv1i16_unmasked(<vscale x 1 x i16> %va, i16 %b, i32 zeroext %evl) {404; CHECK-LABEL: vsub_vx_nxv1i16_unmasked:405; CHECK: # %bb.0:406; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma407; CHECK-NEXT: vsub.vx v8, v8, a0408; CHECK-NEXT: ret409 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0410 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer411 %v = call <vscale x 1 x i16> @llvm.vp.sub.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)412 ret <vscale x 1 x i16> %v413}414 415define <vscale x 2 x i16> @vsub_vv_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {416; CHECK-LABEL: vsub_vv_nxv2i16:417; CHECK: # %bb.0:418; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma419; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t420; CHECK-NEXT: ret421 %v = call <vscale x 2 x i16> @llvm.vp.sub.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 %evl)422 ret <vscale x 2 x i16> %v423}424 425define <vscale x 2 x i16> @vsub_vv_nxv2i16_unmasked(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, i32 zeroext %evl) {426; CHECK-LABEL: vsub_vv_nxv2i16_unmasked:427; CHECK: # %bb.0:428; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma429; CHECK-NEXT: vsub.vv v8, v8, v9430; CHECK-NEXT: ret431 %v = call <vscale x 2 x i16> @llvm.vp.sub.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)432 ret <vscale x 2 x i16> %v433}434 435define <vscale x 2 x i16> @vsub_vx_nxv2i16(<vscale x 2 x i16> %va, i16 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {436; CHECK-LABEL: vsub_vx_nxv2i16:437; CHECK: # %bb.0:438; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma439; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t440; CHECK-NEXT: ret441 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0442 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer443 %v = call <vscale x 2 x i16> @llvm.vp.sub.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 %evl)444 ret <vscale x 2 x i16> %v445}446 447define <vscale x 2 x i16> @vsub_vx_nxv2i16_unmasked(<vscale x 2 x i16> %va, i16 %b, i32 zeroext %evl) {448; CHECK-LABEL: vsub_vx_nxv2i16_unmasked:449; CHECK: # %bb.0:450; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma451; CHECK-NEXT: vsub.vx v8, v8, a0452; CHECK-NEXT: ret453 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0454 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer455 %v = call <vscale x 2 x i16> @llvm.vp.sub.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)456 ret <vscale x 2 x i16> %v457}458 459define <vscale x 4 x i16> @vsub_vv_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {460; CHECK-LABEL: vsub_vv_nxv4i16:461; CHECK: # %bb.0:462; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma463; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t464; CHECK-NEXT: ret465 %v = call <vscale x 4 x i16> @llvm.vp.sub.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 %evl)466 ret <vscale x 4 x i16> %v467}468 469define <vscale x 4 x i16> @vsub_vv_nxv4i16_unmasked(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, i32 zeroext %evl) {470; CHECK-LABEL: vsub_vv_nxv4i16_unmasked:471; CHECK: # %bb.0:472; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma473; CHECK-NEXT: vsub.vv v8, v8, v9474; CHECK-NEXT: ret475 %v = call <vscale x 4 x i16> @llvm.vp.sub.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)476 ret <vscale x 4 x i16> %v477}478 479define <vscale x 4 x i16> @vsub_vx_nxv4i16(<vscale x 4 x i16> %va, i16 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {480; CHECK-LABEL: vsub_vx_nxv4i16:481; CHECK: # %bb.0:482; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma483; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t484; CHECK-NEXT: ret485 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0486 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer487 %v = call <vscale x 4 x i16> @llvm.vp.sub.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 %evl)488 ret <vscale x 4 x i16> %v489}490 491define <vscale x 4 x i16> @vsub_vx_nxv4i16_unmasked(<vscale x 4 x i16> %va, i16 %b, i32 zeroext %evl) {492; CHECK-LABEL: vsub_vx_nxv4i16_unmasked:493; CHECK: # %bb.0:494; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma495; CHECK-NEXT: vsub.vx v8, v8, a0496; CHECK-NEXT: ret497 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0498 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer499 %v = call <vscale x 4 x i16> @llvm.vp.sub.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)500 ret <vscale x 4 x i16> %v501}502 503define <vscale x 8 x i16> @vsub_vv_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {504; CHECK-LABEL: vsub_vv_nxv8i16:505; CHECK: # %bb.0:506; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma507; CHECK-NEXT: vsub.vv v8, v8, v10, v0.t508; CHECK-NEXT: ret509 %v = call <vscale x 8 x i16> @llvm.vp.sub.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 %evl)510 ret <vscale x 8 x i16> %v511}512 513define <vscale x 8 x i16> @vsub_vv_nxv8i16_unmasked(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, i32 zeroext %evl) {514; CHECK-LABEL: vsub_vv_nxv8i16_unmasked:515; CHECK: # %bb.0:516; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma517; CHECK-NEXT: vsub.vv v8, v8, v10518; CHECK-NEXT: ret519 %v = call <vscale x 8 x i16> @llvm.vp.sub.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)520 ret <vscale x 8 x i16> %v521}522 523define <vscale x 8 x i16> @vsub_vx_nxv8i16(<vscale x 8 x i16> %va, i16 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {524; CHECK-LABEL: vsub_vx_nxv8i16:525; CHECK: # %bb.0:526; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma527; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t528; CHECK-NEXT: ret529 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0530 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer531 %v = call <vscale x 8 x i16> @llvm.vp.sub.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 %evl)532 ret <vscale x 8 x i16> %v533}534 535define <vscale x 8 x i16> @vsub_vx_nxv8i16_unmasked(<vscale x 8 x i16> %va, i16 %b, i32 zeroext %evl) {536; CHECK-LABEL: vsub_vx_nxv8i16_unmasked:537; CHECK: # %bb.0:538; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma539; CHECK-NEXT: vsub.vx v8, v8, a0540; CHECK-NEXT: ret541 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0542 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer543 %v = call <vscale x 8 x i16> @llvm.vp.sub.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)544 ret <vscale x 8 x i16> %v545}546 547define <vscale x 16 x i16> @vsub_vv_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {548; CHECK-LABEL: vsub_vv_nxv16i16:549; CHECK: # %bb.0:550; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma551; CHECK-NEXT: vsub.vv v8, v8, v12, v0.t552; CHECK-NEXT: ret553 %v = call <vscale x 16 x i16> @llvm.vp.sub.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 %evl)554 ret <vscale x 16 x i16> %v555}556 557define <vscale x 16 x i16> @vsub_vv_nxv16i16_unmasked(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, i32 zeroext %evl) {558; CHECK-LABEL: vsub_vv_nxv16i16_unmasked:559; CHECK: # %bb.0:560; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma561; CHECK-NEXT: vsub.vv v8, v8, v12562; CHECK-NEXT: ret563 %v = call <vscale x 16 x i16> @llvm.vp.sub.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)564 ret <vscale x 16 x i16> %v565}566 567define <vscale x 16 x i16> @vsub_vx_nxv16i16(<vscale x 16 x i16> %va, i16 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {568; CHECK-LABEL: vsub_vx_nxv16i16:569; CHECK: # %bb.0:570; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma571; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t572; CHECK-NEXT: ret573 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0574 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer575 %v = call <vscale x 16 x i16> @llvm.vp.sub.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 %evl)576 ret <vscale x 16 x i16> %v577}578 579define <vscale x 16 x i16> @vsub_vx_nxv16i16_unmasked(<vscale x 16 x i16> %va, i16 %b, i32 zeroext %evl) {580; CHECK-LABEL: vsub_vx_nxv16i16_unmasked:581; CHECK: # %bb.0:582; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma583; CHECK-NEXT: vsub.vx v8, v8, a0584; CHECK-NEXT: ret585 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0586 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer587 %v = call <vscale x 16 x i16> @llvm.vp.sub.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)588 ret <vscale x 16 x i16> %v589}590 591define <vscale x 32 x i16> @vsub_vv_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {592; CHECK-LABEL: vsub_vv_nxv32i16:593; CHECK: # %bb.0:594; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma595; CHECK-NEXT: vsub.vv v8, v8, v16, v0.t596; CHECK-NEXT: ret597 %v = call <vscale x 32 x i16> @llvm.vp.sub.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 %evl)598 ret <vscale x 32 x i16> %v599}600 601define <vscale x 32 x i16> @vsub_vv_nxv32i16_unmasked(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, i32 zeroext %evl) {602; CHECK-LABEL: vsub_vv_nxv32i16_unmasked:603; CHECK: # %bb.0:604; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma605; CHECK-NEXT: vsub.vv v8, v8, v16606; CHECK-NEXT: ret607 %v = call <vscale x 32 x i16> @llvm.vp.sub.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)608 ret <vscale x 32 x i16> %v609}610 611define <vscale x 32 x i16> @vsub_vx_nxv32i16(<vscale x 32 x i16> %va, i16 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {612; CHECK-LABEL: vsub_vx_nxv32i16:613; CHECK: # %bb.0:614; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma615; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t616; CHECK-NEXT: ret617 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0618 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer619 %v = call <vscale x 32 x i16> @llvm.vp.sub.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 %evl)620 ret <vscale x 32 x i16> %v621}622 623define <vscale x 32 x i16> @vsub_vx_nxv32i16_unmasked(<vscale x 32 x i16> %va, i16 %b, i32 zeroext %evl) {624; CHECK-LABEL: vsub_vx_nxv32i16_unmasked:625; CHECK: # %bb.0:626; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma627; CHECK-NEXT: vsub.vx v8, v8, a0628; CHECK-NEXT: ret629 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0630 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer631 %v = call <vscale x 32 x i16> @llvm.vp.sub.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)632 ret <vscale x 32 x i16> %v633}634 635define <vscale x 1 x i32> @vsub_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {636; CHECK-LABEL: vsub_vv_nxv1i32:637; CHECK: # %bb.0:638; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma639; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t640; CHECK-NEXT: ret641 %v = call <vscale x 1 x i32> @llvm.vp.sub.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 %evl)642 ret <vscale x 1 x i32> %v643}644 645define <vscale x 1 x i32> @vsub_vv_nxv1i32_unmasked(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, i32 zeroext %evl) {646; CHECK-LABEL: vsub_vv_nxv1i32_unmasked:647; CHECK: # %bb.0:648; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma649; CHECK-NEXT: vsub.vv v8, v8, v9650; CHECK-NEXT: ret651 %v = call <vscale x 1 x i32> @llvm.vp.sub.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)652 ret <vscale x 1 x i32> %v653}654 655define <vscale x 1 x i32> @vsub_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {656; CHECK-LABEL: vsub_vx_nxv1i32:657; CHECK: # %bb.0:658; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma659; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t660; CHECK-NEXT: ret661 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0662 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer663 %v = call <vscale x 1 x i32> @llvm.vp.sub.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 %evl)664 ret <vscale x 1 x i32> %v665}666 667define <vscale x 1 x i32> @vsub_vx_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 %b, i32 zeroext %evl) {668; CHECK-LABEL: vsub_vx_nxv1i32_unmasked:669; CHECK: # %bb.0:670; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma671; CHECK-NEXT: vsub.vx v8, v8, a0672; CHECK-NEXT: ret673 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0674 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer675 %v = call <vscale x 1 x i32> @llvm.vp.sub.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)676 ret <vscale x 1 x i32> %v677}678 679define <vscale x 2 x i32> @vsub_vv_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {680; CHECK-LABEL: vsub_vv_nxv2i32:681; CHECK: # %bb.0:682; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma683; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t684; CHECK-NEXT: ret685 %v = call <vscale x 2 x i32> @llvm.vp.sub.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 %evl)686 ret <vscale x 2 x i32> %v687}688 689define <vscale x 2 x i32> @vsub_vv_nxv2i32_unmasked(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, i32 zeroext %evl) {690; CHECK-LABEL: vsub_vv_nxv2i32_unmasked:691; CHECK: # %bb.0:692; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma693; CHECK-NEXT: vsub.vv v8, v8, v9694; CHECK-NEXT: ret695 %v = call <vscale x 2 x i32> @llvm.vp.sub.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)696 ret <vscale x 2 x i32> %v697}698 699define <vscale x 2 x i32> @vsub_vx_nxv2i32(<vscale x 2 x i32> %va, i32 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {700; CHECK-LABEL: vsub_vx_nxv2i32:701; CHECK: # %bb.0:702; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma703; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t704; CHECK-NEXT: ret705 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0706 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer707 %v = call <vscale x 2 x i32> @llvm.vp.sub.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 %evl)708 ret <vscale x 2 x i32> %v709}710 711define <vscale x 2 x i32> @vsub_vx_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 %b, i32 zeroext %evl) {712; CHECK-LABEL: vsub_vx_nxv2i32_unmasked:713; CHECK: # %bb.0:714; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma715; CHECK-NEXT: vsub.vx v8, v8, a0716; CHECK-NEXT: ret717 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0718 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer719 %v = call <vscale x 2 x i32> @llvm.vp.sub.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)720 ret <vscale x 2 x i32> %v721}722 723define <vscale x 4 x i32> @vsub_vv_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {724; CHECK-LABEL: vsub_vv_nxv4i32:725; CHECK: # %bb.0:726; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma727; CHECK-NEXT: vsub.vv v8, v8, v10, v0.t728; CHECK-NEXT: ret729 %v = call <vscale x 4 x i32> @llvm.vp.sub.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 %evl)730 ret <vscale x 4 x i32> %v731}732 733define <vscale x 4 x i32> @vsub_vv_nxv4i32_unmasked(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, i32 zeroext %evl) {734; CHECK-LABEL: vsub_vv_nxv4i32_unmasked:735; CHECK: # %bb.0:736; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma737; CHECK-NEXT: vsub.vv v8, v8, v10738; CHECK-NEXT: ret739 %v = call <vscale x 4 x i32> @llvm.vp.sub.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)740 ret <vscale x 4 x i32> %v741}742 743define <vscale x 4 x i32> @vsub_vx_nxv4i32(<vscale x 4 x i32> %va, i32 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {744; CHECK-LABEL: vsub_vx_nxv4i32:745; CHECK: # %bb.0:746; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma747; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t748; CHECK-NEXT: ret749 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0750 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer751 %v = call <vscale x 4 x i32> @llvm.vp.sub.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 %evl)752 ret <vscale x 4 x i32> %v753}754 755define <vscale x 4 x i32> @vsub_vx_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 %b, i32 zeroext %evl) {756; CHECK-LABEL: vsub_vx_nxv4i32_unmasked:757; CHECK: # %bb.0:758; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma759; CHECK-NEXT: vsub.vx v8, v8, a0760; CHECK-NEXT: ret761 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0762 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer763 %v = call <vscale x 4 x i32> @llvm.vp.sub.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)764 ret <vscale x 4 x i32> %v765}766 767define <vscale x 8 x i32> @vsub_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {768; CHECK-LABEL: vsub_vv_nxv8i32:769; CHECK: # %bb.0:770; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma771; CHECK-NEXT: vsub.vv v8, v8, v12, v0.t772; CHECK-NEXT: ret773 %v = call <vscale x 8 x i32> @llvm.vp.sub.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 %evl)774 ret <vscale x 8 x i32> %v775}776 777define <vscale x 8 x i32> @vsub_vv_nxv8i32_unmasked(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, i32 zeroext %evl) {778; CHECK-LABEL: vsub_vv_nxv8i32_unmasked:779; CHECK: # %bb.0:780; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma781; CHECK-NEXT: vsub.vv v8, v8, v12782; CHECK-NEXT: ret783 %v = call <vscale x 8 x i32> @llvm.vp.sub.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)784 ret <vscale x 8 x i32> %v785}786 787define <vscale x 8 x i32> @vsub_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {788; CHECK-LABEL: vsub_vx_nxv8i32:789; CHECK: # %bb.0:790; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma791; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t792; CHECK-NEXT: ret793 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0794 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer795 %v = call <vscale x 8 x i32> @llvm.vp.sub.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 %evl)796 ret <vscale x 8 x i32> %v797}798 799define <vscale x 8 x i32> @vsub_vx_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 %b, i32 zeroext %evl) {800; CHECK-LABEL: vsub_vx_nxv8i32_unmasked:801; CHECK: # %bb.0:802; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma803; CHECK-NEXT: vsub.vx v8, v8, a0804; CHECK-NEXT: ret805 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0806 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer807 %v = call <vscale x 8 x i32> @llvm.vp.sub.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)808 ret <vscale x 8 x i32> %v809}810 811define <vscale x 16 x i32> @vsub_vv_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {812; CHECK-LABEL: vsub_vv_nxv16i32:813; CHECK: # %bb.0:814; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma815; CHECK-NEXT: vsub.vv v8, v8, v16, v0.t816; CHECK-NEXT: ret817 %v = call <vscale x 16 x i32> @llvm.vp.sub.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 %evl)818 ret <vscale x 16 x i32> %v819}820 821define <vscale x 16 x i32> @vsub_vv_nxv16i32_unmasked(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, i32 zeroext %evl) {822; CHECK-LABEL: vsub_vv_nxv16i32_unmasked:823; CHECK: # %bb.0:824; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma825; CHECK-NEXT: vsub.vv v8, v8, v16826; CHECK-NEXT: ret827 %v = call <vscale x 16 x i32> @llvm.vp.sub.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)828 ret <vscale x 16 x i32> %v829}830 831define <vscale x 16 x i32> @vsub_vx_nxv16i32(<vscale x 16 x i32> %va, i32 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {832; CHECK-LABEL: vsub_vx_nxv16i32:833; CHECK: # %bb.0:834; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma835; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t836; CHECK-NEXT: ret837 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 0838 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer839 %v = call <vscale x 16 x i32> @llvm.vp.sub.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 %evl)840 ret <vscale x 16 x i32> %v841}842 843define <vscale x 16 x i32> @vsub_vx_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 %b, i32 zeroext %evl) {844; CHECK-LABEL: vsub_vx_nxv16i32_unmasked:845; CHECK: # %bb.0:846; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma847; CHECK-NEXT: vsub.vx v8, v8, a0848; CHECK-NEXT: ret849 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 0850 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer851 %v = call <vscale x 16 x i32> @llvm.vp.sub.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)852 ret <vscale x 16 x i32> %v853}854 855define <vscale x 1 x i64> @vsub_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {856; CHECK-LABEL: vsub_vv_nxv1i64:857; CHECK: # %bb.0:858; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma859; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t860; CHECK-NEXT: ret861 %v = call <vscale x 1 x i64> @llvm.vp.sub.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 %evl)862 ret <vscale x 1 x i64> %v863}864 865define <vscale x 1 x i64> @vsub_vv_nxv1i64_unmasked(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, i32 zeroext %evl) {866; CHECK-LABEL: vsub_vv_nxv1i64_unmasked:867; CHECK: # %bb.0:868; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma869; CHECK-NEXT: vsub.vv v8, v8, v9870; CHECK-NEXT: ret871 %v = call <vscale x 1 x i64> @llvm.vp.sub.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)872 ret <vscale x 1 x i64> %v873}874 875define <vscale x 1 x i64> @vsub_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {876; RV32-LABEL: vsub_vx_nxv1i64:877; RV32: # %bb.0:878; RV32-NEXT: addi sp, sp, -16879; RV32-NEXT: .cfi_def_cfa_offset 16880; RV32-NEXT: sw a0, 8(sp)881; RV32-NEXT: sw a1, 12(sp)882; RV32-NEXT: addi a0, sp, 8883; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma884; RV32-NEXT: vlse64.v v9, (a0), zero885; RV32-NEXT: vsub.vv v8, v8, v9, v0.t886; RV32-NEXT: addi sp, sp, 16887; RV32-NEXT: .cfi_def_cfa_offset 0888; RV32-NEXT: ret889;890; RV64-LABEL: vsub_vx_nxv1i64:891; RV64: # %bb.0:892; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma893; RV64-NEXT: vsub.vx v8, v8, a0, v0.t894; RV64-NEXT: ret895 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0896 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer897 %v = call <vscale x 1 x i64> @llvm.vp.sub.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 %evl)898 ret <vscale x 1 x i64> %v899}900 901define <vscale x 1 x i64> @vsub_vx_nxv1i64_unmasked(<vscale x 1 x i64> %va, i64 %b, i32 zeroext %evl) {902; RV32-LABEL: vsub_vx_nxv1i64_unmasked:903; RV32: # %bb.0:904; RV32-NEXT: addi sp, sp, -16905; RV32-NEXT: .cfi_def_cfa_offset 16906; RV32-NEXT: sw a0, 8(sp)907; RV32-NEXT: sw a1, 12(sp)908; RV32-NEXT: addi a0, sp, 8909; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma910; RV32-NEXT: vlse64.v v9, (a0), zero911; RV32-NEXT: vsub.vv v8, v8, v9912; RV32-NEXT: addi sp, sp, 16913; RV32-NEXT: .cfi_def_cfa_offset 0914; RV32-NEXT: ret915;916; RV64-LABEL: vsub_vx_nxv1i64_unmasked:917; RV64: # %bb.0:918; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma919; RV64-NEXT: vsub.vx v8, v8, a0920; RV64-NEXT: ret921 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0922 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer923 %v = call <vscale x 1 x i64> @llvm.vp.sub.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)924 ret <vscale x 1 x i64> %v925}926 927define <vscale x 2 x i64> @vsub_vv_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {928; CHECK-LABEL: vsub_vv_nxv2i64:929; CHECK: # %bb.0:930; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma931; CHECK-NEXT: vsub.vv v8, v8, v10, v0.t932; CHECK-NEXT: ret933 %v = call <vscale x 2 x i64> @llvm.vp.sub.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 %evl)934 ret <vscale x 2 x i64> %v935}936 937define <vscale x 2 x i64> @vsub_vv_nxv2i64_unmasked(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, i32 zeroext %evl) {938; CHECK-LABEL: vsub_vv_nxv2i64_unmasked:939; CHECK: # %bb.0:940; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma941; CHECK-NEXT: vsub.vv v8, v8, v10942; CHECK-NEXT: ret943 %v = call <vscale x 2 x i64> @llvm.vp.sub.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)944 ret <vscale x 2 x i64> %v945}946 947define <vscale x 2 x i64> @vsub_vx_nxv2i64(<vscale x 2 x i64> %va, i64 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {948; RV32-LABEL: vsub_vx_nxv2i64:949; RV32: # %bb.0:950; RV32-NEXT: addi sp, sp, -16951; RV32-NEXT: .cfi_def_cfa_offset 16952; RV32-NEXT: sw a0, 8(sp)953; RV32-NEXT: sw a1, 12(sp)954; RV32-NEXT: addi a0, sp, 8955; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma956; RV32-NEXT: vlse64.v v10, (a0), zero957; RV32-NEXT: vsub.vv v8, v8, v10, v0.t958; RV32-NEXT: addi sp, sp, 16959; RV32-NEXT: .cfi_def_cfa_offset 0960; RV32-NEXT: ret961;962; RV64-LABEL: vsub_vx_nxv2i64:963; RV64: # %bb.0:964; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma965; RV64-NEXT: vsub.vx v8, v8, a0, v0.t966; RV64-NEXT: ret967 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 0968 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer969 %v = call <vscale x 2 x i64> @llvm.vp.sub.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 %evl)970 ret <vscale x 2 x i64> %v971}972 973define <vscale x 2 x i64> @vsub_vx_nxv2i64_unmasked(<vscale x 2 x i64> %va, i64 %b, i32 zeroext %evl) {974; RV32-LABEL: vsub_vx_nxv2i64_unmasked:975; RV32: # %bb.0:976; RV32-NEXT: addi sp, sp, -16977; RV32-NEXT: .cfi_def_cfa_offset 16978; RV32-NEXT: sw a0, 8(sp)979; RV32-NEXT: sw a1, 12(sp)980; RV32-NEXT: addi a0, sp, 8981; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma982; RV32-NEXT: vlse64.v v10, (a0), zero983; RV32-NEXT: vsub.vv v8, v8, v10984; RV32-NEXT: addi sp, sp, 16985; RV32-NEXT: .cfi_def_cfa_offset 0986; RV32-NEXT: ret987;988; RV64-LABEL: vsub_vx_nxv2i64_unmasked:989; RV64: # %bb.0:990; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma991; RV64-NEXT: vsub.vx v8, v8, a0992; RV64-NEXT: ret993 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 0994 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer995 %v = call <vscale x 2 x i64> @llvm.vp.sub.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)996 ret <vscale x 2 x i64> %v997}998 999define <vscale x 4 x i64> @vsub_vv_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1000; CHECK-LABEL: vsub_vv_nxv4i64:1001; CHECK: # %bb.0:1002; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1003; CHECK-NEXT: vsub.vv v8, v8, v12, v0.t1004; CHECK-NEXT: ret1005 %v = call <vscale x 4 x i64> @llvm.vp.sub.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 %evl)1006 ret <vscale x 4 x i64> %v1007}1008 1009define <vscale x 4 x i64> @vsub_vv_nxv4i64_unmasked(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, i32 zeroext %evl) {1010; CHECK-LABEL: vsub_vv_nxv4i64_unmasked:1011; CHECK: # %bb.0:1012; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1013; CHECK-NEXT: vsub.vv v8, v8, v121014; CHECK-NEXT: ret1015 %v = call <vscale x 4 x i64> @llvm.vp.sub.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)1016 ret <vscale x 4 x i64> %v1017}1018 1019define <vscale x 4 x i64> @vsub_vx_nxv4i64(<vscale x 4 x i64> %va, i64 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1020; RV32-LABEL: vsub_vx_nxv4i64:1021; RV32: # %bb.0:1022; RV32-NEXT: addi sp, sp, -161023; RV32-NEXT: .cfi_def_cfa_offset 161024; RV32-NEXT: sw a0, 8(sp)1025; RV32-NEXT: sw a1, 12(sp)1026; RV32-NEXT: addi a0, sp, 81027; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1028; RV32-NEXT: vlse64.v v12, (a0), zero1029; RV32-NEXT: vsub.vv v8, v8, v12, v0.t1030; RV32-NEXT: addi sp, sp, 161031; RV32-NEXT: .cfi_def_cfa_offset 01032; RV32-NEXT: ret1033;1034; RV64-LABEL: vsub_vx_nxv4i64:1035; RV64: # %bb.0:1036; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1037; RV64-NEXT: vsub.vx v8, v8, a0, v0.t1038; RV64-NEXT: ret1039 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01040 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1041 %v = call <vscale x 4 x i64> @llvm.vp.sub.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 %evl)1042 ret <vscale x 4 x i64> %v1043}1044 1045define <vscale x 4 x i64> @vsub_vx_nxv4i64_unmasked(<vscale x 4 x i64> %va, i64 %b, i32 zeroext %evl) {1046; RV32-LABEL: vsub_vx_nxv4i64_unmasked:1047; RV32: # %bb.0:1048; RV32-NEXT: addi sp, sp, -161049; RV32-NEXT: .cfi_def_cfa_offset 161050; RV32-NEXT: sw a0, 8(sp)1051; RV32-NEXT: sw a1, 12(sp)1052; RV32-NEXT: addi a0, sp, 81053; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1054; RV32-NEXT: vlse64.v v12, (a0), zero1055; RV32-NEXT: vsub.vv v8, v8, v121056; RV32-NEXT: addi sp, sp, 161057; RV32-NEXT: .cfi_def_cfa_offset 01058; RV32-NEXT: ret1059;1060; RV64-LABEL: vsub_vx_nxv4i64_unmasked:1061; RV64: # %bb.0:1062; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1063; RV64-NEXT: vsub.vx v8, v8, a01064; RV64-NEXT: ret1065 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01066 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1067 %v = call <vscale x 4 x i64> @llvm.vp.sub.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)1068 ret <vscale x 4 x i64> %v1069}1070 1071define <vscale x 8 x i64> @vsub_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1072; CHECK-LABEL: vsub_vv_nxv8i64:1073; CHECK: # %bb.0:1074; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1075; CHECK-NEXT: vsub.vv v8, v8, v16, v0.t1076; CHECK-NEXT: ret1077 %v = call <vscale x 8 x i64> @llvm.vp.sub.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 %evl)1078 ret <vscale x 8 x i64> %v1079}1080 1081define <vscale x 8 x i64> @vsub_vv_nxv8i64_unmasked(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, i32 zeroext %evl) {1082; CHECK-LABEL: vsub_vv_nxv8i64_unmasked:1083; CHECK: # %bb.0:1084; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1085; CHECK-NEXT: vsub.vv v8, v8, v161086; CHECK-NEXT: ret1087 %v = call <vscale x 8 x i64> @llvm.vp.sub.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)1088 ret <vscale x 8 x i64> %v1089}1090 1091define <vscale x 8 x i64> @vsub_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1092; RV32-LABEL: vsub_vx_nxv8i64:1093; RV32: # %bb.0:1094; RV32-NEXT: addi sp, sp, -161095; RV32-NEXT: .cfi_def_cfa_offset 161096; RV32-NEXT: sw a0, 8(sp)1097; RV32-NEXT: sw a1, 12(sp)1098; RV32-NEXT: addi a0, sp, 81099; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1100; RV32-NEXT: vlse64.v v16, (a0), zero1101; RV32-NEXT: vsub.vv v8, v8, v16, v0.t1102; RV32-NEXT: addi sp, sp, 161103; RV32-NEXT: .cfi_def_cfa_offset 01104; RV32-NEXT: ret1105;1106; RV64-LABEL: vsub_vx_nxv8i64:1107; RV64: # %bb.0:1108; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1109; RV64-NEXT: vsub.vx v8, v8, a0, v0.t1110; RV64-NEXT: ret1111 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01112 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1113 %v = call <vscale x 8 x i64> @llvm.vp.sub.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 %evl)1114 ret <vscale x 8 x i64> %v1115}1116 1117define <vscale x 8 x i64> @vsub_vx_nxv8i64_unmasked(<vscale x 8 x i64> %va, i64 %b, i32 zeroext %evl) {1118; RV32-LABEL: vsub_vx_nxv8i64_unmasked:1119; RV32: # %bb.0:1120; RV32-NEXT: addi sp, sp, -161121; RV32-NEXT: .cfi_def_cfa_offset 161122; RV32-NEXT: sw a0, 8(sp)1123; RV32-NEXT: sw a1, 12(sp)1124; RV32-NEXT: addi a0, sp, 81125; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1126; RV32-NEXT: vlse64.v v16, (a0), zero1127; RV32-NEXT: vsub.vv v8, v8, v161128; RV32-NEXT: addi sp, sp, 161129; RV32-NEXT: .cfi_def_cfa_offset 01130; RV32-NEXT: ret1131;1132; RV64-LABEL: vsub_vx_nxv8i64_unmasked:1133; RV64: # %bb.0:1134; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1135; RV64-NEXT: vsub.vx v8, v8, a01136; RV64-NEXT: ret1137 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01138 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1139 %v = call <vscale x 8 x i64> @llvm.vp.sub.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)1140 ret <vscale x 8 x i64> %v1141}1142