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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfh,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFH3; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfh,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFH4; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfhmin,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN5; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfhmin,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN6 7define <vscale x 2 x bfloat> @vuitofp_nxv2bf16_nxv2i7(<vscale x 2 x i7> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vuitofp_nxv2bf16_nxv2i7:9; CHECK: # %bb.0:10; CHECK-NEXT: li a1, 12711; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma12; CHECK-NEXT: vand.vx v8, v8, a113; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma14; CHECK-NEXT: vzext.vf2 v9, v8, v0.t15; CHECK-NEXT: vfwcvt.f.xu.v v10, v9, v0.t16; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma17; CHECK-NEXT: vfncvtbf16.f.f.w v8, v1018; CHECK-NEXT: ret19 %v = call <vscale x 2 x bfloat> @llvm.vp.uitofp.nxv2bf16.nxv2i7(<vscale x 2 x i7> %va, <vscale x 2 x i1> %m, i32 %evl)20 ret <vscale x 2 x bfloat> %v21}22 23define <vscale x 2 x bfloat> @vuitofp_nxv2bf16_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {24; CHECK-LABEL: vuitofp_nxv2bf16_nxv2i8:25; CHECK: # %bb.0:26; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma27; CHECK-NEXT: vzext.vf2 v9, v8, v0.t28; CHECK-NEXT: vfwcvt.f.xu.v v10, v9, v0.t29; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma30; CHECK-NEXT: vfncvtbf16.f.f.w v8, v1031; CHECK-NEXT: ret32 %v = call <vscale x 2 x bfloat> @llvm.vp.uitofp.nxv2bf16.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 %evl)33 ret <vscale x 2 x bfloat> %v34}35 36define <vscale x 2 x bfloat> @vuitofp_nxv2bf16_nxv2i8_unmasked(<vscale x 2 x i8> %va, i32 zeroext %evl) {37; CHECK-LABEL: vuitofp_nxv2bf16_nxv2i8_unmasked:38; CHECK: # %bb.0:39; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma40; CHECK-NEXT: vzext.vf2 v9, v841; CHECK-NEXT: vfwcvt.f.xu.v v10, v942; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma43; CHECK-NEXT: vfncvtbf16.f.f.w v8, v1044; CHECK-NEXT: ret45 %v = call <vscale x 2 x bfloat> @llvm.vp.uitofp.nxv2bf16.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)46 ret <vscale x 2 x bfloat> %v47}48 49define <vscale x 2 x bfloat> @vuitofp_nxv2bf16_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {50; CHECK-LABEL: vuitofp_nxv2bf16_nxv2i16:51; CHECK: # %bb.0:52; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma53; CHECK-NEXT: vfwcvt.f.xu.v v9, v8, v0.t54; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma55; CHECK-NEXT: vfncvtbf16.f.f.w v8, v956; CHECK-NEXT: ret57 %v = call <vscale x 2 x bfloat> @llvm.vp.uitofp.nxv2bf16.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 %evl)58 ret <vscale x 2 x bfloat> %v59}60 61define <vscale x 2 x bfloat> @vuitofp_nxv2bf16_nxv2i16_unmasked(<vscale x 2 x i16> %va, i32 zeroext %evl) {62; CHECK-LABEL: vuitofp_nxv2bf16_nxv2i16_unmasked:63; CHECK: # %bb.0:64; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma65; CHECK-NEXT: vfwcvt.f.xu.v v9, v866; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma67; CHECK-NEXT: vfncvtbf16.f.f.w v8, v968; CHECK-NEXT: ret69 %v = call <vscale x 2 x bfloat> @llvm.vp.uitofp.nxv2bf16.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)70 ret <vscale x 2 x bfloat> %v71}72 73define <vscale x 2 x bfloat> @vuitofp_nxv2bf16_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {74; CHECK-LABEL: vuitofp_nxv2bf16_nxv2i32:75; CHECK: # %bb.0:76; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma77; CHECK-NEXT: vfcvt.f.xu.v v9, v8, v0.t78; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma79; CHECK-NEXT: vfncvtbf16.f.f.w v8, v980; CHECK-NEXT: ret81 %v = call <vscale x 2 x bfloat> @llvm.vp.uitofp.nxv2bf16.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 %evl)82 ret <vscale x 2 x bfloat> %v83}84 85define <vscale x 2 x bfloat> @vuitofp_nxv2bf16_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 zeroext %evl) {86; CHECK-LABEL: vuitofp_nxv2bf16_nxv2i32_unmasked:87; CHECK: # %bb.0:88; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma89; CHECK-NEXT: vfcvt.f.xu.v v9, v890; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma91; CHECK-NEXT: vfncvtbf16.f.f.w v8, v992; CHECK-NEXT: ret93 %v = call <vscale x 2 x bfloat> @llvm.vp.uitofp.nxv2bf16.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)94 ret <vscale x 2 x bfloat> %v95}96 97define <vscale x 2 x bfloat> @vuitofp_nxv2bf16_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {98; CHECK-LABEL: vuitofp_nxv2bf16_nxv2i64:99; CHECK: # %bb.0:100; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma101; CHECK-NEXT: vfncvt.f.xu.w v10, v8, v0.t102; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma103; CHECK-NEXT: vfncvtbf16.f.f.w v8, v10104; CHECK-NEXT: ret105 %v = call <vscale x 2 x bfloat> @llvm.vp.uitofp.nxv2bf16.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 %evl)106 ret <vscale x 2 x bfloat> %v107}108 109define <vscale x 2 x bfloat> @vuitofp_nxv2bf16_nxv2i64_unmasked(<vscale x 2 x i64> %va, i32 zeroext %evl) {110; CHECK-LABEL: vuitofp_nxv2bf16_nxv2i64_unmasked:111; CHECK: # %bb.0:112; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma113; CHECK-NEXT: vfncvt.f.xu.w v10, v8114; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma115; CHECK-NEXT: vfncvtbf16.f.f.w v8, v10116; CHECK-NEXT: ret117 %v = call <vscale x 2 x bfloat> @llvm.vp.uitofp.nxv2bf16.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)118 ret <vscale x 2 x bfloat> %v119}120 121define <vscale x 2 x half> @vuitofp_nxv2f16_nxv2i7(<vscale x 2 x i7> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {122; ZVFH-LABEL: vuitofp_nxv2f16_nxv2i7:123; ZVFH: # %bb.0:124; ZVFH-NEXT: li a1, 127125; ZVFH-NEXT: vsetvli zero, a0, e8, mf4, ta, ma126; ZVFH-NEXT: vand.vx v9, v8, a1127; ZVFH-NEXT: vfwcvt.f.xu.v v8, v9, v0.t128; ZVFH-NEXT: ret129;130; ZVFHMIN-LABEL: vuitofp_nxv2f16_nxv2i7:131; ZVFHMIN: # %bb.0:132; ZVFHMIN-NEXT: li a1, 127133; ZVFHMIN-NEXT: vsetvli zero, a0, e8, mf4, ta, ma134; ZVFHMIN-NEXT: vand.vx v8, v8, a1135; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma136; ZVFHMIN-NEXT: vzext.vf2 v9, v8, v0.t137; ZVFHMIN-NEXT: vfwcvt.f.xu.v v10, v9, v0.t138; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma139; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10140; ZVFHMIN-NEXT: ret141 %v = call <vscale x 2 x half> @llvm.vp.uitofp.nxv2f16.nxv2i7(<vscale x 2 x i7> %va, <vscale x 2 x i1> %m, i32 %evl)142 ret <vscale x 2 x half> %v143}144 145define <vscale x 2 x half> @vuitofp_nxv2f16_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {146; ZVFH-LABEL: vuitofp_nxv2f16_nxv2i8:147; ZVFH: # %bb.0:148; ZVFH-NEXT: vsetvli zero, a0, e8, mf4, ta, ma149; ZVFH-NEXT: vfwcvt.f.xu.v v9, v8, v0.t150; ZVFH-NEXT: vmv1r.v v8, v9151; ZVFH-NEXT: ret152;153; ZVFHMIN-LABEL: vuitofp_nxv2f16_nxv2i8:154; ZVFHMIN: # %bb.0:155; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma156; ZVFHMIN-NEXT: vzext.vf2 v9, v8, v0.t157; ZVFHMIN-NEXT: vfwcvt.f.xu.v v10, v9, v0.t158; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma159; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10160; ZVFHMIN-NEXT: ret161 %v = call <vscale x 2 x half> @llvm.vp.uitofp.nxv2f16.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 %evl)162 ret <vscale x 2 x half> %v163}164 165define <vscale x 2 x half> @vuitofp_nxv2f16_nxv2i8_unmasked(<vscale x 2 x i8> %va, i32 zeroext %evl) {166; ZVFH-LABEL: vuitofp_nxv2f16_nxv2i8_unmasked:167; ZVFH: # %bb.0:168; ZVFH-NEXT: vsetvli zero, a0, e8, mf4, ta, ma169; ZVFH-NEXT: vfwcvt.f.xu.v v9, v8170; ZVFH-NEXT: vmv1r.v v8, v9171; ZVFH-NEXT: ret172;173; ZVFHMIN-LABEL: vuitofp_nxv2f16_nxv2i8_unmasked:174; ZVFHMIN: # %bb.0:175; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma176; ZVFHMIN-NEXT: vzext.vf2 v9, v8177; ZVFHMIN-NEXT: vfwcvt.f.xu.v v10, v9178; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma179; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10180; ZVFHMIN-NEXT: ret181 %v = call <vscale x 2 x half> @llvm.vp.uitofp.nxv2f16.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)182 ret <vscale x 2 x half> %v183}184 185define <vscale x 2 x half> @vuitofp_nxv2f16_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {186; ZVFH-LABEL: vuitofp_nxv2f16_nxv2i16:187; ZVFH: # %bb.0:188; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma189; ZVFH-NEXT: vfcvt.f.xu.v v8, v8, v0.t190; ZVFH-NEXT: ret191;192; ZVFHMIN-LABEL: vuitofp_nxv2f16_nxv2i16:193; ZVFHMIN: # %bb.0:194; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma195; ZVFHMIN-NEXT: vfwcvt.f.xu.v v9, v8, v0.t196; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma197; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9198; ZVFHMIN-NEXT: ret199 %v = call <vscale x 2 x half> @llvm.vp.uitofp.nxv2f16.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 %evl)200 ret <vscale x 2 x half> %v201}202 203define <vscale x 2 x half> @vuitofp_nxv2f16_nxv2i16_unmasked(<vscale x 2 x i16> %va, i32 zeroext %evl) {204; ZVFH-LABEL: vuitofp_nxv2f16_nxv2i16_unmasked:205; ZVFH: # %bb.0:206; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma207; ZVFH-NEXT: vfcvt.f.xu.v v8, v8208; ZVFH-NEXT: ret209;210; ZVFHMIN-LABEL: vuitofp_nxv2f16_nxv2i16_unmasked:211; ZVFHMIN: # %bb.0:212; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma213; ZVFHMIN-NEXT: vfwcvt.f.xu.v v9, v8214; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma215; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9216; ZVFHMIN-NEXT: ret217 %v = call <vscale x 2 x half> @llvm.vp.uitofp.nxv2f16.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)218 ret <vscale x 2 x half> %v219}220 221define <vscale x 2 x half> @vuitofp_nxv2f16_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {222; ZVFH-LABEL: vuitofp_nxv2f16_nxv2i32:223; ZVFH: # %bb.0:224; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma225; ZVFH-NEXT: vfncvt.f.xu.w v9, v8, v0.t226; ZVFH-NEXT: vmv1r.v v8, v9227; ZVFH-NEXT: ret228;229; ZVFHMIN-LABEL: vuitofp_nxv2f16_nxv2i32:230; ZVFHMIN: # %bb.0:231; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m1, ta, ma232; ZVFHMIN-NEXT: vfcvt.f.xu.v v9, v8, v0.t233; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma234; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9235; ZVFHMIN-NEXT: ret236 %v = call <vscale x 2 x half> @llvm.vp.uitofp.nxv2f16.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 %evl)237 ret <vscale x 2 x half> %v238}239 240define <vscale x 2 x half> @vuitofp_nxv2f16_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 zeroext %evl) {241; ZVFH-LABEL: vuitofp_nxv2f16_nxv2i32_unmasked:242; ZVFH: # %bb.0:243; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma244; ZVFH-NEXT: vfncvt.f.xu.w v9, v8245; ZVFH-NEXT: vmv1r.v v8, v9246; ZVFH-NEXT: ret247;248; ZVFHMIN-LABEL: vuitofp_nxv2f16_nxv2i32_unmasked:249; ZVFHMIN: # %bb.0:250; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m1, ta, ma251; ZVFHMIN-NEXT: vfcvt.f.xu.v v9, v8252; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma253; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9254; ZVFHMIN-NEXT: ret255 %v = call <vscale x 2 x half> @llvm.vp.uitofp.nxv2f16.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)256 ret <vscale x 2 x half> %v257}258 259define <vscale x 2 x half> @vuitofp_nxv2f16_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {260; ZVFH-LABEL: vuitofp_nxv2f16_nxv2i64:261; ZVFH: # %bb.0:262; ZVFH-NEXT: vsetvli zero, a0, e32, m1, ta, ma263; ZVFH-NEXT: vfncvt.f.xu.w v10, v8, v0.t264; ZVFH-NEXT: vsetvli zero, zero, e16, mf2, ta, ma265; ZVFH-NEXT: vfncvt.f.f.w v8, v10, v0.t266; ZVFH-NEXT: ret267;268; ZVFHMIN-LABEL: vuitofp_nxv2f16_nxv2i64:269; ZVFHMIN: # %bb.0:270; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m1, ta, ma271; ZVFHMIN-NEXT: vfncvt.f.xu.w v10, v8, v0.t272; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma273; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10274; ZVFHMIN-NEXT: ret275 %v = call <vscale x 2 x half> @llvm.vp.uitofp.nxv2f16.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 %evl)276 ret <vscale x 2 x half> %v277}278 279define <vscale x 2 x half> @vuitofp_nxv2f16_nxv2i64_unmasked(<vscale x 2 x i64> %va, i32 zeroext %evl) {280; ZVFH-LABEL: vuitofp_nxv2f16_nxv2i64_unmasked:281; ZVFH: # %bb.0:282; ZVFH-NEXT: vsetvli zero, a0, e32, m1, ta, ma283; ZVFH-NEXT: vfncvt.f.xu.w v10, v8284; ZVFH-NEXT: vsetvli zero, zero, e16, mf2, ta, ma285; ZVFH-NEXT: vfncvt.f.f.w v8, v10286; ZVFH-NEXT: ret287;288; ZVFHMIN-LABEL: vuitofp_nxv2f16_nxv2i64_unmasked:289; ZVFHMIN: # %bb.0:290; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m1, ta, ma291; ZVFHMIN-NEXT: vfncvt.f.xu.w v10, v8292; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma293; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10294; ZVFHMIN-NEXT: ret295 %v = call <vscale x 2 x half> @llvm.vp.uitofp.nxv2f16.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)296 ret <vscale x 2 x half> %v297}298 299define <vscale x 2 x float> @vuitofp_nxv2f32_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {300; CHECK-LABEL: vuitofp_nxv2f32_nxv2i8:301; CHECK: # %bb.0:302; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma303; CHECK-NEXT: vzext.vf2 v9, v8, v0.t304; CHECK-NEXT: vfwcvt.f.xu.v v8, v9, v0.t305; CHECK-NEXT: ret306 %v = call <vscale x 2 x float> @llvm.vp.uitofp.nxv2f32.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 %evl)307 ret <vscale x 2 x float> %v308}309 310define <vscale x 2 x float> @vuitofp_nxv2f32_nxv2i8_unmasked(<vscale x 2 x i8> %va, i32 zeroext %evl) {311; CHECK-LABEL: vuitofp_nxv2f32_nxv2i8_unmasked:312; CHECK: # %bb.0:313; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma314; CHECK-NEXT: vzext.vf2 v9, v8315; CHECK-NEXT: vfwcvt.f.xu.v v8, v9316; CHECK-NEXT: ret317 %v = call <vscale x 2 x float> @llvm.vp.uitofp.nxv2f32.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)318 ret <vscale x 2 x float> %v319}320 321define <vscale x 2 x float> @vuitofp_nxv2f32_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {322; CHECK-LABEL: vuitofp_nxv2f32_nxv2i16:323; CHECK: # %bb.0:324; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma325; CHECK-NEXT: vfwcvt.f.xu.v v9, v8, v0.t326; CHECK-NEXT: vmv1r.v v8, v9327; CHECK-NEXT: ret328 %v = call <vscale x 2 x float> @llvm.vp.uitofp.nxv2f32.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 %evl)329 ret <vscale x 2 x float> %v330}331 332define <vscale x 2 x float> @vuitofp_nxv2f32_nxv2i16_unmasked(<vscale x 2 x i16> %va, i32 zeroext %evl) {333; CHECK-LABEL: vuitofp_nxv2f32_nxv2i16_unmasked:334; CHECK: # %bb.0:335; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma336; CHECK-NEXT: vfwcvt.f.xu.v v9, v8337; CHECK-NEXT: vmv1r.v v8, v9338; CHECK-NEXT: ret339 %v = call <vscale x 2 x float> @llvm.vp.uitofp.nxv2f32.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)340 ret <vscale x 2 x float> %v341}342 343define <vscale x 2 x float> @vuitofp_nxv2f32_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {344; CHECK-LABEL: vuitofp_nxv2f32_nxv2i32:345; CHECK: # %bb.0:346; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma347; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t348; CHECK-NEXT: ret349 %v = call <vscale x 2 x float> @llvm.vp.uitofp.nxv2f32.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 %evl)350 ret <vscale x 2 x float> %v351}352 353define <vscale x 2 x float> @vuitofp_nxv2f32_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 zeroext %evl) {354; CHECK-LABEL: vuitofp_nxv2f32_nxv2i32_unmasked:355; CHECK: # %bb.0:356; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma357; CHECK-NEXT: vfcvt.f.xu.v v8, v8358; CHECK-NEXT: ret359 %v = call <vscale x 2 x float> @llvm.vp.uitofp.nxv2f32.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)360 ret <vscale x 2 x float> %v361}362 363define <vscale x 2 x float> @vuitofp_nxv2f32_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {364; CHECK-LABEL: vuitofp_nxv2f32_nxv2i64:365; CHECK: # %bb.0:366; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma367; CHECK-NEXT: vfncvt.f.xu.w v10, v8, v0.t368; CHECK-NEXT: vmv.v.v v8, v10369; CHECK-NEXT: ret370 %v = call <vscale x 2 x float> @llvm.vp.uitofp.nxv2f32.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 %evl)371 ret <vscale x 2 x float> %v372}373 374define <vscale x 2 x float> @vuitofp_nxv2f32_nxv2i64_unmasked(<vscale x 2 x i64> %va, i32 zeroext %evl) {375; CHECK-LABEL: vuitofp_nxv2f32_nxv2i64_unmasked:376; CHECK: # %bb.0:377; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma378; CHECK-NEXT: vfncvt.f.xu.w v10, v8379; CHECK-NEXT: vmv.v.v v8, v10380; CHECK-NEXT: ret381 %v = call <vscale x 2 x float> @llvm.vp.uitofp.nxv2f32.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)382 ret <vscale x 2 x float> %v383}384 385define <vscale x 2 x double> @vuitofp_nxv2f64_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {386; CHECK-LABEL: vuitofp_nxv2f64_nxv2i8:387; CHECK: # %bb.0:388; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma389; CHECK-NEXT: vzext.vf4 v10, v8, v0.t390; CHECK-NEXT: vfwcvt.f.xu.v v8, v10, v0.t391; CHECK-NEXT: ret392 %v = call <vscale x 2 x double> @llvm.vp.uitofp.nxv2f64.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 %evl)393 ret <vscale x 2 x double> %v394}395 396define <vscale x 2 x double> @vuitofp_nxv2f64_nxv2i8_unmasked(<vscale x 2 x i8> %va, i32 zeroext %evl) {397; CHECK-LABEL: vuitofp_nxv2f64_nxv2i8_unmasked:398; CHECK: # %bb.0:399; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma400; CHECK-NEXT: vzext.vf4 v10, v8401; CHECK-NEXT: vfwcvt.f.xu.v v8, v10402; CHECK-NEXT: ret403 %v = call <vscale x 2 x double> @llvm.vp.uitofp.nxv2f64.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)404 ret <vscale x 2 x double> %v405}406 407define <vscale x 2 x double> @vuitofp_nxv2f64_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {408; CHECK-LABEL: vuitofp_nxv2f64_nxv2i16:409; CHECK: # %bb.0:410; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma411; CHECK-NEXT: vzext.vf2 v10, v8, v0.t412; CHECK-NEXT: vfwcvt.f.xu.v v8, v10, v0.t413; CHECK-NEXT: ret414 %v = call <vscale x 2 x double> @llvm.vp.uitofp.nxv2f64.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 %evl)415 ret <vscale x 2 x double> %v416}417 418define <vscale x 2 x double> @vuitofp_nxv2f64_nxv2i16_unmasked(<vscale x 2 x i16> %va, i32 zeroext %evl) {419; CHECK-LABEL: vuitofp_nxv2f64_nxv2i16_unmasked:420; CHECK: # %bb.0:421; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma422; CHECK-NEXT: vzext.vf2 v10, v8423; CHECK-NEXT: vfwcvt.f.xu.v v8, v10424; CHECK-NEXT: ret425 %v = call <vscale x 2 x double> @llvm.vp.uitofp.nxv2f64.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)426 ret <vscale x 2 x double> %v427}428 429define <vscale x 2 x double> @vuitofp_nxv2f64_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {430; CHECK-LABEL: vuitofp_nxv2f64_nxv2i32:431; CHECK: # %bb.0:432; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma433; CHECK-NEXT: vmv1r.v v10, v8434; CHECK-NEXT: vfwcvt.f.xu.v v8, v10, v0.t435; CHECK-NEXT: ret436 %v = call <vscale x 2 x double> @llvm.vp.uitofp.nxv2f64.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 %evl)437 ret <vscale x 2 x double> %v438}439 440define <vscale x 2 x double> @vuitofp_nxv2f64_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 zeroext %evl) {441; CHECK-LABEL: vuitofp_nxv2f64_nxv2i32_unmasked:442; CHECK: # %bb.0:443; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma444; CHECK-NEXT: vmv1r.v v10, v8445; CHECK-NEXT: vfwcvt.f.xu.v v8, v10446; CHECK-NEXT: ret447 %v = call <vscale x 2 x double> @llvm.vp.uitofp.nxv2f64.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)448 ret <vscale x 2 x double> %v449}450 451define <vscale x 2 x double> @vuitofp_nxv2f64_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {452; CHECK-LABEL: vuitofp_nxv2f64_nxv2i64:453; CHECK: # %bb.0:454; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma455; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t456; CHECK-NEXT: ret457 %v = call <vscale x 2 x double> @llvm.vp.uitofp.nxv2f64.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 %evl)458 ret <vscale x 2 x double> %v459}460 461define <vscale x 2 x double> @vuitofp_nxv2f64_nxv2i64_unmasked(<vscale x 2 x i64> %va, i32 zeroext %evl) {462; CHECK-LABEL: vuitofp_nxv2f64_nxv2i64_unmasked:463; CHECK: # %bb.0:464; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma465; CHECK-NEXT: vfcvt.f.xu.v v8, v8466; CHECK-NEXT: ret467 %v = call <vscale x 2 x double> @llvm.vp.uitofp.nxv2f64.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)468 ret <vscale x 2 x double> %v469}470 471define <vscale x 32 x half> @vuitofp_nxv32f16_nxv32i32(<vscale x 32 x i32> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {472; ZVFH-LABEL: vuitofp_nxv32f16_nxv32i32:473; ZVFH: # %bb.0:474; ZVFH-NEXT: vsetvli a1, zero, e8, mf2, ta, ma475; ZVFH-NEXT: vmv1r.v v24, v0476; ZVFH-NEXT: csrr a1, vlenb477; ZVFH-NEXT: srli a2, a1, 2478; ZVFH-NEXT: slli a1, a1, 1479; ZVFH-NEXT: vslidedown.vx v0, v0, a2480; ZVFH-NEXT: sub a2, a0, a1481; ZVFH-NEXT: sltu a3, a0, a2482; ZVFH-NEXT: addi a3, a3, -1483; ZVFH-NEXT: and a2, a3, a2484; ZVFH-NEXT: vsetvli zero, a2, e16, m4, ta, ma485; ZVFH-NEXT: vfncvt.f.xu.w v28, v16, v0.t486; ZVFH-NEXT: bltu a0, a1, .LBB34_2487; ZVFH-NEXT: # %bb.1:488; ZVFH-NEXT: mv a0, a1489; ZVFH-NEXT: .LBB34_2:490; ZVFH-NEXT: vmv1r.v v0, v24491; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma492; ZVFH-NEXT: vfncvt.f.xu.w v24, v8, v0.t493; ZVFH-NEXT: vmv8r.v v8, v24494; ZVFH-NEXT: ret495;496; ZVFHMIN-LABEL: vuitofp_nxv32f16_nxv32i32:497; ZVFHMIN: # %bb.0:498; ZVFHMIN-NEXT: vsetvli a1, zero, e8, mf2, ta, ma499; ZVFHMIN-NEXT: vmv1r.v v7, v0500; ZVFHMIN-NEXT: csrr a1, vlenb501; ZVFHMIN-NEXT: srli a2, a1, 2502; ZVFHMIN-NEXT: slli a1, a1, 1503; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a2504; ZVFHMIN-NEXT: sub a2, a0, a1505; ZVFHMIN-NEXT: sltu a3, a0, a2506; ZVFHMIN-NEXT: addi a3, a3, -1507; ZVFHMIN-NEXT: and a2, a3, a2508; ZVFHMIN-NEXT: vsetvli zero, a2, e32, m8, ta, ma509; ZVFHMIN-NEXT: vfcvt.f.xu.v v24, v16, v0.t510; ZVFHMIN-NEXT: vsetvli a2, zero, e16, m4, ta, ma511; ZVFHMIN-NEXT: vfncvt.f.f.w v20, v24512; ZVFHMIN-NEXT: bltu a0, a1, .LBB34_2513; ZVFHMIN-NEXT: # %bb.1:514; ZVFHMIN-NEXT: mv a0, a1515; ZVFHMIN-NEXT: .LBB34_2:516; ZVFHMIN-NEXT: vmv1r.v v0, v7517; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m8, ta, ma518; ZVFHMIN-NEXT: vfcvt.f.xu.v v8, v8, v0.t519; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma520; ZVFHMIN-NEXT: vfncvt.f.f.w v16, v8521; ZVFHMIN-NEXT: vmv8r.v v8, v16522; ZVFHMIN-NEXT: ret523 %v = call <vscale x 32 x half> @llvm.vp.uitofp.nxv32f16.nxv32i32(<vscale x 32 x i32> %va, <vscale x 32 x i1> %m, i32 %evl)524 ret <vscale x 32 x half> %v525}526 527define <vscale x 32 x float> @vuitofp_nxv32f32_nxv32i32(<vscale x 32 x i32> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {528; CHECK-LABEL: vuitofp_nxv32f32_nxv32i32:529; CHECK: # %bb.0:530; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma531; CHECK-NEXT: vmv1r.v v24, v0532; CHECK-NEXT: csrr a1, vlenb533; CHECK-NEXT: srli a2, a1, 2534; CHECK-NEXT: slli a1, a1, 1535; CHECK-NEXT: vslidedown.vx v0, v0, a2536; CHECK-NEXT: sub a2, a0, a1537; CHECK-NEXT: sltu a3, a0, a2538; CHECK-NEXT: addi a3, a3, -1539; CHECK-NEXT: and a2, a3, a2540; CHECK-NEXT: vsetvli zero, a2, e32, m8, ta, ma541; CHECK-NEXT: vfcvt.f.xu.v v16, v16, v0.t542; CHECK-NEXT: bltu a0, a1, .LBB35_2543; CHECK-NEXT: # %bb.1:544; CHECK-NEXT: mv a0, a1545; CHECK-NEXT: .LBB35_2:546; CHECK-NEXT: vmv1r.v v0, v24547; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma548; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t549; CHECK-NEXT: ret550 %v = call <vscale x 32 x float> @llvm.vp.uitofp.nxv32f32.nxv32i32(<vscale x 32 x i32> %va, <vscale x 32 x i1> %m, i32 %evl)551 ret <vscale x 32 x float> %v552}553 554define <vscale x 32 x float> @vuitofp_nxv32f32_nxv32i32_unmasked(<vscale x 32 x i32> %va, i32 zeroext %evl) {555; CHECK-LABEL: vuitofp_nxv32f32_nxv32i32_unmasked:556; CHECK: # %bb.0:557; CHECK-NEXT: csrr a1, vlenb558; CHECK-NEXT: slli a1, a1, 1559; CHECK-NEXT: sub a2, a0, a1560; CHECK-NEXT: sltu a3, a0, a2561; CHECK-NEXT: addi a3, a3, -1562; CHECK-NEXT: and a2, a3, a2563; CHECK-NEXT: vsetvli zero, a2, e32, m8, ta, ma564; CHECK-NEXT: vfcvt.f.xu.v v16, v16565; CHECK-NEXT: bltu a0, a1, .LBB36_2566; CHECK-NEXT: # %bb.1:567; CHECK-NEXT: mv a0, a1568; CHECK-NEXT: .LBB36_2:569; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma570; CHECK-NEXT: vfcvt.f.xu.v v8, v8571; CHECK-NEXT: ret572 %v = call <vscale x 32 x float> @llvm.vp.uitofp.nxv32f32.nxv32i32(<vscale x 32 x i32> %va, <vscale x 32 x i1> splat (i1 true), i32 %evl)573 ret <vscale x 32 x float> %v574}575