669 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22 3; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v,+m \4; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=RV325; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v,+m -mcpu=sifive-p670 \6; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=RV64P6707; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v,+m -mcpu=spacemit-x60 \8; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=RV64X609; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v,+m \10; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=RV6411 12 13; test114define void @test1(ptr nocapture noundef writeonly %dst, i32 noundef signext %i_dst_stride, ptr nocapture noundef readonly %src1, i32 noundef signext %i_src1_stride, ptr nocapture noundef readonly %src2, i32 noundef signext %i_src2_stride, i32 noundef signext %i_width, i32 noundef signext %i_height) {15; RV32-LABEL: test1:16; RV32: # %bb.0: # %entry17; RV32-NEXT: blez a7, .LBB0_1718; RV32-NEXT: # %bb.1: # %for.cond1.preheader.lr.ph19; RV32-NEXT: blez a6, .LBB0_1720; RV32-NEXT: # %bb.2: # %for.cond1.preheader.us.preheader21; RV32-NEXT: addi t3, a7, -122; RV32-NEXT: csrr t2, vlenb23; RV32-NEXT: slli t1, t2, 124; RV32-NEXT: li t4, 3225; RV32-NEXT: mv t0, t126; RV32-NEXT: # %bb.3: # %for.cond1.preheader.us.preheader27; RV32-NEXT: li t0, 3228; RV32-NEXT: # %bb.4: # %for.cond1.preheader.us.preheader29; RV32-NEXT: addi sp, sp, -1630; RV32-NEXT: .cfi_def_cfa_offset 1631; RV32-NEXT: sw s0, 12(sp) # 4-byte Folded Spill32; RV32-NEXT: sw s1, 8(sp) # 4-byte Folded Spill33; RV32-NEXT: sw s2, 4(sp) # 4-byte Folded Spill34; RV32-NEXT: sw s3, 0(sp) # 4-byte Folded Spill35; RV32-NEXT: .cfi_offset s0, -436; RV32-NEXT: .cfi_offset s1, -837; RV32-NEXT: .cfi_offset s2, -1238; RV32-NEXT: .cfi_offset s3, -1639; RV32-NEXT: .cfi_remember_state40; RV32-NEXT: mul t5, a1, t341; RV32-NEXT: add s0, a0, a642; RV32-NEXT: mul t6, a3, t343; RV32-NEXT: add s2, a2, a644; RV32-NEXT: mul s1, a5, t345; RV32-NEXT: add s3, a4, a646; RV32-NEXT: bltu t4, t1, .LBB0_647; RV32-NEXT: # %bb.5: # %for.cond1.preheader.us.preheader48; RV32-NEXT: li t1, 3249; RV32-NEXT: .LBB0_6: # %for.cond1.preheader.us.preheader50; RV32-NEXT: add t3, s0, t551; RV32-NEXT: add t6, s2, t652; RV32-NEXT: add t4, s3, s153; RV32-NEXT: j .LBB0_854; RV32-NEXT: # %bb.7: # %for.cond1.preheader.us.preheader55; RV32-NEXT: mv t1, t056; RV32-NEXT: .LBB0_8: # %for.cond1.preheader.us.preheader57; RV32-NEXT: .cfi_restore_state58; RV32-NEXT: li t0, 059; RV32-NEXT: sltu t5, a0, t660; RV32-NEXT: sltu t6, a2, t361; RV32-NEXT: and t5, t5, t662; RV32-NEXT: sltu t4, a0, t463; RV32-NEXT: sltu t3, a4, t364; RV32-NEXT: and t3, t4, t365; RV32-NEXT: or t4, a1, a366; RV32-NEXT: srli t4, t4, 3167; RV32-NEXT: or t4, t5, t468; RV32-NEXT: or t5, a1, a569; RV32-NEXT: sltu t1, a6, t170; RV32-NEXT: srli t5, t5, 3171; RV32-NEXT: or t3, t3, t572; RV32-NEXT: or t3, t4, t373; RV32-NEXT: or t1, t1, t374; RV32-NEXT: andi t1, t1, 175; RV32-NEXT: slli t2, t2, 176; RV32-NEXT: csrwi vxrm, 077; RV32-NEXT: j .LBB0_1078; RV32-NEXT: .LBB0_9: # %for.cond1.for.cond.cleanup3_crit_edge.us79; RV32-NEXT: # in Loop: Header=BB0_10 Depth=180; RV32-NEXT: add a0, a0, a181; RV32-NEXT: add a2, a2, a382; RV32-NEXT: addi t0, t0, 183; RV32-NEXT: add a4, a4, a584; RV32-NEXT: beq t0, a7, .LBB0_1685; RV32-NEXT: .LBB0_10: # %for.cond1.preheader.us86; RV32-NEXT: # =>This Loop Header: Depth=187; RV32-NEXT: # Child Loop BB0_13 Depth 288; RV32-NEXT: # Child Loop BB0_15 Depth 289; RV32-NEXT: beqz t1, .LBB0_1290; RV32-NEXT: # %bb.11: # in Loop: Header=BB0_10 Depth=191; RV32-NEXT: li t4, 092; RV32-NEXT: li t3, 093; RV32-NEXT: j .LBB0_1594; RV32-NEXT: .LBB0_12: # %vector.ph95; RV32-NEXT: # in Loop: Header=BB0_10 Depth=196; RV32-NEXT: li t3, 097; RV32-NEXT: neg t4, t298; RV32-NEXT: and t4, t4, a699; RV32-NEXT: li t6, 0100; RV32-NEXT: li t5, 0101; RV32-NEXT: vsetvli s0, zero, e8, m2, ta, ma102; RV32-NEXT: .LBB0_13: # %vector.body103; RV32-NEXT: # Parent Loop BB0_10 Depth=1104; RV32-NEXT: # => This Inner Loop Header: Depth=2105; RV32-NEXT: add s0, a2, t6106; RV32-NEXT: add s1, a4, t6107; RV32-NEXT: vl2r.v v8, (s0)108; RV32-NEXT: add s0, a0, t6109; RV32-NEXT: vl2r.v v10, (s1)110; RV32-NEXT: add s1, t6, t2111; RV32-NEXT: sltu t6, s1, t6112; RV32-NEXT: add t5, t5, t6113; RV32-NEXT: xor t6, s1, t4114; RV32-NEXT: vaaddu.vv v8, v8, v10115; RV32-NEXT: or s2, t6, t5116; RV32-NEXT: vs2r.v v8, (s0)117; RV32-NEXT: mv t6, s1118; RV32-NEXT: bnez s2, .LBB0_13119; RV32-NEXT: # %bb.14: # %middle.block120; RV32-NEXT: # in Loop: Header=BB0_10 Depth=1121; RV32-NEXT: beq t4, a6, .LBB0_9122; RV32-NEXT: .LBB0_15: # %for.body4.us123; RV32-NEXT: # Parent Loop BB0_10 Depth=1124; RV32-NEXT: # => This Inner Loop Header: Depth=2125; RV32-NEXT: add t5, a2, t4126; RV32-NEXT: add t6, a4, t4127; RV32-NEXT: add s0, a0, t4128; RV32-NEXT: lbu t5, 0(t5)129; RV32-NEXT: lbu t6, 0(t6)130; RV32-NEXT: addi t4, t4, 1131; RV32-NEXT: seqz s1, t4132; RV32-NEXT: add t3, t3, s1133; RV32-NEXT: add t5, t5, t6134; RV32-NEXT: xor t6, t4, a6135; RV32-NEXT: addi t5, t5, 1136; RV32-NEXT: srli t5, t5, 1137; RV32-NEXT: or t6, t6, t3138; RV32-NEXT: sb t5, 0(s0)139; RV32-NEXT: bnez t6, .LBB0_15140; RV32-NEXT: j .LBB0_9141; RV32-NEXT: .LBB0_16:142; RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload143; RV32-NEXT: lw s1, 8(sp) # 4-byte Folded Reload144; RV32-NEXT: lw s2, 4(sp) # 4-byte Folded Reload145; RV32-NEXT: lw s3, 0(sp) # 4-byte Folded Reload146; RV32-NEXT: .cfi_restore s0147; RV32-NEXT: .cfi_restore s1148; RV32-NEXT: .cfi_restore s2149; RV32-NEXT: .cfi_restore s3150; RV32-NEXT: addi sp, sp, 16151; RV32-NEXT: .cfi_def_cfa_offset 0152; RV32-NEXT: .LBB0_17: # %for.cond.cleanup153; RV32-NEXT: ret154;155; RV64P670-LABEL: test1:156; RV64P670: # %bb.0: # %entry157; RV64P670-NEXT: csrwi vxrm, 0158; RV64P670-NEXT: blez a7, .LBB0_12159; RV64P670-NEXT: # %bb.1: # %for.cond1.preheader.lr.ph160; RV64P670-NEXT: blez a6, .LBB0_12161; RV64P670-NEXT: # %bb.2: # %for.cond1.preheader.us.preheader162; RV64P670-NEXT: addi sp, sp, -48163; RV64P670-NEXT: .cfi_def_cfa_offset 48164; RV64P670-NEXT: sd s0, 40(sp) # 8-byte Folded Spill165; RV64P670-NEXT: sd s1, 32(sp) # 8-byte Folded Spill166; RV64P670-NEXT: sd s2, 24(sp) # 8-byte Folded Spill167; RV64P670-NEXT: sd s3, 16(sp) # 8-byte Folded Spill168; RV64P670-NEXT: sd s4, 8(sp) # 8-byte Folded Spill169; RV64P670-NEXT: .cfi_offset s0, -8170; RV64P670-NEXT: .cfi_offset s1, -16171; RV64P670-NEXT: .cfi_offset s2, -24172; RV64P670-NEXT: .cfi_offset s3, -32173; RV64P670-NEXT: .cfi_offset s4, -40174; RV64P670-NEXT: addi s1, a7, -1175; RV64P670-NEXT: add s0, a0, a6176; RV64P670-NEXT: li t0, 0177; RV64P670-NEXT: li t1, 0178; RV64P670-NEXT: zext.w s1, s1179; RV64P670-NEXT: mul t2, a1, s1180; RV64P670-NEXT: add t4, s0, t2181; RV64P670-NEXT: mul t2, a3, s1182; RV64P670-NEXT: add s0, a2, a6183; RV64P670-NEXT: mul s1, a5, s1184; RV64P670-NEXT: add t3, s0, t2185; RV64P670-NEXT: add s0, a4, a6186; RV64P670-NEXT: csrr t2, vlenb187; RV64P670-NEXT: add t5, s0, s1188; RV64P670-NEXT: sltu s1, a0, t3189; RV64P670-NEXT: sltu s0, a2, t4190; RV64P670-NEXT: slli t3, t2, 1191; RV64P670-NEXT: and s0, s0, s1192; RV64P670-NEXT: or s1, a1, a3193; RV64P670-NEXT: srli s1, s1, 63194; RV64P670-NEXT: or t6, s0, s1195; RV64P670-NEXT: sltu s1, a0, t5196; RV64P670-NEXT: sltu s0, a4, t4197; RV64P670-NEXT: add t4, a0, a6198; RV64P670-NEXT: and s0, s0, s1199; RV64P670-NEXT: or s1, a1, a5200; RV64P670-NEXT: srli s1, s1, 63201; RV64P670-NEXT: or s0, s0, s1202; RV64P670-NEXT: li s1, 32203; RV64P670-NEXT: maxu s1, t3, s1204; RV64P670-NEXT: or s0, t6, s0205; RV64P670-NEXT: sltu s1, a6, s1206; RV64P670-NEXT: or s0, s0, s1207; RV64P670-NEXT: andi t5, s0, 1208; RV64P670-NEXT: j .LBB0_4209; RV64P670-NEXT: .LBB0_3: # %for.cond1.for.cond.cleanup3_crit_edge.us210; RV64P670-NEXT: # in Loop: Header=BB0_4 Depth=1211; RV64P670-NEXT: add a0, a0, a1212; RV64P670-NEXT: add a2, a2, a3213; RV64P670-NEXT: add a4, a4, a5214; RV64P670-NEXT: addiw t1, t1, 1215; RV64P670-NEXT: addi t0, t0, 1216; RV64P670-NEXT: beq t1, a7, .LBB0_11217; RV64P670-NEXT: .LBB0_4: # %for.cond1.preheader.us218; RV64P670-NEXT: # =>This Loop Header: Depth=1219; RV64P670-NEXT: # Child Loop BB0_7 Depth 2220; RV64P670-NEXT: # Child Loop BB0_10 Depth 2221; RV64P670-NEXT: beqz t5, .LBB0_6222; RV64P670-NEXT: # %bb.5: # in Loop: Header=BB0_4 Depth=1223; RV64P670-NEXT: li t6, 0224; RV64P670-NEXT: j .LBB0_9225; RV64P670-NEXT: .LBB0_6: # %vector.ph226; RV64P670-NEXT: # in Loop: Header=BB0_4 Depth=1227; RV64P670-NEXT: slli s1, t2, 28228; RV64P670-NEXT: mv s2, a2229; RV64P670-NEXT: mv s3, a4230; RV64P670-NEXT: mv s4, a0231; RV64P670-NEXT: sub s1, s1, t3232; RV64P670-NEXT: vsetvli s0, zero, e8, m2, ta, ma233; RV64P670-NEXT: and t6, s1, a6234; RV64P670-NEXT: mv s1, t6235; RV64P670-NEXT: .LBB0_7: # %vector.body236; RV64P670-NEXT: # Parent Loop BB0_4 Depth=1237; RV64P670-NEXT: # => This Inner Loop Header: Depth=2238; RV64P670-NEXT: vl2r.v v8, (s2)239; RV64P670-NEXT: sub s1, s1, t3240; RV64P670-NEXT: add s2, s2, t3241; RV64P670-NEXT: vl2r.v v10, (s3)242; RV64P670-NEXT: add s3, s3, t3243; RV64P670-NEXT: vaaddu.vv v8, v8, v10244; RV64P670-NEXT: vs2r.v v8, (s4)245; RV64P670-NEXT: add s4, s4, t3246; RV64P670-NEXT: bnez s1, .LBB0_7247; RV64P670-NEXT: # %bb.8: # %middle.block248; RV64P670-NEXT: # in Loop: Header=BB0_4 Depth=1249; RV64P670-NEXT: beq t6, a6, .LBB0_3250; RV64P670-NEXT: .LBB0_9: # %for.body4.us.preheader251; RV64P670-NEXT: # in Loop: Header=BB0_4 Depth=1252; RV64P670-NEXT: mul s2, a1, t0253; RV64P670-NEXT: add s1, a0, t6254; RV64P670-NEXT: add s4, a4, t6255; RV64P670-NEXT: add t6, t6, a2256; RV64P670-NEXT: add s2, s2, t4257; RV64P670-NEXT: .LBB0_10: # %for.body4.us258; RV64P670-NEXT: # Parent Loop BB0_4 Depth=1259; RV64P670-NEXT: # => This Inner Loop Header: Depth=2260; RV64P670-NEXT: lbu s3, 0(t6)261; RV64P670-NEXT: lbu s0, 0(s4)262; RV64P670-NEXT: addi s4, s4, 1263; RV64P670-NEXT: addi t6, t6, 1264; RV64P670-NEXT: add s0, s0, s3265; RV64P670-NEXT: addi s0, s0, 1266; RV64P670-NEXT: srli s0, s0, 1267; RV64P670-NEXT: sb s0, 0(s1)268; RV64P670-NEXT: addi s1, s1, 1269; RV64P670-NEXT: bne s1, s2, .LBB0_10270; RV64P670-NEXT: j .LBB0_3271; RV64P670-NEXT: .LBB0_11:272; RV64P670-NEXT: ld s0, 40(sp) # 8-byte Folded Reload273; RV64P670-NEXT: ld s1, 32(sp) # 8-byte Folded Reload274; RV64P670-NEXT: ld s2, 24(sp) # 8-byte Folded Reload275; RV64P670-NEXT: ld s3, 16(sp) # 8-byte Folded Reload276; RV64P670-NEXT: ld s4, 8(sp) # 8-byte Folded Reload277; RV64P670-NEXT: .cfi_restore s0278; RV64P670-NEXT: .cfi_restore s1279; RV64P670-NEXT: .cfi_restore s2280; RV64P670-NEXT: .cfi_restore s3281; RV64P670-NEXT: .cfi_restore s4282; RV64P670-NEXT: addi sp, sp, 48283; RV64P670-NEXT: .cfi_def_cfa_offset 0284; RV64P670-NEXT: .LBB0_12: # %for.cond.cleanup285; RV64P670-NEXT: ret286;287; RV64X60-LABEL: test1:288; RV64X60: # %bb.0: # %entry289; RV64X60-NEXT: csrwi vxrm, 0290; RV64X60-NEXT: blez a7, .LBB0_12291; RV64X60-NEXT: # %bb.1: # %for.cond1.preheader.lr.ph292; RV64X60-NEXT: blez a6, .LBB0_12293; RV64X60-NEXT: # %bb.2: # %for.cond1.preheader.us.preheader294; RV64X60-NEXT: addi sp, sp, -48295; RV64X60-NEXT: .cfi_def_cfa_offset 48296; RV64X60-NEXT: sd s0, 40(sp) # 8-byte Folded Spill297; RV64X60-NEXT: sd s1, 32(sp) # 8-byte Folded Spill298; RV64X60-NEXT: sd s2, 24(sp) # 8-byte Folded Spill299; RV64X60-NEXT: sd s3, 16(sp) # 8-byte Folded Spill300; RV64X60-NEXT: sd s4, 8(sp) # 8-byte Folded Spill301; RV64X60-NEXT: .cfi_offset s0, -8302; RV64X60-NEXT: .cfi_offset s1, -16303; RV64X60-NEXT: .cfi_offset s2, -24304; RV64X60-NEXT: .cfi_offset s3, -32305; RV64X60-NEXT: .cfi_offset s4, -40306; RV64X60-NEXT: li t0, 0307; RV64X60-NEXT: li t1, 0308; RV64X60-NEXT: addi s1, a7, -1309; RV64X60-NEXT: zext.w s1, s1310; RV64X60-NEXT: mul t3, a1, s1311; RV64X60-NEXT: mul t5, a3, s1312; RV64X60-NEXT: mul t4, a5, s1313; RV64X60-NEXT: add s1, a0, a6314; RV64X60-NEXT: csrr t2, vlenb315; RV64X60-NEXT: add s0, a2, a6316; RV64X60-NEXT: add s2, s1, t3317; RV64X60-NEXT: add t3, a4, a6318; RV64X60-NEXT: add t5, t5, s0319; RV64X60-NEXT: or t6, a1, a3320; RV64X60-NEXT: add t4, t4, t3321; RV64X60-NEXT: sltu s0, a0, t5322; RV64X60-NEXT: sltu s1, a2, s2323; RV64X60-NEXT: and t5, s0, s1324; RV64X60-NEXT: slli t3, t2, 1325; RV64X60-NEXT: sltu t4, a0, t4326; RV64X60-NEXT: sltu s0, a4, s2327; RV64X60-NEXT: srli s1, t6, 63328; RV64X60-NEXT: and s0, t4, s0329; RV64X60-NEXT: or t4, t5, s1330; RV64X60-NEXT: or s1, a1, a5331; RV64X60-NEXT: li t5, 32332; RV64X60-NEXT: srli s1, s1, 63333; RV64X60-NEXT: or s0, s0, s1334; RV64X60-NEXT: maxu s1, t3, t5335; RV64X60-NEXT: or s0, t4, s0336; RV64X60-NEXT: sltu s1, a6, s1337; RV64X60-NEXT: or s0, s0, s1338; RV64X60-NEXT: add t4, a0, a6339; RV64X60-NEXT: andi t5, s0, 1340; RV64X60-NEXT: j .LBB0_4341; RV64X60-NEXT: .LBB0_3: # %for.cond1.for.cond.cleanup3_crit_edge.us342; RV64X60-NEXT: # in Loop: Header=BB0_4 Depth=1343; RV64X60-NEXT: add a0, a0, a1344; RV64X60-NEXT: add a2, a2, a3345; RV64X60-NEXT: addiw t1, t1, 1346; RV64X60-NEXT: add a4, a4, a5347; RV64X60-NEXT: addi t0, t0, 1348; RV64X60-NEXT: beq t1, a7, .LBB0_11349; RV64X60-NEXT: .LBB0_4: # %for.cond1.preheader.us350; RV64X60-NEXT: # =>This Loop Header: Depth=1351; RV64X60-NEXT: # Child Loop BB0_7 Depth 2352; RV64X60-NEXT: # Child Loop BB0_10 Depth 2353; RV64X60-NEXT: beqz t5, .LBB0_6354; RV64X60-NEXT: # %bb.5: # in Loop: Header=BB0_4 Depth=1355; RV64X60-NEXT: li t6, 0356; RV64X60-NEXT: j .LBB0_9357; RV64X60-NEXT: .LBB0_6: # %vector.ph358; RV64X60-NEXT: # in Loop: Header=BB0_4 Depth=1359; RV64X60-NEXT: slli s1, t2, 28360; RV64X60-NEXT: sub s1, s1, t3361; RV64X60-NEXT: and t6, s1, a6362; RV64X60-NEXT: mv s2, a2363; RV64X60-NEXT: mv s3, a4364; RV64X60-NEXT: mv s4, a0365; RV64X60-NEXT: mv s1, t6366; RV64X60-NEXT: vsetvli s0, zero, e8, m2, ta, ma367; RV64X60-NEXT: .LBB0_7: # %vector.body368; RV64X60-NEXT: # Parent Loop BB0_4 Depth=1369; RV64X60-NEXT: # => This Inner Loop Header: Depth=2370; RV64X60-NEXT: vl2r.v v8, (s2)371; RV64X60-NEXT: vl2r.v v10, (s3)372; RV64X60-NEXT: vaaddu.vv v8, v8, v10373; RV64X60-NEXT: sub s1, s1, t3374; RV64X60-NEXT: vs2r.v v8, (s4)375; RV64X60-NEXT: add s4, s4, t3376; RV64X60-NEXT: add s3, s3, t3377; RV64X60-NEXT: add s2, s2, t3378; RV64X60-NEXT: bnez s1, .LBB0_7379; RV64X60-NEXT: # %bb.8: # %middle.block380; RV64X60-NEXT: # in Loop: Header=BB0_4 Depth=1381; RV64X60-NEXT: beq t6, a6, .LBB0_3382; RV64X60-NEXT: .LBB0_9: # %for.body4.us.preheader383; RV64X60-NEXT: # in Loop: Header=BB0_4 Depth=1384; RV64X60-NEXT: mul s2, a1, t0385; RV64X60-NEXT: add s0, a0, t6386; RV64X60-NEXT: add s2, s2, t4387; RV64X60-NEXT: add s4, a4, t6388; RV64X60-NEXT: add t6, t6, a2389; RV64X60-NEXT: .LBB0_10: # %for.body4.us390; RV64X60-NEXT: # Parent Loop BB0_4 Depth=1391; RV64X60-NEXT: # => This Inner Loop Header: Depth=2392; RV64X60-NEXT: lbu s3, 0(t6)393; RV64X60-NEXT: lbu s1, 0(s4)394; RV64X60-NEXT: add s1, s1, s3395; RV64X60-NEXT: addi s1, s1, 1396; RV64X60-NEXT: srli s1, s1, 1397; RV64X60-NEXT: sb s1, 0(s0)398; RV64X60-NEXT: addi s0, s0, 1399; RV64X60-NEXT: addi s4, s4, 1400; RV64X60-NEXT: addi t6, t6, 1401; RV64X60-NEXT: bne s0, s2, .LBB0_10402; RV64X60-NEXT: j .LBB0_3403; RV64X60-NEXT: .LBB0_11:404; RV64X60-NEXT: ld s0, 40(sp) # 8-byte Folded Reload405; RV64X60-NEXT: ld s1, 32(sp) # 8-byte Folded Reload406; RV64X60-NEXT: ld s2, 24(sp) # 8-byte Folded Reload407; RV64X60-NEXT: ld s3, 16(sp) # 8-byte Folded Reload408; RV64X60-NEXT: ld s4, 8(sp) # 8-byte Folded Reload409; RV64X60-NEXT: .cfi_restore s0410; RV64X60-NEXT: .cfi_restore s1411; RV64X60-NEXT: .cfi_restore s2412; RV64X60-NEXT: .cfi_restore s3413; RV64X60-NEXT: .cfi_restore s4414; RV64X60-NEXT: addi sp, sp, 48415; RV64X60-NEXT: .cfi_def_cfa_offset 0416; RV64X60-NEXT: .LBB0_12: # %for.cond.cleanup417; RV64X60-NEXT: ret418;419; RV64-LABEL: test1:420; RV64: # %bb.0: # %entry421; RV64-NEXT: blez a7, .LBB0_14422; RV64-NEXT: # %bb.1: # %for.cond1.preheader.lr.ph423; RV64-NEXT: blez a6, .LBB0_14424; RV64-NEXT: # %bb.2: # %for.cond1.preheader.us.preheader425; RV64-NEXT: addi sp, sp, -48426; RV64-NEXT: .cfi_def_cfa_offset 48427; RV64-NEXT: sd s0, 40(sp) # 8-byte Folded Spill428; RV64-NEXT: sd s1, 32(sp) # 8-byte Folded Spill429; RV64-NEXT: sd s2, 24(sp) # 8-byte Folded Spill430; RV64-NEXT: sd s3, 16(sp) # 8-byte Folded Spill431; RV64-NEXT: sd s4, 8(sp) # 8-byte Folded Spill432; RV64-NEXT: .cfi_offset s0, -8433; RV64-NEXT: .cfi_offset s1, -16434; RV64-NEXT: .cfi_offset s2, -24435; RV64-NEXT: .cfi_offset s3, -32436; RV64-NEXT: .cfi_offset s4, -40437; RV64-NEXT: addi t1, a7, -1438; RV64-NEXT: add t5, a0, a6439; RV64-NEXT: add s0, a2, a6440; RV64-NEXT: add t6, a4, a6441; RV64-NEXT: csrr t0, vlenb442; RV64-NEXT: li t2, 32443; RV64-NEXT: slli t1, t1, 32444; RV64-NEXT: srli t3, t1, 32445; RV64-NEXT: mul t1, a1, t3446; RV64-NEXT: add t5, t5, t1447; RV64-NEXT: mul t1, a3, t3448; RV64-NEXT: add s0, s0, t1449; RV64-NEXT: slli t1, t0, 1450; RV64-NEXT: mul t3, a5, t3451; RV64-NEXT: add t6, t6, t3452; RV64-NEXT: mv t4, t1453; RV64-NEXT: bltu t2, t1, .LBB0_4454; RV64-NEXT: # %bb.3: # %for.cond1.preheader.us.preheader455; RV64-NEXT: li t4, 32456; RV64-NEXT: .LBB0_4: # %for.cond1.preheader.us.preheader457; RV64-NEXT: li t2, 0458; RV64-NEXT: li t3, 0459; RV64-NEXT: sltu s0, a0, s0460; RV64-NEXT: sltu s1, a2, t5461; RV64-NEXT: and s0, s0, s1462; RV64-NEXT: sltu t6, a0, t6463; RV64-NEXT: sltu t5, a4, t5464; RV64-NEXT: and t5, t6, t5465; RV64-NEXT: or t6, a1, a3466; RV64-NEXT: srli t6, t6, 63467; RV64-NEXT: or t6, s0, t6468; RV64-NEXT: or s0, a1, a5469; RV64-NEXT: srli s0, s0, 63470; RV64-NEXT: or t5, t5, s0471; RV64-NEXT: sltu s0, a6, t4472; RV64-NEXT: or t5, t6, t5473; RV64-NEXT: add t4, a0, a6474; RV64-NEXT: or t5, s0, t5475; RV64-NEXT: andi t5, t5, 1476; RV64-NEXT: csrwi vxrm, 0477; RV64-NEXT: j .LBB0_6478; RV64-NEXT: .LBB0_5: # %for.cond1.for.cond.cleanup3_crit_edge.us479; RV64-NEXT: # in Loop: Header=BB0_6 Depth=1480; RV64-NEXT: add a0, a0, a1481; RV64-NEXT: add a2, a2, a3482; RV64-NEXT: add a4, a4, a5483; RV64-NEXT: addiw t3, t3, 1484; RV64-NEXT: addi t2, t2, 1485; RV64-NEXT: beq t3, a7, .LBB0_13486; RV64-NEXT: .LBB0_6: # %for.cond1.preheader.us487; RV64-NEXT: # =>This Loop Header: Depth=1488; RV64-NEXT: # Child Loop BB0_9 Depth 2489; RV64-NEXT: # Child Loop BB0_12 Depth 2490; RV64-NEXT: beqz t5, .LBB0_8491; RV64-NEXT: # %bb.7: # in Loop: Header=BB0_6 Depth=1492; RV64-NEXT: li t6, 0493; RV64-NEXT: j .LBB0_11494; RV64-NEXT: .LBB0_8: # %vector.ph495; RV64-NEXT: # in Loop: Header=BB0_6 Depth=1496; RV64-NEXT: slli t6, t0, 28497; RV64-NEXT: sub t6, t6, t1498; RV64-NEXT: and t6, t6, a6499; RV64-NEXT: mv s0, a2500; RV64-NEXT: mv s1, a4501; RV64-NEXT: mv s2, a0502; RV64-NEXT: mv s3, t6503; RV64-NEXT: vsetvli s4, zero, e8, m2, ta, ma504; RV64-NEXT: .LBB0_9: # %vector.body505; RV64-NEXT: # Parent Loop BB0_6 Depth=1506; RV64-NEXT: # => This Inner Loop Header: Depth=2507; RV64-NEXT: vl2r.v v8, (s0)508; RV64-NEXT: vl2r.v v10, (s1)509; RV64-NEXT: sub s3, s3, t1510; RV64-NEXT: add s1, s1, t1511; RV64-NEXT: vaaddu.vv v8, v8, v10512; RV64-NEXT: vs2r.v v8, (s2)513; RV64-NEXT: add s2, s2, t1514; RV64-NEXT: add s0, s0, t1515; RV64-NEXT: bnez s3, .LBB0_9516; RV64-NEXT: # %bb.10: # %middle.block517; RV64-NEXT: # in Loop: Header=BB0_6 Depth=1518; RV64-NEXT: beq t6, a6, .LBB0_5519; RV64-NEXT: .LBB0_11: # %for.body4.us.preheader520; RV64-NEXT: # in Loop: Header=BB0_6 Depth=1521; RV64-NEXT: mul s2, a1, t2522; RV64-NEXT: add s0, a0, t6523; RV64-NEXT: add s1, a4, t6524; RV64-NEXT: add s2, t4, s2525; RV64-NEXT: add t6, a2, t6526; RV64-NEXT: .LBB0_12: # %for.body4.us527; RV64-NEXT: # Parent Loop BB0_6 Depth=1528; RV64-NEXT: # => This Inner Loop Header: Depth=2529; RV64-NEXT: lbu s3, 0(t6)530; RV64-NEXT: lbu s4, 0(s1)531; RV64-NEXT: add s3, s3, s4532; RV64-NEXT: addi s3, s3, 1533; RV64-NEXT: srli s3, s3, 1534; RV64-NEXT: sb s3, 0(s0)535; RV64-NEXT: addi s0, s0, 1536; RV64-NEXT: addi s1, s1, 1537; RV64-NEXT: addi t6, t6, 1538; RV64-NEXT: bne s0, s2, .LBB0_12539; RV64-NEXT: j .LBB0_5540; RV64-NEXT: .LBB0_13:541; RV64-NEXT: ld s0, 40(sp) # 8-byte Folded Reload542; RV64-NEXT: ld s1, 32(sp) # 8-byte Folded Reload543; RV64-NEXT: ld s2, 24(sp) # 8-byte Folded Reload544; RV64-NEXT: ld s3, 16(sp) # 8-byte Folded Reload545; RV64-NEXT: ld s4, 8(sp) # 8-byte Folded Reload546; RV64-NEXT: .cfi_restore s0547; RV64-NEXT: .cfi_restore s1548; RV64-NEXT: .cfi_restore s2549; RV64-NEXT: .cfi_restore s3550; RV64-NEXT: .cfi_restore s4551; RV64-NEXT: addi sp, sp, 48552; RV64-NEXT: .cfi_def_cfa_offset 0553; RV64-NEXT: .LBB0_14: # %for.cond.cleanup554; RV64-NEXT: ret555entry:556 %cmp29 = icmp sgt i32 %i_height, 0557 br i1 %cmp29, label %for.cond1.preheader.lr.ph, label %for.cond.cleanup558 559for.cond1.preheader.lr.ph: ; preds = %entry560 %cmp227 = icmp sgt i32 %i_width, 0561 %idx.ext = sext i32 %i_dst_stride to i64562 %idx.ext12 = sext i32 %i_src1_stride to i64563 %idx.ext14 = sext i32 %i_src2_stride to i64564 br i1 %cmp227, label %for.cond1.preheader.us.preheader, label %for.cond.cleanup565 566for.cond1.preheader.us.preheader: ; preds = %for.cond1.preheader.lr.ph567 %wide.trip.count = zext nneg i32 %i_width to i64568 %0 = add nsw i32 %i_height, -1569 %1 = zext i32 %0 to i64570 %2 = mul nsw i64 %idx.ext, %1571 %3 = getelementptr i8, ptr %dst, i64 %2572 %scevgep = getelementptr i8, ptr %3, i64 %wide.trip.count573 %4 = mul nsw i64 %idx.ext12, %1574 %5 = getelementptr i8, ptr %src1, i64 %4575 %scevgep36 = getelementptr i8, ptr %5, i64 %wide.trip.count576 %6 = mul nsw i64 %idx.ext14, %1577 %7 = getelementptr i8, ptr %src2, i64 %6578 %scevgep37 = getelementptr i8, ptr %7, i64 %wide.trip.count579 %8 = tail call i64 @llvm.vscale.i64()580 %9 = shl nuw nsw i64 %8, 4581 %10 = tail call i64 @llvm.umax.i64(i64 %9, i64 32)582 %min.iters.check = icmp ugt i64 %10, %wide.trip.count583 %bound0 = icmp ult ptr %dst, %scevgep36584 %bound1 = icmp ult ptr %src1, %scevgep585 %found.conflict = and i1 %bound0, %bound1586 %11 = or i32 %i_dst_stride, %i_src1_stride587 %12 = icmp slt i32 %11, 0588 %13 = or i1 %found.conflict, %12589 %bound039 = icmp ult ptr %dst, %scevgep37590 %bound140 = icmp ult ptr %src2, %scevgep591 %found.conflict41 = and i1 %bound039, %bound140592 %14 = or i32 %i_dst_stride, %i_src2_stride593 %15 = icmp slt i32 %14, 0594 %16 = or i1 %found.conflict41, %15595 %conflict.rdx = or i1 %13, %16596 br label %for.cond1.preheader.us597 598for.cond1.preheader.us: ; preds = %for.cond1.preheader.us.preheader, %for.cond1.for.cond.cleanup3_crit_edge.us599 %y.033.us = phi i32 [ %inc17.us, %for.cond1.for.cond.cleanup3_crit_edge.us ], [ 0, %for.cond1.preheader.us.preheader ]600 %dst.addr.032.us = phi ptr [ %add.ptr.us, %for.cond1.for.cond.cleanup3_crit_edge.us ], [ %dst, %for.cond1.preheader.us.preheader ]601 %src1.addr.031.us = phi ptr [ %add.ptr13.us, %for.cond1.for.cond.cleanup3_crit_edge.us ], [ %src1, %for.cond1.preheader.us.preheader ]602 %src2.addr.030.us = phi ptr [ %add.ptr15.us, %for.cond1.for.cond.cleanup3_crit_edge.us ], [ %src2, %for.cond1.preheader.us.preheader ]603 %brmerge = select i1 %min.iters.check, i1 true, i1 %conflict.rdx604 br i1 %brmerge, label %for.body4.us.preheader, label %vector.ph605 606vector.ph: ; preds = %for.cond1.preheader.us607 %17 = tail call i64 @llvm.vscale.i64()608 %.neg = mul nuw nsw i64 %17, 2147483632609 %n.vec = and i64 %.neg, %wide.trip.count610 %18 = tail call i64 @llvm.vscale.i64()611 %19 = shl nuw nsw i64 %18, 4612 br label %vector.body613 614vector.body: ; preds = %vector.body, %vector.ph615 %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]616 %20 = getelementptr inbounds i8, ptr %src1.addr.031.us, i64 %index617 %wide.load = load <vscale x 16 x i8>, ptr %20, align 1618 %21 = zext <vscale x 16 x i8> %wide.load to <vscale x 16 x i16>619 %22 = getelementptr inbounds i8, ptr %src2.addr.030.us, i64 %index620 %wide.load44 = load <vscale x 16 x i8>, ptr %22, align 1621 %23 = zext <vscale x 16 x i8> %wide.load44 to <vscale x 16 x i16>622 %24 = add nuw nsw <vscale x 16 x i16> %21, shufflevector (<vscale x 16 x i16> insertelement (<vscale x 16 x i16> poison, i16 1, i64 0), <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer)623 %25 = add nuw nsw <vscale x 16 x i16> %24, %23624 %26 = lshr <vscale x 16 x i16> %25, shufflevector (<vscale x 16 x i16> insertelement (<vscale x 16 x i16> poison, i16 1, i64 0), <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer)625 %27 = trunc <vscale x 16 x i16> %26 to <vscale x 16 x i8>626 %28 = getelementptr inbounds i8, ptr %dst.addr.032.us, i64 %index627 store <vscale x 16 x i8> %27, ptr %28, align 1628 %index.next = add nuw i64 %index, %19629 %29 = icmp eq i64 %index.next, %n.vec630 br i1 %29, label %middle.block, label %vector.body631 632middle.block: ; preds = %vector.body633 %cmp.n = icmp eq i64 %n.vec, %wide.trip.count634 br i1 %cmp.n, label %for.cond1.for.cond.cleanup3_crit_edge.us, label %for.body4.us.preheader635 636for.body4.us.preheader: ; preds = %for.cond1.preheader.us, %middle.block637 %indvars.iv.ph = phi i64 [ 0, %for.cond1.preheader.us ], [ %n.vec, %middle.block ]638 br label %for.body4.us639 640for.body4.us: ; preds = %for.body4.us.preheader, %for.body4.us641 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body4.us ], [ %indvars.iv.ph, %for.body4.us.preheader ]642 %arrayidx.us = getelementptr inbounds i8, ptr %src1.addr.031.us, i64 %indvars.iv643 %30 = load i8, ptr %arrayidx.us, align 1644 %conv.us = zext i8 %30 to i16645 %arrayidx6.us = getelementptr inbounds i8, ptr %src2.addr.030.us, i64 %indvars.iv646 %31 = load i8, ptr %arrayidx6.us, align 1647 %conv7.us = zext i8 %31 to i16648 %add.us = add nuw nsw i16 %conv.us, 1649 %add8.us = add nuw nsw i16 %add.us, %conv7.us650 %shr.us = lshr i16 %add8.us, 1651 %conv9.us = trunc nuw i16 %shr.us to i8652 %arrayidx11.us = getelementptr inbounds i8, ptr %dst.addr.032.us, i64 %indvars.iv653 store i8 %conv9.us, ptr %arrayidx11.us, align 1654 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1655 %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count656 br i1 %exitcond.not, label %for.cond1.for.cond.cleanup3_crit_edge.us, label %for.body4.us657 658for.cond1.for.cond.cleanup3_crit_edge.us: ; preds = %for.body4.us, %middle.block659 %add.ptr.us = getelementptr inbounds i8, ptr %dst.addr.032.us, i64 %idx.ext660 %add.ptr13.us = getelementptr inbounds i8, ptr %src1.addr.031.us, i64 %idx.ext12661 %add.ptr15.us = getelementptr inbounds i8, ptr %src2.addr.030.us, i64 %idx.ext14662 %inc17.us = add nuw nsw i32 %y.033.us, 1663 %exitcond35.not = icmp eq i32 %inc17.us, %i_height664 br i1 %exitcond35.not, label %for.cond.cleanup, label %for.cond1.preheader.us665 666for.cond.cleanup: ; preds = %for.cond1.for.cond.cleanup3_crit_edge.us, %for.cond1.preheader.lr.ph, %entry667 ret void668}669