202 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -mtriple riscv64 -mattr=+m,+v -run-pass=prologepilog \3# RUN: -riscv-v-vector-bits-min=512 -o - %s | FileCheck %s4#5# Stack layout of this program6# |--------------------------| -- <-- Incoming SP7# | a7 (Vaarg) |8# | ------------------------ | -- <-- New SP + vlenb + 729# | a6 (Vaarg) |10# | ------------------------ | -- <-- New SP + vlenb + 6411# | ra (Callee-saved reg) |12# | ------------------------ | -- <-- New SP + vlenb + 5613# | s0 (Callee-saved reg) |14# | ------------------------ | -- <-- New SP + vlenb + 4815# | s1 (Callee-saved reg) |16# | ------------------------ | -- <-- New SP + vlenb + 4017# | 8 bytes of padding |18# | ------------------------ | -- <-- New SP + vlenb19# | v8 (RVV objects) |20# | ------------------------ | -- <-- New SP + 3221# | buf1 |22# |--------------------------| -- <-- New SP + 1623# | Stack ID 5 |24# |--------------------------| -- <-- New SP + 825# | Stack ID 6 |26# |--------------------------| -- <-- New SP27 28--- |29 source_filename = "wrong-stack-offset-for-rvv-object.ll"30 target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"31 target triple = "riscv64"32 33 %struct = type { i32 }34 35 define void @asm_fprintf(%struct %file, ptr %p, ptr %buf, ptr %arrayidx3, ptr %0, ptr %1, ...) #0 {36 entry:37 %buf1 = alloca [10 x i8], i32 0, align 838 %arrayidx32 = getelementptr inbounds [10 x i8], ptr %buf, i64 0, i64 139 br label %while.cond40 41 while.cond: ; preds = %while.cond, %sw.bb, %entry42 %incdec.ptr = getelementptr inbounds i8, ptr undef, i64 143 %2 = load i8, ptr null, align 144 %3 = zext i8 0 to i6445 %cond = icmp eq i64 %3, 046 br i1 %cond, label %sw.bb, label %while.cond47 48 sw.bb: ; preds = %while.cond49 %4 = load i8, ptr null, align 150 store <2 x i8> zeroinitializer, ptr %0, align 151 %call = call i32 (ptr, ...) @fprintf(ptr %p)52 br label %while.cond53 }54 55 declare i32 @fprintf(ptr, ...) #056 57 attributes #0 = { "target-features"="+m,+v" }58 59...60---61name: asm_fprintf62alignment: 463exposesReturnsTwice: false64legalized: false65regBankSelected: false66selected: false67failedISel: false68tracksRegLiveness: true69hasWinCFI: false70failsVerification: false71tracksDebugUserValues: true72registers: []73liveins:74 - { reg: '$x11', virtual-reg: '' }75 - { reg: '$x14', virtual-reg: '' }76 - { reg: '$x16', virtual-reg: '' }77 - { reg: '$x17', virtual-reg: '' }78frameInfo:79 isFrameAddressTaken: false80 isReturnAddressTaken: false81 hasStackMap: false82 hasPatchPoint: false83 stackSize: 084 offsetAdjustment: 085 maxAlignment: 886 adjustsStack: true87 hasCalls: true88 stackProtector: ''89 maxCallFrameSize: 429496729590 cvBytesOfCalleeSavedRegisters: 091 hasOpaqueSPAdjustment: false92 hasVAStart: false93 hasMustTailInVarArgFunc: false94 hasTailCall: false95 localFrameSize: 096 savePoint: []97 restorePoint: []98fixedStack:99 - { id: 0, type: default, offset: -8, size: 8, alignment: 8, stack-id: default,100 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,101 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }102 - { id: 1, type: default, offset: -16, size: 8, alignment: 16, stack-id: default,103 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,104 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }105 - { id: 2, type: default, offset: -16, size: 8, alignment: 16, stack-id: default,106 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,107 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }108stack:109 - { id: 0, name: buf1, type: default, offset: 0, size: 1, alignment: 8,110 stack-id: default, callee-saved-register: '', callee-saved-restored: true,111 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }112 - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 8,113 stack-id: scalable-vector, callee-saved-register: '', callee-saved-restored: true,114 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }115callSites: []116debugValueSubstitutions: []117constants: []118machineFunctionInfo:119 varArgsFrameIndex: -1120 varArgsSaveSize: 16121body: |122 ; CHECK-LABEL: name: asm_fprintf123 ; CHECK: bb.0.entry:124 ; CHECK-NEXT: successors: %bb.1(0x80000000)125 ; CHECK-NEXT: liveins: $x11, $x14, $x16, $x17, $x1, $x8, $x9126 ; CHECK-NEXT: {{ $}}127 ; CHECK-NEXT: $x2 = frame-setup ADDI $x2, -80128 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 80129 ; CHECK-NEXT: SD killed $x1, $x2, 56 :: (store (s64) into %stack.2)130 ; CHECK-NEXT: SD killed $x8, $x2, 48 :: (store (s64) into %stack.3)131 ; CHECK-NEXT: SD killed $x9, $x2, 40 :: (store (s64) into %stack.4)132 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $x1, -24133 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $x8, -32134 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $x9, -40135 ; CHECK-NEXT: $x10 = frame-setup PseudoReadVLENB136 ; CHECK-NEXT: $x2 = frame-setup SUB $x2, killed $x10137 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xd0, 0x00, 0x22, 0x11, 0x01, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22138 ; CHECK-NEXT: renamable $x8 = COPY $x14139 ; CHECK-NEXT: renamable $x9 = COPY $x11140 ; CHECK-NEXT: $x10 = PseudoReadVLENB141 ; CHECK-NEXT: $x10 = ADD $x2, killed $x10142 ; CHECK-NEXT: SD killed renamable $x17, killed $x10, 72 :: (store (s64))143 ; CHECK-NEXT: $x10 = PseudoReadVLENB144 ; CHECK-NEXT: $x10 = ADD $x2, killed $x10145 ; CHECK-NEXT: SD killed renamable $x16, killed $x10, 64 :: (store (s64) into %fixed-stack.1, align 16)146 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 2, 69 /* e8, mf8, ta, mu */, implicit-def $vl, implicit-def $vtype147 ; CHECK-NEXT: renamable $v8 = PseudoVMV_V_I_MF8 undef $v8, 0, 2, 3 /* e8 */, 0 /* tu, mu */, implicit $vl, implicit $vtype148 ; CHECK-NEXT: $x10 = ADDI $x2, 32149 ; CHECK-NEXT: VS1R_V killed renamable $v8, killed $x10 :: (store unknown-size into %stack.1, align 8)150 ; CHECK-NEXT: {{ $}}151 ; CHECK-NEXT: bb.1.while.cond:152 ; CHECK-NEXT: successors: %bb.2(0x30000000), %bb.1(0x50000000)153 ; CHECK-NEXT: liveins: $x8, $x9154 ; CHECK-NEXT: {{ $}}155 ; CHECK-NEXT: BNE $x0, $x0, %bb.1156 ; CHECK-NEXT: PseudoBR %bb.2157 ; CHECK-NEXT: {{ $}}158 ; CHECK-NEXT: bb.2.sw.bb:159 ; CHECK-NEXT: successors: %bb.1(0x80000000)160 ; CHECK-NEXT: liveins: $x8, $x9161 ; CHECK-NEXT: {{ $}}162 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 2, 69 /* e8, mf8, ta, mu */, implicit-def $vl, implicit-def $vtype163 ; CHECK-NEXT: $x10 = ADDI $x2, 32164 ; CHECK-NEXT: renamable $v8 = VL1RE8_V killed $x10 :: (load unknown-size from %stack.1, align 8)165 ; CHECK-NEXT: PseudoVSE8_V_MF8 killed renamable $v8, renamable $x8, 2, 3 /* e8 */, implicit $vl, implicit $vtype :: (store (s16) into %ir.0, align 1)166 ; CHECK-NEXT: $x10 = COPY renamable $x9167 ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) @fprintf, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2, implicit-def dead $x10168 ; CHECK-NEXT: PseudoBR %bb.1169 bb.0.entry:170 successors: %bb.1(0x80000000)171 liveins: $x11, $x14, $x16, $x17172 173 renamable $x8 = COPY $x14174 renamable $x9 = COPY $x11175 SD killed renamable $x17, %fixed-stack.0, 0 :: (store (s64))176 SD killed renamable $x16, %fixed-stack.1, 0 :: (store (s64) into %fixed-stack.1, align 16)177 dead $x0 = PseudoVSETIVLI 2, 69, implicit-def $vl, implicit-def $vtype178 renamable $v8 = PseudoVMV_V_I_MF8 undef $v8, 0, 2, 3, 0, implicit $vl, implicit $vtype179 VS1R_V killed renamable $v8, %stack.1 :: (store unknown-size into %stack.1, align 8)180 181 bb.1.while.cond:182 successors: %bb.2(0x30000000), %bb.1(0x50000000)183 liveins: $x8, $x9184 185 BNE $x0, $x0, %bb.1186 PseudoBR %bb.2187 188 bb.2.sw.bb:189 successors: %bb.1(0x80000000)190 liveins: $x8, $x9191 192 dead $x0 = PseudoVSETIVLI 2, 69, implicit-def $vl, implicit-def $vtype193 renamable $v8 = VL1RE8_V %stack.1 :: (load unknown-size from %stack.1, align 8)194 PseudoVSE8_V_MF8 killed renamable $v8, renamable $x8, 2, 3, implicit $vl, implicit $vtype :: (store (s16) into %ir.0, align 1)195 ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2196 $x10 = COPY renamable $x9197 PseudoCALL target-flags(riscv-call) @fprintf, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2, implicit-def dead $x10198 ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2199 PseudoBR %bb.1200 201...202