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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv64 -mattr=+v -stop-after=prologepilog %s -o - 2>&1 | FileCheck %s3 4--- |5 define void @zvlsseg_spill_0(ptr %base, i64 %vl) {6 ret void7 }8 define void @zvlsseg_spill_1(ptr %base, i64 %vl) {9 ret void10 }11...12---13name: zvlsseg_spill_014tracksRegLiveness: true15stack:16 - { id: 0, offset: 0, size: 64, alignment: 8, stack-id: scalable-vector }17body: |18 bb.0:19 liveins: $x10, $x1120 21 ; CHECK-LABEL: name: zvlsseg_spill_022 ; CHECK: liveins: $x10, $x1123 ; CHECK-NEXT: {{ $}}24 ; CHECK-NEXT: $x2 = frame-setup ADDI $x2, -1625 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 1626 ; CHECK-NEXT: $x12 = frame-setup PseudoReadVLENB27 ; CHECK-NEXT: $x12 = frame-setup SLLI killed $x12, 328 ; CHECK-NEXT: $x2 = frame-setup SUB $x2, killed $x1229 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x2230 ; CHECK-NEXT: dead $x0 = PseudoVSETVLI killed renamable $x11, 216 /* e64, m1, ta, ma */, implicit-def $vl, implicit-def $vtype31 ; CHECK-NEXT: $v0_v1_v2_v3_v4_v5_v6 = PseudoVLSEG7E64_V_M1 undef $v0_v1_v2_v3_v4_v5_v6, renamable $x10, $noreg, 6 /* e64 */, 0 /* tu, mu */, implicit $vl, implicit $vtype32 ; CHECK-NEXT: $x11 = ADDI $x2, 1633 ; CHECK-NEXT: VS4R_V $v0m4, $x11, implicit $v0_v1_v2_v3_v4_v5_v6 :: (store (<vscale x 1 x s256>) into %stack.0, align 8)34 ; CHECK-NEXT: $x12 = PseudoReadVLENB35 ; CHECK-NEXT: $x12 = SLLI killed $x12, 236 ; CHECK-NEXT: $x11 = ADD killed $x11, $x1237 ; CHECK-NEXT: VS2R_V $v4m2, $x11, implicit $v0_v1_v2_v3_v4_v5_v6 :: (store (<vscale x 1 x s128>) into %stack.0, align 8)38 ; CHECK-NEXT: $x12 = SRLI killed $x12, 139 ; CHECK-NEXT: $x11 = ADD killed $x11, killed $x1240 ; CHECK-NEXT: VS1R_V $v6, killed $x11, implicit $v0_v1_v2_v3_v4_v5_v6 :: (store (<vscale x 1 x s64>) into %stack.0)41 ; CHECK-NEXT: $x11 = ADDI $x2, 1642 ; CHECK-NEXT: $v7 = VL1RE8_V $x11 :: (load (<vscale x 1 x s64>) from %stack.0)43 ; CHECK-NEXT: $x12 = PseudoReadVLENB44 ; CHECK-NEXT: $x11 = ADD killed $x11, $x1245 ; CHECK-NEXT: $v8m4 = VL4RE8_V $x11 :: (load (<vscale x 1 x s256>) from %stack.0, align 8)46 ; CHECK-NEXT: $x12 = SLLI killed $x12, 247 ; CHECK-NEXT: $x11 = ADD killed $x11, killed $x1248 ; CHECK-NEXT: $v12m2 = VL2RE8_V killed $x11 :: (load (<vscale x 1 x s128>) from %stack.0, align 8)49 ; CHECK-NEXT: VS1R_V killed $v8, killed renamable $x1050 ; CHECK-NEXT: $x10 = frame-destroy PseudoReadVLENB51 ; CHECK-NEXT: $x10 = frame-destroy SLLI killed $x10, 352 ; CHECK-NEXT: $x2 = frame-destroy ADD $x2, killed $x1053 ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa $x2, 1654 ; CHECK-NEXT: $x2 = frame-destroy ADDI $x2, 1655 ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_offset 056 ; CHECK-NEXT: PseudoRET57 %0:gpr = COPY $x1058 %1:gprnox0 = COPY $x1159 $v0_v1_v2_v3_v4_v5_v6 = PseudoVLSEG7E64_V_M1 undef $v0_v1_v2_v3_v4_v5_v6, %0, %1, 6, 060 PseudoVSPILL7_M1 killed renamable $v0_v1_v2_v3_v4_v5_v6, %stack.0 :: (store (<vscale x 7 x s64>) into %stack.0, align 8)61 renamable $v7_v8_v9_v10_v11_v12_v13 = PseudoVRELOAD7_M1 %stack.0 :: (load (<vscale x 7 x s64>) from %stack.0, align 8)62 VS1R_V killed $v8, %0:gpr63 PseudoRET64...65 66---67name: zvlsseg_spill_168tracksRegLiveness: true69stack:70 - { id: 0, offset: 0, size: 64, alignment: 8, stack-id: scalable-vector }71body: |72 bb.0:73 liveins: $x10, $x1174 ; CHECK-LABEL: name: zvlsseg_spill_175 ; CHECK: liveins: $x10, $x1176 ; CHECK-NEXT: {{ $}}77 ; CHECK-NEXT: $x2 = frame-setup ADDI $x2, -1678 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 1679 ; CHECK-NEXT: $x12 = frame-setup PseudoReadVLENB80 ; CHECK-NEXT: $x12 = frame-setup SLLI killed $x12, 381 ; CHECK-NEXT: $x2 = frame-setup SUB $x2, killed $x1282 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x2283 ; CHECK-NEXT: dead $x0 = PseudoVSETVLI killed renamable $x11, 216 /* e64, m1, ta, ma */, implicit-def $vl, implicit-def $vtype84 ; CHECK-NEXT: $v1_v2_v3_v4_v5_v6_v7 = PseudoVLSEG7E64_V_M1 undef $v1_v2_v3_v4_v5_v6_v7, renamable $x10, $noreg, 6 /* e64 */, 0 /* tu, mu */, implicit $vl, implicit $vtype85 ; CHECK-NEXT: $x11 = ADDI $x2, 1686 ; CHECK-NEXT: VS1R_V $v1, $x11, implicit $v1_v2_v3_v4_v5_v6_v7 :: (store (<vscale x 1 x s64>) into %stack.0)87 ; CHECK-NEXT: $x12 = PseudoReadVLENB88 ; CHECK-NEXT: $x11 = ADD killed $x11, $x1289 ; CHECK-NEXT: VS2R_V $v2m2, $x11, implicit $v1_v2_v3_v4_v5_v6_v7 :: (store (<vscale x 1 x s128>) into %stack.0, align 8)90 ; CHECK-NEXT: $x12 = SLLI killed $x12, 191 ; CHECK-NEXT: $x11 = ADD killed $x11, killed $x1292 ; CHECK-NEXT: VS4R_V $v4m4, killed $x11, implicit $v1_v2_v3_v4_v5_v6_v7 :: (store (<vscale x 1 x s256>) into %stack.0, align 8)93 ; CHECK-NEXT: $x11 = ADDI $x2, 1694 ; CHECK-NEXT: $v10m2 = VL2RE8_V $x11 :: (load (<vscale x 1 x s128>) from %stack.0, align 8)95 ; CHECK-NEXT: $x12 = PseudoReadVLENB96 ; CHECK-NEXT: $x12 = SLLI killed $x12, 197 ; CHECK-NEXT: $x11 = ADD killed $x11, $x1298 ; CHECK-NEXT: $v12m4 = VL4RE8_V $x11 :: (load (<vscale x 1 x s256>) from %stack.0, align 8)99 ; CHECK-NEXT: $x12 = SLLI killed $x12, 1100 ; CHECK-NEXT: $x11 = ADD killed $x11, killed $x12101 ; CHECK-NEXT: $v16 = VL1RE8_V killed $x11 :: (load (<vscale x 1 x s64>) from %stack.0)102 ; CHECK-NEXT: VS1R_V killed $v10, killed renamable $x10103 ; CHECK-NEXT: $x10 = frame-destroy PseudoReadVLENB104 ; CHECK-NEXT: $x10 = frame-destroy SLLI killed $x10, 3105 ; CHECK-NEXT: $x2 = frame-destroy ADD $x2, killed $x10106 ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa $x2, 16107 ; CHECK-NEXT: $x2 = frame-destroy ADDI $x2, 16108 ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_offset 0109 ; CHECK-NEXT: PseudoRET110 %0:gpr = COPY $x10111 %1:gprnox0 = COPY $x11112 $v1_v2_v3_v4_v5_v6_v7 = PseudoVLSEG7E64_V_M1 undef $v1_v2_v3_v4_v5_v6_v7, %0, %1, 6, 0113 PseudoVSPILL7_M1 killed renamable $v1_v2_v3_v4_v5_v6_v7, %stack.0 :: (store (<vscale x 7 x s64>) into %stack.0, align 8)114 renamable $v10_v11_v12_v13_v14_v15_v16 = PseudoVRELOAD7_M1 %stack.0 :: (load (<vscale x 7 x s64>) from %stack.0, align 8)115 VS1R_V killed $v10, %0:gpr116 PseudoRET117...118