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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefixes=RV32,RV32I %s4; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \5; RUN: | FileCheck -check-prefixes=RV64I %s6; RUN: llc -mtriple=riscv64 -mcpu=sifive-u74 -verify-machineinstrs < %s \7; RUN: | FileCheck -check-prefix=SFB64 %s8; RUN: llc -mtriple=riscv64 -mattr=+xventanacondops -verify-machineinstrs < %s \9; RUN: | FileCheck -check-prefixes=VTCONDOPS64 %s10; RUN: llc -mtriple=riscv32 -mattr=+zicond -verify-machineinstrs < %s \11; RUN: | FileCheck -check-prefixes=RV32,ZICOND,ZICOND32 %s12; RUN: llc -mtriple=riscv64 -mattr=+zicond -verify-machineinstrs < %s \13; RUN: | FileCheck -check-prefixes=ZICOND,ZICOND64 %s14; RUN: llc -mtriple=riscv64 -mattr=+c,+conditional-cmv-fusion \15; RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=CMV-FUSION %s16 17; InstCombine canonicalizes (c ? x | y : x) to (x | (c ? y : 0)) similar for18; other binary operations using their identity value as the constant.19 20; We can reverse this for and/or/xor. Allowing us to pull the binop into21; the basic block we create when we expand select.22 23define signext i32 @and_select_all_ones_i32(i1 zeroext %c, i32 signext %x, i32 signext %y) {24; RV32I-LABEL: and_select_all_ones_i32:25; RV32I: # %bb.0:26; RV32I-NEXT: addi a0, a0, -127; RV32I-NEXT: or a0, a0, a128; RV32I-NEXT: and a0, a0, a229; RV32I-NEXT: ret30;31; RV64I-LABEL: and_select_all_ones_i32:32; RV64I: # %bb.0:33; RV64I-NEXT: addi a0, a0, -134; RV64I-NEXT: or a0, a0, a135; RV64I-NEXT: and a0, a0, a236; RV64I-NEXT: ret37;38; SFB64-LABEL: and_select_all_ones_i32:39; SFB64: # %bb.0:40; SFB64-NEXT: beqz a0, .LBB0_241; SFB64-NEXT: # %bb.1:42; SFB64-NEXT: and a2, a2, a143; SFB64-NEXT: .LBB0_2:44; SFB64-NEXT: mv a0, a245; SFB64-NEXT: ret46;47; VTCONDOPS64-LABEL: and_select_all_ones_i32:48; VTCONDOPS64: # %bb.0:49; VTCONDOPS64-NEXT: vt.maskcn a0, a2, a050; VTCONDOPS64-NEXT: and a1, a2, a151; VTCONDOPS64-NEXT: or a0, a1, a052; VTCONDOPS64-NEXT: ret53;54; ZICOND-LABEL: and_select_all_ones_i32:55; ZICOND: # %bb.0:56; ZICOND-NEXT: czero.nez a0, a2, a057; ZICOND-NEXT: and a1, a2, a158; ZICOND-NEXT: or a0, a1, a059; ZICOND-NEXT: ret60;61; CMV-FUSION-LABEL: and_select_all_ones_i32:62; CMV-FUSION: # %bb.0:63; CMV-FUSION-NEXT: and a1, a1, a264; CMV-FUSION-NEXT: bnez a0, .LBB0_265; CMV-FUSION-NEXT: # %bb.1:66; CMV-FUSION-NEXT: mv a1, a267; CMV-FUSION-NEXT: .LBB0_2:68; CMV-FUSION-NEXT: mv a0, a169; CMV-FUSION-NEXT: ret70 %a = select i1 %c, i32 %x, i32 -171 %b = and i32 %a, %y72 ret i32 %b73}74 75define signext i32 @and_select_all_ones_i32_cmp(i32 signext %x, i32 signext %y, i32 signext %z) {76; RV32I-LABEL: and_select_all_ones_i32_cmp:77; RV32I: # %bb.0:78; RV32I-NEXT: addi a2, a2, -479; RV32I-NEXT: seqz a2, a280; RV32I-NEXT: addi a2, a2, -181; RV32I-NEXT: or a0, a2, a082; RV32I-NEXT: and a0, a0, a183; RV32I-NEXT: ret84;85; RV64I-LABEL: and_select_all_ones_i32_cmp:86; RV64I: # %bb.0:87; RV64I-NEXT: addi a2, a2, -488; RV64I-NEXT: seqz a2, a289; RV64I-NEXT: addi a2, a2, -190; RV64I-NEXT: or a0, a2, a091; RV64I-NEXT: and a0, a0, a192; RV64I-NEXT: ret93;94; SFB64-LABEL: and_select_all_ones_i32_cmp:95; SFB64: # %bb.0:96; SFB64-NEXT: li a3, 497; SFB64-NEXT: bne a2, a3, .LBB1_298; SFB64-NEXT: # %bb.1:99; SFB64-NEXT: and a1, a1, a0100; SFB64-NEXT: .LBB1_2:101; SFB64-NEXT: mv a0, a1102; SFB64-NEXT: ret103;104; VTCONDOPS64-LABEL: and_select_all_ones_i32_cmp:105; VTCONDOPS64: # %bb.0:106; VTCONDOPS64-NEXT: addi a2, a2, -4107; VTCONDOPS64-NEXT: and a0, a1, a0108; VTCONDOPS64-NEXT: vt.maskc a1, a1, a2109; VTCONDOPS64-NEXT: or a0, a0, a1110; VTCONDOPS64-NEXT: ret111;112; ZICOND-LABEL: and_select_all_ones_i32_cmp:113; ZICOND: # %bb.0:114; ZICOND-NEXT: addi a2, a2, -4115; ZICOND-NEXT: and a0, a1, a0116; ZICOND-NEXT: czero.eqz a1, a1, a2117; ZICOND-NEXT: or a0, a0, a1118; ZICOND-NEXT: ret119;120; CMV-FUSION-LABEL: and_select_all_ones_i32_cmp:121; CMV-FUSION: # %bb.0:122; CMV-FUSION-NEXT: and a0, a0, a1123; CMV-FUSION-NEXT: li a3, 4124; CMV-FUSION-NEXT: beq a2, a3, .LBB1_2125; CMV-FUSION-NEXT: # %bb.1:126; CMV-FUSION-NEXT: mv a0, a1127; CMV-FUSION-NEXT: .LBB1_2:128; CMV-FUSION-NEXT: ret129 %c = icmp eq i32 %z, 4130 %a = select i1 %c, i32 %x, i32 -1131 %b = and i32 %a, %y132 ret i32 %b133}134 135define signext i32 @and_select_all_ones_i32_cmp2(i32 signext %x, i32 signext %y, i32 signext %z) {136; RV32I-LABEL: and_select_all_ones_i32_cmp2:137; RV32I: # %bb.0:138; RV32I-NEXT: slti a2, a2, 4139; RV32I-NEXT: addi a2, a2, -1140; RV32I-NEXT: or a0, a2, a0141; RV32I-NEXT: and a0, a0, a1142; RV32I-NEXT: ret143;144; RV64I-LABEL: and_select_all_ones_i32_cmp2:145; RV64I: # %bb.0:146; RV64I-NEXT: slti a2, a2, 4147; RV64I-NEXT: addi a2, a2, -1148; RV64I-NEXT: or a0, a2, a0149; RV64I-NEXT: and a0, a0, a1150; RV64I-NEXT: ret151;152; SFB64-LABEL: and_select_all_ones_i32_cmp2:153; SFB64: # %bb.0:154; SFB64-NEXT: li a3, 4155; SFB64-NEXT: bge a2, a3, .LBB2_2156; SFB64-NEXT: # %bb.1:157; SFB64-NEXT: and a1, a1, a0158; SFB64-NEXT: .LBB2_2:159; SFB64-NEXT: mv a0, a1160; SFB64-NEXT: ret161;162; VTCONDOPS64-LABEL: and_select_all_ones_i32_cmp2:163; VTCONDOPS64: # %bb.0:164; VTCONDOPS64-NEXT: slti a2, a2, 4165; VTCONDOPS64-NEXT: and a0, a1, a0166; VTCONDOPS64-NEXT: vt.maskcn a1, a1, a2167; VTCONDOPS64-NEXT: or a0, a0, a1168; VTCONDOPS64-NEXT: ret169;170; ZICOND-LABEL: and_select_all_ones_i32_cmp2:171; ZICOND: # %bb.0:172; ZICOND-NEXT: slti a2, a2, 4173; ZICOND-NEXT: and a0, a1, a0174; ZICOND-NEXT: czero.nez a1, a1, a2175; ZICOND-NEXT: or a0, a0, a1176; ZICOND-NEXT: ret177;178; CMV-FUSION-LABEL: and_select_all_ones_i32_cmp2:179; CMV-FUSION: # %bb.0:180; CMV-FUSION-NEXT: and a0, a0, a1181; CMV-FUSION-NEXT: li a3, 4182; CMV-FUSION-NEXT: blt a2, a3, .LBB2_2183; CMV-FUSION-NEXT: # %bb.1:184; CMV-FUSION-NEXT: mv a0, a1185; CMV-FUSION-NEXT: .LBB2_2:186; CMV-FUSION-NEXT: ret187 %c = icmp slt i32 %z, 4188 %a = select i1 %c, i32 %x, i32 -1189 %b = and i32 %a, %y190 ret i32 %b191}192 193define i64 @and_select_all_ones_i64(i1 zeroext %c, i64 %x, i64 %y) {194; RV32-LABEL: and_select_all_ones_i64:195; RV32: # %bb.0:196; RV32-NEXT: neg a0, a0197; RV32-NEXT: or a2, a0, a2198; RV32-NEXT: or a0, a0, a1199; RV32-NEXT: and a0, a3, a0200; RV32-NEXT: and a1, a4, a2201; RV32-NEXT: ret202;203; RV64I-LABEL: and_select_all_ones_i64:204; RV64I: # %bb.0:205; RV64I-NEXT: neg a0, a0206; RV64I-NEXT: or a0, a0, a1207; RV64I-NEXT: and a0, a2, a0208; RV64I-NEXT: ret209;210; SFB64-LABEL: and_select_all_ones_i64:211; SFB64: # %bb.0:212; SFB64-NEXT: bnez a0, .LBB3_2213; SFB64-NEXT: # %bb.1:214; SFB64-NEXT: and a2, a2, a1215; SFB64-NEXT: .LBB3_2:216; SFB64-NEXT: mv a0, a2217; SFB64-NEXT: ret218;219; VTCONDOPS64-LABEL: and_select_all_ones_i64:220; VTCONDOPS64: # %bb.0:221; VTCONDOPS64-NEXT: vt.maskc a0, a2, a0222; VTCONDOPS64-NEXT: and a1, a2, a1223; VTCONDOPS64-NEXT: or a0, a1, a0224; VTCONDOPS64-NEXT: ret225;226; ZICOND64-LABEL: and_select_all_ones_i64:227; ZICOND64: # %bb.0:228; ZICOND64-NEXT: czero.eqz a0, a2, a0229; ZICOND64-NEXT: and a1, a2, a1230; ZICOND64-NEXT: or a0, a1, a0231; ZICOND64-NEXT: ret232;233; CMV-FUSION-LABEL: and_select_all_ones_i64:234; CMV-FUSION: # %bb.0:235; CMV-FUSION-NEXT: and a1, a1, a2236; CMV-FUSION-NEXT: beqz a0, .LBB3_2237; CMV-FUSION-NEXT: # %bb.1:238; CMV-FUSION-NEXT: mv a1, a2239; CMV-FUSION-NEXT: .LBB3_2:240; CMV-FUSION-NEXT: mv a0, a1241; CMV-FUSION-NEXT: ret242 %a = select i1 %c, i64 -1, i64 %x243 %b = and i64 %y, %a244 ret i64 %b245}246 247define i64 @and_select_all_ones_i64_cmp(i64 %x, i64 %y, i64 %z) {248; RV32-LABEL: and_select_all_ones_i64_cmp:249; RV32: # %bb.0:250; RV32-NEXT: xori a4, a4, 4251; RV32-NEXT: or a4, a4, a5252; RV32-NEXT: seqz a4, a4253; RV32-NEXT: addi a4, a4, -1254; RV32-NEXT: or a1, a4, a1255; RV32-NEXT: or a0, a4, a0256; RV32-NEXT: and a0, a0, a2257; RV32-NEXT: and a1, a1, a3258; RV32-NEXT: ret259;260; RV64I-LABEL: and_select_all_ones_i64_cmp:261; RV64I: # %bb.0:262; RV64I-NEXT: addi a2, a2, -4263; RV64I-NEXT: seqz a2, a2264; RV64I-NEXT: addi a2, a2, -1265; RV64I-NEXT: or a0, a2, a0266; RV64I-NEXT: and a0, a0, a1267; RV64I-NEXT: ret268;269; SFB64-LABEL: and_select_all_ones_i64_cmp:270; SFB64: # %bb.0:271; SFB64-NEXT: li a3, 4272; SFB64-NEXT: bne a2, a3, .LBB4_2273; SFB64-NEXT: # %bb.1:274; SFB64-NEXT: and a1, a1, a0275; SFB64-NEXT: .LBB4_2:276; SFB64-NEXT: mv a0, a1277; SFB64-NEXT: ret278;279; VTCONDOPS64-LABEL: and_select_all_ones_i64_cmp:280; VTCONDOPS64: # %bb.0:281; VTCONDOPS64-NEXT: addi a2, a2, -4282; VTCONDOPS64-NEXT: and a0, a1, a0283; VTCONDOPS64-NEXT: vt.maskc a1, a1, a2284; VTCONDOPS64-NEXT: or a0, a0, a1285; VTCONDOPS64-NEXT: ret286;287; ZICOND64-LABEL: and_select_all_ones_i64_cmp:288; ZICOND64: # %bb.0:289; ZICOND64-NEXT: addi a2, a2, -4290; ZICOND64-NEXT: and a0, a1, a0291; ZICOND64-NEXT: czero.eqz a1, a1, a2292; ZICOND64-NEXT: or a0, a0, a1293; ZICOND64-NEXT: ret294;295; CMV-FUSION-LABEL: and_select_all_ones_i64_cmp:296; CMV-FUSION: # %bb.0:297; CMV-FUSION-NEXT: and a0, a0, a1298; CMV-FUSION-NEXT: li a3, 4299; CMV-FUSION-NEXT: beq a2, a3, .LBB4_2300; CMV-FUSION-NEXT: # %bb.1:301; CMV-FUSION-NEXT: mv a0, a1302; CMV-FUSION-NEXT: .LBB4_2:303; CMV-FUSION-NEXT: ret304 %c = icmp eq i64 %z, 4305 %a = select i1 %c, i64 %x, i64 -1306 %b = and i64 %a, %y307 ret i64 %b308}309 310define i64 @and_select_all_ones_i64_cmp2(i64 %x, i64 %y, i64 %z) {311; RV32I-LABEL: and_select_all_ones_i64_cmp2:312; RV32I: # %bb.0:313; RV32I-NEXT: beqz a5, .LBB5_2314; RV32I-NEXT: # %bb.1:315; RV32I-NEXT: srli a5, a5, 31316; RV32I-NEXT: j .LBB5_3317; RV32I-NEXT: .LBB5_2:318; RV32I-NEXT: sltiu a5, a4, 4319; RV32I-NEXT: .LBB5_3:320; RV32I-NEXT: addi a5, a5, -1321; RV32I-NEXT: or a1, a5, a1322; RV32I-NEXT: or a0, a5, a0323; RV32I-NEXT: and a0, a0, a2324; RV32I-NEXT: and a1, a1, a3325; RV32I-NEXT: ret326;327; RV64I-LABEL: and_select_all_ones_i64_cmp2:328; RV64I: # %bb.0:329; RV64I-NEXT: slti a2, a2, 4330; RV64I-NEXT: addi a2, a2, -1331; RV64I-NEXT: or a0, a2, a0332; RV64I-NEXT: and a0, a0, a1333; RV64I-NEXT: ret334;335; SFB64-LABEL: and_select_all_ones_i64_cmp2:336; SFB64: # %bb.0:337; SFB64-NEXT: li a3, 4338; SFB64-NEXT: bge a2, a3, .LBB5_2339; SFB64-NEXT: # %bb.1:340; SFB64-NEXT: and a1, a1, a0341; SFB64-NEXT: .LBB5_2:342; SFB64-NEXT: mv a0, a1343; SFB64-NEXT: ret344;345; VTCONDOPS64-LABEL: and_select_all_ones_i64_cmp2:346; VTCONDOPS64: # %bb.0:347; VTCONDOPS64-NEXT: slti a2, a2, 4348; VTCONDOPS64-NEXT: and a0, a1, a0349; VTCONDOPS64-NEXT: vt.maskcn a1, a1, a2350; VTCONDOPS64-NEXT: or a0, a0, a1351; VTCONDOPS64-NEXT: ret352;353; ZICOND32-LABEL: and_select_all_ones_i64_cmp2:354; ZICOND32: # %bb.0:355; ZICOND32-NEXT: srli a6, a5, 31356; ZICOND32-NEXT: sltiu a4, a4, 4357; ZICOND32-NEXT: czero.eqz a6, a6, a5358; ZICOND32-NEXT: czero.nez a4, a4, a5359; ZICOND32-NEXT: or a4, a4, a6360; ZICOND32-NEXT: addi a4, a4, -1361; ZICOND32-NEXT: or a1, a4, a1362; ZICOND32-NEXT: or a0, a4, a0363; ZICOND32-NEXT: and a0, a0, a2364; ZICOND32-NEXT: and a1, a1, a3365; ZICOND32-NEXT: ret366;367; ZICOND64-LABEL: and_select_all_ones_i64_cmp2:368; ZICOND64: # %bb.0:369; ZICOND64-NEXT: slti a2, a2, 4370; ZICOND64-NEXT: and a0, a1, a0371; ZICOND64-NEXT: czero.nez a1, a1, a2372; ZICOND64-NEXT: or a0, a0, a1373; ZICOND64-NEXT: ret374;375; CMV-FUSION-LABEL: and_select_all_ones_i64_cmp2:376; CMV-FUSION: # %bb.0:377; CMV-FUSION-NEXT: and a0, a0, a1378; CMV-FUSION-NEXT: li a3, 4379; CMV-FUSION-NEXT: blt a2, a3, .LBB5_2380; CMV-FUSION-NEXT: # %bb.1:381; CMV-FUSION-NEXT: mv a0, a1382; CMV-FUSION-NEXT: .LBB5_2:383; CMV-FUSION-NEXT: ret384 %c = icmp slt i64 %z, 4385 %a = select i1 %c, i64 %x, i64 -1386 %b = and i64 %a, %y387 ret i64 %b388}389 390define signext i32 @or_select_all_zeros_i32(i1 zeroext %c, i32 signext %x, i32 signext %y) {391; RV32I-LABEL: or_select_all_zeros_i32:392; RV32I: # %bb.0:393; RV32I-NEXT: neg a0, a0394; RV32I-NEXT: and a0, a0, a1395; RV32I-NEXT: or a0, a2, a0396; RV32I-NEXT: ret397;398; RV64I-LABEL: or_select_all_zeros_i32:399; RV64I: # %bb.0:400; RV64I-NEXT: neg a0, a0401; RV64I-NEXT: and a0, a0, a1402; RV64I-NEXT: or a0, a2, a0403; RV64I-NEXT: ret404;405; SFB64-LABEL: or_select_all_zeros_i32:406; SFB64: # %bb.0:407; SFB64-NEXT: beqz a0, .LBB6_2408; SFB64-NEXT: # %bb.1:409; SFB64-NEXT: or a2, a2, a1410; SFB64-NEXT: .LBB6_2:411; SFB64-NEXT: mv a0, a2412; SFB64-NEXT: ret413;414; VTCONDOPS64-LABEL: or_select_all_zeros_i32:415; VTCONDOPS64: # %bb.0:416; VTCONDOPS64-NEXT: vt.maskc a0, a1, a0417; VTCONDOPS64-NEXT: or a0, a2, a0418; VTCONDOPS64-NEXT: ret419;420; ZICOND-LABEL: or_select_all_zeros_i32:421; ZICOND: # %bb.0:422; ZICOND-NEXT: czero.eqz a0, a1, a0423; ZICOND-NEXT: or a0, a2, a0424; ZICOND-NEXT: ret425;426; CMV-FUSION-LABEL: or_select_all_zeros_i32:427; CMV-FUSION: # %bb.0:428; CMV-FUSION-NEXT: or a1, a1, a2429; CMV-FUSION-NEXT: bnez a0, .LBB6_2430; CMV-FUSION-NEXT: # %bb.1:431; CMV-FUSION-NEXT: mv a1, a2432; CMV-FUSION-NEXT: .LBB6_2:433; CMV-FUSION-NEXT: mv a0, a1434; CMV-FUSION-NEXT: ret435 %a = select i1 %c, i32 %x, i32 0436 %b = or i32 %y, %a437 ret i32 %b438}439 440define i64 @or_select_all_zeros_i64(i1 zeroext %c, i64 %x, i64 %y) {441; RV32I-LABEL: or_select_all_zeros_i64:442; RV32I: # %bb.0:443; RV32I-NEXT: addi a0, a0, -1444; RV32I-NEXT: and a2, a0, a2445; RV32I-NEXT: and a0, a0, a1446; RV32I-NEXT: or a0, a0, a3447; RV32I-NEXT: or a1, a2, a4448; RV32I-NEXT: ret449;450; RV64I-LABEL: or_select_all_zeros_i64:451; RV64I: # %bb.0:452; RV64I-NEXT: addi a0, a0, -1453; RV64I-NEXT: and a0, a0, a1454; RV64I-NEXT: or a0, a0, a2455; RV64I-NEXT: ret456;457; SFB64-LABEL: or_select_all_zeros_i64:458; SFB64: # %bb.0:459; SFB64-NEXT: bnez a0, .LBB7_2460; SFB64-NEXT: # %bb.1:461; SFB64-NEXT: or a2, a2, a1462; SFB64-NEXT: .LBB7_2:463; SFB64-NEXT: mv a0, a2464; SFB64-NEXT: ret465;466; VTCONDOPS64-LABEL: or_select_all_zeros_i64:467; VTCONDOPS64: # %bb.0:468; VTCONDOPS64-NEXT: vt.maskcn a0, a1, a0469; VTCONDOPS64-NEXT: or a0, a0, a2470; VTCONDOPS64-NEXT: ret471;472; ZICOND32-LABEL: or_select_all_zeros_i64:473; ZICOND32: # %bb.0:474; ZICOND32-NEXT: czero.nez a2, a2, a0475; ZICOND32-NEXT: czero.nez a0, a1, a0476; ZICOND32-NEXT: or a0, a0, a3477; ZICOND32-NEXT: or a1, a2, a4478; ZICOND32-NEXT: ret479;480; ZICOND64-LABEL: or_select_all_zeros_i64:481; ZICOND64: # %bb.0:482; ZICOND64-NEXT: czero.nez a0, a1, a0483; ZICOND64-NEXT: or a0, a0, a2484; ZICOND64-NEXT: ret485;486; CMV-FUSION-LABEL: or_select_all_zeros_i64:487; CMV-FUSION: # %bb.0:488; CMV-FUSION-NEXT: or a1, a1, a2489; CMV-FUSION-NEXT: beqz a0, .LBB7_2490; CMV-FUSION-NEXT: # %bb.1:491; CMV-FUSION-NEXT: mv a1, a2492; CMV-FUSION-NEXT: .LBB7_2:493; CMV-FUSION-NEXT: mv a0, a1494; CMV-FUSION-NEXT: ret495 %a = select i1 %c, i64 0, i64 %x496 %b = or i64 %a, %y497 ret i64 %b498}499 500define signext i32 @xor_select_all_zeros_i32(i1 zeroext %c, i32 signext %x, i32 signext %y) {501; RV32I-LABEL: xor_select_all_zeros_i32:502; RV32I: # %bb.0:503; RV32I-NEXT: addi a0, a0, -1504; RV32I-NEXT: and a0, a0, a1505; RV32I-NEXT: xor a0, a2, a0506; RV32I-NEXT: ret507;508; RV64I-LABEL: xor_select_all_zeros_i32:509; RV64I: # %bb.0:510; RV64I-NEXT: addi a0, a0, -1511; RV64I-NEXT: and a0, a0, a1512; RV64I-NEXT: xor a0, a2, a0513; RV64I-NEXT: ret514;515; SFB64-LABEL: xor_select_all_zeros_i32:516; SFB64: # %bb.0:517; SFB64-NEXT: bnez a0, .LBB8_2518; SFB64-NEXT: # %bb.1:519; SFB64-NEXT: xor a2, a2, a1520; SFB64-NEXT: .LBB8_2:521; SFB64-NEXT: mv a0, a2522; SFB64-NEXT: ret523;524; VTCONDOPS64-LABEL: xor_select_all_zeros_i32:525; VTCONDOPS64: # %bb.0:526; VTCONDOPS64-NEXT: vt.maskcn a0, a1, a0527; VTCONDOPS64-NEXT: xor a0, a2, a0528; VTCONDOPS64-NEXT: ret529;530; ZICOND-LABEL: xor_select_all_zeros_i32:531; ZICOND: # %bb.0:532; ZICOND-NEXT: czero.nez a0, a1, a0533; ZICOND-NEXT: xor a0, a2, a0534; ZICOND-NEXT: ret535;536; CMV-FUSION-LABEL: xor_select_all_zeros_i32:537; CMV-FUSION: # %bb.0:538; CMV-FUSION-NEXT: xor a1, a1, a2539; CMV-FUSION-NEXT: beqz a0, .LBB8_2540; CMV-FUSION-NEXT: # %bb.1:541; CMV-FUSION-NEXT: mv a1, a2542; CMV-FUSION-NEXT: .LBB8_2:543; CMV-FUSION-NEXT: mv a0, a1544; CMV-FUSION-NEXT: ret545 %a = select i1 %c, i32 0, i32 %x546 %b = xor i32 %y, %a547 ret i32 %b548}549 550define i64 @xor_select_all_zeros_i64(i1 zeroext %c, i64 %x, i64 %y) {551; RV32I-LABEL: xor_select_all_zeros_i64:552; RV32I: # %bb.0:553; RV32I-NEXT: neg a0, a0554; RV32I-NEXT: and a2, a0, a2555; RV32I-NEXT: and a0, a0, a1556; RV32I-NEXT: xor a0, a0, a3557; RV32I-NEXT: xor a1, a2, a4558; RV32I-NEXT: ret559;560; RV64I-LABEL: xor_select_all_zeros_i64:561; RV64I: # %bb.0:562; RV64I-NEXT: neg a0, a0563; RV64I-NEXT: and a0, a0, a1564; RV64I-NEXT: xor a0, a0, a2565; RV64I-NEXT: ret566;567; SFB64-LABEL: xor_select_all_zeros_i64:568; SFB64: # %bb.0:569; SFB64-NEXT: beqz a0, .LBB9_2570; SFB64-NEXT: # %bb.1:571; SFB64-NEXT: xor a2, a2, a1572; SFB64-NEXT: .LBB9_2:573; SFB64-NEXT: mv a0, a2574; SFB64-NEXT: ret575;576; VTCONDOPS64-LABEL: xor_select_all_zeros_i64:577; VTCONDOPS64: # %bb.0:578; VTCONDOPS64-NEXT: vt.maskc a0, a1, a0579; VTCONDOPS64-NEXT: xor a0, a0, a2580; VTCONDOPS64-NEXT: ret581;582; ZICOND32-LABEL: xor_select_all_zeros_i64:583; ZICOND32: # %bb.0:584; ZICOND32-NEXT: czero.eqz a2, a2, a0585; ZICOND32-NEXT: czero.eqz a0, a1, a0586; ZICOND32-NEXT: xor a0, a0, a3587; ZICOND32-NEXT: xor a1, a2, a4588; ZICOND32-NEXT: ret589;590; ZICOND64-LABEL: xor_select_all_zeros_i64:591; ZICOND64: # %bb.0:592; ZICOND64-NEXT: czero.eqz a0, a1, a0593; ZICOND64-NEXT: xor a0, a0, a2594; ZICOND64-NEXT: ret595;596; CMV-FUSION-LABEL: xor_select_all_zeros_i64:597; CMV-FUSION: # %bb.0:598; CMV-FUSION-NEXT: xor a1, a1, a2599; CMV-FUSION-NEXT: bnez a0, .LBB9_2600; CMV-FUSION-NEXT: # %bb.1:601; CMV-FUSION-NEXT: mv a1, a2602; CMV-FUSION-NEXT: .LBB9_2:603; CMV-FUSION-NEXT: mv a0, a1604; CMV-FUSION-NEXT: ret605 %a = select i1 %c, i64 %x, i64 0606 %b = xor i64 %a, %y607 ret i64 %b608}609 610define signext i32 @add_select_all_zeros_i32(i1 zeroext %c, i32 signext %x, i32 signext %y) {611; RV32I-LABEL: add_select_all_zeros_i32:612; RV32I: # %bb.0:613; RV32I-NEXT: addi a0, a0, -1614; RV32I-NEXT: and a0, a0, a1615; RV32I-NEXT: add a0, a2, a0616; RV32I-NEXT: ret617;618; RV64I-LABEL: add_select_all_zeros_i32:619; RV64I: # %bb.0:620; RV64I-NEXT: addi a0, a0, -1621; RV64I-NEXT: and a0, a0, a1622; RV64I-NEXT: addw a0, a2, a0623; RV64I-NEXT: ret624;625; SFB64-LABEL: add_select_all_zeros_i32:626; SFB64: # %bb.0:627; SFB64-NEXT: bnez a0, .LBB10_2628; SFB64-NEXT: # %bb.1:629; SFB64-NEXT: addw a2, a2, a1630; SFB64-NEXT: .LBB10_2:631; SFB64-NEXT: mv a0, a2632; SFB64-NEXT: ret633;634; VTCONDOPS64-LABEL: add_select_all_zeros_i32:635; VTCONDOPS64: # %bb.0:636; VTCONDOPS64-NEXT: vt.maskcn a0, a1, a0637; VTCONDOPS64-NEXT: addw a0, a2, a0638; VTCONDOPS64-NEXT: ret639;640; ZICOND32-LABEL: add_select_all_zeros_i32:641; ZICOND32: # %bb.0:642; ZICOND32-NEXT: czero.nez a0, a1, a0643; ZICOND32-NEXT: add a0, a2, a0644; ZICOND32-NEXT: ret645;646; ZICOND64-LABEL: add_select_all_zeros_i32:647; ZICOND64: # %bb.0:648; ZICOND64-NEXT: czero.nez a0, a1, a0649; ZICOND64-NEXT: addw a0, a2, a0650; ZICOND64-NEXT: ret651;652; CMV-FUSION-LABEL: add_select_all_zeros_i32:653; CMV-FUSION: # %bb.0:654; CMV-FUSION-NEXT: addw a1, a1, a2655; CMV-FUSION-NEXT: beqz a0, .LBB10_2656; CMV-FUSION-NEXT: # %bb.1:657; CMV-FUSION-NEXT: mv a1, a2658; CMV-FUSION-NEXT: .LBB10_2:659; CMV-FUSION-NEXT: mv a0, a1660; CMV-FUSION-NEXT: ret661 %a = select i1 %c, i32 0, i32 %x662 %b = add i32 %y, %a663 ret i32 %b664}665 666define i64 @add_select_all_zeros_i64(i1 zeroext %c, i64 %x, i64 %y) {667; RV32I-LABEL: add_select_all_zeros_i64:668; RV32I: # %bb.0:669; RV32I-NEXT: neg a0, a0670; RV32I-NEXT: and a2, a0, a2671; RV32I-NEXT: and a1, a0, a1672; RV32I-NEXT: add a0, a1, a3673; RV32I-NEXT: sltu a1, a0, a1674; RV32I-NEXT: add a2, a2, a4675; RV32I-NEXT: add a1, a2, a1676; RV32I-NEXT: ret677;678; RV64I-LABEL: add_select_all_zeros_i64:679; RV64I: # %bb.0:680; RV64I-NEXT: neg a0, a0681; RV64I-NEXT: and a0, a0, a1682; RV64I-NEXT: add a0, a0, a2683; RV64I-NEXT: ret684;685; SFB64-LABEL: add_select_all_zeros_i64:686; SFB64: # %bb.0:687; SFB64-NEXT: beqz a0, .LBB11_2688; SFB64-NEXT: # %bb.1:689; SFB64-NEXT: add a2, a2, a1690; SFB64-NEXT: .LBB11_2:691; SFB64-NEXT: mv a0, a2692; SFB64-NEXT: ret693;694; VTCONDOPS64-LABEL: add_select_all_zeros_i64:695; VTCONDOPS64: # %bb.0:696; VTCONDOPS64-NEXT: vt.maskc a0, a1, a0697; VTCONDOPS64-NEXT: add a0, a0, a2698; VTCONDOPS64-NEXT: ret699;700; ZICOND32-LABEL: add_select_all_zeros_i64:701; ZICOND32: # %bb.0:702; ZICOND32-NEXT: czero.eqz a2, a2, a0703; ZICOND32-NEXT: czero.eqz a1, a1, a0704; ZICOND32-NEXT: add a0, a1, a3705; ZICOND32-NEXT: sltu a1, a0, a1706; ZICOND32-NEXT: add a2, a2, a4707; ZICOND32-NEXT: add a1, a2, a1708; ZICOND32-NEXT: ret709;710; ZICOND64-LABEL: add_select_all_zeros_i64:711; ZICOND64: # %bb.0:712; ZICOND64-NEXT: czero.eqz a0, a1, a0713; ZICOND64-NEXT: add a0, a0, a2714; ZICOND64-NEXT: ret715;716; CMV-FUSION-LABEL: add_select_all_zeros_i64:717; CMV-FUSION: # %bb.0:718; CMV-FUSION-NEXT: add a1, a1, a2719; CMV-FUSION-NEXT: bnez a0, .LBB11_2720; CMV-FUSION-NEXT: # %bb.1:721; CMV-FUSION-NEXT: mv a1, a2722; CMV-FUSION-NEXT: .LBB11_2:723; CMV-FUSION-NEXT: mv a0, a1724; CMV-FUSION-NEXT: ret725 %a = select i1 %c, i64 %x, i64 0726 %b = add i64 %a, %y727 ret i64 %b728}729 730define signext i32 @sub_select_all_zeros_i32(i1 zeroext %c, i32 signext %x, i32 signext %y) {731; RV32I-LABEL: sub_select_all_zeros_i32:732; RV32I: # %bb.0:733; RV32I-NEXT: addi a0, a0, -1734; RV32I-NEXT: and a0, a0, a1735; RV32I-NEXT: sub a0, a2, a0736; RV32I-NEXT: ret737;738; RV64I-LABEL: sub_select_all_zeros_i32:739; RV64I: # %bb.0:740; RV64I-NEXT: addi a0, a0, -1741; RV64I-NEXT: and a0, a0, a1742; RV64I-NEXT: subw a0, a2, a0743; RV64I-NEXT: ret744;745; SFB64-LABEL: sub_select_all_zeros_i32:746; SFB64: # %bb.0:747; SFB64-NEXT: bnez a0, .LBB12_2748; SFB64-NEXT: # %bb.1:749; SFB64-NEXT: subw a2, a2, a1750; SFB64-NEXT: .LBB12_2:751; SFB64-NEXT: mv a0, a2752; SFB64-NEXT: ret753;754; VTCONDOPS64-LABEL: sub_select_all_zeros_i32:755; VTCONDOPS64: # %bb.0:756; VTCONDOPS64-NEXT: vt.maskcn a0, a1, a0757; VTCONDOPS64-NEXT: subw a0, a2, a0758; VTCONDOPS64-NEXT: ret759;760; ZICOND32-LABEL: sub_select_all_zeros_i32:761; ZICOND32: # %bb.0:762; ZICOND32-NEXT: czero.nez a0, a1, a0763; ZICOND32-NEXT: sub a0, a2, a0764; ZICOND32-NEXT: ret765;766; ZICOND64-LABEL: sub_select_all_zeros_i32:767; ZICOND64: # %bb.0:768; ZICOND64-NEXT: czero.nez a0, a1, a0769; ZICOND64-NEXT: subw a0, a2, a0770; ZICOND64-NEXT: ret771;772; CMV-FUSION-LABEL: sub_select_all_zeros_i32:773; CMV-FUSION: # %bb.0:774; CMV-FUSION-NEXT: subw a1, a2, a1775; CMV-FUSION-NEXT: beqz a0, .LBB12_2776; CMV-FUSION-NEXT: # %bb.1:777; CMV-FUSION-NEXT: mv a1, a2778; CMV-FUSION-NEXT: .LBB12_2:779; CMV-FUSION-NEXT: mv a0, a1780; CMV-FUSION-NEXT: ret781 %a = select i1 %c, i32 0, i32 %x782 %b = sub i32 %y, %a783 ret i32 %b784}785 786define i64 @sub_select_all_zeros_i64(i1 zeroext %c, i64 %x, i64 %y) {787; RV32I-LABEL: sub_select_all_zeros_i64:788; RV32I: # %bb.0:789; RV32I-NEXT: neg a0, a0790; RV32I-NEXT: and a2, a0, a2791; RV32I-NEXT: and a0, a0, a1792; RV32I-NEXT: sltu a1, a3, a0793; RV32I-NEXT: sub a4, a4, a2794; RV32I-NEXT: sub a1, a4, a1795; RV32I-NEXT: sub a0, a3, a0796; RV32I-NEXT: ret797;798; RV64I-LABEL: sub_select_all_zeros_i64:799; RV64I: # %bb.0:800; RV64I-NEXT: neg a0, a0801; RV64I-NEXT: and a0, a0, a1802; RV64I-NEXT: sub a0, a2, a0803; RV64I-NEXT: ret804;805; SFB64-LABEL: sub_select_all_zeros_i64:806; SFB64: # %bb.0:807; SFB64-NEXT: beqz a0, .LBB13_2808; SFB64-NEXT: # %bb.1:809; SFB64-NEXT: sub a2, a2, a1810; SFB64-NEXT: .LBB13_2:811; SFB64-NEXT: mv a0, a2812; SFB64-NEXT: ret813;814; VTCONDOPS64-LABEL: sub_select_all_zeros_i64:815; VTCONDOPS64: # %bb.0:816; VTCONDOPS64-NEXT: vt.maskc a0, a1, a0817; VTCONDOPS64-NEXT: sub a0, a2, a0818; VTCONDOPS64-NEXT: ret819;820; ZICOND32-LABEL: sub_select_all_zeros_i64:821; ZICOND32: # %bb.0:822; ZICOND32-NEXT: czero.eqz a2, a2, a0823; ZICOND32-NEXT: czero.eqz a0, a1, a0824; ZICOND32-NEXT: sltu a1, a3, a0825; ZICOND32-NEXT: sub a4, a4, a2826; ZICOND32-NEXT: sub a1, a4, a1827; ZICOND32-NEXT: sub a0, a3, a0828; ZICOND32-NEXT: ret829;830; ZICOND64-LABEL: sub_select_all_zeros_i64:831; ZICOND64: # %bb.0:832; ZICOND64-NEXT: czero.eqz a0, a1, a0833; ZICOND64-NEXT: sub a0, a2, a0834; ZICOND64-NEXT: ret835;836; CMV-FUSION-LABEL: sub_select_all_zeros_i64:837; CMV-FUSION: # %bb.0:838; CMV-FUSION-NEXT: sub a1, a2, a1839; CMV-FUSION-NEXT: bnez a0, .LBB13_2840; CMV-FUSION-NEXT: # %bb.1:841; CMV-FUSION-NEXT: mv a1, a2842; CMV-FUSION-NEXT: .LBB13_2:843; CMV-FUSION-NEXT: mv a0, a1844; CMV-FUSION-NEXT: ret845 %a = select i1 %c, i64 %x, i64 0846 %b = sub i64 %y, %a847 ret i64 %b848}849