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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+m -verify-machineinstrs < %s | FileCheck --check-prefixes=RV32IM %s3; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s | FileCheck --check-prefixes=RV64IM %s4; RUN: llc -mtriple=riscv32 -mattr=+m,+zbb -verify-machineinstrs < %s | FileCheck --check-prefixes=RV32IMZBB %s5; RUN: llc -mtriple=riscv64 -mattr=+m,+zbb -verify-machineinstrs < %s | FileCheck --check-prefixes=RV64IMZBB %s6; RUN: llc -mtriple=riscv32 -mattr=+m,+zicond -verify-machineinstrs < %s | FileCheck --check-prefixes=RV32IMZICOND %s7; RUN: llc -mtriple=riscv64 -mattr=+m,+zicond -verify-machineinstrs < %s | FileCheck --check-prefixes=RV64IMZICOND %s8; RUN: llc -mtriple=riscv32 -mattr=+m,+zicond,+zbb -verify-machineinstrs < %s | FileCheck --check-prefixes=RV32IMBOTH %s9; RUN: llc -mtriple=riscv64 -mattr=+m,+zicond,+zbb -verify-machineinstrs < %s | FileCheck --check-prefixes=RV64IMBOTH %s10 11 12define i32 @select_umin_1(i1 zeroext %cond, i32 %a, i32 %b) {13; RV32IM-LABEL: select_umin_1:14; RV32IM: # %bb.0: # %entry15; RV32IM-NEXT: addi a0, a0, -116; RV32IM-NEXT: or a1, a0, a117; RV32IM-NEXT: mv a0, a218; RV32IM-NEXT: bltu a2, a1, .LBB0_219; RV32IM-NEXT: # %bb.1: # %entry20; RV32IM-NEXT: mv a0, a121; RV32IM-NEXT: .LBB0_2: # %entry22; RV32IM-NEXT: ret23;24; RV64IM-LABEL: select_umin_1:25; RV64IM: # %bb.0: # %entry26; RV64IM-NEXT: mv a3, a027; RV64IM-NEXT: sext.w a0, a228; RV64IM-NEXT: addi a3, a3, -129; RV64IM-NEXT: or a1, a3, a130; RV64IM-NEXT: sext.w a1, a131; RV64IM-NEXT: bltu a0, a1, .LBB0_232; RV64IM-NEXT: # %bb.1: # %entry33; RV64IM-NEXT: mv a0, a134; RV64IM-NEXT: .LBB0_2: # %entry35; RV64IM-NEXT: ret36;37; RV32IMZBB-LABEL: select_umin_1:38; RV32IMZBB: # %bb.0: # %entry39; RV32IMZBB-NEXT: addi a0, a0, -140; RV32IMZBB-NEXT: or a0, a0, a141; RV32IMZBB-NEXT: minu a0, a2, a042; RV32IMZBB-NEXT: ret43;44; RV64IMZBB-LABEL: select_umin_1:45; RV64IMZBB: # %bb.0: # %entry46; RV64IMZBB-NEXT: sext.w a2, a247; RV64IMZBB-NEXT: addi a0, a0, -148; RV64IMZBB-NEXT: or a0, a0, a149; RV64IMZBB-NEXT: sext.w a0, a050; RV64IMZBB-NEXT: minu a0, a2, a051; RV64IMZBB-NEXT: ret52;53; RV32IMZICOND-LABEL: select_umin_1:54; RV32IMZICOND: # %bb.0: # %entry55; RV32IMZICOND-NEXT: addi a0, a0, -156; RV32IMZICOND-NEXT: or a0, a0, a157; RV32IMZICOND-NEXT: sltu a1, a2, a058; RV32IMZICOND-NEXT: czero.nez a0, a0, a159; RV32IMZICOND-NEXT: czero.eqz a1, a2, a160; RV32IMZICOND-NEXT: or a0, a1, a061; RV32IMZICOND-NEXT: ret62;63; RV64IMZICOND-LABEL: select_umin_1:64; RV64IMZICOND: # %bb.0: # %entry65; RV64IMZICOND-NEXT: sext.w a2, a266; RV64IMZICOND-NEXT: addi a0, a0, -167; RV64IMZICOND-NEXT: or a0, a0, a168; RV64IMZICOND-NEXT: sext.w a0, a069; RV64IMZICOND-NEXT: sltu a1, a2, a070; RV64IMZICOND-NEXT: czero.nez a0, a0, a171; RV64IMZICOND-NEXT: czero.eqz a1, a2, a172; RV64IMZICOND-NEXT: or a0, a1, a073; RV64IMZICOND-NEXT: ret74;75; RV32IMBOTH-LABEL: select_umin_1:76; RV32IMBOTH: # %bb.0: # %entry77; RV32IMBOTH-NEXT: addi a0, a0, -178; RV32IMBOTH-NEXT: or a0, a0, a179; RV32IMBOTH-NEXT: minu a0, a2, a080; RV32IMBOTH-NEXT: ret81;82; RV64IMBOTH-LABEL: select_umin_1:83; RV64IMBOTH: # %bb.0: # %entry84; RV64IMBOTH-NEXT: sext.w a2, a285; RV64IMBOTH-NEXT: addi a0, a0, -186; RV64IMBOTH-NEXT: or a0, a0, a187; RV64IMBOTH-NEXT: sext.w a0, a088; RV64IMBOTH-NEXT: minu a0, a2, a089; RV64IMBOTH-NEXT: ret90entry:91 %c = call i32 @llvm.umin(i32 %a, i32 %b)92 %res = select i1 %cond, i32 %c, i32 %b93 ret i32 %res94}95 96define i32 @select_umin_2(i1 zeroext %cond, i32 %a, i32 %b) {97; RV32IM-LABEL: select_umin_2:98; RV32IM: # %bb.0: # %entry99; RV32IM-NEXT: neg a0, a0100; RV32IM-NEXT: or a2, a0, a2101; RV32IM-NEXT: mv a0, a1102; RV32IM-NEXT: bltu a1, a2, .LBB1_2103; RV32IM-NEXT: # %bb.1: # %entry104; RV32IM-NEXT: mv a0, a2105; RV32IM-NEXT: .LBB1_2: # %entry106; RV32IM-NEXT: ret107;108; RV64IM-LABEL: select_umin_2:109; RV64IM: # %bb.0: # %entry110; RV64IM-NEXT: mv a3, a0111; RV64IM-NEXT: sext.w a0, a1112; RV64IM-NEXT: neg a1, a3113; RV64IM-NEXT: or a1, a1, a2114; RV64IM-NEXT: sext.w a1, a1115; RV64IM-NEXT: bltu a0, a1, .LBB1_2116; RV64IM-NEXT: # %bb.1: # %entry117; RV64IM-NEXT: mv a0, a1118; RV64IM-NEXT: .LBB1_2: # %entry119; RV64IM-NEXT: ret120;121; RV32IMZBB-LABEL: select_umin_2:122; RV32IMZBB: # %bb.0: # %entry123; RV32IMZBB-NEXT: neg a0, a0124; RV32IMZBB-NEXT: or a0, a0, a2125; RV32IMZBB-NEXT: minu a0, a1, a0126; RV32IMZBB-NEXT: ret127;128; RV64IMZBB-LABEL: select_umin_2:129; RV64IMZBB: # %bb.0: # %entry130; RV64IMZBB-NEXT: sext.w a1, a1131; RV64IMZBB-NEXT: neg a0, a0132; RV64IMZBB-NEXT: or a0, a0, a2133; RV64IMZBB-NEXT: sext.w a0, a0134; RV64IMZBB-NEXT: minu a0, a1, a0135; RV64IMZBB-NEXT: ret136;137; RV32IMZICOND-LABEL: select_umin_2:138; RV32IMZICOND: # %bb.0: # %entry139; RV32IMZICOND-NEXT: neg a0, a0140; RV32IMZICOND-NEXT: or a0, a0, a2141; RV32IMZICOND-NEXT: sltu a2, a1, a0142; RV32IMZICOND-NEXT: czero.nez a0, a0, a2143; RV32IMZICOND-NEXT: czero.eqz a1, a1, a2144; RV32IMZICOND-NEXT: or a0, a1, a0145; RV32IMZICOND-NEXT: ret146;147; RV64IMZICOND-LABEL: select_umin_2:148; RV64IMZICOND: # %bb.0: # %entry149; RV64IMZICOND-NEXT: sext.w a1, a1150; RV64IMZICOND-NEXT: neg a0, a0151; RV64IMZICOND-NEXT: or a0, a0, a2152; RV64IMZICOND-NEXT: sext.w a0, a0153; RV64IMZICOND-NEXT: sltu a2, a1, a0154; RV64IMZICOND-NEXT: czero.nez a0, a0, a2155; RV64IMZICOND-NEXT: czero.eqz a1, a1, a2156; RV64IMZICOND-NEXT: or a0, a1, a0157; RV64IMZICOND-NEXT: ret158;159; RV32IMBOTH-LABEL: select_umin_2:160; RV32IMBOTH: # %bb.0: # %entry161; RV32IMBOTH-NEXT: neg a0, a0162; RV32IMBOTH-NEXT: or a0, a0, a2163; RV32IMBOTH-NEXT: minu a0, a1, a0164; RV32IMBOTH-NEXT: ret165;166; RV64IMBOTH-LABEL: select_umin_2:167; RV64IMBOTH: # %bb.0: # %entry168; RV64IMBOTH-NEXT: sext.w a1, a1169; RV64IMBOTH-NEXT: neg a0, a0170; RV64IMBOTH-NEXT: or a0, a0, a2171; RV64IMBOTH-NEXT: sext.w a0, a0172; RV64IMBOTH-NEXT: minu a0, a1, a0173; RV64IMBOTH-NEXT: ret174entry:175 %c = call i32 @llvm.umin(i32 %a, i32 %b)176 %res = select i1 %cond, i32 %a, i32 %c177 ret i32 %res178}179 180define i32 @select_umin_3(i1 zeroext %cond, i32 %a) {181; RV32IM-LABEL: select_umin_3:182; RV32IM: # %bb.0: # %entry183; RV32IM-NEXT: neg a0, a0184; RV32IM-NEXT: ori a2, a0, 32185; RV32IM-NEXT: mv a0, a1186; RV32IM-NEXT: bltu a1, a2, .LBB2_2187; RV32IM-NEXT: # %bb.1: # %entry188; RV32IM-NEXT: mv a0, a2189; RV32IM-NEXT: .LBB2_2: # %entry190; RV32IM-NEXT: ret191;192; RV64IM-LABEL: select_umin_3:193; RV64IM: # %bb.0: # %entry194; RV64IM-NEXT: mv a2, a0195; RV64IM-NEXT: sext.w a0, a1196; RV64IM-NEXT: neg a1, a2197; RV64IM-NEXT: ori a1, a1, 32198; RV64IM-NEXT: bltu a0, a1, .LBB2_2199; RV64IM-NEXT: # %bb.1: # %entry200; RV64IM-NEXT: mv a0, a1201; RV64IM-NEXT: .LBB2_2: # %entry202; RV64IM-NEXT: ret203;204; RV32IMZBB-LABEL: select_umin_3:205; RV32IMZBB: # %bb.0: # %entry206; RV32IMZBB-NEXT: neg a0, a0207; RV32IMZBB-NEXT: ori a0, a0, 32208; RV32IMZBB-NEXT: minu a0, a1, a0209; RV32IMZBB-NEXT: ret210;211; RV64IMZBB-LABEL: select_umin_3:212; RV64IMZBB: # %bb.0: # %entry213; RV64IMZBB-NEXT: sext.w a1, a1214; RV64IMZBB-NEXT: neg a0, a0215; RV64IMZBB-NEXT: ori a0, a0, 32216; RV64IMZBB-NEXT: minu a0, a1, a0217; RV64IMZBB-NEXT: ret218;219; RV32IMZICOND-LABEL: select_umin_3:220; RV32IMZICOND: # %bb.0: # %entry221; RV32IMZICOND-NEXT: neg a0, a0222; RV32IMZICOND-NEXT: ori a0, a0, 32223; RV32IMZICOND-NEXT: sltu a2, a1, a0224; RV32IMZICOND-NEXT: czero.nez a0, a0, a2225; RV32IMZICOND-NEXT: czero.eqz a1, a1, a2226; RV32IMZICOND-NEXT: or a0, a1, a0227; RV32IMZICOND-NEXT: ret228;229; RV64IMZICOND-LABEL: select_umin_3:230; RV64IMZICOND: # %bb.0: # %entry231; RV64IMZICOND-NEXT: sext.w a1, a1232; RV64IMZICOND-NEXT: neg a0, a0233; RV64IMZICOND-NEXT: ori a0, a0, 32234; RV64IMZICOND-NEXT: sltu a2, a1, a0235; RV64IMZICOND-NEXT: czero.nez a0, a0, a2236; RV64IMZICOND-NEXT: czero.eqz a1, a1, a2237; RV64IMZICOND-NEXT: or a0, a1, a0238; RV64IMZICOND-NEXT: ret239;240; RV32IMBOTH-LABEL: select_umin_3:241; RV32IMBOTH: # %bb.0: # %entry242; RV32IMBOTH-NEXT: neg a0, a0243; RV32IMBOTH-NEXT: ori a0, a0, 32244; RV32IMBOTH-NEXT: minu a0, a1, a0245; RV32IMBOTH-NEXT: ret246;247; RV64IMBOTH-LABEL: select_umin_3:248; RV64IMBOTH: # %bb.0: # %entry249; RV64IMBOTH-NEXT: sext.w a1, a1250; RV64IMBOTH-NEXT: neg a0, a0251; RV64IMBOTH-NEXT: ori a0, a0, 32252; RV64IMBOTH-NEXT: minu a0, a1, a0253; RV64IMBOTH-NEXT: ret254entry:255 %c = call i32 @llvm.umin(i32 %a, i32 32)256 %res = select i1 %cond, i32 %a, i32 %c257 ret i32 %res258}259 260define i32 @select_umin_4(i1 zeroext %cond, i32 %x) {261; RV32IM-LABEL: select_umin_4:262; RV32IM: # %bb.0:263; RV32IM-NEXT: neg a0, a0264; RV32IM-NEXT: or a0, a0, a1265; RV32IM-NEXT: li a1, 128266; RV32IM-NEXT: bltu a0, a1, .LBB3_2267; RV32IM-NEXT: # %bb.1:268; RV32IM-NEXT: li a0, 128269; RV32IM-NEXT: .LBB3_2:270; RV32IM-NEXT: ret271;272; RV64IM-LABEL: select_umin_4:273; RV64IM: # %bb.0:274; RV64IM-NEXT: neg a0, a0275; RV64IM-NEXT: or a0, a0, a1276; RV64IM-NEXT: sext.w a0, a0277; RV64IM-NEXT: li a1, 128278; RV64IM-NEXT: bltu a0, a1, .LBB3_2279; RV64IM-NEXT: # %bb.1:280; RV64IM-NEXT: li a0, 128281; RV64IM-NEXT: .LBB3_2:282; RV64IM-NEXT: ret283;284; RV32IMZBB-LABEL: select_umin_4:285; RV32IMZBB: # %bb.0:286; RV32IMZBB-NEXT: neg a0, a0287; RV32IMZBB-NEXT: or a0, a0, a1288; RV32IMZBB-NEXT: li a1, 128289; RV32IMZBB-NEXT: minu a0, a0, a1290; RV32IMZBB-NEXT: ret291;292; RV64IMZBB-LABEL: select_umin_4:293; RV64IMZBB: # %bb.0:294; RV64IMZBB-NEXT: neg a0, a0295; RV64IMZBB-NEXT: or a0, a0, a1296; RV64IMZBB-NEXT: sext.w a0, a0297; RV64IMZBB-NEXT: li a1, 128298; RV64IMZBB-NEXT: minu a0, a0, a1299; RV64IMZBB-NEXT: ret300;301; RV32IMZICOND-LABEL: select_umin_4:302; RV32IMZICOND: # %bb.0:303; RV32IMZICOND-NEXT: neg a0, a0304; RV32IMZICOND-NEXT: or a0, a0, a1305; RV32IMZICOND-NEXT: sltiu a1, a0, 128306; RV32IMZICOND-NEXT: addi a0, a0, -128307; RV32IMZICOND-NEXT: czero.eqz a0, a0, a1308; RV32IMZICOND-NEXT: addi a0, a0, 128309; RV32IMZICOND-NEXT: ret310;311; RV64IMZICOND-LABEL: select_umin_4:312; RV64IMZICOND: # %bb.0:313; RV64IMZICOND-NEXT: neg a0, a0314; RV64IMZICOND-NEXT: or a0, a0, a1315; RV64IMZICOND-NEXT: sext.w a0, a0316; RV64IMZICOND-NEXT: sltiu a1, a0, 128317; RV64IMZICOND-NEXT: addi a0, a0, -128318; RV64IMZICOND-NEXT: czero.eqz a0, a0, a1319; RV64IMZICOND-NEXT: addi a0, a0, 128320; RV64IMZICOND-NEXT: ret321;322; RV32IMBOTH-LABEL: select_umin_4:323; RV32IMBOTH: # %bb.0:324; RV32IMBOTH-NEXT: neg a0, a0325; RV32IMBOTH-NEXT: or a0, a0, a1326; RV32IMBOTH-NEXT: li a1, 128327; RV32IMBOTH-NEXT: minu a0, a0, a1328; RV32IMBOTH-NEXT: ret329;330; RV64IMBOTH-LABEL: select_umin_4:331; RV64IMBOTH: # %bb.0:332; RV64IMBOTH-NEXT: neg a0, a0333; RV64IMBOTH-NEXT: or a0, a0, a1334; RV64IMBOTH-NEXT: sext.w a0, a0335; RV64IMBOTH-NEXT: li a1, 128336; RV64IMBOTH-NEXT: minu a0, a0, a1337; RV64IMBOTH-NEXT: ret338 %minmax = call i32 @llvm.umin(i32 %x, i32 128)339 %sel = select i1 %cond, i32 128, i32 %minmax340 ret i32 %sel341}342 343define i32 @select_umax_1(i1 zeroext %cond, i32 %a, i32 %b) {344; RV32IM-LABEL: select_umax_1:345; RV32IM: # %bb.0: # %entry346; RV32IM-NEXT: neg a0, a0347; RV32IM-NEXT: and a1, a0, a1348; RV32IM-NEXT: mv a0, a2349; RV32IM-NEXT: bltu a1, a2, .LBB4_2350; RV32IM-NEXT: # %bb.1: # %entry351; RV32IM-NEXT: mv a0, a1352; RV32IM-NEXT: .LBB4_2: # %entry353; RV32IM-NEXT: ret354;355; RV64IM-LABEL: select_umax_1:356; RV64IM: # %bb.0: # %entry357; RV64IM-NEXT: mv a3, a0358; RV64IM-NEXT: sext.w a0, a2359; RV64IM-NEXT: neg a2, a3360; RV64IM-NEXT: and a1, a2, a1361; RV64IM-NEXT: sext.w a1, a1362; RV64IM-NEXT: bltu a1, a0, .LBB4_2363; RV64IM-NEXT: # %bb.1: # %entry364; RV64IM-NEXT: mv a0, a1365; RV64IM-NEXT: .LBB4_2: # %entry366; RV64IM-NEXT: ret367;368; RV32IMZBB-LABEL: select_umax_1:369; RV32IMZBB: # %bb.0: # %entry370; RV32IMZBB-NEXT: neg a0, a0371; RV32IMZBB-NEXT: and a0, a0, a1372; RV32IMZBB-NEXT: maxu a0, a2, a0373; RV32IMZBB-NEXT: ret374;375; RV64IMZBB-LABEL: select_umax_1:376; RV64IMZBB: # %bb.0: # %entry377; RV64IMZBB-NEXT: sext.w a2, a2378; RV64IMZBB-NEXT: neg a0, a0379; RV64IMZBB-NEXT: and a0, a0, a1380; RV64IMZBB-NEXT: sext.w a0, a0381; RV64IMZBB-NEXT: maxu a0, a2, a0382; RV64IMZBB-NEXT: ret383;384; RV32IMZICOND-LABEL: select_umax_1:385; RV32IMZICOND: # %bb.0: # %entry386; RV32IMZICOND-NEXT: czero.eqz a0, a1, a0387; RV32IMZICOND-NEXT: sltu a1, a0, a2388; RV32IMZICOND-NEXT: czero.nez a0, a0, a1389; RV32IMZICOND-NEXT: czero.eqz a1, a2, a1390; RV32IMZICOND-NEXT: or a0, a1, a0391; RV32IMZICOND-NEXT: ret392;393; RV64IMZICOND-LABEL: select_umax_1:394; RV64IMZICOND: # %bb.0: # %entry395; RV64IMZICOND-NEXT: sext.w a2, a2396; RV64IMZICOND-NEXT: czero.eqz a0, a1, a0397; RV64IMZICOND-NEXT: sext.w a0, a0398; RV64IMZICOND-NEXT: sltu a1, a0, a2399; RV64IMZICOND-NEXT: czero.nez a0, a0, a1400; RV64IMZICOND-NEXT: czero.eqz a1, a2, a1401; RV64IMZICOND-NEXT: or a0, a1, a0402; RV64IMZICOND-NEXT: ret403;404; RV32IMBOTH-LABEL: select_umax_1:405; RV32IMBOTH: # %bb.0: # %entry406; RV32IMBOTH-NEXT: czero.eqz a0, a1, a0407; RV32IMBOTH-NEXT: maxu a0, a2, a0408; RV32IMBOTH-NEXT: ret409;410; RV64IMBOTH-LABEL: select_umax_1:411; RV64IMBOTH: # %bb.0: # %entry412; RV64IMBOTH-NEXT: sext.w a2, a2413; RV64IMBOTH-NEXT: czero.eqz a0, a1, a0414; RV64IMBOTH-NEXT: sext.w a0, a0415; RV64IMBOTH-NEXT: maxu a0, a2, a0416; RV64IMBOTH-NEXT: ret417entry:418 %c = call i32 @llvm.umax(i32 %a, i32 %b)419 %res = select i1 %cond, i32 %c, i32 %b420 ret i32 %res421}422 423define i32 @select_umax_2(i1 zeroext %cond, i32 %a, i32 %b) {424; RV32IM-LABEL: select_umax_2:425; RV32IM: # %bb.0: # %entry426; RV32IM-NEXT: addi a0, a0, -1427; RV32IM-NEXT: and a2, a0, a2428; RV32IM-NEXT: mv a0, a1429; RV32IM-NEXT: bltu a2, a1, .LBB5_2430; RV32IM-NEXT: # %bb.1: # %entry431; RV32IM-NEXT: mv a0, a2432; RV32IM-NEXT: .LBB5_2: # %entry433; RV32IM-NEXT: ret434;435; RV64IM-LABEL: select_umax_2:436; RV64IM: # %bb.0: # %entry437; RV64IM-NEXT: mv a3, a0438; RV64IM-NEXT: sext.w a0, a1439; RV64IM-NEXT: addi a3, a3, -1440; RV64IM-NEXT: and a1, a3, a2441; RV64IM-NEXT: sext.w a1, a1442; RV64IM-NEXT: bltu a1, a0, .LBB5_2443; RV64IM-NEXT: # %bb.1: # %entry444; RV64IM-NEXT: mv a0, a1445; RV64IM-NEXT: .LBB5_2: # %entry446; RV64IM-NEXT: ret447;448; RV32IMZBB-LABEL: select_umax_2:449; RV32IMZBB: # %bb.0: # %entry450; RV32IMZBB-NEXT: addi a0, a0, -1451; RV32IMZBB-NEXT: and a0, a0, a2452; RV32IMZBB-NEXT: maxu a0, a1, a0453; RV32IMZBB-NEXT: ret454;455; RV64IMZBB-LABEL: select_umax_2:456; RV64IMZBB: # %bb.0: # %entry457; RV64IMZBB-NEXT: sext.w a1, a1458; RV64IMZBB-NEXT: addi a0, a0, -1459; RV64IMZBB-NEXT: and a0, a0, a2460; RV64IMZBB-NEXT: sext.w a0, a0461; RV64IMZBB-NEXT: maxu a0, a1, a0462; RV64IMZBB-NEXT: ret463;464; RV32IMZICOND-LABEL: select_umax_2:465; RV32IMZICOND: # %bb.0: # %entry466; RV32IMZICOND-NEXT: czero.nez a0, a2, a0467; RV32IMZICOND-NEXT: sltu a2, a0, a1468; RV32IMZICOND-NEXT: czero.nez a0, a0, a2469; RV32IMZICOND-NEXT: czero.eqz a1, a1, a2470; RV32IMZICOND-NEXT: or a0, a1, a0471; RV32IMZICOND-NEXT: ret472;473; RV64IMZICOND-LABEL: select_umax_2:474; RV64IMZICOND: # %bb.0: # %entry475; RV64IMZICOND-NEXT: sext.w a1, a1476; RV64IMZICOND-NEXT: czero.nez a0, a2, a0477; RV64IMZICOND-NEXT: sext.w a0, a0478; RV64IMZICOND-NEXT: sltu a2, a0, a1479; RV64IMZICOND-NEXT: czero.nez a0, a0, a2480; RV64IMZICOND-NEXT: czero.eqz a1, a1, a2481; RV64IMZICOND-NEXT: or a0, a1, a0482; RV64IMZICOND-NEXT: ret483;484; RV32IMBOTH-LABEL: select_umax_2:485; RV32IMBOTH: # %bb.0: # %entry486; RV32IMBOTH-NEXT: czero.nez a0, a2, a0487; RV32IMBOTH-NEXT: maxu a0, a1, a0488; RV32IMBOTH-NEXT: ret489;490; RV64IMBOTH-LABEL: select_umax_2:491; RV64IMBOTH: # %bb.0: # %entry492; RV64IMBOTH-NEXT: sext.w a1, a1493; RV64IMBOTH-NEXT: czero.nez a0, a2, a0494; RV64IMBOTH-NEXT: sext.w a0, a0495; RV64IMBOTH-NEXT: maxu a0, a1, a0496; RV64IMBOTH-NEXT: ret497entry:498 %c = call i32 @llvm.umax(i32 %a, i32 %b)499 %res = select i1 %cond, i32 %a, i32 %c500 ret i32 %res501}502 503define i32 @select_umax_3(i1 zeroext %cond, i32 %a) {504; RV32IM-LABEL: select_umax_3:505; RV32IM: # %bb.0: # %entry506; RV32IM-NEXT: addi a0, a0, -1507; RV32IM-NEXT: andi a2, a0, 32508; RV32IM-NEXT: mv a0, a1509; RV32IM-NEXT: bltu a2, a1, .LBB6_2510; RV32IM-NEXT: # %bb.1: # %entry511; RV32IM-NEXT: mv a0, a2512; RV32IM-NEXT: .LBB6_2: # %entry513; RV32IM-NEXT: ret514;515; RV64IM-LABEL: select_umax_3:516; RV64IM: # %bb.0: # %entry517; RV64IM-NEXT: mv a2, a0518; RV64IM-NEXT: sext.w a0, a1519; RV64IM-NEXT: addi a2, a2, -1520; RV64IM-NEXT: andi a1, a2, 32521; RV64IM-NEXT: bltu a1, a0, .LBB6_2522; RV64IM-NEXT: # %bb.1: # %entry523; RV64IM-NEXT: mv a0, a1524; RV64IM-NEXT: .LBB6_2: # %entry525; RV64IM-NEXT: ret526;527; RV32IMZBB-LABEL: select_umax_3:528; RV32IMZBB: # %bb.0: # %entry529; RV32IMZBB-NEXT: addi a0, a0, -1530; RV32IMZBB-NEXT: andi a0, a0, 32531; RV32IMZBB-NEXT: maxu a0, a1, a0532; RV32IMZBB-NEXT: ret533;534; RV64IMZBB-LABEL: select_umax_3:535; RV64IMZBB: # %bb.0: # %entry536; RV64IMZBB-NEXT: sext.w a1, a1537; RV64IMZBB-NEXT: addi a0, a0, -1538; RV64IMZBB-NEXT: andi a0, a0, 32539; RV64IMZBB-NEXT: maxu a0, a1, a0540; RV64IMZBB-NEXT: ret541;542; RV32IMZICOND-LABEL: select_umax_3:543; RV32IMZICOND: # %bb.0: # %entry544; RV32IMZICOND-NEXT: addi a0, a0, -1545; RV32IMZICOND-NEXT: andi a0, a0, 32546; RV32IMZICOND-NEXT: sltu a2, a0, a1547; RV32IMZICOND-NEXT: czero.nez a0, a0, a2548; RV32IMZICOND-NEXT: czero.eqz a1, a1, a2549; RV32IMZICOND-NEXT: or a0, a1, a0550; RV32IMZICOND-NEXT: ret551;552; RV64IMZICOND-LABEL: select_umax_3:553; RV64IMZICOND: # %bb.0: # %entry554; RV64IMZICOND-NEXT: sext.w a1, a1555; RV64IMZICOND-NEXT: addi a0, a0, -1556; RV64IMZICOND-NEXT: andi a0, a0, 32557; RV64IMZICOND-NEXT: sltu a2, a0, a1558; RV64IMZICOND-NEXT: czero.nez a0, a0, a2559; RV64IMZICOND-NEXT: czero.eqz a1, a1, a2560; RV64IMZICOND-NEXT: or a0, a1, a0561; RV64IMZICOND-NEXT: ret562;563; RV32IMBOTH-LABEL: select_umax_3:564; RV32IMBOTH: # %bb.0: # %entry565; RV32IMBOTH-NEXT: addi a0, a0, -1566; RV32IMBOTH-NEXT: andi a0, a0, 32567; RV32IMBOTH-NEXT: maxu a0, a1, a0568; RV32IMBOTH-NEXT: ret569;570; RV64IMBOTH-LABEL: select_umax_3:571; RV64IMBOTH: # %bb.0: # %entry572; RV64IMBOTH-NEXT: sext.w a1, a1573; RV64IMBOTH-NEXT: addi a0, a0, -1574; RV64IMBOTH-NEXT: andi a0, a0, 32575; RV64IMBOTH-NEXT: maxu a0, a1, a0576; RV64IMBOTH-NEXT: ret577entry:578 %c = call i32 @llvm.umax(i32 %a, i32 32)579 %res = select i1 %cond, i32 %a, i32 %c580 ret i32 %res581}582 583define i32 @select_umax_4(i1 zeroext %cond, i32 %x) {584; RV32IM-LABEL: select_umax_4:585; RV32IM: # %bb.0:586; RV32IM-NEXT: addi a0, a0, -1587; RV32IM-NEXT: and a0, a0, a1588; RV32IM-NEXT: li a1, 128589; RV32IM-NEXT: bltu a1, a0, .LBB7_2590; RV32IM-NEXT: # %bb.1:591; RV32IM-NEXT: li a0, 128592; RV32IM-NEXT: .LBB7_2:593; RV32IM-NEXT: ret594;595; RV64IM-LABEL: select_umax_4:596; RV64IM: # %bb.0:597; RV64IM-NEXT: addi a0, a0, -1598; RV64IM-NEXT: and a0, a0, a1599; RV64IM-NEXT: sext.w a0, a0600; RV64IM-NEXT: li a1, 128601; RV64IM-NEXT: bltu a1, a0, .LBB7_2602; RV64IM-NEXT: # %bb.1:603; RV64IM-NEXT: li a0, 128604; RV64IM-NEXT: .LBB7_2:605; RV64IM-NEXT: ret606;607; RV32IMZBB-LABEL: select_umax_4:608; RV32IMZBB: # %bb.0:609; RV32IMZBB-NEXT: addi a0, a0, -1610; RV32IMZBB-NEXT: and a0, a0, a1611; RV32IMZBB-NEXT: li a1, 128612; RV32IMZBB-NEXT: maxu a0, a0, a1613; RV32IMZBB-NEXT: ret614;615; RV64IMZBB-LABEL: select_umax_4:616; RV64IMZBB: # %bb.0:617; RV64IMZBB-NEXT: addi a0, a0, -1618; RV64IMZBB-NEXT: and a0, a0, a1619; RV64IMZBB-NEXT: sext.w a0, a0620; RV64IMZBB-NEXT: li a1, 128621; RV64IMZBB-NEXT: maxu a0, a0, a1622; RV64IMZBB-NEXT: ret623;624; RV32IMZICOND-LABEL: select_umax_4:625; RV32IMZICOND: # %bb.0:626; RV32IMZICOND-NEXT: czero.nez a0, a1, a0627; RV32IMZICOND-NEXT: sltiu a1, a0, 129628; RV32IMZICOND-NEXT: addi a0, a0, -128629; RV32IMZICOND-NEXT: czero.nez a0, a0, a1630; RV32IMZICOND-NEXT: addi a0, a0, 128631; RV32IMZICOND-NEXT: ret632;633; RV64IMZICOND-LABEL: select_umax_4:634; RV64IMZICOND: # %bb.0:635; RV64IMZICOND-NEXT: czero.nez a0, a1, a0636; RV64IMZICOND-NEXT: sext.w a0, a0637; RV64IMZICOND-NEXT: sltiu a1, a0, 129638; RV64IMZICOND-NEXT: addi a0, a0, -128639; RV64IMZICOND-NEXT: czero.nez a0, a0, a1640; RV64IMZICOND-NEXT: addi a0, a0, 128641; RV64IMZICOND-NEXT: ret642;643; RV32IMBOTH-LABEL: select_umax_4:644; RV32IMBOTH: # %bb.0:645; RV32IMBOTH-NEXT: czero.nez a0, a1, a0646; RV32IMBOTH-NEXT: li a1, 128647; RV32IMBOTH-NEXT: maxu a0, a0, a1648; RV32IMBOTH-NEXT: ret649;650; RV64IMBOTH-LABEL: select_umax_4:651; RV64IMBOTH: # %bb.0:652; RV64IMBOTH-NEXT: czero.nez a0, a1, a0653; RV64IMBOTH-NEXT: sext.w a0, a0654; RV64IMBOTH-NEXT: li a1, 128655; RV64IMBOTH-NEXT: maxu a0, a0, a1656; RV64IMBOTH-NEXT: ret657 %minmax = call i32 @llvm.umax(i32 %x, i32 128)658 %sel = select i1 %cond, i32 128, i32 %minmax659 ret i32 %sel660}661 662define i32 @select_smin_1(i1 zeroext %cond, i32 %a, i32 %b) {663; RV32IM-LABEL: select_smin_1:664; RV32IM: # %bb.0: # %entry665; RV32IM-NEXT: bge a1, a2, .LBB8_3666; RV32IM-NEXT: # %bb.1: # %entry667; RV32IM-NEXT: beqz a0, .LBB8_4668; RV32IM-NEXT: .LBB8_2: # %entry669; RV32IM-NEXT: mv a0, a1670; RV32IM-NEXT: ret671; RV32IM-NEXT: .LBB8_3: # %entry672; RV32IM-NEXT: mv a1, a2673; RV32IM-NEXT: bnez a0, .LBB8_2674; RV32IM-NEXT: .LBB8_4: # %entry675; RV32IM-NEXT: mv a0, a2676; RV32IM-NEXT: ret677;678; RV64IM-LABEL: select_smin_1:679; RV64IM: # %bb.0: # %entry680; RV64IM-NEXT: sext.w a3, a2681; RV64IM-NEXT: sext.w a1, a1682; RV64IM-NEXT: bge a1, a3, .LBB8_3683; RV64IM-NEXT: # %bb.1: # %entry684; RV64IM-NEXT: beqz a0, .LBB8_4685; RV64IM-NEXT: .LBB8_2: # %entry686; RV64IM-NEXT: mv a0, a1687; RV64IM-NEXT: ret688; RV64IM-NEXT: .LBB8_3: # %entry689; RV64IM-NEXT: mv a1, a3690; RV64IM-NEXT: bnez a0, .LBB8_2691; RV64IM-NEXT: .LBB8_4: # %entry692; RV64IM-NEXT: mv a0, a2693; RV64IM-NEXT: ret694;695; RV32IMZBB-LABEL: select_smin_1:696; RV32IMZBB: # %bb.0: # %entry697; RV32IMZBB-NEXT: beqz a0, .LBB8_2698; RV32IMZBB-NEXT: # %bb.1:699; RV32IMZBB-NEXT: min a2, a1, a2700; RV32IMZBB-NEXT: .LBB8_2: # %entry701; RV32IMZBB-NEXT: mv a0, a2702; RV32IMZBB-NEXT: ret703;704; RV64IMZBB-LABEL: select_smin_1:705; RV64IMZBB: # %bb.0: # %entry706; RV64IMZBB-NEXT: beqz a0, .LBB8_2707; RV64IMZBB-NEXT: # %bb.1:708; RV64IMZBB-NEXT: sext.w a2, a2709; RV64IMZBB-NEXT: sext.w a1, a1710; RV64IMZBB-NEXT: min a2, a1, a2711; RV64IMZBB-NEXT: .LBB8_2: # %entry712; RV64IMZBB-NEXT: mv a0, a2713; RV64IMZBB-NEXT: ret714;715; RV32IMZICOND-LABEL: select_smin_1:716; RV32IMZICOND: # %bb.0: # %entry717; RV32IMZICOND-NEXT: slt a3, a1, a2718; RV32IMZICOND-NEXT: czero.nez a4, a2, a3719; RV32IMZICOND-NEXT: czero.eqz a1, a1, a3720; RV32IMZICOND-NEXT: or a1, a1, a4721; RV32IMZICOND-NEXT: czero.eqz a1, a1, a0722; RV32IMZICOND-NEXT: czero.nez a0, a2, a0723; RV32IMZICOND-NEXT: or a0, a1, a0724; RV32IMZICOND-NEXT: ret725;726; RV64IMZICOND-LABEL: select_smin_1:727; RV64IMZICOND: # %bb.0: # %entry728; RV64IMZICOND-NEXT: sext.w a3, a2729; RV64IMZICOND-NEXT: sext.w a1, a1730; RV64IMZICOND-NEXT: slt a4, a1, a3731; RV64IMZICOND-NEXT: czero.nez a3, a3, a4732; RV64IMZICOND-NEXT: czero.eqz a1, a1, a4733; RV64IMZICOND-NEXT: or a1, a1, a3734; RV64IMZICOND-NEXT: czero.eqz a1, a1, a0735; RV64IMZICOND-NEXT: czero.nez a0, a2, a0736; RV64IMZICOND-NEXT: or a0, a1, a0737; RV64IMZICOND-NEXT: ret738;739; RV32IMBOTH-LABEL: select_smin_1:740; RV32IMBOTH: # %bb.0: # %entry741; RV32IMBOTH-NEXT: min a1, a1, a2742; RV32IMBOTH-NEXT: czero.nez a2, a2, a0743; RV32IMBOTH-NEXT: czero.eqz a0, a1, a0744; RV32IMBOTH-NEXT: or a0, a0, a2745; RV32IMBOTH-NEXT: ret746;747; RV64IMBOTH-LABEL: select_smin_1:748; RV64IMBOTH: # %bb.0: # %entry749; RV64IMBOTH-NEXT: sext.w a3, a2750; RV64IMBOTH-NEXT: sext.w a1, a1751; RV64IMBOTH-NEXT: min a1, a1, a3752; RV64IMBOTH-NEXT: czero.nez a2, a2, a0753; RV64IMBOTH-NEXT: czero.eqz a0, a1, a0754; RV64IMBOTH-NEXT: or a0, a0, a2755; RV64IMBOTH-NEXT: ret756entry:757 %c = call i32 @llvm.smin(i32 %a, i32 %b)758 %res = select i1 %cond, i32 %c, i32 %b759 ret i32 %res760}761 762define i32 @select_smin_2(i1 zeroext %cond, i32 %a, i32 %b) {763; RV32IM-LABEL: select_smin_2:764; RV32IM: # %bb.0: # %entry765; RV32IM-NEXT: mv a3, a1766; RV32IM-NEXT: bge a1, a2, .LBB9_3767; RV32IM-NEXT: # %bb.1: # %entry768; RV32IM-NEXT: beqz a0, .LBB9_4769; RV32IM-NEXT: .LBB9_2: # %entry770; RV32IM-NEXT: mv a0, a1771; RV32IM-NEXT: ret772; RV32IM-NEXT: .LBB9_3: # %entry773; RV32IM-NEXT: mv a3, a2774; RV32IM-NEXT: bnez a0, .LBB9_2775; RV32IM-NEXT: .LBB9_4: # %entry776; RV32IM-NEXT: mv a0, a3777; RV32IM-NEXT: ret778;779; RV64IM-LABEL: select_smin_2:780; RV64IM: # %bb.0: # %entry781; RV64IM-NEXT: sext.w a3, a2782; RV64IM-NEXT: sext.w a2, a1783; RV64IM-NEXT: bge a2, a3, .LBB9_3784; RV64IM-NEXT: # %bb.1: # %entry785; RV64IM-NEXT: beqz a0, .LBB9_4786; RV64IM-NEXT: .LBB9_2: # %entry787; RV64IM-NEXT: mv a0, a1788; RV64IM-NEXT: ret789; RV64IM-NEXT: .LBB9_3: # %entry790; RV64IM-NEXT: mv a2, a3791; RV64IM-NEXT: bnez a0, .LBB9_2792; RV64IM-NEXT: .LBB9_4: # %entry793; RV64IM-NEXT: mv a0, a2794; RV64IM-NEXT: ret795;796; RV32IMZBB-LABEL: select_smin_2:797; RV32IMZBB: # %bb.0: # %entry798; RV32IMZBB-NEXT: bnez a0, .LBB9_2799; RV32IMZBB-NEXT: # %bb.1: # %entry800; RV32IMZBB-NEXT: min a1, a1, a2801; RV32IMZBB-NEXT: .LBB9_2: # %entry802; RV32IMZBB-NEXT: mv a0, a1803; RV32IMZBB-NEXT: ret804;805; RV64IMZBB-LABEL: select_smin_2:806; RV64IMZBB: # %bb.0: # %entry807; RV64IMZBB-NEXT: bnez a0, .LBB9_2808; RV64IMZBB-NEXT: # %bb.1: # %entry809; RV64IMZBB-NEXT: sext.w a2, a2810; RV64IMZBB-NEXT: sext.w a1, a1811; RV64IMZBB-NEXT: min a1, a1, a2812; RV64IMZBB-NEXT: .LBB9_2: # %entry813; RV64IMZBB-NEXT: mv a0, a1814; RV64IMZBB-NEXT: ret815;816; RV32IMZICOND-LABEL: select_smin_2:817; RV32IMZICOND: # %bb.0: # %entry818; RV32IMZICOND-NEXT: slt a3, a1, a2819; RV32IMZICOND-NEXT: czero.nez a2, a2, a3820; RV32IMZICOND-NEXT: czero.eqz a3, a1, a3821; RV32IMZICOND-NEXT: or a2, a3, a2822; RV32IMZICOND-NEXT: czero.nez a2, a2, a0823; RV32IMZICOND-NEXT: czero.eqz a0, a1, a0824; RV32IMZICOND-NEXT: or a0, a0, a2825; RV32IMZICOND-NEXT: ret826;827; RV64IMZICOND-LABEL: select_smin_2:828; RV64IMZICOND: # %bb.0: # %entry829; RV64IMZICOND-NEXT: sext.w a2, a2830; RV64IMZICOND-NEXT: sext.w a3, a1831; RV64IMZICOND-NEXT: slt a4, a3, a2832; RV64IMZICOND-NEXT: czero.nez a2, a2, a4833; RV64IMZICOND-NEXT: czero.eqz a3, a3, a4834; RV64IMZICOND-NEXT: or a2, a3, a2835; RV64IMZICOND-NEXT: czero.nez a2, a2, a0836; RV64IMZICOND-NEXT: czero.eqz a0, a1, a0837; RV64IMZICOND-NEXT: or a0, a0, a2838; RV64IMZICOND-NEXT: ret839;840; RV32IMBOTH-LABEL: select_smin_2:841; RV32IMBOTH: # %bb.0: # %entry842; RV32IMBOTH-NEXT: min a2, a1, a2843; RV32IMBOTH-NEXT: czero.eqz a1, a1, a0844; RV32IMBOTH-NEXT: czero.nez a0, a2, a0845; RV32IMBOTH-NEXT: or a0, a1, a0846; RV32IMBOTH-NEXT: ret847;848; RV64IMBOTH-LABEL: select_smin_2:849; RV64IMBOTH: # %bb.0: # %entry850; RV64IMBOTH-NEXT: sext.w a2, a2851; RV64IMBOTH-NEXT: sext.w a3, a1852; RV64IMBOTH-NEXT: min a2, a3, a2853; RV64IMBOTH-NEXT: czero.eqz a1, a1, a0854; RV64IMBOTH-NEXT: czero.nez a0, a2, a0855; RV64IMBOTH-NEXT: or a0, a1, a0856; RV64IMBOTH-NEXT: ret857entry:858 %c = call i32 @llvm.smin(i32 %a, i32 %b)859 %res = select i1 %cond, i32 %a, i32 %c860 ret i32 %res861}862 863define i32 @select_smin_3(i1 zeroext %cond, i32 %a) {864; RV32IM-LABEL: select_smin_3:865; RV32IM: # %bb.0: # %entry866; RV32IM-NEXT: li a3, 32867; RV32IM-NEXT: mv a2, a1868; RV32IM-NEXT: bge a1, a3, .LBB10_3869; RV32IM-NEXT: # %bb.1: # %entry870; RV32IM-NEXT: beqz a0, .LBB10_4871; RV32IM-NEXT: .LBB10_2: # %entry872; RV32IM-NEXT: mv a0, a1873; RV32IM-NEXT: ret874; RV32IM-NEXT: .LBB10_3: # %entry875; RV32IM-NEXT: li a2, 32876; RV32IM-NEXT: bnez a0, .LBB10_2877; RV32IM-NEXT: .LBB10_4: # %entry878; RV32IM-NEXT: mv a0, a2879; RV32IM-NEXT: ret880;881; RV64IM-LABEL: select_smin_3:882; RV64IM: # %bb.0: # %entry883; RV64IM-NEXT: sext.w a2, a1884; RV64IM-NEXT: li a3, 32885; RV64IM-NEXT: bge a2, a3, .LBB10_3886; RV64IM-NEXT: # %bb.1: # %entry887; RV64IM-NEXT: beqz a0, .LBB10_4888; RV64IM-NEXT: .LBB10_2: # %entry889; RV64IM-NEXT: mv a0, a1890; RV64IM-NEXT: ret891; RV64IM-NEXT: .LBB10_3: # %entry892; RV64IM-NEXT: li a2, 32893; RV64IM-NEXT: bnez a0, .LBB10_2894; RV64IM-NEXT: .LBB10_4: # %entry895; RV64IM-NEXT: mv a0, a2896; RV64IM-NEXT: ret897;898; RV32IMZBB-LABEL: select_smin_3:899; RV32IMZBB: # %bb.0: # %entry900; RV32IMZBB-NEXT: bnez a0, .LBB10_2901; RV32IMZBB-NEXT: # %bb.1: # %entry902; RV32IMZBB-NEXT: li a0, 32903; RV32IMZBB-NEXT: min a1, a1, a0904; RV32IMZBB-NEXT: .LBB10_2: # %entry905; RV32IMZBB-NEXT: mv a0, a1906; RV32IMZBB-NEXT: ret907;908; RV64IMZBB-LABEL: select_smin_3:909; RV64IMZBB: # %bb.0: # %entry910; RV64IMZBB-NEXT: bnez a0, .LBB10_2911; RV64IMZBB-NEXT: # %bb.1: # %entry912; RV64IMZBB-NEXT: sext.w a1, a1913; RV64IMZBB-NEXT: li a0, 32914; RV64IMZBB-NEXT: min a1, a1, a0915; RV64IMZBB-NEXT: .LBB10_2: # %entry916; RV64IMZBB-NEXT: mv a0, a1917; RV64IMZBB-NEXT: ret918;919; RV32IMZICOND-LABEL: select_smin_3:920; RV32IMZICOND: # %bb.0: # %entry921; RV32IMZICOND-NEXT: slti a2, a1, 32922; RV32IMZICOND-NEXT: addi a3, a1, -32923; RV32IMZICOND-NEXT: czero.eqz a2, a3, a2924; RV32IMZICOND-NEXT: addi a2, a2, 32925; RV32IMZICOND-NEXT: czero.eqz a1, a1, a0926; RV32IMZICOND-NEXT: czero.nez a0, a2, a0927; RV32IMZICOND-NEXT: or a0, a1, a0928; RV32IMZICOND-NEXT: ret929;930; RV64IMZICOND-LABEL: select_smin_3:931; RV64IMZICOND: # %bb.0: # %entry932; RV64IMZICOND-NEXT: sext.w a2, a1933; RV64IMZICOND-NEXT: slti a3, a2, 32934; RV64IMZICOND-NEXT: addi a2, a2, -32935; RV64IMZICOND-NEXT: czero.eqz a2, a2, a3936; RV64IMZICOND-NEXT: addi a2, a2, 32937; RV64IMZICOND-NEXT: czero.eqz a1, a1, a0938; RV64IMZICOND-NEXT: czero.nez a0, a2, a0939; RV64IMZICOND-NEXT: or a0, a1, a0940; RV64IMZICOND-NEXT: ret941;942; RV32IMBOTH-LABEL: select_smin_3:943; RV32IMBOTH: # %bb.0: # %entry944; RV32IMBOTH-NEXT: li a2, 32945; RV32IMBOTH-NEXT: min a2, a1, a2946; RV32IMBOTH-NEXT: czero.eqz a1, a1, a0947; RV32IMBOTH-NEXT: czero.nez a0, a2, a0948; RV32IMBOTH-NEXT: or a0, a1, a0949; RV32IMBOTH-NEXT: ret950;951; RV64IMBOTH-LABEL: select_smin_3:952; RV64IMBOTH: # %bb.0: # %entry953; RV64IMBOTH-NEXT: sext.w a2, a1954; RV64IMBOTH-NEXT: li a3, 32955; RV64IMBOTH-NEXT: min a2, a2, a3956; RV64IMBOTH-NEXT: czero.eqz a1, a1, a0957; RV64IMBOTH-NEXT: czero.nez a0, a2, a0958; RV64IMBOTH-NEXT: or a0, a1, a0959; RV64IMBOTH-NEXT: ret960entry:961 %c = call i32 @llvm.smin(i32 %a, i32 32)962 %res = select i1 %cond, i32 %a, i32 %c963 ret i32 %res964}965 966define i32 @select_smin_4(i1 zeroext %cond, i32 %x) {967; RV32IM-LABEL: select_smin_4:968; RV32IM: # %bb.0:969; RV32IM-NEXT: li a2, 128970; RV32IM-NEXT: bge a1, a2, .LBB11_3971; RV32IM-NEXT: # %bb.1:972; RV32IM-NEXT: beqz a0, .LBB11_4973; RV32IM-NEXT: .LBB11_2:974; RV32IM-NEXT: mv a0, a2975; RV32IM-NEXT: ret976; RV32IM-NEXT: .LBB11_3:977; RV32IM-NEXT: li a1, 128978; RV32IM-NEXT: bnez a0, .LBB11_2979; RV32IM-NEXT: .LBB11_4:980; RV32IM-NEXT: mv a0, a1981; RV32IM-NEXT: ret982;983; RV64IM-LABEL: select_smin_4:984; RV64IM: # %bb.0:985; RV64IM-NEXT: sext.w a2, a1986; RV64IM-NEXT: li a1, 128987; RV64IM-NEXT: bge a2, a1, .LBB11_3988; RV64IM-NEXT: # %bb.1:989; RV64IM-NEXT: beqz a0, .LBB11_4990; RV64IM-NEXT: .LBB11_2:991; RV64IM-NEXT: mv a0, a1992; RV64IM-NEXT: ret993; RV64IM-NEXT: .LBB11_3:994; RV64IM-NEXT: li a2, 128995; RV64IM-NEXT: bnez a0, .LBB11_2996; RV64IM-NEXT: .LBB11_4:997; RV64IM-NEXT: mv a0, a2998; RV64IM-NEXT: ret999;1000; RV32IMZBB-LABEL: select_smin_4:1001; RV32IMZBB: # %bb.0:1002; RV32IMZBB-NEXT: mv a2, a01003; RV32IMZBB-NEXT: li a0, 1281004; RV32IMZBB-NEXT: bnez a2, .LBB11_21005; RV32IMZBB-NEXT: # %bb.1:1006; RV32IMZBB-NEXT: min a0, a1, a01007; RV32IMZBB-NEXT: .LBB11_2:1008; RV32IMZBB-NEXT: ret1009;1010; RV64IMZBB-LABEL: select_smin_4:1011; RV64IMZBB: # %bb.0:1012; RV64IMZBB-NEXT: mv a2, a01013; RV64IMZBB-NEXT: li a0, 1281014; RV64IMZBB-NEXT: bnez a2, .LBB11_21015; RV64IMZBB-NEXT: # %bb.1:1016; RV64IMZBB-NEXT: sext.w a1, a11017; RV64IMZBB-NEXT: min a0, a1, a01018; RV64IMZBB-NEXT: .LBB11_2:1019; RV64IMZBB-NEXT: ret1020;1021; RV32IMZICOND-LABEL: select_smin_4:1022; RV32IMZICOND: # %bb.0:1023; RV32IMZICOND-NEXT: slti a2, a1, 1281024; RV32IMZICOND-NEXT: addi a1, a1, -1281025; RV32IMZICOND-NEXT: czero.eqz a1, a1, a21026; RV32IMZICOND-NEXT: czero.nez a0, a1, a01027; RV32IMZICOND-NEXT: addi a0, a0, 1281028; RV32IMZICOND-NEXT: ret1029;1030; RV64IMZICOND-LABEL: select_smin_4:1031; RV64IMZICOND: # %bb.0:1032; RV64IMZICOND-NEXT: sext.w a1, a11033; RV64IMZICOND-NEXT: slti a2, a1, 1281034; RV64IMZICOND-NEXT: addi a1, a1, -1281035; RV64IMZICOND-NEXT: czero.eqz a1, a1, a21036; RV64IMZICOND-NEXT: czero.nez a0, a1, a01037; RV64IMZICOND-NEXT: addi a0, a0, 1281038; RV64IMZICOND-NEXT: ret1039;1040; RV32IMBOTH-LABEL: select_smin_4:1041; RV32IMBOTH: # %bb.0:1042; RV32IMBOTH-NEXT: li a2, 1281043; RV32IMBOTH-NEXT: min a1, a1, a21044; RV32IMBOTH-NEXT: addi a1, a1, -1281045; RV32IMBOTH-NEXT: czero.nez a0, a1, a01046; RV32IMBOTH-NEXT: addi a0, a0, 1281047; RV32IMBOTH-NEXT: ret1048;1049; RV64IMBOTH-LABEL: select_smin_4:1050; RV64IMBOTH: # %bb.0:1051; RV64IMBOTH-NEXT: sext.w a1, a11052; RV64IMBOTH-NEXT: li a2, 1281053; RV64IMBOTH-NEXT: min a1, a1, a21054; RV64IMBOTH-NEXT: addi a1, a1, -1281055; RV64IMBOTH-NEXT: czero.nez a0, a1, a01056; RV64IMBOTH-NEXT: addi a0, a0, 1281057; RV64IMBOTH-NEXT: ret1058 %minmax = call i32 @llvm.smin(i32 %x, i32 128)1059 %sel = select i1 %cond, i32 128, i32 %minmax1060 ret i32 %sel1061}1062 1063define i32 @select_smax_1(i1 zeroext %cond, i32 %a, i32 %b) {1064; RV32IM-LABEL: select_smax_1:1065; RV32IM: # %bb.0: # %entry1066; RV32IM-NEXT: bge a2, a1, .LBB12_31067; RV32IM-NEXT: # %bb.1: # %entry1068; RV32IM-NEXT: beqz a0, .LBB12_41069; RV32IM-NEXT: .LBB12_2: # %entry1070; RV32IM-NEXT: mv a0, a11071; RV32IM-NEXT: ret1072; RV32IM-NEXT: .LBB12_3: # %entry1073; RV32IM-NEXT: mv a1, a21074; RV32IM-NEXT: bnez a0, .LBB12_21075; RV32IM-NEXT: .LBB12_4: # %entry1076; RV32IM-NEXT: mv a0, a21077; RV32IM-NEXT: ret1078;1079; RV64IM-LABEL: select_smax_1:1080; RV64IM: # %bb.0: # %entry1081; RV64IM-NEXT: sext.w a1, a11082; RV64IM-NEXT: sext.w a3, a21083; RV64IM-NEXT: bge a3, a1, .LBB12_31084; RV64IM-NEXT: # %bb.1: # %entry1085; RV64IM-NEXT: beqz a0, .LBB12_41086; RV64IM-NEXT: .LBB12_2: # %entry1087; RV64IM-NEXT: mv a0, a11088; RV64IM-NEXT: ret1089; RV64IM-NEXT: .LBB12_3: # %entry1090; RV64IM-NEXT: mv a1, a31091; RV64IM-NEXT: bnez a0, .LBB12_21092; RV64IM-NEXT: .LBB12_4: # %entry1093; RV64IM-NEXT: mv a0, a21094; RV64IM-NEXT: ret1095;1096; RV32IMZBB-LABEL: select_smax_1:1097; RV32IMZBB: # %bb.0: # %entry1098; RV32IMZBB-NEXT: beqz a0, .LBB12_21099; RV32IMZBB-NEXT: # %bb.1:1100; RV32IMZBB-NEXT: max a2, a1, a21101; RV32IMZBB-NEXT: .LBB12_2: # %entry1102; RV32IMZBB-NEXT: mv a0, a21103; RV32IMZBB-NEXT: ret1104;1105; RV64IMZBB-LABEL: select_smax_1:1106; RV64IMZBB: # %bb.0: # %entry1107; RV64IMZBB-NEXT: beqz a0, .LBB12_21108; RV64IMZBB-NEXT: # %bb.1:1109; RV64IMZBB-NEXT: sext.w a2, a21110; RV64IMZBB-NEXT: sext.w a1, a11111; RV64IMZBB-NEXT: max a2, a1, a21112; RV64IMZBB-NEXT: .LBB12_2: # %entry1113; RV64IMZBB-NEXT: mv a0, a21114; RV64IMZBB-NEXT: ret1115;1116; RV32IMZICOND-LABEL: select_smax_1:1117; RV32IMZICOND: # %bb.0: # %entry1118; RV32IMZICOND-NEXT: slt a3, a2, a11119; RV32IMZICOND-NEXT: czero.nez a4, a2, a31120; RV32IMZICOND-NEXT: czero.eqz a1, a1, a31121; RV32IMZICOND-NEXT: or a1, a1, a41122; RV32IMZICOND-NEXT: czero.eqz a1, a1, a01123; RV32IMZICOND-NEXT: czero.nez a0, a2, a01124; RV32IMZICOND-NEXT: or a0, a1, a01125; RV32IMZICOND-NEXT: ret1126;1127; RV64IMZICOND-LABEL: select_smax_1:1128; RV64IMZICOND: # %bb.0: # %entry1129; RV64IMZICOND-NEXT: sext.w a1, a11130; RV64IMZICOND-NEXT: sext.w a3, a21131; RV64IMZICOND-NEXT: slt a4, a3, a11132; RV64IMZICOND-NEXT: czero.nez a3, a3, a41133; RV64IMZICOND-NEXT: czero.eqz a1, a1, a41134; RV64IMZICOND-NEXT: or a1, a1, a31135; RV64IMZICOND-NEXT: czero.eqz a1, a1, a01136; RV64IMZICOND-NEXT: czero.nez a0, a2, a01137; RV64IMZICOND-NEXT: or a0, a1, a01138; RV64IMZICOND-NEXT: ret1139;1140; RV32IMBOTH-LABEL: select_smax_1:1141; RV32IMBOTH: # %bb.0: # %entry1142; RV32IMBOTH-NEXT: max a1, a1, a21143; RV32IMBOTH-NEXT: czero.nez a2, a2, a01144; RV32IMBOTH-NEXT: czero.eqz a0, a1, a01145; RV32IMBOTH-NEXT: or a0, a0, a21146; RV32IMBOTH-NEXT: ret1147;1148; RV64IMBOTH-LABEL: select_smax_1:1149; RV64IMBOTH: # %bb.0: # %entry1150; RV64IMBOTH-NEXT: sext.w a3, a21151; RV64IMBOTH-NEXT: sext.w a1, a11152; RV64IMBOTH-NEXT: max a1, a1, a31153; RV64IMBOTH-NEXT: czero.nez a2, a2, a01154; RV64IMBOTH-NEXT: czero.eqz a0, a1, a01155; RV64IMBOTH-NEXT: or a0, a0, a21156; RV64IMBOTH-NEXT: ret1157entry:1158 %c = call i32 @llvm.smax(i32 %a, i32 %b)1159 %res = select i1 %cond, i32 %c, i32 %b1160 ret i32 %res1161}1162 1163define i32 @select_smax_2(i1 zeroext %cond, i32 %a, i32 %b) {1164; RV32IM-LABEL: select_smax_2:1165; RV32IM: # %bb.0: # %entry1166; RV32IM-NEXT: mv a3, a11167; RV32IM-NEXT: bge a2, a1, .LBB13_31168; RV32IM-NEXT: # %bb.1: # %entry1169; RV32IM-NEXT: beqz a0, .LBB13_41170; RV32IM-NEXT: .LBB13_2: # %entry1171; RV32IM-NEXT: mv a0, a11172; RV32IM-NEXT: ret1173; RV32IM-NEXT: .LBB13_3: # %entry1174; RV32IM-NEXT: mv a3, a21175; RV32IM-NEXT: bnez a0, .LBB13_21176; RV32IM-NEXT: .LBB13_4: # %entry1177; RV32IM-NEXT: mv a0, a31178; RV32IM-NEXT: ret1179;1180; RV64IM-LABEL: select_smax_2:1181; RV64IM: # %bb.0: # %entry1182; RV64IM-NEXT: sext.w a3, a11183; RV64IM-NEXT: sext.w a2, a21184; RV64IM-NEXT: bge a2, a3, .LBB13_31185; RV64IM-NEXT: # %bb.1: # %entry1186; RV64IM-NEXT: beqz a0, .LBB13_41187; RV64IM-NEXT: .LBB13_2: # %entry1188; RV64IM-NEXT: mv a0, a11189; RV64IM-NEXT: ret1190; RV64IM-NEXT: .LBB13_3: # %entry1191; RV64IM-NEXT: mv a3, a21192; RV64IM-NEXT: bnez a0, .LBB13_21193; RV64IM-NEXT: .LBB13_4: # %entry1194; RV64IM-NEXT: mv a0, a31195; RV64IM-NEXT: ret1196;1197; RV32IMZBB-LABEL: select_smax_2:1198; RV32IMZBB: # %bb.0: # %entry1199; RV32IMZBB-NEXT: bnez a0, .LBB13_21200; RV32IMZBB-NEXT: # %bb.1: # %entry1201; RV32IMZBB-NEXT: max a1, a1, a21202; RV32IMZBB-NEXT: .LBB13_2: # %entry1203; RV32IMZBB-NEXT: mv a0, a11204; RV32IMZBB-NEXT: ret1205;1206; RV64IMZBB-LABEL: select_smax_2:1207; RV64IMZBB: # %bb.0: # %entry1208; RV64IMZBB-NEXT: bnez a0, .LBB13_21209; RV64IMZBB-NEXT: # %bb.1: # %entry1210; RV64IMZBB-NEXT: sext.w a2, a21211; RV64IMZBB-NEXT: sext.w a1, a11212; RV64IMZBB-NEXT: max a1, a1, a21213; RV64IMZBB-NEXT: .LBB13_2: # %entry1214; RV64IMZBB-NEXT: mv a0, a11215; RV64IMZBB-NEXT: ret1216;1217; RV32IMZICOND-LABEL: select_smax_2:1218; RV32IMZICOND: # %bb.0: # %entry1219; RV32IMZICOND-NEXT: slt a3, a2, a11220; RV32IMZICOND-NEXT: czero.nez a2, a2, a31221; RV32IMZICOND-NEXT: czero.eqz a3, a1, a31222; RV32IMZICOND-NEXT: or a2, a3, a21223; RV32IMZICOND-NEXT: czero.nez a2, a2, a01224; RV32IMZICOND-NEXT: czero.eqz a0, a1, a01225; RV32IMZICOND-NEXT: or a0, a0, a21226; RV32IMZICOND-NEXT: ret1227;1228; RV64IMZICOND-LABEL: select_smax_2:1229; RV64IMZICOND: # %bb.0: # %entry1230; RV64IMZICOND-NEXT: sext.w a3, a11231; RV64IMZICOND-NEXT: sext.w a2, a21232; RV64IMZICOND-NEXT: slt a4, a2, a31233; RV64IMZICOND-NEXT: czero.nez a2, a2, a41234; RV64IMZICOND-NEXT: czero.eqz a3, a3, a41235; RV64IMZICOND-NEXT: or a2, a3, a21236; RV64IMZICOND-NEXT: czero.nez a2, a2, a01237; RV64IMZICOND-NEXT: czero.eqz a0, a1, a01238; RV64IMZICOND-NEXT: or a0, a0, a21239; RV64IMZICOND-NEXT: ret1240;1241; RV32IMBOTH-LABEL: select_smax_2:1242; RV32IMBOTH: # %bb.0: # %entry1243; RV32IMBOTH-NEXT: max a2, a1, a21244; RV32IMBOTH-NEXT: czero.eqz a1, a1, a01245; RV32IMBOTH-NEXT: czero.nez a0, a2, a01246; RV32IMBOTH-NEXT: or a0, a1, a01247; RV32IMBOTH-NEXT: ret1248;1249; RV64IMBOTH-LABEL: select_smax_2:1250; RV64IMBOTH: # %bb.0: # %entry1251; RV64IMBOTH-NEXT: sext.w a2, a21252; RV64IMBOTH-NEXT: sext.w a3, a11253; RV64IMBOTH-NEXT: max a2, a3, a21254; RV64IMBOTH-NEXT: czero.eqz a1, a1, a01255; RV64IMBOTH-NEXT: czero.nez a0, a2, a01256; RV64IMBOTH-NEXT: or a0, a1, a01257; RV64IMBOTH-NEXT: ret1258entry:1259 %c = call i32 @llvm.smax(i32 %a, i32 %b)1260 %res = select i1 %cond, i32 %a, i32 %c1261 ret i32 %res1262}1263 1264define i32 @select_smax_3(i1 zeroext %cond, i32 %a) {1265; RV32IM-LABEL: select_smax_3:1266; RV32IM: # %bb.0: # %entry1267; RV32IM-NEXT: li a3, 321268; RV32IM-NEXT: mv a2, a11269; RV32IM-NEXT: bge a3, a1, .LBB14_31270; RV32IM-NEXT: # %bb.1: # %entry1271; RV32IM-NEXT: beqz a0, .LBB14_41272; RV32IM-NEXT: .LBB14_2: # %entry1273; RV32IM-NEXT: mv a0, a11274; RV32IM-NEXT: ret1275; RV32IM-NEXT: .LBB14_3: # %entry1276; RV32IM-NEXT: li a2, 321277; RV32IM-NEXT: bnez a0, .LBB14_21278; RV32IM-NEXT: .LBB14_4: # %entry1279; RV32IM-NEXT: mv a0, a21280; RV32IM-NEXT: ret1281;1282; RV64IM-LABEL: select_smax_3:1283; RV64IM: # %bb.0: # %entry1284; RV64IM-NEXT: sext.w a2, a11285; RV64IM-NEXT: li a3, 321286; RV64IM-NEXT: bge a3, a2, .LBB14_31287; RV64IM-NEXT: # %bb.1: # %entry1288; RV64IM-NEXT: beqz a0, .LBB14_41289; RV64IM-NEXT: .LBB14_2: # %entry1290; RV64IM-NEXT: mv a0, a11291; RV64IM-NEXT: ret1292; RV64IM-NEXT: .LBB14_3: # %entry1293; RV64IM-NEXT: li a2, 321294; RV64IM-NEXT: bnez a0, .LBB14_21295; RV64IM-NEXT: .LBB14_4: # %entry1296; RV64IM-NEXT: mv a0, a21297; RV64IM-NEXT: ret1298;1299; RV32IMZBB-LABEL: select_smax_3:1300; RV32IMZBB: # %bb.0: # %entry1301; RV32IMZBB-NEXT: bnez a0, .LBB14_21302; RV32IMZBB-NEXT: # %bb.1: # %entry1303; RV32IMZBB-NEXT: li a0, 321304; RV32IMZBB-NEXT: max a1, a1, a01305; RV32IMZBB-NEXT: .LBB14_2: # %entry1306; RV32IMZBB-NEXT: mv a0, a11307; RV32IMZBB-NEXT: ret1308;1309; RV64IMZBB-LABEL: select_smax_3:1310; RV64IMZBB: # %bb.0: # %entry1311; RV64IMZBB-NEXT: bnez a0, .LBB14_21312; RV64IMZBB-NEXT: # %bb.1: # %entry1313; RV64IMZBB-NEXT: sext.w a1, a11314; RV64IMZBB-NEXT: li a0, 321315; RV64IMZBB-NEXT: max a1, a1, a01316; RV64IMZBB-NEXT: .LBB14_2: # %entry1317; RV64IMZBB-NEXT: mv a0, a11318; RV64IMZBB-NEXT: ret1319;1320; RV32IMZICOND-LABEL: select_smax_3:1321; RV32IMZICOND: # %bb.0: # %entry1322; RV32IMZICOND-NEXT: slti a2, a1, 331323; RV32IMZICOND-NEXT: addi a3, a1, -321324; RV32IMZICOND-NEXT: czero.nez a2, a3, a21325; RV32IMZICOND-NEXT: addi a2, a2, 321326; RV32IMZICOND-NEXT: czero.eqz a1, a1, a01327; RV32IMZICOND-NEXT: czero.nez a0, a2, a01328; RV32IMZICOND-NEXT: or a0, a1, a01329; RV32IMZICOND-NEXT: ret1330;1331; RV64IMZICOND-LABEL: select_smax_3:1332; RV64IMZICOND: # %bb.0: # %entry1333; RV64IMZICOND-NEXT: sext.w a2, a11334; RV64IMZICOND-NEXT: slti a3, a2, 331335; RV64IMZICOND-NEXT: addi a2, a2, -321336; RV64IMZICOND-NEXT: czero.nez a2, a2, a31337; RV64IMZICOND-NEXT: addi a2, a2, 321338; RV64IMZICOND-NEXT: czero.eqz a1, a1, a01339; RV64IMZICOND-NEXT: czero.nez a0, a2, a01340; RV64IMZICOND-NEXT: or a0, a1, a01341; RV64IMZICOND-NEXT: ret1342;1343; RV32IMBOTH-LABEL: select_smax_3:1344; RV32IMBOTH: # %bb.0: # %entry1345; RV32IMBOTH-NEXT: li a2, 321346; RV32IMBOTH-NEXT: max a2, a1, a21347; RV32IMBOTH-NEXT: czero.eqz a1, a1, a01348; RV32IMBOTH-NEXT: czero.nez a0, a2, a01349; RV32IMBOTH-NEXT: or a0, a1, a01350; RV32IMBOTH-NEXT: ret1351;1352; RV64IMBOTH-LABEL: select_smax_3:1353; RV64IMBOTH: # %bb.0: # %entry1354; RV64IMBOTH-NEXT: sext.w a2, a11355; RV64IMBOTH-NEXT: li a3, 321356; RV64IMBOTH-NEXT: max a2, a2, a31357; RV64IMBOTH-NEXT: czero.eqz a1, a1, a01358; RV64IMBOTH-NEXT: czero.nez a0, a2, a01359; RV64IMBOTH-NEXT: or a0, a1, a01360; RV64IMBOTH-NEXT: ret1361entry:1362 %c = call i32 @llvm.smax(i32 %a, i32 32)1363 %res = select i1 %cond, i32 %a, i32 %c1364 ret i32 %res1365}1366 1367define i32 @select_smax_4(i1 zeroext %cond, i32 %x) {1368; RV32IM-LABEL: select_smax_4:1369; RV32IM: # %bb.0:1370; RV32IM-NEXT: li a2, 1281371; RV32IM-NEXT: bge a2, a1, .LBB15_31372; RV32IM-NEXT: # %bb.1:1373; RV32IM-NEXT: beqz a0, .LBB15_41374; RV32IM-NEXT: .LBB15_2:1375; RV32IM-NEXT: mv a0, a21376; RV32IM-NEXT: ret1377; RV32IM-NEXT: .LBB15_3:1378; RV32IM-NEXT: li a1, 1281379; RV32IM-NEXT: bnez a0, .LBB15_21380; RV32IM-NEXT: .LBB15_4:1381; RV32IM-NEXT: mv a0, a11382; RV32IM-NEXT: ret1383;1384; RV64IM-LABEL: select_smax_4:1385; RV64IM: # %bb.0:1386; RV64IM-NEXT: sext.w a2, a11387; RV64IM-NEXT: li a1, 1281388; RV64IM-NEXT: bge a1, a2, .LBB15_31389; RV64IM-NEXT: # %bb.1:1390; RV64IM-NEXT: beqz a0, .LBB15_41391; RV64IM-NEXT: .LBB15_2:1392; RV64IM-NEXT: mv a0, a11393; RV64IM-NEXT: ret1394; RV64IM-NEXT: .LBB15_3:1395; RV64IM-NEXT: li a2, 1281396; RV64IM-NEXT: bnez a0, .LBB15_21397; RV64IM-NEXT: .LBB15_4:1398; RV64IM-NEXT: mv a0, a21399; RV64IM-NEXT: ret1400;1401; RV32IMZBB-LABEL: select_smax_4:1402; RV32IMZBB: # %bb.0:1403; RV32IMZBB-NEXT: mv a2, a01404; RV32IMZBB-NEXT: li a0, 1281405; RV32IMZBB-NEXT: bnez a2, .LBB15_21406; RV32IMZBB-NEXT: # %bb.1:1407; RV32IMZBB-NEXT: max a0, a1, a01408; RV32IMZBB-NEXT: .LBB15_2:1409; RV32IMZBB-NEXT: ret1410;1411; RV64IMZBB-LABEL: select_smax_4:1412; RV64IMZBB: # %bb.0:1413; RV64IMZBB-NEXT: mv a2, a01414; RV64IMZBB-NEXT: li a0, 1281415; RV64IMZBB-NEXT: bnez a2, .LBB15_21416; RV64IMZBB-NEXT: # %bb.1:1417; RV64IMZBB-NEXT: sext.w a1, a11418; RV64IMZBB-NEXT: max a0, a1, a01419; RV64IMZBB-NEXT: .LBB15_2:1420; RV64IMZBB-NEXT: ret1421;1422; RV32IMZICOND-LABEL: select_smax_4:1423; RV32IMZICOND: # %bb.0:1424; RV32IMZICOND-NEXT: slti a2, a1, 1291425; RV32IMZICOND-NEXT: addi a1, a1, -1281426; RV32IMZICOND-NEXT: czero.nez a1, a1, a21427; RV32IMZICOND-NEXT: czero.nez a0, a1, a01428; RV32IMZICOND-NEXT: addi a0, a0, 1281429; RV32IMZICOND-NEXT: ret1430;1431; RV64IMZICOND-LABEL: select_smax_4:1432; RV64IMZICOND: # %bb.0:1433; RV64IMZICOND-NEXT: sext.w a1, a11434; RV64IMZICOND-NEXT: slti a2, a1, 1291435; RV64IMZICOND-NEXT: addi a1, a1, -1281436; RV64IMZICOND-NEXT: czero.nez a1, a1, a21437; RV64IMZICOND-NEXT: czero.nez a0, a1, a01438; RV64IMZICOND-NEXT: addi a0, a0, 1281439; RV64IMZICOND-NEXT: ret1440;1441; RV32IMBOTH-LABEL: select_smax_4:1442; RV32IMBOTH: # %bb.0:1443; RV32IMBOTH-NEXT: li a2, 1281444; RV32IMBOTH-NEXT: max a1, a1, a21445; RV32IMBOTH-NEXT: addi a1, a1, -1281446; RV32IMBOTH-NEXT: czero.nez a0, a1, a01447; RV32IMBOTH-NEXT: addi a0, a0, 1281448; RV32IMBOTH-NEXT: ret1449;1450; RV64IMBOTH-LABEL: select_smax_4:1451; RV64IMBOTH: # %bb.0:1452; RV64IMBOTH-NEXT: sext.w a1, a11453; RV64IMBOTH-NEXT: li a2, 1281454; RV64IMBOTH-NEXT: max a1, a1, a21455; RV64IMBOTH-NEXT: addi a1, a1, -1281456; RV64IMBOTH-NEXT: czero.nez a0, a1, a01457; RV64IMBOTH-NEXT: addi a0, a0, 1281458; RV64IMBOTH-NEXT: ret1459 %minmax = call i32 @llvm.smax(i32 %x, i32 128)1460 %sel = select i1 %cond, i32 128, i32 %minmax1461 ret i32 %sel1462}1463