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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62; RUN: llc < %s -verify-machineinstrs -mtriple=riscv32 -mattr=+experimental-xqcili | FileCheck %s --check-prefixes=RV32I3; RUN: llc < %s -verify-machineinstrs -mtriple=riscv64 | FileCheck %s --check-prefixes=RV64I4; RUN: llc < %s -verify-machineinstrs -mtriple=riscv32 -mattr=+experimental-xqcili,+short-forward-branch-ialu | \5; RUN: FileCheck %s --check-prefixes=RV32I-SFB6; RUN: llc < %s -verify-machineinstrs -mtriple=riscv64 -mattr=+short-forward-branch-ialu | \7; RUN: FileCheck %s --check-prefixes=RV64I-SFB8 9define i32 @select_example_1(i32 %a, i32 %b, i1 zeroext %x, i32 %y) {10; RV32I-LABEL: select_example_1:11; RV32I: # %bb.0: # %entry12; RV32I-NEXT: lui a0, 1613; RV32I-NEXT: bnez a2, .LBB0_214; RV32I-NEXT: # %bb.1: # %entry15; RV32I-NEXT: mv a0, a116; RV32I-NEXT: .LBB0_2: # %entry17; RV32I-NEXT: ret18;19; RV64I-LABEL: select_example_1:20; RV64I: # %bb.0: # %entry21; RV64I-NEXT: lui a0, 1622; RV64I-NEXT: bnez a2, .LBB0_223; RV64I-NEXT: # %bb.1: # %entry24; RV64I-NEXT: mv a0, a125; RV64I-NEXT: .LBB0_2: # %entry26; RV64I-NEXT: ret27;28; RV32I-SFB-LABEL: select_example_1:29; RV32I-SFB: # %bb.0: # %entry30; RV32I-SFB-NEXT: mv a0, a131; RV32I-SFB-NEXT: beqz a2, .LBB0_232; RV32I-SFB-NEXT: # %bb.1: # %entry33; RV32I-SFB-NEXT: lui a0, 1634; RV32I-SFB-NEXT: .LBB0_2: # %entry35; RV32I-SFB-NEXT: ret36;37; RV64I-SFB-LABEL: select_example_1:38; RV64I-SFB: # %bb.0: # %entry39; RV64I-SFB-NEXT: mv a0, a140; RV64I-SFB-NEXT: beqz a2, .LBB0_241; RV64I-SFB-NEXT: # %bb.1: # %entry42; RV64I-SFB-NEXT: lui a0, 1643; RV64I-SFB-NEXT: .LBB0_2: # %entry44; RV64I-SFB-NEXT: ret45entry:46 %sel = select i1 %x, i32 65536, i32 %b47 ret i32 %sel48}49 50define i32 @select_example_2(i32 %a, i32 %b, i1 zeroext %x, i32 %y) {51; RV32I-LABEL: select_example_2:52; RV32I: # %bb.0: # %entry53; RV32I-NEXT: bnez a2, .LBB1_254; RV32I-NEXT: # %bb.1: # %entry55; RV32I-NEXT: mv a0, a156; RV32I-NEXT: ret57; RV32I-NEXT: .LBB1_2:58; RV32I-NEXT: qc.li a0, 6554359; RV32I-NEXT: ret60;61; RV64I-LABEL: select_example_2:62; RV64I: # %bb.0: # %entry63; RV64I-NEXT: bnez a2, .LBB1_264; RV64I-NEXT: # %bb.1: # %entry65; RV64I-NEXT: mv a0, a166; RV64I-NEXT: ret67; RV64I-NEXT: .LBB1_2:68; RV64I-NEXT: lui a0, 1669; RV64I-NEXT: addi a0, a0, 770; RV64I-NEXT: ret71;72; RV32I-SFB-LABEL: select_example_2:73; RV32I-SFB: # %bb.0: # %entry74; RV32I-SFB-NEXT: mv a0, a175; RV32I-SFB-NEXT: beqz a2, .LBB1_276; RV32I-SFB-NEXT: # %bb.1: # %entry77; RV32I-SFB-NEXT: qc.li a0, 6554378; RV32I-SFB-NEXT: .LBB1_2: # %entry79; RV32I-SFB-NEXT: ret80;81; RV64I-SFB-LABEL: select_example_2:82; RV64I-SFB: # %bb.0: # %entry83; RV64I-SFB-NEXT: mv a0, a184; RV64I-SFB-NEXT: lui a1, 1685; RV64I-SFB-NEXT: beqz a2, .LBB1_286; RV64I-SFB-NEXT: # %bb.1: # %entry87; RV64I-SFB-NEXT: addi a0, a1, 788; RV64I-SFB-NEXT: .LBB1_2: # %entry89; RV64I-SFB-NEXT: ret90entry:91 %sel = select i1 %x, i32 65543, i32 %b92 ret i32 %sel93}94 95define i32 @select_example_3(i32 %a, i32 %b, i1 zeroext %x, i32 %y) {96; RV32I-LABEL: select_example_3:97; RV32I: # %bb.0: # %entry98; RV32I-NEXT: bnez a2, .LBB2_299; RV32I-NEXT: # %bb.1: # %entry100; RV32I-NEXT: mv a0, a1101; RV32I-NEXT: ret102; RV32I-NEXT: .LBB2_2:103; RV32I-NEXT: qc.e.li a0, 4198928104; RV32I-NEXT: ret105;106; RV64I-LABEL: select_example_3:107; RV64I: # %bb.0: # %entry108; RV64I-NEXT: bnez a2, .LBB2_2109; RV64I-NEXT: # %bb.1: # %entry110; RV64I-NEXT: mv a0, a1111; RV64I-NEXT: ret112; RV64I-NEXT: .LBB2_2:113; RV64I-NEXT: lui a0, 1025114; RV64I-NEXT: addi a0, a0, 528115; RV64I-NEXT: ret116;117; RV32I-SFB-LABEL: select_example_3:118; RV32I-SFB: # %bb.0: # %entry119; RV32I-SFB-NEXT: mv a0, a1120; RV32I-SFB-NEXT: beqz a2, .LBB2_2121; RV32I-SFB-NEXT: # %bb.1: # %entry122; RV32I-SFB-NEXT: qc.e.li a0, 4198928123; RV32I-SFB-NEXT: .LBB2_2: # %entry124; RV32I-SFB-NEXT: ret125;126; RV64I-SFB-LABEL: select_example_3:127; RV64I-SFB: # %bb.0: # %entry128; RV64I-SFB-NEXT: mv a0, a1129; RV64I-SFB-NEXT: lui a1, 1025130; RV64I-SFB-NEXT: beqz a2, .LBB2_2131; RV64I-SFB-NEXT: # %bb.1: # %entry132; RV64I-SFB-NEXT: addi a0, a1, 528133; RV64I-SFB-NEXT: .LBB2_2: # %entry134; RV64I-SFB-NEXT: ret135entry:136 %sel = select i1 %x, i32 4198928, i32 %b137 ret i32 %sel138}139 140