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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,RV32,RV32I3; RUN: llc -mtriple=riscv64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,RV64,RV64I4; RUN: llc -mtriple=riscv32-unknown-linux-gnu -mattr=+zbb < %s | FileCheck %s --check-prefixes=CHECK,RV32,RV32ZBB5; RUN: llc -mtriple=riscv64-unknown-linux-gnu -mattr=+zbb < %s | FileCheck %s --check-prefixes=CHECK,RV64,RV64ZBB6 7; https://bugs.llvm.org/show_bug.cgi?id=381498 9; We are truncating from wider width, and then sign-extending10; back to the original width. Then we equality-comparing orig and src.11; If they don't match, then we had signed truncation during truncation.12 13; This can be expressed in a several ways in IR:14; trunc + sext + icmp eq <- not canonical15; shl + ashr + icmp eq16; add + icmp uge/ugt17; add + icmp ult/ule18; However only the simplest form (with two shifts) gets lowered best.19 20; ---------------------------------------------------------------------------- ;21; shl + ashr + icmp eq22; ---------------------------------------------------------------------------- ;23 24define i1 @shifts_eqcmp_i16_i8(i16 %x) nounwind {25; RV32I-LABEL: shifts_eqcmp_i16_i8:26; RV32I: # %bb.0:27; RV32I-NEXT: slli a1, a0, 1628; RV32I-NEXT: slli a0, a0, 2429; RV32I-NEXT: srli a1, a1, 1630; RV32I-NEXT: srai a0, a0, 831; RV32I-NEXT: srli a0, a0, 1632; RV32I-NEXT: xor a0, a0, a133; RV32I-NEXT: seqz a0, a034; RV32I-NEXT: ret35;36; RV64I-LABEL: shifts_eqcmp_i16_i8:37; RV64I: # %bb.0:38; RV64I-NEXT: slli a1, a0, 4839; RV64I-NEXT: slli a0, a0, 5640; RV64I-NEXT: srli a1, a1, 4841; RV64I-NEXT: srai a0, a0, 842; RV64I-NEXT: srli a0, a0, 4843; RV64I-NEXT: xor a0, a0, a144; RV64I-NEXT: seqz a0, a045; RV64I-NEXT: ret46;47; RV32ZBB-LABEL: shifts_eqcmp_i16_i8:48; RV32ZBB: # %bb.0:49; RV32ZBB-NEXT: zext.h a1, a050; RV32ZBB-NEXT: sext.b a0, a051; RV32ZBB-NEXT: zext.h a0, a052; RV32ZBB-NEXT: xor a0, a0, a153; RV32ZBB-NEXT: seqz a0, a054; RV32ZBB-NEXT: ret55;56; RV64ZBB-LABEL: shifts_eqcmp_i16_i8:57; RV64ZBB: # %bb.0:58; RV64ZBB-NEXT: zext.h a1, a059; RV64ZBB-NEXT: sext.b a0, a060; RV64ZBB-NEXT: zext.h a0, a061; RV64ZBB-NEXT: xor a0, a0, a162; RV64ZBB-NEXT: seqz a0, a063; RV64ZBB-NEXT: ret64 %tmp0 = shl i16 %x, 8 ; 16-865 %tmp1 = ashr exact i16 %tmp0, 8 ; 16-866 %tmp2 = icmp eq i16 %tmp1, %x67 ret i1 %tmp268}69 70define i1 @shifts_eqcmp_i32_i16(i32 %x) nounwind {71; RV32I-LABEL: shifts_eqcmp_i32_i16:72; RV32I: # %bb.0:73; RV32I-NEXT: slli a1, a0, 1674; RV32I-NEXT: srai a1, a1, 1675; RV32I-NEXT: xor a0, a1, a076; RV32I-NEXT: seqz a0, a077; RV32I-NEXT: ret78;79; RV64I-LABEL: shifts_eqcmp_i32_i16:80; RV64I: # %bb.0:81; RV64I-NEXT: sext.w a1, a082; RV64I-NEXT: slli a0, a0, 4883; RV64I-NEXT: srai a0, a0, 4884; RV64I-NEXT: xor a0, a0, a185; RV64I-NEXT: seqz a0, a086; RV64I-NEXT: ret87;88; RV32ZBB-LABEL: shifts_eqcmp_i32_i16:89; RV32ZBB: # %bb.0:90; RV32ZBB-NEXT: sext.h a1, a091; RV32ZBB-NEXT: xor a0, a1, a092; RV32ZBB-NEXT: seqz a0, a093; RV32ZBB-NEXT: ret94;95; RV64ZBB-LABEL: shifts_eqcmp_i32_i16:96; RV64ZBB: # %bb.0:97; RV64ZBB-NEXT: sext.w a1, a098; RV64ZBB-NEXT: sext.h a0, a099; RV64ZBB-NEXT: xor a0, a0, a1100; RV64ZBB-NEXT: seqz a0, a0101; RV64ZBB-NEXT: ret102 %tmp0 = shl i32 %x, 16 ; 32-16103 %tmp1 = ashr exact i32 %tmp0, 16 ; 32-16104 %tmp2 = icmp eq i32 %tmp1, %x105 ret i1 %tmp2106}107 108define i1 @shifts_eqcmp_i32_i8(i32 %x) nounwind {109; RV32I-LABEL: shifts_eqcmp_i32_i8:110; RV32I: # %bb.0:111; RV32I-NEXT: slli a1, a0, 24112; RV32I-NEXT: srai a1, a1, 24113; RV32I-NEXT: xor a0, a1, a0114; RV32I-NEXT: seqz a0, a0115; RV32I-NEXT: ret116;117; RV64I-LABEL: shifts_eqcmp_i32_i8:118; RV64I: # %bb.0:119; RV64I-NEXT: sext.w a1, a0120; RV64I-NEXT: slli a0, a0, 56121; RV64I-NEXT: srai a0, a0, 56122; RV64I-NEXT: xor a0, a0, a1123; RV64I-NEXT: seqz a0, a0124; RV64I-NEXT: ret125;126; RV32ZBB-LABEL: shifts_eqcmp_i32_i8:127; RV32ZBB: # %bb.0:128; RV32ZBB-NEXT: sext.b a1, a0129; RV32ZBB-NEXT: xor a0, a1, a0130; RV32ZBB-NEXT: seqz a0, a0131; RV32ZBB-NEXT: ret132;133; RV64ZBB-LABEL: shifts_eqcmp_i32_i8:134; RV64ZBB: # %bb.0:135; RV64ZBB-NEXT: sext.w a1, a0136; RV64ZBB-NEXT: sext.b a0, a0137; RV64ZBB-NEXT: xor a0, a0, a1138; RV64ZBB-NEXT: seqz a0, a0139; RV64ZBB-NEXT: ret140 %tmp0 = shl i32 %x, 24 ; 32-8141 %tmp1 = ashr exact i32 %tmp0, 24 ; 32-8142 %tmp2 = icmp eq i32 %tmp1, %x143 ret i1 %tmp2144}145 146define i1 @shifts_eqcmp_i64_i32(i64 %x) nounwind {147; RV32-LABEL: shifts_eqcmp_i64_i32:148; RV32: # %bb.0:149; RV32-NEXT: srai a0, a0, 31150; RV32-NEXT: xor a0, a0, a1151; RV32-NEXT: seqz a0, a0152; RV32-NEXT: ret153;154; RV64-LABEL: shifts_eqcmp_i64_i32:155; RV64: # %bb.0:156; RV64-NEXT: sext.w a1, a0157; RV64-NEXT: xor a0, a1, a0158; RV64-NEXT: seqz a0, a0159; RV64-NEXT: ret160 %tmp0 = shl i64 %x, 32 ; 64-32161 %tmp1 = ashr exact i64 %tmp0, 32 ; 64-32162 %tmp2 = icmp eq i64 %tmp1, %x163 ret i1 %tmp2164}165 166define i1 @shifts_eqcmp_i64_i16(i64 %x) nounwind {167; RV32I-LABEL: shifts_eqcmp_i64_i16:168; RV32I: # %bb.0:169; RV32I-NEXT: slli a2, a0, 16170; RV32I-NEXT: srai a3, a2, 16171; RV32I-NEXT: srai a2, a2, 31172; RV32I-NEXT: xor a1, a2, a1173; RV32I-NEXT: xor a0, a3, a0174; RV32I-NEXT: or a0, a0, a1175; RV32I-NEXT: seqz a0, a0176; RV32I-NEXT: ret177;178; RV64I-LABEL: shifts_eqcmp_i64_i16:179; RV64I: # %bb.0:180; RV64I-NEXT: slli a1, a0, 48181; RV64I-NEXT: srai a1, a1, 48182; RV64I-NEXT: xor a0, a1, a0183; RV64I-NEXT: seqz a0, a0184; RV64I-NEXT: ret185;186; RV32ZBB-LABEL: shifts_eqcmp_i64_i16:187; RV32ZBB: # %bb.0:188; RV32ZBB-NEXT: sext.h a2, a0189; RV32ZBB-NEXT: srai a3, a2, 31190; RV32ZBB-NEXT: xor a0, a2, a0191; RV32ZBB-NEXT: xor a1, a3, a1192; RV32ZBB-NEXT: or a0, a0, a1193; RV32ZBB-NEXT: seqz a0, a0194; RV32ZBB-NEXT: ret195;196; RV64ZBB-LABEL: shifts_eqcmp_i64_i16:197; RV64ZBB: # %bb.0:198; RV64ZBB-NEXT: sext.h a1, a0199; RV64ZBB-NEXT: xor a0, a1, a0200; RV64ZBB-NEXT: seqz a0, a0201; RV64ZBB-NEXT: ret202 %tmp0 = shl i64 %x, 48 ; 64-16203 %tmp1 = ashr exact i64 %tmp0, 48 ; 64-16204 %tmp2 = icmp eq i64 %tmp1, %x205 ret i1 %tmp2206}207 208define i1 @shifts_eqcmp_i64_i8(i64 %x) nounwind {209; RV32I-LABEL: shifts_eqcmp_i64_i8:210; RV32I: # %bb.0:211; RV32I-NEXT: slli a2, a0, 24212; RV32I-NEXT: srai a3, a2, 24213; RV32I-NEXT: srai a2, a2, 31214; RV32I-NEXT: xor a1, a2, a1215; RV32I-NEXT: xor a0, a3, a0216; RV32I-NEXT: or a0, a0, a1217; RV32I-NEXT: seqz a0, a0218; RV32I-NEXT: ret219;220; RV64I-LABEL: shifts_eqcmp_i64_i8:221; RV64I: # %bb.0:222; RV64I-NEXT: slli a1, a0, 56223; RV64I-NEXT: srai a1, a1, 56224; RV64I-NEXT: xor a0, a1, a0225; RV64I-NEXT: seqz a0, a0226; RV64I-NEXT: ret227;228; RV32ZBB-LABEL: shifts_eqcmp_i64_i8:229; RV32ZBB: # %bb.0:230; RV32ZBB-NEXT: sext.b a2, a0231; RV32ZBB-NEXT: srai a3, a2, 31232; RV32ZBB-NEXT: xor a0, a2, a0233; RV32ZBB-NEXT: xor a1, a3, a1234; RV32ZBB-NEXT: or a0, a0, a1235; RV32ZBB-NEXT: seqz a0, a0236; RV32ZBB-NEXT: ret237;238; RV64ZBB-LABEL: shifts_eqcmp_i64_i8:239; RV64ZBB: # %bb.0:240; RV64ZBB-NEXT: sext.b a1, a0241; RV64ZBB-NEXT: xor a0, a1, a0242; RV64ZBB-NEXT: seqz a0, a0243; RV64ZBB-NEXT: ret244 %tmp0 = shl i64 %x, 56 ; 64-8245 %tmp1 = ashr exact i64 %tmp0, 56 ; 64-8246 %tmp2 = icmp eq i64 %tmp1, %x247 ret i1 %tmp2248}249 250; ---------------------------------------------------------------------------- ;251; add + icmp uge252; ---------------------------------------------------------------------------- ;253 254define i1 @add_ugecmp_i16_i8(i16 %x) nounwind {255; RV32I-LABEL: add_ugecmp_i16_i8:256; RV32I: # %bb.0:257; RV32I-NEXT: slli a0, a0, 16258; RV32I-NEXT: srli a0, a0, 16259; RV32I-NEXT: addi a0, a0, -128260; RV32I-NEXT: srli a0, a0, 8261; RV32I-NEXT: sltiu a0, a0, 255262; RV32I-NEXT: xori a0, a0, 1263; RV32I-NEXT: ret264;265; RV64I-LABEL: add_ugecmp_i16_i8:266; RV64I: # %bb.0:267; RV64I-NEXT: slli a0, a0, 48268; RV64I-NEXT: srli a0, a0, 48269; RV64I-NEXT: addi a0, a0, -128270; RV64I-NEXT: srli a0, a0, 8271; RV64I-NEXT: sltiu a0, a0, 255272; RV64I-NEXT: xori a0, a0, 1273; RV64I-NEXT: ret274;275; RV32ZBB-LABEL: add_ugecmp_i16_i8:276; RV32ZBB: # %bb.0:277; RV32ZBB-NEXT: zext.h a0, a0278; RV32ZBB-NEXT: addi a0, a0, -128279; RV32ZBB-NEXT: srli a0, a0, 8280; RV32ZBB-NEXT: sltiu a0, a0, 255281; RV32ZBB-NEXT: xori a0, a0, 1282; RV32ZBB-NEXT: ret283;284; RV64ZBB-LABEL: add_ugecmp_i16_i8:285; RV64ZBB: # %bb.0:286; RV64ZBB-NEXT: zext.h a0, a0287; RV64ZBB-NEXT: addi a0, a0, -128288; RV64ZBB-NEXT: srli a0, a0, 8289; RV64ZBB-NEXT: sltiu a0, a0, 255290; RV64ZBB-NEXT: xori a0, a0, 1291; RV64ZBB-NEXT: ret292 %tmp0 = add i16 %x, -128 ; ~0U << (8-1)293 %tmp1 = icmp uge i16 %tmp0, -256 ; ~0U << 8294 ret i1 %tmp1295}296 297define i1 @add_ugecmp_i32_i16_i8(i16 %xx) nounwind {298; RV32I-LABEL: add_ugecmp_i32_i16_i8:299; RV32I: # %bb.0:300; RV32I-NEXT: slli a0, a0, 16301; RV32I-NEXT: srli a0, a0, 16302; RV32I-NEXT: addi a0, a0, -128303; RV32I-NEXT: sltiu a0, a0, -256304; RV32I-NEXT: xori a0, a0, 1305; RV32I-NEXT: ret306;307; RV64I-LABEL: add_ugecmp_i32_i16_i8:308; RV64I: # %bb.0:309; RV64I-NEXT: slli a0, a0, 48310; RV64I-NEXT: srli a0, a0, 48311; RV64I-NEXT: addi a0, a0, -128312; RV64I-NEXT: sltiu a0, a0, -256313; RV64I-NEXT: xori a0, a0, 1314; RV64I-NEXT: ret315;316; RV32ZBB-LABEL: add_ugecmp_i32_i16_i8:317; RV32ZBB: # %bb.0:318; RV32ZBB-NEXT: zext.h a0, a0319; RV32ZBB-NEXT: addi a0, a0, -128320; RV32ZBB-NEXT: sltiu a0, a0, -256321; RV32ZBB-NEXT: xori a0, a0, 1322; RV32ZBB-NEXT: ret323;324; RV64ZBB-LABEL: add_ugecmp_i32_i16_i8:325; RV64ZBB: # %bb.0:326; RV64ZBB-NEXT: zext.h a0, a0327; RV64ZBB-NEXT: addi a0, a0, -128328; RV64ZBB-NEXT: sltiu a0, a0, -256329; RV64ZBB-NEXT: xori a0, a0, 1330; RV64ZBB-NEXT: ret331 %x = zext i16 %xx to i32332 %tmp0 = add i32 %x, -128 ; ~0U << (8-1)333 %tmp1 = icmp uge i32 %tmp0, -256 ; ~0U << 8334 ret i1 %tmp1335}336 337define i1 @add_ugecmp_i32_i16(i32 %x) nounwind {338; RV32I-LABEL: add_ugecmp_i32_i16:339; RV32I: # %bb.0:340; RV32I-NEXT: lui a1, 1048568341; RV32I-NEXT: add a0, a0, a1342; RV32I-NEXT: lui a1, 1048560343; RV32I-NEXT: addi a1, a1, -1344; RV32I-NEXT: sltu a0, a1, a0345; RV32I-NEXT: ret346;347; RV64I-LABEL: add_ugecmp_i32_i16:348; RV64I: # %bb.0:349; RV64I-NEXT: lui a1, 1048568350; RV64I-NEXT: addw a0, a0, a1351; RV64I-NEXT: lui a1, 1048560352; RV64I-NEXT: addi a1, a1, -1353; RV64I-NEXT: sltu a0, a1, a0354; RV64I-NEXT: ret355;356; RV32ZBB-LABEL: add_ugecmp_i32_i16:357; RV32ZBB: # %bb.0:358; RV32ZBB-NEXT: sext.h a1, a0359; RV32ZBB-NEXT: xor a0, a1, a0360; RV32ZBB-NEXT: seqz a0, a0361; RV32ZBB-NEXT: ret362;363; RV64ZBB-LABEL: add_ugecmp_i32_i16:364; RV64ZBB: # %bb.0:365; RV64ZBB-NEXT: sext.w a1, a0366; RV64ZBB-NEXT: sext.h a0, a0367; RV64ZBB-NEXT: xor a0, a0, a1368; RV64ZBB-NEXT: seqz a0, a0369; RV64ZBB-NEXT: ret370 %tmp0 = add i32 %x, -32768 ; ~0U << (16-1)371 %tmp1 = icmp uge i32 %tmp0, -65536 ; ~0U << 16372 ret i1 %tmp1373}374 375define i1 @add_ugecmp_i32_i8(i32 %x) nounwind {376; RV32-LABEL: add_ugecmp_i32_i8:377; RV32: # %bb.0:378; RV32-NEXT: addi a0, a0, -128379; RV32-NEXT: sltiu a0, a0, -256380; RV32-NEXT: xori a0, a0, 1381; RV32-NEXT: ret382;383; RV64-LABEL: add_ugecmp_i32_i8:384; RV64: # %bb.0:385; RV64-NEXT: addiw a0, a0, -128386; RV64-NEXT: sltiu a0, a0, -256387; RV64-NEXT: xori a0, a0, 1388; RV64-NEXT: ret389 %tmp0 = add i32 %x, -128 ; ~0U << (8-1)390 %tmp1 = icmp uge i32 %tmp0, -256 ; ~0U << 8391 ret i1 %tmp1392}393 394define i1 @add_ugecmp_i64_i32(i64 %x) nounwind {395; RV32-LABEL: add_ugecmp_i64_i32:396; RV32: # %bb.0:397; RV32-NEXT: srai a0, a0, 31398; RV32-NEXT: xor a0, a0, a1399; RV32-NEXT: seqz a0, a0400; RV32-NEXT: ret401;402; RV64-LABEL: add_ugecmp_i64_i32:403; RV64: # %bb.0:404; RV64-NEXT: sext.w a1, a0405; RV64-NEXT: xor a0, a1, a0406; RV64-NEXT: seqz a0, a0407; RV64-NEXT: ret408 %tmp0 = add i64 %x, -2147483648 ; ~0U << (32-1)409 %tmp1 = icmp uge i64 %tmp0, -4294967296 ; ~0U << 32410 ret i1 %tmp1411}412 413define i1 @add_ugecmp_i64_i16(i64 %x) nounwind {414; RV32I-LABEL: add_ugecmp_i64_i16:415; RV32I: # %bb.0:416; RV32I-NEXT: lui a2, 1048568417; RV32I-NEXT: add a2, a0, a2418; RV32I-NEXT: sltu a0, a2, a0419; RV32I-NEXT: add a0, a1, a0420; RV32I-NEXT: lui a1, 1048560421; RV32I-NEXT: addi a1, a1, -1422; RV32I-NEXT: sltu a1, a1, a2423; RV32I-NEXT: seqz a0, a0424; RV32I-NEXT: and a0, a0, a1425; RV32I-NEXT: ret426;427; RV64I-LABEL: add_ugecmp_i64_i16:428; RV64I: # %bb.0:429; RV64I-NEXT: lui a1, 1048568430; RV64I-NEXT: add a0, a0, a1431; RV64I-NEXT: lui a1, 1048560432; RV64I-NEXT: addi a1, a1, -1433; RV64I-NEXT: sltu a0, a1, a0434; RV64I-NEXT: ret435;436; RV32ZBB-LABEL: add_ugecmp_i64_i16:437; RV32ZBB: # %bb.0:438; RV32ZBB-NEXT: sext.h a2, a0439; RV32ZBB-NEXT: xor a0, a2, a0440; RV32ZBB-NEXT: srai a2, a2, 31441; RV32ZBB-NEXT: xor a1, a2, a1442; RV32ZBB-NEXT: or a0, a0, a1443; RV32ZBB-NEXT: seqz a0, a0444; RV32ZBB-NEXT: ret445;446; RV64ZBB-LABEL: add_ugecmp_i64_i16:447; RV64ZBB: # %bb.0:448; RV64ZBB-NEXT: sext.h a1, a0449; RV64ZBB-NEXT: xor a0, a1, a0450; RV64ZBB-NEXT: seqz a0, a0451; RV64ZBB-NEXT: ret452 %tmp0 = add i64 %x, -32768 ; ~0U << (16-1)453 %tmp1 = icmp uge i64 %tmp0, -65536 ; ~0U << 16454 ret i1 %tmp1455}456 457define i1 @add_ugecmp_i64_i8(i64 %x) nounwind {458; RV32I-LABEL: add_ugecmp_i64_i8:459; RV32I: # %bb.0:460; RV32I-NEXT: addi a2, a0, -128461; RV32I-NEXT: sltu a0, a2, a0462; RV32I-NEXT: sltiu a2, a2, -256463; RV32I-NEXT: add a0, a1, a0464; RV32I-NEXT: seqz a0, a0465; RV32I-NEXT: xori a1, a2, 1466; RV32I-NEXT: and a0, a0, a1467; RV32I-NEXT: ret468;469; RV64-LABEL: add_ugecmp_i64_i8:470; RV64: # %bb.0:471; RV64-NEXT: addi a0, a0, -128472; RV64-NEXT: sltiu a0, a0, -256473; RV64-NEXT: xori a0, a0, 1474; RV64-NEXT: ret475;476; RV32ZBB-LABEL: add_ugecmp_i64_i8:477; RV32ZBB: # %bb.0:478; RV32ZBB-NEXT: sext.b a2, a0479; RV32ZBB-NEXT: xor a0, a2, a0480; RV32ZBB-NEXT: srai a2, a2, 31481; RV32ZBB-NEXT: xor a1, a2, a1482; RV32ZBB-NEXT: or a0, a0, a1483; RV32ZBB-NEXT: seqz a0, a0484; RV32ZBB-NEXT: ret485 %tmp0 = add i64 %x, -128 ; ~0U << (8-1)486 %tmp1 = icmp uge i64 %tmp0, -256 ; ~0U << 8487 ret i1 %tmp1488}489 490; Slightly more canonical variant491define i1 @add_ugtcmp_i16_i8(i16 %x) nounwind {492; RV32I-LABEL: add_ugtcmp_i16_i8:493; RV32I: # %bb.0:494; RV32I-NEXT: slli a0, a0, 16495; RV32I-NEXT: srli a0, a0, 16496; RV32I-NEXT: addi a0, a0, -128497; RV32I-NEXT: srli a0, a0, 8498; RV32I-NEXT: sltiu a0, a0, 255499; RV32I-NEXT: xori a0, a0, 1500; RV32I-NEXT: ret501;502; RV64I-LABEL: add_ugtcmp_i16_i8:503; RV64I: # %bb.0:504; RV64I-NEXT: slli a0, a0, 48505; RV64I-NEXT: srli a0, a0, 48506; RV64I-NEXT: addi a0, a0, -128507; RV64I-NEXT: srli a0, a0, 8508; RV64I-NEXT: sltiu a0, a0, 255509; RV64I-NEXT: xori a0, a0, 1510; RV64I-NEXT: ret511;512; RV32ZBB-LABEL: add_ugtcmp_i16_i8:513; RV32ZBB: # %bb.0:514; RV32ZBB-NEXT: zext.h a0, a0515; RV32ZBB-NEXT: addi a0, a0, -128516; RV32ZBB-NEXT: srli a0, a0, 8517; RV32ZBB-NEXT: sltiu a0, a0, 255518; RV32ZBB-NEXT: xori a0, a0, 1519; RV32ZBB-NEXT: ret520;521; RV64ZBB-LABEL: add_ugtcmp_i16_i8:522; RV64ZBB: # %bb.0:523; RV64ZBB-NEXT: zext.h a0, a0524; RV64ZBB-NEXT: addi a0, a0, -128525; RV64ZBB-NEXT: srli a0, a0, 8526; RV64ZBB-NEXT: sltiu a0, a0, 255527; RV64ZBB-NEXT: xori a0, a0, 1528; RV64ZBB-NEXT: ret529 %tmp0 = add i16 %x, -128 ; ~0U << (8-1)530 %tmp1 = icmp ugt i16 %tmp0, -257 ; ~0U << 8 - 1531 ret i1 %tmp1532}533 534; ---------------------------------------------------------------------------- ;535; add + icmp ult536; ---------------------------------------------------------------------------- ;537 538define i1 @add_ultcmp_i16_i8(i16 %x) nounwind {539; RV32I-LABEL: add_ultcmp_i16_i8:540; RV32I: # %bb.0:541; RV32I-NEXT: addi a0, a0, 128542; RV32I-NEXT: slli a0, a0, 16543; RV32I-NEXT: srli a0, a0, 16544; RV32I-NEXT: sltiu a0, a0, 256545; RV32I-NEXT: ret546;547; RV64I-LABEL: add_ultcmp_i16_i8:548; RV64I: # %bb.0:549; RV64I-NEXT: addi a0, a0, 128550; RV64I-NEXT: slli a0, a0, 48551; RV64I-NEXT: srli a0, a0, 48552; RV64I-NEXT: sltiu a0, a0, 256553; RV64I-NEXT: ret554;555; RV32ZBB-LABEL: add_ultcmp_i16_i8:556; RV32ZBB: # %bb.0:557; RV32ZBB-NEXT: addi a0, a0, 128558; RV32ZBB-NEXT: zext.h a0, a0559; RV32ZBB-NEXT: sltiu a0, a0, 256560; RV32ZBB-NEXT: ret561;562; RV64ZBB-LABEL: add_ultcmp_i16_i8:563; RV64ZBB: # %bb.0:564; RV64ZBB-NEXT: addi a0, a0, 128565; RV64ZBB-NEXT: zext.h a0, a0566; RV64ZBB-NEXT: sltiu a0, a0, 256567; RV64ZBB-NEXT: ret568 %tmp0 = add i16 %x, 128 ; 1U << (8-1)569 %tmp1 = icmp ult i16 %tmp0, 256 ; 1U << 8570 ret i1 %tmp1571}572 573define i1 @add_ultcmp_i32_i16(i32 %x) nounwind {574; RV32I-LABEL: add_ultcmp_i32_i16:575; RV32I: # %bb.0:576; RV32I-NEXT: lui a1, 8577; RV32I-NEXT: add a0, a0, a1578; RV32I-NEXT: srli a0, a0, 16579; RV32I-NEXT: seqz a0, a0580; RV32I-NEXT: ret581;582; RV64I-LABEL: add_ultcmp_i32_i16:583; RV64I: # %bb.0:584; RV64I-NEXT: lui a1, 8585; RV64I-NEXT: add a0, a0, a1586; RV64I-NEXT: srliw a0, a0, 16587; RV64I-NEXT: seqz a0, a0588; RV64I-NEXT: ret589;590; RV32ZBB-LABEL: add_ultcmp_i32_i16:591; RV32ZBB: # %bb.0:592; RV32ZBB-NEXT: sext.h a1, a0593; RV32ZBB-NEXT: xor a0, a1, a0594; RV32ZBB-NEXT: seqz a0, a0595; RV32ZBB-NEXT: ret596;597; RV64ZBB-LABEL: add_ultcmp_i32_i16:598; RV64ZBB: # %bb.0:599; RV64ZBB-NEXT: sext.w a1, a0600; RV64ZBB-NEXT: sext.h a0, a0601; RV64ZBB-NEXT: xor a0, a0, a1602; RV64ZBB-NEXT: seqz a0, a0603; RV64ZBB-NEXT: ret604 %tmp0 = add i32 %x, 32768 ; 1U << (16-1)605 %tmp1 = icmp ult i32 %tmp0, 65536 ; 1U << 16606 ret i1 %tmp1607}608 609define i1 @add_ultcmp_i32_i8(i32 %x) nounwind {610; RV32-LABEL: add_ultcmp_i32_i8:611; RV32: # %bb.0:612; RV32-NEXT: addi a0, a0, 128613; RV32-NEXT: sltiu a0, a0, 256614; RV32-NEXT: ret615;616; RV64-LABEL: add_ultcmp_i32_i8:617; RV64: # %bb.0:618; RV64-NEXT: addiw a0, a0, 128619; RV64-NEXT: sltiu a0, a0, 256620; RV64-NEXT: ret621 %tmp0 = add i32 %x, 128 ; 1U << (8-1)622 %tmp1 = icmp ult i32 %tmp0, 256 ; 1U << 8623 ret i1 %tmp1624}625 626define i1 @add_ultcmp_i64_i32(i64 %x) nounwind {627; RV32-LABEL: add_ultcmp_i64_i32:628; RV32: # %bb.0:629; RV32-NEXT: srai a0, a0, 31630; RV32-NEXT: xor a0, a0, a1631; RV32-NEXT: seqz a0, a0632; RV32-NEXT: ret633;634; RV64-LABEL: add_ultcmp_i64_i32:635; RV64: # %bb.0:636; RV64-NEXT: sext.w a1, a0637; RV64-NEXT: xor a0, a1, a0638; RV64-NEXT: seqz a0, a0639; RV64-NEXT: ret640 %tmp0 = add i64 %x, 2147483648 ; 1U << (32-1)641 %tmp1 = icmp ult i64 %tmp0, 4294967296 ; 1U << 32642 ret i1 %tmp1643}644 645define i1 @add_ultcmp_i64_i16(i64 %x) nounwind {646; RV32I-LABEL: add_ultcmp_i64_i16:647; RV32I: # %bb.0:648; RV32I-NEXT: lui a2, 8649; RV32I-NEXT: add a2, a0, a2650; RV32I-NEXT: sltu a0, a2, a0651; RV32I-NEXT: add a0, a1, a0652; RV32I-NEXT: srli a2, a2, 16653; RV32I-NEXT: or a0, a0, a2654; RV32I-NEXT: seqz a0, a0655; RV32I-NEXT: ret656;657; RV64I-LABEL: add_ultcmp_i64_i16:658; RV64I: # %bb.0:659; RV64I-NEXT: lui a1, 8660; RV64I-NEXT: add a0, a0, a1661; RV64I-NEXT: srli a0, a0, 16662; RV64I-NEXT: seqz a0, a0663; RV64I-NEXT: ret664;665; RV32ZBB-LABEL: add_ultcmp_i64_i16:666; RV32ZBB: # %bb.0:667; RV32ZBB-NEXT: sext.h a2, a0668; RV32ZBB-NEXT: xor a0, a2, a0669; RV32ZBB-NEXT: srai a2, a2, 31670; RV32ZBB-NEXT: xor a1, a2, a1671; RV32ZBB-NEXT: or a0, a0, a1672; RV32ZBB-NEXT: seqz a0, a0673; RV32ZBB-NEXT: ret674;675; RV64ZBB-LABEL: add_ultcmp_i64_i16:676; RV64ZBB: # %bb.0:677; RV64ZBB-NEXT: sext.h a1, a0678; RV64ZBB-NEXT: xor a0, a1, a0679; RV64ZBB-NEXT: seqz a0, a0680; RV64ZBB-NEXT: ret681 %tmp0 = add i64 %x, 32768 ; 1U << (16-1)682 %tmp1 = icmp ult i64 %tmp0, 65536 ; 1U << 16683 ret i1 %tmp1684}685 686define i1 @add_ultcmp_i64_i8(i64 %x) nounwind {687; RV32I-LABEL: add_ultcmp_i64_i8:688; RV32I: # %bb.0:689; RV32I-NEXT: addi a2, a0, 128690; RV32I-NEXT: sltu a0, a2, a0691; RV32I-NEXT: add a0, a1, a0692; RV32I-NEXT: seqz a0, a0693; RV32I-NEXT: sltiu a1, a2, 256694; RV32I-NEXT: and a0, a0, a1695; RV32I-NEXT: ret696;697; RV64-LABEL: add_ultcmp_i64_i8:698; RV64: # %bb.0:699; RV64-NEXT: addi a0, a0, 128700; RV64-NEXT: sltiu a0, a0, 256701; RV64-NEXT: ret702;703; RV32ZBB-LABEL: add_ultcmp_i64_i8:704; RV32ZBB: # %bb.0:705; RV32ZBB-NEXT: sext.b a2, a0706; RV32ZBB-NEXT: xor a0, a2, a0707; RV32ZBB-NEXT: srai a2, a2, 31708; RV32ZBB-NEXT: xor a1, a2, a1709; RV32ZBB-NEXT: or a0, a0, a1710; RV32ZBB-NEXT: seqz a0, a0711; RV32ZBB-NEXT: ret712 %tmp0 = add i64 %x, 128 ; 1U << (8-1)713 %tmp1 = icmp ult i64 %tmp0, 256 ; 1U << 8714 ret i1 %tmp1715}716 717; Slightly more canonical variant718define i1 @add_ulecmp_i16_i8(i16 %x) nounwind {719; RV32I-LABEL: add_ulecmp_i16_i8:720; RV32I: # %bb.0:721; RV32I-NEXT: addi a0, a0, 128722; RV32I-NEXT: slli a0, a0, 16723; RV32I-NEXT: srli a0, a0, 16724; RV32I-NEXT: sltiu a0, a0, 256725; RV32I-NEXT: ret726;727; RV64I-LABEL: add_ulecmp_i16_i8:728; RV64I: # %bb.0:729; RV64I-NEXT: addi a0, a0, 128730; RV64I-NEXT: slli a0, a0, 48731; RV64I-NEXT: srli a0, a0, 48732; RV64I-NEXT: sltiu a0, a0, 256733; RV64I-NEXT: ret734;735; RV32ZBB-LABEL: add_ulecmp_i16_i8:736; RV32ZBB: # %bb.0:737; RV32ZBB-NEXT: addi a0, a0, 128738; RV32ZBB-NEXT: zext.h a0, a0739; RV32ZBB-NEXT: sltiu a0, a0, 256740; RV32ZBB-NEXT: ret741;742; RV64ZBB-LABEL: add_ulecmp_i16_i8:743; RV64ZBB: # %bb.0:744; RV64ZBB-NEXT: addi a0, a0, 128745; RV64ZBB-NEXT: zext.h a0, a0746; RV64ZBB-NEXT: sltiu a0, a0, 256747; RV64ZBB-NEXT: ret748 %tmp0 = add i16 %x, 128 ; 1U << (8-1)749 %tmp1 = icmp ule i16 %tmp0, 255 ; (1U << 8) - 1750 ret i1 %tmp1751}752 753; Negative tests754; ---------------------------------------------------------------------------- ;755 756; Adding not a constant757define i1 @add_ultcmp_bad_i16_i8_add(i16 %x, i16 %y) nounwind {758; RV32I-LABEL: add_ultcmp_bad_i16_i8_add:759; RV32I: # %bb.0:760; RV32I-NEXT: add a0, a0, a1761; RV32I-NEXT: slli a0, a0, 16762; RV32I-NEXT: srli a0, a0, 16763; RV32I-NEXT: sltiu a0, a0, 256764; RV32I-NEXT: ret765;766; RV64I-LABEL: add_ultcmp_bad_i16_i8_add:767; RV64I: # %bb.0:768; RV64I-NEXT: add a0, a0, a1769; RV64I-NEXT: slli a0, a0, 48770; RV64I-NEXT: srli a0, a0, 48771; RV64I-NEXT: sltiu a0, a0, 256772; RV64I-NEXT: ret773;774; RV32ZBB-LABEL: add_ultcmp_bad_i16_i8_add:775; RV32ZBB: # %bb.0:776; RV32ZBB-NEXT: add a0, a0, a1777; RV32ZBB-NEXT: zext.h a0, a0778; RV32ZBB-NEXT: sltiu a0, a0, 256779; RV32ZBB-NEXT: ret780;781; RV64ZBB-LABEL: add_ultcmp_bad_i16_i8_add:782; RV64ZBB: # %bb.0:783; RV64ZBB-NEXT: add a0, a0, a1784; RV64ZBB-NEXT: zext.h a0, a0785; RV64ZBB-NEXT: sltiu a0, a0, 256786; RV64ZBB-NEXT: ret787 %tmp0 = add i16 %x, %y788 %tmp1 = icmp ult i16 %tmp0, 256 ; 1U << 8789 ret i1 %tmp1790}791 792; Comparing not with a constant793define i1 @add_ultcmp_bad_i16_i8_cmp(i16 %x, i16 %y) nounwind {794; RV32I-LABEL: add_ultcmp_bad_i16_i8_cmp:795; RV32I: # %bb.0:796; RV32I-NEXT: lui a2, 16797; RV32I-NEXT: addi a0, a0, 128798; RV32I-NEXT: addi a2, a2, -1799; RV32I-NEXT: and a1, a1, a2800; RV32I-NEXT: and a0, a0, a2801; RV32I-NEXT: sltu a0, a0, a1802; RV32I-NEXT: ret803;804; RV64I-LABEL: add_ultcmp_bad_i16_i8_cmp:805; RV64I: # %bb.0:806; RV64I-NEXT: lui a2, 16807; RV64I-NEXT: addi a0, a0, 128808; RV64I-NEXT: addi a2, a2, -1809; RV64I-NEXT: and a1, a1, a2810; RV64I-NEXT: and a0, a0, a2811; RV64I-NEXT: sltu a0, a0, a1812; RV64I-NEXT: ret813;814; RV32ZBB-LABEL: add_ultcmp_bad_i16_i8_cmp:815; RV32ZBB: # %bb.0:816; RV32ZBB-NEXT: zext.h a1, a1817; RV32ZBB-NEXT: addi a0, a0, 128818; RV32ZBB-NEXT: zext.h a0, a0819; RV32ZBB-NEXT: sltu a0, a0, a1820; RV32ZBB-NEXT: ret821;822; RV64ZBB-LABEL: add_ultcmp_bad_i16_i8_cmp:823; RV64ZBB: # %bb.0:824; RV64ZBB-NEXT: zext.h a1, a1825; RV64ZBB-NEXT: addi a0, a0, 128826; RV64ZBB-NEXT: zext.h a0, a0827; RV64ZBB-NEXT: sltu a0, a0, a1828; RV64ZBB-NEXT: ret829 %tmp0 = add i16 %x, 128 ; 1U << (8-1)830 %tmp1 = icmp ult i16 %tmp0, %y831 ret i1 %tmp1832}833 834; Second constant is not larger than the first one835define i1 @add_ultcmp_bad_i8_i16(i16 %x) nounwind {836; RV32I-LABEL: add_ultcmp_bad_i8_i16:837; RV32I: # %bb.0:838; RV32I-NEXT: addi a0, a0, 128839; RV32I-NEXT: slli a0, a0, 16840; RV32I-NEXT: srli a0, a0, 16841; RV32I-NEXT: sltiu a0, a0, 128842; RV32I-NEXT: ret843;844; RV64I-LABEL: add_ultcmp_bad_i8_i16:845; RV64I: # %bb.0:846; RV64I-NEXT: addi a0, a0, 128847; RV64I-NEXT: slli a0, a0, 48848; RV64I-NEXT: srli a0, a0, 48849; RV64I-NEXT: sltiu a0, a0, 128850; RV64I-NEXT: ret851;852; RV32ZBB-LABEL: add_ultcmp_bad_i8_i16:853; RV32ZBB: # %bb.0:854; RV32ZBB-NEXT: addi a0, a0, 128855; RV32ZBB-NEXT: zext.h a0, a0856; RV32ZBB-NEXT: sltiu a0, a0, 128857; RV32ZBB-NEXT: ret858;859; RV64ZBB-LABEL: add_ultcmp_bad_i8_i16:860; RV64ZBB: # %bb.0:861; RV64ZBB-NEXT: addi a0, a0, 128862; RV64ZBB-NEXT: zext.h a0, a0863; RV64ZBB-NEXT: sltiu a0, a0, 128864; RV64ZBB-NEXT: ret865 %tmp0 = add i16 %x, 128 ; 1U << (8-1)866 %tmp1 = icmp ult i16 %tmp0, 128 ; 1U << (8-1)867 ret i1 %tmp1868}869 870; First constant is not power of two871define i1 @add_ultcmp_bad_i16_i8_c0notpoweroftwo(i16 %x) nounwind {872; RV32I-LABEL: add_ultcmp_bad_i16_i8_c0notpoweroftwo:873; RV32I: # %bb.0:874; RV32I-NEXT: addi a0, a0, 192875; RV32I-NEXT: slli a0, a0, 16876; RV32I-NEXT: srli a0, a0, 16877; RV32I-NEXT: sltiu a0, a0, 256878; RV32I-NEXT: ret879;880; RV64I-LABEL: add_ultcmp_bad_i16_i8_c0notpoweroftwo:881; RV64I: # %bb.0:882; RV64I-NEXT: addi a0, a0, 192883; RV64I-NEXT: slli a0, a0, 48884; RV64I-NEXT: srli a0, a0, 48885; RV64I-NEXT: sltiu a0, a0, 256886; RV64I-NEXT: ret887;888; RV32ZBB-LABEL: add_ultcmp_bad_i16_i8_c0notpoweroftwo:889; RV32ZBB: # %bb.0:890; RV32ZBB-NEXT: addi a0, a0, 192891; RV32ZBB-NEXT: zext.h a0, a0892; RV32ZBB-NEXT: sltiu a0, a0, 256893; RV32ZBB-NEXT: ret894;895; RV64ZBB-LABEL: add_ultcmp_bad_i16_i8_c0notpoweroftwo:896; RV64ZBB: # %bb.0:897; RV64ZBB-NEXT: addi a0, a0, 192898; RV64ZBB-NEXT: zext.h a0, a0899; RV64ZBB-NEXT: sltiu a0, a0, 256900; RV64ZBB-NEXT: ret901 %tmp0 = add i16 %x, 192 ; (1U << (8-1)) + (1U << (8-1-1))902 %tmp1 = icmp ult i16 %tmp0, 256 ; 1U << 8903 ret i1 %tmp1904}905 906; Second constant is not power of two907define i1 @add_ultcmp_bad_i16_i8_c1notpoweroftwo(i16 %x) nounwind {908; RV32I-LABEL: add_ultcmp_bad_i16_i8_c1notpoweroftwo:909; RV32I: # %bb.0:910; RV32I-NEXT: addi a0, a0, 128911; RV32I-NEXT: slli a0, a0, 16912; RV32I-NEXT: srli a0, a0, 16913; RV32I-NEXT: sltiu a0, a0, 768914; RV32I-NEXT: ret915;916; RV64I-LABEL: add_ultcmp_bad_i16_i8_c1notpoweroftwo:917; RV64I: # %bb.0:918; RV64I-NEXT: addi a0, a0, 128919; RV64I-NEXT: slli a0, a0, 48920; RV64I-NEXT: srli a0, a0, 48921; RV64I-NEXT: sltiu a0, a0, 768922; RV64I-NEXT: ret923;924; RV32ZBB-LABEL: add_ultcmp_bad_i16_i8_c1notpoweroftwo:925; RV32ZBB: # %bb.0:926; RV32ZBB-NEXT: addi a0, a0, 128927; RV32ZBB-NEXT: zext.h a0, a0928; RV32ZBB-NEXT: sltiu a0, a0, 768929; RV32ZBB-NEXT: ret930;931; RV64ZBB-LABEL: add_ultcmp_bad_i16_i8_c1notpoweroftwo:932; RV64ZBB: # %bb.0:933; RV64ZBB-NEXT: addi a0, a0, 128934; RV64ZBB-NEXT: zext.h a0, a0935; RV64ZBB-NEXT: sltiu a0, a0, 768936; RV64ZBB-NEXT: ret937 %tmp0 = add i16 %x, 128 ; 1U << (8-1)938 %tmp1 = icmp ult i16 %tmp0, 768 ; (1U << 8)) + (1U << (8+1))939 ret i1 %tmp1940}941 942; Magic check fails, 64 << 1 != 256943define i1 @add_ultcmp_bad_i16_i8_magic(i16 %x) nounwind {944; RV32I-LABEL: add_ultcmp_bad_i16_i8_magic:945; RV32I: # %bb.0:946; RV32I-NEXT: addi a0, a0, 64947; RV32I-NEXT: slli a0, a0, 16948; RV32I-NEXT: srli a0, a0, 16949; RV32I-NEXT: sltiu a0, a0, 256950; RV32I-NEXT: ret951;952; RV64I-LABEL: add_ultcmp_bad_i16_i8_magic:953; RV64I: # %bb.0:954; RV64I-NEXT: addi a0, a0, 64955; RV64I-NEXT: slli a0, a0, 48956; RV64I-NEXT: srli a0, a0, 48957; RV64I-NEXT: sltiu a0, a0, 256958; RV64I-NEXT: ret959;960; RV32ZBB-LABEL: add_ultcmp_bad_i16_i8_magic:961; RV32ZBB: # %bb.0:962; RV32ZBB-NEXT: addi a0, a0, 64963; RV32ZBB-NEXT: zext.h a0, a0964; RV32ZBB-NEXT: sltiu a0, a0, 256965; RV32ZBB-NEXT: ret966;967; RV64ZBB-LABEL: add_ultcmp_bad_i16_i8_magic:968; RV64ZBB: # %bb.0:969; RV64ZBB-NEXT: addi a0, a0, 64970; RV64ZBB-NEXT: zext.h a0, a0971; RV64ZBB-NEXT: sltiu a0, a0, 256972; RV64ZBB-NEXT: ret973 %tmp0 = add i16 %x, 64 ; 1U << (8-1-1)974 %tmp1 = icmp ult i16 %tmp0, 256 ; 1U << 8975 ret i1 %tmp1976}977 978; Bad 'destination type'979define i1 @add_ultcmp_bad_i16_i4(i16 %x) nounwind {980; RV32I-LABEL: add_ultcmp_bad_i16_i4:981; RV32I: # %bb.0:982; RV32I-NEXT: addi a0, a0, 8983; RV32I-NEXT: slli a0, a0, 16984; RV32I-NEXT: srli a0, a0, 16985; RV32I-NEXT: sltiu a0, a0, 16986; RV32I-NEXT: ret987;988; RV64I-LABEL: add_ultcmp_bad_i16_i4:989; RV64I: # %bb.0:990; RV64I-NEXT: addi a0, a0, 8991; RV64I-NEXT: slli a0, a0, 48992; RV64I-NEXT: srli a0, a0, 48993; RV64I-NEXT: sltiu a0, a0, 16994; RV64I-NEXT: ret995;996; RV32ZBB-LABEL: add_ultcmp_bad_i16_i4:997; RV32ZBB: # %bb.0:998; RV32ZBB-NEXT: addi a0, a0, 8999; RV32ZBB-NEXT: zext.h a0, a01000; RV32ZBB-NEXT: sltiu a0, a0, 161001; RV32ZBB-NEXT: ret1002;1003; RV64ZBB-LABEL: add_ultcmp_bad_i16_i4:1004; RV64ZBB: # %bb.0:1005; RV64ZBB-NEXT: addi a0, a0, 81006; RV64ZBB-NEXT: zext.h a0, a01007; RV64ZBB-NEXT: sltiu a0, a0, 161008; RV64ZBB-NEXT: ret1009 %tmp0 = add i16 %x, 8 ; 1U << (4-1)1010 %tmp1 = icmp ult i16 %tmp0, 16 ; 1U << 41011 ret i1 %tmp11012}1013 1014; Bad storage type1015define i1 @add_ultcmp_bad_i24_i8(i24 %x) nounwind {1016; RV32-LABEL: add_ultcmp_bad_i24_i8:1017; RV32: # %bb.0:1018; RV32-NEXT: addi a0, a0, 1281019; RV32-NEXT: slli a0, a0, 81020; RV32-NEXT: srli a0, a0, 81021; RV32-NEXT: sltiu a0, a0, 2561022; RV32-NEXT: ret1023;1024; RV64-LABEL: add_ultcmp_bad_i24_i8:1025; RV64: # %bb.0:1026; RV64-NEXT: addi a0, a0, 1281027; RV64-NEXT: slli a0, a0, 401028; RV64-NEXT: srli a0, a0, 401029; RV64-NEXT: sltiu a0, a0, 2561030; RV64-NEXT: ret1031 %tmp0 = add i24 %x, 128 ; 1U << (8-1)1032 %tmp1 = icmp ult i24 %tmp0, 256 ; 1U << 81033 ret i1 %tmp11034}1035 1036define i1 @add_ulecmp_bad_i16_i8(i16 %x) nounwind {1037; CHECK-LABEL: add_ulecmp_bad_i16_i8:1038; CHECK: # %bb.0:1039; CHECK-NEXT: li a0, 11040; CHECK-NEXT: ret1041 %tmp0 = add i16 %x, 128 ; 1U << (8-1)1042 %tmp1 = icmp ule i16 %tmp0, -1 ; when we +1 it, it will wrap to 01043 ret i1 %tmp11044}1045