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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -mattr=+m -O2 < %s \3; RUN: | FileCheck %s -check-prefix=RV64I4; RUN: llc -mtriple=riscv32 -mattr=+m -O2 < %s \5; RUN: | FileCheck %s -check-prefix=RV32I6 7; Tests copied from PowerPC.8 9; Free probe10define i8 @f0() #0 {11; RV64I-LABEL: f0:12; RV64I: # %bb.0: # %entry13; RV64I-NEXT: addi sp, sp, -6414; RV64I-NEXT: .cfi_def_cfa_offset 6415; RV64I-NEXT: li a0, 316; RV64I-NEXT: sb a0, 0(sp)17; RV64I-NEXT: lbu a0, 0(sp)18; RV64I-NEXT: addi sp, sp, 6419; RV64I-NEXT: .cfi_def_cfa_offset 020; RV64I-NEXT: ret21;22; RV32I-LABEL: f0:23; RV32I: # %bb.0: # %entry24; RV32I-NEXT: addi sp, sp, -6425; RV32I-NEXT: .cfi_def_cfa_offset 6426; RV32I-NEXT: li a0, 327; RV32I-NEXT: sb a0, 0(sp)28; RV32I-NEXT: lbu a0, 0(sp)29; RV32I-NEXT: addi sp, sp, 6430; RV32I-NEXT: .cfi_def_cfa_offset 031; RV32I-NEXT: ret32entry:33 %a = alloca i8, i64 6434 %b = getelementptr inbounds i8, ptr %a, i64 6335 store volatile i8 3, ptr %a36 %c = load volatile i8, ptr %a37 ret i8 %c38}39 40define i8 @f1() #0 {41; RV64I-LABEL: f1:42; RV64I: # %bb.0: # %entry43; RV64I-NEXT: lui a0, 144; RV64I-NEXT: sub sp, sp, a045; RV64I-NEXT: sd zero, 0(sp)46; RV64I-NEXT: .cfi_def_cfa_offset 409647; RV64I-NEXT: addi sp, sp, -1648; RV64I-NEXT: .cfi_def_cfa_offset 411249; RV64I-NEXT: li a0, 350; RV64I-NEXT: sb a0, 16(sp)51; RV64I-NEXT: lbu a0, 16(sp)52; RV64I-NEXT: lui a1, 153; RV64I-NEXT: addi a1, a1, 1654; RV64I-NEXT: add sp, sp, a155; RV64I-NEXT: .cfi_def_cfa_offset 056; RV64I-NEXT: ret57;58; RV32I-LABEL: f1:59; RV32I: # %bb.0: # %entry60; RV32I-NEXT: lui a0, 161; RV32I-NEXT: sub sp, sp, a062; RV32I-NEXT: sw zero, 0(sp)63; RV32I-NEXT: .cfi_def_cfa_offset 409664; RV32I-NEXT: addi sp, sp, -1665; RV32I-NEXT: .cfi_def_cfa_offset 411266; RV32I-NEXT: li a0, 367; RV32I-NEXT: sb a0, 16(sp)68; RV32I-NEXT: lbu a0, 16(sp)69; RV32I-NEXT: lui a1, 170; RV32I-NEXT: addi a1, a1, 1671; RV32I-NEXT: add sp, sp, a172; RV32I-NEXT: .cfi_def_cfa_offset 073; RV32I-NEXT: ret74entry:75 %a = alloca i8, i64 409676 %b = getelementptr inbounds i8, ptr %a, i64 6377 store volatile i8 3, ptr %a78 %c = load volatile i8, ptr %a79 ret i8 %c80}81 82define i8 @f2() #0 {83; RV64I-LABEL: f2:84; RV64I: # %bb.0: # %entry85; RV64I-NEXT: lui a0, 1686; RV64I-NEXT: sub t1, sp, a087; RV64I-NEXT: .cfi_def_cfa t1, 6553688; RV64I-NEXT: lui t2, 189; RV64I-NEXT: .LBB2_1: # %entry90; RV64I-NEXT: # =>This Inner Loop Header: Depth=191; RV64I-NEXT: sub sp, sp, t292; RV64I-NEXT: sd zero, 0(sp)93; RV64I-NEXT: bne sp, t1, .LBB2_194; RV64I-NEXT: # %bb.2: # %entry95; RV64I-NEXT: .cfi_def_cfa_register sp96; RV64I-NEXT: addi sp, sp, -1697; RV64I-NEXT: .cfi_def_cfa_offset 6555298; RV64I-NEXT: li a0, 399; RV64I-NEXT: sb a0, 16(sp)100; RV64I-NEXT: lbu a0, 16(sp)101; RV64I-NEXT: lui a1, 16102; RV64I-NEXT: addi a1, a1, 16103; RV64I-NEXT: add sp, sp, a1104; RV64I-NEXT: .cfi_def_cfa_offset 0105; RV64I-NEXT: ret106;107; RV32I-LABEL: f2:108; RV32I: # %bb.0: # %entry109; RV32I-NEXT: lui a0, 16110; RV32I-NEXT: sub t1, sp, a0111; RV32I-NEXT: .cfi_def_cfa t1, 65536112; RV32I-NEXT: lui t2, 1113; RV32I-NEXT: .LBB2_1: # %entry114; RV32I-NEXT: # =>This Inner Loop Header: Depth=1115; RV32I-NEXT: sub sp, sp, t2116; RV32I-NEXT: sw zero, 0(sp)117; RV32I-NEXT: bne sp, t1, .LBB2_1118; RV32I-NEXT: # %bb.2: # %entry119; RV32I-NEXT: .cfi_def_cfa_register sp120; RV32I-NEXT: addi sp, sp, -16121; RV32I-NEXT: .cfi_def_cfa_offset 65552122; RV32I-NEXT: li a0, 3123; RV32I-NEXT: sb a0, 16(sp)124; RV32I-NEXT: lbu a0, 16(sp)125; RV32I-NEXT: lui a1, 16126; RV32I-NEXT: addi a1, a1, 16127; RV32I-NEXT: add sp, sp, a1128; RV32I-NEXT: .cfi_def_cfa_offset 0129; RV32I-NEXT: ret130entry:131 %a = alloca i8, i64 65536132 %b = getelementptr inbounds i8, ptr %a, i64 63133 store volatile i8 3, ptr %a134 %c = load volatile i8, ptr %a135 ret i8 %c136}137 138define i8 @f3() #0 "stack-probe-size"="32768" {139; RV64I-LABEL: f3:140; RV64I: # %bb.0: # %entry141; RV64I-NEXT: lui a0, 8142; RV64I-NEXT: sub sp, sp, a0143; RV64I-NEXT: sd zero, 0(sp)144; RV64I-NEXT: .cfi_def_cfa_offset 32768145; RV64I-NEXT: lui a0, 8146; RV64I-NEXT: sub sp, sp, a0147; RV64I-NEXT: sd zero, 0(sp)148; RV64I-NEXT: .cfi_def_cfa_offset 65536149; RV64I-NEXT: addi sp, sp, -16150; RV64I-NEXT: .cfi_def_cfa_offset 65552151; RV64I-NEXT: li a0, 3152; RV64I-NEXT: sb a0, 16(sp)153; RV64I-NEXT: lbu a0, 16(sp)154; RV64I-NEXT: lui a1, 16155; RV64I-NEXT: addi a1, a1, 16156; RV64I-NEXT: add sp, sp, a1157; RV64I-NEXT: .cfi_def_cfa_offset 0158; RV64I-NEXT: ret159;160; RV32I-LABEL: f3:161; RV32I: # %bb.0: # %entry162; RV32I-NEXT: lui a0, 8163; RV32I-NEXT: sub sp, sp, a0164; RV32I-NEXT: sw zero, 0(sp)165; RV32I-NEXT: .cfi_def_cfa_offset 32768166; RV32I-NEXT: lui a0, 8167; RV32I-NEXT: sub sp, sp, a0168; RV32I-NEXT: sw zero, 0(sp)169; RV32I-NEXT: .cfi_def_cfa_offset 65536170; RV32I-NEXT: addi sp, sp, -16171; RV32I-NEXT: .cfi_def_cfa_offset 65552172; RV32I-NEXT: li a0, 3173; RV32I-NEXT: sb a0, 16(sp)174; RV32I-NEXT: lbu a0, 16(sp)175; RV32I-NEXT: lui a1, 16176; RV32I-NEXT: addi a1, a1, 16177; RV32I-NEXT: add sp, sp, a1178; RV32I-NEXT: .cfi_def_cfa_offset 0179; RV32I-NEXT: ret180entry:181 %a = alloca i8, i64 65536182 %b = getelementptr inbounds i8, ptr %a, i64 63183 store volatile i8 3, ptr %a184 %c = load volatile i8, ptr %a185 ret i8 %c186}187 188; Same as f2, but without protection.189define i8 @f4() {190; RV64I-LABEL: f4:191; RV64I: # %bb.0: # %entry192; RV64I-NEXT: lui a0, 16193; RV64I-NEXT: addi a0, a0, 16194; RV64I-NEXT: sub sp, sp, a0195; RV64I-NEXT: .cfi_def_cfa_offset 65552196; RV64I-NEXT: li a0, 3197; RV64I-NEXT: sb a0, 16(sp)198; RV64I-NEXT: lbu a0, 16(sp)199; RV64I-NEXT: lui a1, 16200; RV64I-NEXT: addi a1, a1, 16201; RV64I-NEXT: add sp, sp, a1202; RV64I-NEXT: .cfi_def_cfa_offset 0203; RV64I-NEXT: ret204;205; RV32I-LABEL: f4:206; RV32I: # %bb.0: # %entry207; RV32I-NEXT: lui a0, 16208; RV32I-NEXT: addi a0, a0, 16209; RV32I-NEXT: sub sp, sp, a0210; RV32I-NEXT: .cfi_def_cfa_offset 65552211; RV32I-NEXT: li a0, 3212; RV32I-NEXT: sb a0, 16(sp)213; RV32I-NEXT: lbu a0, 16(sp)214; RV32I-NEXT: lui a1, 16215; RV32I-NEXT: addi a1, a1, 16216; RV32I-NEXT: add sp, sp, a1217; RV32I-NEXT: .cfi_def_cfa_offset 0218; RV32I-NEXT: ret219entry:220 %a = alloca i8, i64 65536221 %b = getelementptr inbounds i8, ptr %a, i64 63222 store volatile i8 3, ptr %a223 %c = load volatile i8, ptr %a224 ret i8 %c225}226 227define i8 @f5() #0 "stack-probe-size"="65536" {228; RV64I-LABEL: f5:229; RV64I: # %bb.0: # %entry230; RV64I-NEXT: lui a0, 256231; RV64I-NEXT: sub t1, sp, a0232; RV64I-NEXT: .cfi_def_cfa t1, 1048576233; RV64I-NEXT: lui t2, 16234; RV64I-NEXT: .LBB5_1: # %entry235; RV64I-NEXT: # =>This Inner Loop Header: Depth=1236; RV64I-NEXT: sub sp, sp, t2237; RV64I-NEXT: sd zero, 0(sp)238; RV64I-NEXT: bne sp, t1, .LBB5_1239; RV64I-NEXT: # %bb.2: # %entry240; RV64I-NEXT: .cfi_def_cfa_register sp241; RV64I-NEXT: addi sp, sp, -16242; RV64I-NEXT: .cfi_def_cfa_offset 1048592243; RV64I-NEXT: li a0, 3244; RV64I-NEXT: sb a0, 16(sp)245; RV64I-NEXT: lbu a0, 16(sp)246; RV64I-NEXT: lui a1, 256247; RV64I-NEXT: addi a1, a1, 16248; RV64I-NEXT: add sp, sp, a1249; RV64I-NEXT: .cfi_def_cfa_offset 0250; RV64I-NEXT: ret251;252; RV32I-LABEL: f5:253; RV32I: # %bb.0: # %entry254; RV32I-NEXT: lui a0, 256255; RV32I-NEXT: sub t1, sp, a0256; RV32I-NEXT: .cfi_def_cfa t1, 1048576257; RV32I-NEXT: lui t2, 16258; RV32I-NEXT: .LBB5_1: # %entry259; RV32I-NEXT: # =>This Inner Loop Header: Depth=1260; RV32I-NEXT: sub sp, sp, t2261; RV32I-NEXT: sw zero, 0(sp)262; RV32I-NEXT: bne sp, t1, .LBB5_1263; RV32I-NEXT: # %bb.2: # %entry264; RV32I-NEXT: .cfi_def_cfa_register sp265; RV32I-NEXT: addi sp, sp, -16266; RV32I-NEXT: .cfi_def_cfa_offset 1048592267; RV32I-NEXT: li a0, 3268; RV32I-NEXT: sb a0, 16(sp)269; RV32I-NEXT: lbu a0, 16(sp)270; RV32I-NEXT: lui a1, 256271; RV32I-NEXT: addi a1, a1, 16272; RV32I-NEXT: add sp, sp, a1273; RV32I-NEXT: .cfi_def_cfa_offset 0274; RV32I-NEXT: ret275entry:276 %a = alloca i8, i64 1048576277 %b = getelementptr inbounds i8, ptr %a, i64 63278 store volatile i8 3, ptr %a279 %c = load volatile i8, ptr %a280 ret i8 %c281}282 283define i8 @f6() #0 {284; RV64I-LABEL: f6:285; RV64I: # %bb.0: # %entry286; RV64I-NEXT: lui a0, 262144287; RV64I-NEXT: sub t1, sp, a0288; RV64I-NEXT: .cfi_def_cfa t1, 1073741824289; RV64I-NEXT: lui t2, 1290; RV64I-NEXT: .LBB6_1: # %entry291; RV64I-NEXT: # =>This Inner Loop Header: Depth=1292; RV64I-NEXT: sub sp, sp, t2293; RV64I-NEXT: sd zero, 0(sp)294; RV64I-NEXT: bne sp, t1, .LBB6_1295; RV64I-NEXT: # %bb.2: # %entry296; RV64I-NEXT: .cfi_def_cfa_register sp297; RV64I-NEXT: addi sp, sp, -16298; RV64I-NEXT: .cfi_def_cfa_offset 1073741840299; RV64I-NEXT: li a0, 3300; RV64I-NEXT: sb a0, 16(sp)301; RV64I-NEXT: lbu a0, 16(sp)302; RV64I-NEXT: lui a1, 262144303; RV64I-NEXT: addi a1, a1, 16304; RV64I-NEXT: add sp, sp, a1305; RV64I-NEXT: .cfi_def_cfa_offset 0306; RV64I-NEXT: ret307;308; RV32I-LABEL: f6:309; RV32I: # %bb.0: # %entry310; RV32I-NEXT: lui a0, 262144311; RV32I-NEXT: sub t1, sp, a0312; RV32I-NEXT: .cfi_def_cfa t1, 1073741824313; RV32I-NEXT: lui t2, 1314; RV32I-NEXT: .LBB6_1: # %entry315; RV32I-NEXT: # =>This Inner Loop Header: Depth=1316; RV32I-NEXT: sub sp, sp, t2317; RV32I-NEXT: sw zero, 0(sp)318; RV32I-NEXT: bne sp, t1, .LBB6_1319; RV32I-NEXT: # %bb.2: # %entry320; RV32I-NEXT: .cfi_def_cfa_register sp321; RV32I-NEXT: addi sp, sp, -16322; RV32I-NEXT: .cfi_def_cfa_offset 1073741840323; RV32I-NEXT: li a0, 3324; RV32I-NEXT: sb a0, 16(sp)325; RV32I-NEXT: lbu a0, 16(sp)326; RV32I-NEXT: lui a1, 262144327; RV32I-NEXT: addi a1, a1, 16328; RV32I-NEXT: add sp, sp, a1329; RV32I-NEXT: .cfi_def_cfa_offset 0330; RV32I-NEXT: ret331entry:332 %a = alloca i8, i64 1073741824333 %b = getelementptr inbounds i8, ptr %a, i64 63334 store volatile i8 3, ptr %a335 %c = load volatile i8, ptr %a336 ret i8 %c337}338 339define i8 @f7() #0 "stack-probe-size"="65536" {340; RV64I-LABEL: f7:341; RV64I: # %bb.0: # %entry342; RV64I-NEXT: lui a0, 244128343; RV64I-NEXT: sub t1, sp, a0344; RV64I-NEXT: .cfi_def_cfa t1, 999948288345; RV64I-NEXT: lui t2, 16346; RV64I-NEXT: .LBB7_1: # %entry347; RV64I-NEXT: # =>This Inner Loop Header: Depth=1348; RV64I-NEXT: sub sp, sp, t2349; RV64I-NEXT: sd zero, 0(sp)350; RV64I-NEXT: bne sp, t1, .LBB7_1351; RV64I-NEXT: # %bb.2: # %entry352; RV64I-NEXT: .cfi_def_cfa_register sp353; RV64I-NEXT: lui a0, 13354; RV64I-NEXT: addi a0, a0, -1520355; RV64I-NEXT: sub sp, sp, a0356; RV64I-NEXT: .cfi_def_cfa_offset 1000000016357; RV64I-NEXT: li a0, 3358; RV64I-NEXT: sb a0, 9(sp)359; RV64I-NEXT: lbu a0, 9(sp)360; RV64I-NEXT: lui a1, 244141361; RV64I-NEXT: addi a1, a1, -1520362; RV64I-NEXT: add sp, sp, a1363; RV64I-NEXT: .cfi_def_cfa_offset 0364; RV64I-NEXT: ret365;366; RV32I-LABEL: f7:367; RV32I: # %bb.0: # %entry368; RV32I-NEXT: lui a0, 244128369; RV32I-NEXT: sub t1, sp, a0370; RV32I-NEXT: .cfi_def_cfa t1, 999948288371; RV32I-NEXT: lui t2, 16372; RV32I-NEXT: .LBB7_1: # %entry373; RV32I-NEXT: # =>This Inner Loop Header: Depth=1374; RV32I-NEXT: sub sp, sp, t2375; RV32I-NEXT: sw zero, 0(sp)376; RV32I-NEXT: bne sp, t1, .LBB7_1377; RV32I-NEXT: # %bb.2: # %entry378; RV32I-NEXT: .cfi_def_cfa_register sp379; RV32I-NEXT: lui a0, 13380; RV32I-NEXT: addi a0, a0, -1520381; RV32I-NEXT: sub sp, sp, a0382; RV32I-NEXT: .cfi_def_cfa_offset 1000000016383; RV32I-NEXT: li a0, 3384; RV32I-NEXT: sb a0, 9(sp)385; RV32I-NEXT: lbu a0, 9(sp)386; RV32I-NEXT: lui a1, 244141387; RV32I-NEXT: addi a1, a1, -1520388; RV32I-NEXT: add sp, sp, a1389; RV32I-NEXT: .cfi_def_cfa_offset 0390; RV32I-NEXT: ret391entry:392 %a = alloca i8, i64 1000000007393 %b = getelementptr inbounds i8, ptr %a, i64 101394 store volatile i8 3, ptr %a395 %c = load volatile i8, ptr %a396 ret i8 %c397}398 399; alloca + align < probe_size400define i32 @f8(i64 %i) local_unnamed_addr #0 {401; RV64I-LABEL: f8:402; RV64I: # %bb.0:403; RV64I-NEXT: addi sp, sp, -832404; RV64I-NEXT: .cfi_def_cfa_offset 832405; RV64I-NEXT: sd ra, 824(sp) # 8-byte Folded Spill406; RV64I-NEXT: sd s0, 816(sp) # 8-byte Folded Spill407; RV64I-NEXT: .cfi_offset ra, -8408; RV64I-NEXT: .cfi_offset s0, -16409; RV64I-NEXT: addi s0, sp, 832410; RV64I-NEXT: .cfi_def_cfa s0, 0411; RV64I-NEXT: andi sp, sp, -64412; RV64I-NEXT: slli a0, a0, 2413; RV64I-NEXT: mv a1, sp414; RV64I-NEXT: add a0, a1, a0415; RV64I-NEXT: li a1, 1416; RV64I-NEXT: sw a1, 0(a0)417; RV64I-NEXT: lw a0, 0(sp)418; RV64I-NEXT: addi sp, s0, -832419; RV64I-NEXT: .cfi_def_cfa sp, 832420; RV64I-NEXT: ld ra, 824(sp) # 8-byte Folded Reload421; RV64I-NEXT: ld s0, 816(sp) # 8-byte Folded Reload422; RV64I-NEXT: .cfi_restore ra423; RV64I-NEXT: .cfi_restore s0424; RV64I-NEXT: addi sp, sp, 832425; RV64I-NEXT: .cfi_def_cfa_offset 0426; RV64I-NEXT: ret427;428; RV32I-LABEL: f8:429; RV32I: # %bb.0:430; RV32I-NEXT: addi sp, sp, -832431; RV32I-NEXT: .cfi_def_cfa_offset 832432; RV32I-NEXT: sw ra, 828(sp) # 4-byte Folded Spill433; RV32I-NEXT: sw s0, 824(sp) # 4-byte Folded Spill434; RV32I-NEXT: .cfi_offset ra, -4435; RV32I-NEXT: .cfi_offset s0, -8436; RV32I-NEXT: addi s0, sp, 832437; RV32I-NEXT: .cfi_def_cfa s0, 0438; RV32I-NEXT: andi sp, sp, -64439; RV32I-NEXT: slli a0, a0, 2440; RV32I-NEXT: mv a1, sp441; RV32I-NEXT: add a0, a1, a0442; RV32I-NEXT: li a1, 1443; RV32I-NEXT: sw a1, 0(a0)444; RV32I-NEXT: lw a0, 0(sp)445; RV32I-NEXT: addi sp, s0, -832446; RV32I-NEXT: .cfi_def_cfa sp, 832447; RV32I-NEXT: lw ra, 828(sp) # 4-byte Folded Reload448; RV32I-NEXT: lw s0, 824(sp) # 4-byte Folded Reload449; RV32I-NEXT: .cfi_restore ra450; RV32I-NEXT: .cfi_restore s0451; RV32I-NEXT: addi sp, sp, 832452; RV32I-NEXT: .cfi_def_cfa_offset 0453; RV32I-NEXT: ret454 %a = alloca i32, i32 200, align 64455 %b = getelementptr inbounds i32, ptr %a, i64 %i456 store volatile i32 1, ptr %b457 %c = load volatile i32, ptr %a458 ret i32 %c459}460 461; alloca > probe_size, align > probe_size462define i32 @f9(i64 %i) local_unnamed_addr #0 {463; RV64I-LABEL: f9:464; RV64I: # %bb.0:465; RV64I-NEXT: addi sp, sp, -2032466; RV64I-NEXT: .cfi_def_cfa_offset 2032467; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill468; RV64I-NEXT: sd s0, 2016(sp) # 8-byte Folded Spill469; RV64I-NEXT: .cfi_offset ra, -8470; RV64I-NEXT: .cfi_offset s0, -16471; RV64I-NEXT: addi s0, sp, 2032472; RV64I-NEXT: .cfi_def_cfa s0, 0473; RV64I-NEXT: lui a1, 1474; RV64I-NEXT: sub sp, sp, a1475; RV64I-NEXT: sd zero, 0(sp)476; RV64I-NEXT: sub sp, sp, a1477; RV64I-NEXT: sd zero, 0(sp)478; RV64I-NEXT: addi sp, sp, -16479; RV64I-NEXT: andi sp, sp, -2048480; RV64I-NEXT: slli a0, a0, 2481; RV64I-NEXT: addi a1, sp, 2047482; RV64I-NEXT: addi a1, a1, 1483; RV64I-NEXT: add a0, a1, a0484; RV64I-NEXT: li a1, 1485; RV64I-NEXT: sw a1, 0(a0)486; RV64I-NEXT: lui a0, 1487; RV64I-NEXT: add a0, sp, a0488; RV64I-NEXT: lw a0, -2048(a0)489; RV64I-NEXT: addi sp, s0, -2032490; RV64I-NEXT: .cfi_def_cfa sp, 2032491; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload492; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload493; RV64I-NEXT: .cfi_restore ra494; RV64I-NEXT: .cfi_restore s0495; RV64I-NEXT: addi sp, sp, 2032496; RV64I-NEXT: .cfi_def_cfa_offset 0497; RV64I-NEXT: ret498;499; RV32I-LABEL: f9:500; RV32I: # %bb.0:501; RV32I-NEXT: addi sp, sp, -2032502; RV32I-NEXT: .cfi_def_cfa_offset 2032503; RV32I-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill504; RV32I-NEXT: sw s0, 2024(sp) # 4-byte Folded Spill505; RV32I-NEXT: .cfi_offset ra, -4506; RV32I-NEXT: .cfi_offset s0, -8507; RV32I-NEXT: addi s0, sp, 2032508; RV32I-NEXT: .cfi_def_cfa s0, 0509; RV32I-NEXT: lui a1, 1510; RV32I-NEXT: sub sp, sp, a1511; RV32I-NEXT: sw zero, 0(sp)512; RV32I-NEXT: sub sp, sp, a1513; RV32I-NEXT: sw zero, 0(sp)514; RV32I-NEXT: addi sp, sp, -16515; RV32I-NEXT: andi sp, sp, -2048516; RV32I-NEXT: slli a0, a0, 2517; RV32I-NEXT: addi a1, sp, 2047518; RV32I-NEXT: addi a1, a1, 1519; RV32I-NEXT: add a0, a1, a0520; RV32I-NEXT: li a1, 1521; RV32I-NEXT: sw a1, 0(a0)522; RV32I-NEXT: lui a0, 1523; RV32I-NEXT: add a0, sp, a0524; RV32I-NEXT: lw a0, -2048(a0)525; RV32I-NEXT: addi sp, s0, -2032526; RV32I-NEXT: .cfi_def_cfa sp, 2032527; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload528; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload529; RV32I-NEXT: .cfi_restore ra530; RV32I-NEXT: .cfi_restore s0531; RV32I-NEXT: addi sp, sp, 2032532; RV32I-NEXT: .cfi_def_cfa_offset 0533; RV32I-NEXT: ret534 %a = alloca i32, i32 2000, align 2048535 %b = getelementptr inbounds i32, ptr %a, i64 %i536 store volatile i32 1, ptr %b537 %c = load volatile i32, ptr %a538 ret i32 %c539}540 541; alloca < probe_size, align < probe_size, alloca + align > probe_size542define i32 @f10(i64 %i) local_unnamed_addr #0 {543; RV64I-LABEL: f10:544; RV64I: # %bb.0:545; RV64I-NEXT: addi sp, sp, -2032546; RV64I-NEXT: .cfi_def_cfa_offset 2032547; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill548; RV64I-NEXT: sd s0, 2016(sp) # 8-byte Folded Spill549; RV64I-NEXT: .cfi_offset ra, -8550; RV64I-NEXT: .cfi_offset s0, -16551; RV64I-NEXT: addi s0, sp, 2032552; RV64I-NEXT: .cfi_def_cfa s0, 0553; RV64I-NEXT: addi sp, sp, -2048554; RV64I-NEXT: addi sp, sp, -1040555; RV64I-NEXT: andi sp, sp, -1024556; RV64I-NEXT: sd zero, 0(sp)557; RV64I-NEXT: slli a0, a0, 2558; RV64I-NEXT: addi a1, sp, 1024559; RV64I-NEXT: add a0, a1, a0560; RV64I-NEXT: li a1, 1561; RV64I-NEXT: sw a1, 0(a0)562; RV64I-NEXT: lw a0, 1024(sp)563; RV64I-NEXT: addi sp, s0, -2032564; RV64I-NEXT: .cfi_def_cfa sp, 2032565; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload566; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload567; RV64I-NEXT: .cfi_restore ra568; RV64I-NEXT: .cfi_restore s0569; RV64I-NEXT: addi sp, sp, 2032570; RV64I-NEXT: .cfi_def_cfa_offset 0571; RV64I-NEXT: ret572;573; RV32I-LABEL: f10:574; RV32I: # %bb.0:575; RV32I-NEXT: addi sp, sp, -2032576; RV32I-NEXT: .cfi_def_cfa_offset 2032577; RV32I-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill578; RV32I-NEXT: sw s0, 2024(sp) # 4-byte Folded Spill579; RV32I-NEXT: .cfi_offset ra, -4580; RV32I-NEXT: .cfi_offset s0, -8581; RV32I-NEXT: addi s0, sp, 2032582; RV32I-NEXT: .cfi_def_cfa s0, 0583; RV32I-NEXT: addi sp, sp, -2048584; RV32I-NEXT: addi sp, sp, -1040585; RV32I-NEXT: andi sp, sp, -1024586; RV32I-NEXT: sw zero, 0(sp)587; RV32I-NEXT: slli a0, a0, 2588; RV32I-NEXT: addi a1, sp, 1024589; RV32I-NEXT: add a0, a1, a0590; RV32I-NEXT: li a1, 1591; RV32I-NEXT: sw a1, 0(a0)592; RV32I-NEXT: lw a0, 1024(sp)593; RV32I-NEXT: addi sp, s0, -2032594; RV32I-NEXT: .cfi_def_cfa sp, 2032595; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload596; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload597; RV32I-NEXT: .cfi_restore ra598; RV32I-NEXT: .cfi_restore s0599; RV32I-NEXT: addi sp, sp, 2032600; RV32I-NEXT: .cfi_def_cfa_offset 0601; RV32I-NEXT: ret602 %a = alloca i32, i32 1000, align 1024603 %b = getelementptr inbounds i32, ptr %a, i64 %i604 store volatile i32 1, ptr %b605 %c = load volatile i32, ptr %a606 ret i32 %c607}608 609define void @f11(i32 %vla_size, i64 %i) #0 {610; RV64I-LABEL: f11:611; RV64I: # %bb.0:612; RV64I-NEXT: addi sp, sp, -2032613; RV64I-NEXT: .cfi_def_cfa_offset 2032614; RV64I-NEXT: sd zero, 0(sp)615; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill616; RV64I-NEXT: sd s0, 2016(sp) # 8-byte Folded Spill617; RV64I-NEXT: sd s1, 2008(sp) # 8-byte Folded Spill618; RV64I-NEXT: .cfi_offset ra, -8619; RV64I-NEXT: .cfi_offset s0, -16620; RV64I-NEXT: .cfi_offset s1, -24621; RV64I-NEXT: addi s0, sp, 2032622; RV64I-NEXT: .cfi_def_cfa s0, 0623; RV64I-NEXT: lui a2, 15624; RV64I-NEXT: sub t1, sp, a2625; RV64I-NEXT: lui t2, 1626; RV64I-NEXT: .LBB11_1: # =>This Inner Loop Header: Depth=1627; RV64I-NEXT: sub sp, sp, t2628; RV64I-NEXT: sd zero, 0(sp)629; RV64I-NEXT: bne sp, t1, .LBB11_1630; RV64I-NEXT: # %bb.2:631; RV64I-NEXT: addi sp, sp, -2048632; RV64I-NEXT: addi sp, sp, -16633; RV64I-NEXT: sd zero, 0(sp)634; RV64I-NEXT: srli a2, sp, 15635; RV64I-NEXT: slli sp, a2, 15636; RV64I-NEXT: mv s1, sp637; RV64I-NEXT: slli a1, a1, 2638; RV64I-NEXT: lui a2, 8639; RV64I-NEXT: add a2, s1, a2640; RV64I-NEXT: add a1, a2, a1641; RV64I-NEXT: li a2, 1642; RV64I-NEXT: slli a0, a0, 32643; RV64I-NEXT: srli a0, a0, 32644; RV64I-NEXT: sw a2, 0(a1)645; RV64I-NEXT: addi a0, a0, 15646; RV64I-NEXT: andi a0, a0, -16647; RV64I-NEXT: sub a0, sp, a0648; RV64I-NEXT: andi a0, a0, -2048649; RV64I-NEXT: lui a1, 1650; RV64I-NEXT: .LBB11_3: # =>This Inner Loop Header: Depth=1651; RV64I-NEXT: sub sp, sp, a1652; RV64I-NEXT: sd zero, 0(sp)653; RV64I-NEXT: blt a0, sp, .LBB11_3654; RV64I-NEXT: # %bb.4:655; RV64I-NEXT: mv sp, a0656; RV64I-NEXT: lbu zero, 0(a0)657; RV64I-NEXT: addi sp, s0, -2032658; RV64I-NEXT: .cfi_def_cfa sp, 2032659; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload660; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload661; RV64I-NEXT: ld s1, 2008(sp) # 8-byte Folded Reload662; RV64I-NEXT: .cfi_restore ra663; RV64I-NEXT: .cfi_restore s0664; RV64I-NEXT: .cfi_restore s1665; RV64I-NEXT: addi sp, sp, 2032666; RV64I-NEXT: .cfi_def_cfa_offset 0667; RV64I-NEXT: ret668;669; RV32I-LABEL: f11:670; RV32I: # %bb.0:671; RV32I-NEXT: addi sp, sp, -2032672; RV32I-NEXT: .cfi_def_cfa_offset 2032673; RV32I-NEXT: sw zero, 0(sp)674; RV32I-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill675; RV32I-NEXT: sw s0, 2024(sp) # 4-byte Folded Spill676; RV32I-NEXT: sw s1, 2020(sp) # 4-byte Folded Spill677; RV32I-NEXT: .cfi_offset ra, -4678; RV32I-NEXT: .cfi_offset s0, -8679; RV32I-NEXT: .cfi_offset s1, -12680; RV32I-NEXT: addi s0, sp, 2032681; RV32I-NEXT: .cfi_def_cfa s0, 0682; RV32I-NEXT: lui a2, 15683; RV32I-NEXT: sub t1, sp, a2684; RV32I-NEXT: lui t2, 1685; RV32I-NEXT: .LBB11_1: # =>This Inner Loop Header: Depth=1686; RV32I-NEXT: sub sp, sp, t2687; RV32I-NEXT: sw zero, 0(sp)688; RV32I-NEXT: bne sp, t1, .LBB11_1689; RV32I-NEXT: # %bb.2:690; RV32I-NEXT: addi sp, sp, -2048691; RV32I-NEXT: addi sp, sp, -16692; RV32I-NEXT: sw zero, 0(sp)693; RV32I-NEXT: srli a2, sp, 15694; RV32I-NEXT: slli sp, a2, 15695; RV32I-NEXT: mv s1, sp696; RV32I-NEXT: slli a1, a1, 2697; RV32I-NEXT: lui a2, 8698; RV32I-NEXT: add a2, s1, a2699; RV32I-NEXT: add a1, a2, a1700; RV32I-NEXT: li a2, 1701; RV32I-NEXT: addi a0, a0, 15702; RV32I-NEXT: andi a0, a0, -16703; RV32I-NEXT: sw a2, 0(a1)704; RV32I-NEXT: sub a0, sp, a0705; RV32I-NEXT: andi a0, a0, -2048706; RV32I-NEXT: lui a1, 1707; RV32I-NEXT: .LBB11_3: # =>This Inner Loop Header: Depth=1708; RV32I-NEXT: sub sp, sp, a1709; RV32I-NEXT: sw zero, 0(sp)710; RV32I-NEXT: blt a0, sp, .LBB11_3711; RV32I-NEXT: # %bb.4:712; RV32I-NEXT: mv sp, a0713; RV32I-NEXT: lbu zero, 0(a0)714; RV32I-NEXT: addi sp, s0, -2032715; RV32I-NEXT: .cfi_def_cfa sp, 2032716; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload717; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload718; RV32I-NEXT: lw s1, 2020(sp) # 4-byte Folded Reload719; RV32I-NEXT: .cfi_restore ra720; RV32I-NEXT: .cfi_restore s0721; RV32I-NEXT: .cfi_restore s1722; RV32I-NEXT: addi sp, sp, 2032723; RV32I-NEXT: .cfi_def_cfa_offset 0724; RV32I-NEXT: ret725 %a = alloca i32, i32 4096, align 32768726 %b = getelementptr inbounds i32, ptr %a, i64 %i727 store volatile i32 1, ptr %b728 %1 = zext i32 %vla_size to i64729 %vla = alloca i8, i64 %1, align 2048730 %2 = load volatile i8, ptr %vla, align 2048731 ret void732}733 734attributes #0 = { "probe-stack"="inline-asm" }735