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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefixes=ALL,SLOW,SLOWBASE,RV32I %s4; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \5; RUN: | FileCheck -check-prefixes=ALL,SLOW,SLOWBASE,RV64I %s6; RUN: llc -mtriple=riscv32 -mattr=+zbkb -verify-machineinstrs < %s \7; RUN: | FileCheck -check-prefixes=ALL,SLOW,SLOWZBKB,RV32IZBKB %s8; RUN: llc -mtriple=riscv64 -mattr=+zbkb -verify-machineinstrs < %s \9; RUN: | FileCheck -check-prefixes=ALL,SLOW,SLOWZBKB,RV64IZBKB %s10; RUN: llc -mtriple=riscv32 -mattr=+unaligned-scalar-mem -verify-machineinstrs < %s \11; RUN: | FileCheck -check-prefixes=ALL,FAST,RV32I-FAST %s12; RUN: llc -mtriple=riscv64 -mattr=+unaligned-scalar-mem -verify-machineinstrs < %s \13; RUN: | FileCheck -check-prefixes=ALL,FAST,RV64I-FAST %s14 15; A collection of cases showing codegen for unaligned loads and stores16 17define i8 @load_i8(ptr %p) {18; ALL-LABEL: load_i8:19; ALL: # %bb.0:20; ALL-NEXT: lbu a0, 0(a0)21; ALL-NEXT: ret22 %res = load i8, ptr %p, align 123 ret i8 %res24}25 26define i16 @load_i16(ptr %p) {27; SLOW-LABEL: load_i16:28; SLOW: # %bb.0:29; SLOW-NEXT: lbu a1, 1(a0)30; SLOW-NEXT: lbu a0, 0(a0)31; SLOW-NEXT: slli a1, a1, 832; SLOW-NEXT: or a0, a1, a033; SLOW-NEXT: ret34;35; FAST-LABEL: load_i16:36; FAST: # %bb.0:37; FAST-NEXT: lh a0, 0(a0)38; FAST-NEXT: ret39 %res = load i16, ptr %p, align 140 ret i16 %res41}42 43define i24 @load_i24(ptr %p) {44; SLOWBASE-LABEL: load_i24:45; SLOWBASE: # %bb.0:46; SLOWBASE-NEXT: lbu a1, 1(a0)47; SLOWBASE-NEXT: lbu a2, 0(a0)48; SLOWBASE-NEXT: lbu a0, 2(a0)49; SLOWBASE-NEXT: slli a1, a1, 850; SLOWBASE-NEXT: or a1, a1, a251; SLOWBASE-NEXT: slli a0, a0, 1652; SLOWBASE-NEXT: or a0, a1, a053; SLOWBASE-NEXT: ret54;55; RV32IZBKB-LABEL: load_i24:56; RV32IZBKB: # %bb.0:57; RV32IZBKB-NEXT: lbu a1, 0(a0)58; RV32IZBKB-NEXT: lbu a2, 1(a0)59; RV32IZBKB-NEXT: lbu a0, 2(a0)60; RV32IZBKB-NEXT: packh a1, a1, a261; RV32IZBKB-NEXT: pack a0, a1, a062; RV32IZBKB-NEXT: ret63;64; RV64IZBKB-LABEL: load_i24:65; RV64IZBKB: # %bb.0:66; RV64IZBKB-NEXT: lbu a1, 0(a0)67; RV64IZBKB-NEXT: lbu a2, 1(a0)68; RV64IZBKB-NEXT: lbu a0, 2(a0)69; RV64IZBKB-NEXT: packh a1, a1, a270; RV64IZBKB-NEXT: slli a0, a0, 1671; RV64IZBKB-NEXT: or a0, a1, a072; RV64IZBKB-NEXT: ret73;74; FAST-LABEL: load_i24:75; FAST: # %bb.0:76; FAST-NEXT: lbu a1, 2(a0)77; FAST-NEXT: lhu a0, 0(a0)78; FAST-NEXT: slli a1, a1, 1679; FAST-NEXT: or a0, a0, a180; FAST-NEXT: ret81 %res = load i24, ptr %p, align 182 ret i24 %res83}84 85define i32 @load_i32(ptr %p) {86; SLOWBASE-LABEL: load_i32:87; SLOWBASE: # %bb.0:88; SLOWBASE-NEXT: lbu a1, 1(a0)89; SLOWBASE-NEXT: lbu a2, 0(a0)90; SLOWBASE-NEXT: lbu a3, 2(a0)91; SLOWBASE-NEXT: lbu a0, 3(a0)92; SLOWBASE-NEXT: slli a1, a1, 893; SLOWBASE-NEXT: or a1, a1, a294; SLOWBASE-NEXT: slli a3, a3, 1695; SLOWBASE-NEXT: slli a0, a0, 2496; SLOWBASE-NEXT: or a0, a0, a397; SLOWBASE-NEXT: or a0, a0, a198; SLOWBASE-NEXT: ret99;100; RV32IZBKB-LABEL: load_i32:101; RV32IZBKB: # %bb.0:102; RV32IZBKB-NEXT: lbu a1, 1(a0)103; RV32IZBKB-NEXT: lbu a2, 2(a0)104; RV32IZBKB-NEXT: lbu a3, 3(a0)105; RV32IZBKB-NEXT: lbu a0, 0(a0)106; RV32IZBKB-NEXT: packh a2, a2, a3107; RV32IZBKB-NEXT: packh a0, a0, a1108; RV32IZBKB-NEXT: pack a0, a0, a2109; RV32IZBKB-NEXT: ret110;111; RV64IZBKB-LABEL: load_i32:112; RV64IZBKB: # %bb.0:113; RV64IZBKB-NEXT: lbu a1, 0(a0)114; RV64IZBKB-NEXT: lbu a2, 1(a0)115; RV64IZBKB-NEXT: lbu a3, 2(a0)116; RV64IZBKB-NEXT: lbu a0, 3(a0)117; RV64IZBKB-NEXT: packh a1, a1, a2118; RV64IZBKB-NEXT: slli a3, a3, 16119; RV64IZBKB-NEXT: slli a0, a0, 24120; RV64IZBKB-NEXT: or a0, a0, a3121; RV64IZBKB-NEXT: or a0, a0, a1122; RV64IZBKB-NEXT: ret123;124; FAST-LABEL: load_i32:125; FAST: # %bb.0:126; FAST-NEXT: lw a0, 0(a0)127; FAST-NEXT: ret128 %res = load i32, ptr %p, align 1129 ret i32 %res130}131 132define i64 @load_i64(ptr %p) {133; RV32I-LABEL: load_i64:134; RV32I: # %bb.0:135; RV32I-NEXT: lbu a1, 1(a0)136; RV32I-NEXT: lbu a2, 2(a0)137; RV32I-NEXT: lbu a3, 3(a0)138; RV32I-NEXT: lbu a4, 0(a0)139; RV32I-NEXT: slli a1, a1, 8140; RV32I-NEXT: slli a2, a2, 16141; RV32I-NEXT: slli a3, a3, 24142; RV32I-NEXT: or a1, a1, a4143; RV32I-NEXT: or a2, a3, a2144; RV32I-NEXT: lbu a3, 5(a0)145; RV32I-NEXT: lbu a4, 4(a0)146; RV32I-NEXT: lbu a5, 6(a0)147; RV32I-NEXT: lbu a0, 7(a0)148; RV32I-NEXT: slli a3, a3, 8149; RV32I-NEXT: or a3, a3, a4150; RV32I-NEXT: slli a5, a5, 16151; RV32I-NEXT: slli a0, a0, 24152; RV32I-NEXT: or a5, a0, a5153; RV32I-NEXT: or a0, a2, a1154; RV32I-NEXT: or a1, a5, a3155; RV32I-NEXT: ret156;157; RV64I-LABEL: load_i64:158; RV64I: # %bb.0:159; RV64I-NEXT: lbu a1, 1(a0)160; RV64I-NEXT: lbu a2, 2(a0)161; RV64I-NEXT: lbu a3, 3(a0)162; RV64I-NEXT: lbu a4, 0(a0)163; RV64I-NEXT: slli a1, a1, 8164; RV64I-NEXT: slli a2, a2, 16165; RV64I-NEXT: slli a3, a3, 24166; RV64I-NEXT: or a1, a1, a4167; RV64I-NEXT: or a2, a3, a2168; RV64I-NEXT: lbu a3, 5(a0)169; RV64I-NEXT: lbu a4, 4(a0)170; RV64I-NEXT: lbu a5, 6(a0)171; RV64I-NEXT: lbu a0, 7(a0)172; RV64I-NEXT: slli a3, a3, 8173; RV64I-NEXT: or a3, a3, a4174; RV64I-NEXT: slli a5, a5, 16175; RV64I-NEXT: slli a0, a0, 24176; RV64I-NEXT: or a0, a0, a5177; RV64I-NEXT: or a1, a2, a1178; RV64I-NEXT: or a0, a0, a3179; RV64I-NEXT: slli a0, a0, 32180; RV64I-NEXT: or a0, a0, a1181; RV64I-NEXT: ret182;183; RV32IZBKB-LABEL: load_i64:184; RV32IZBKB: # %bb.0:185; RV32IZBKB-NEXT: lbu a1, 0(a0)186; RV32IZBKB-NEXT: lbu a2, 1(a0)187; RV32IZBKB-NEXT: lbu a3, 2(a0)188; RV32IZBKB-NEXT: lbu a4, 3(a0)189; RV32IZBKB-NEXT: lbu a5, 5(a0)190; RV32IZBKB-NEXT: lbu a6, 6(a0)191; RV32IZBKB-NEXT: lbu a7, 7(a0)192; RV32IZBKB-NEXT: lbu a0, 4(a0)193; RV32IZBKB-NEXT: packh a3, a3, a4194; RV32IZBKB-NEXT: packh a1, a1, a2195; RV32IZBKB-NEXT: packh a2, a6, a7196; RV32IZBKB-NEXT: packh a4, a0, a5197; RV32IZBKB-NEXT: pack a0, a1, a3198; RV32IZBKB-NEXT: pack a1, a4, a2199; RV32IZBKB-NEXT: ret200;201; RV64IZBKB-LABEL: load_i64:202; RV64IZBKB: # %bb.0:203; RV64IZBKB-NEXT: lbu a1, 4(a0)204; RV64IZBKB-NEXT: lbu a2, 5(a0)205; RV64IZBKB-NEXT: lbu a3, 6(a0)206; RV64IZBKB-NEXT: lbu a4, 7(a0)207; RV64IZBKB-NEXT: lbu a5, 1(a0)208; RV64IZBKB-NEXT: lbu a6, 2(a0)209; RV64IZBKB-NEXT: lbu a7, 3(a0)210; RV64IZBKB-NEXT: lbu a0, 0(a0)211; RV64IZBKB-NEXT: packh a3, a3, a4212; RV64IZBKB-NEXT: packh a1, a1, a2213; RV64IZBKB-NEXT: packh a2, a6, a7214; RV64IZBKB-NEXT: packh a0, a0, a5215; RV64IZBKB-NEXT: packw a1, a1, a3216; RV64IZBKB-NEXT: packw a0, a0, a2217; RV64IZBKB-NEXT: pack a0, a0, a1218; RV64IZBKB-NEXT: ret219;220; RV32I-FAST-LABEL: load_i64:221; RV32I-FAST: # %bb.0:222; RV32I-FAST-NEXT: lw a2, 0(a0)223; RV32I-FAST-NEXT: lw a1, 4(a0)224; RV32I-FAST-NEXT: mv a0, a2225; RV32I-FAST-NEXT: ret226;227; RV64I-FAST-LABEL: load_i64:228; RV64I-FAST: # %bb.0:229; RV64I-FAST-NEXT: ld a0, 0(a0)230; RV64I-FAST-NEXT: ret231 %res = load i64, ptr %p, align 1232 ret i64 %res233}234 235define i64 @load_i64_align2(ptr %p) {236; RV32I-LABEL: load_i64_align2:237; RV32I: # %bb.0:238; RV32I-NEXT: lhu a1, 2(a0)239; RV32I-NEXT: lhu a2, 0(a0)240; RV32I-NEXT: lhu a3, 6(a0)241; RV32I-NEXT: lhu a4, 4(a0)242; RV32I-NEXT: slli a0, a1, 16243; RV32I-NEXT: or a0, a0, a2244; RV32I-NEXT: slli a1, a3, 16245; RV32I-NEXT: or a1, a1, a4246; RV32I-NEXT: ret247;248; RV64I-LABEL: load_i64_align2:249; RV64I: # %bb.0:250; RV64I-NEXT: lhu a1, 2(a0)251; RV64I-NEXT: lhu a2, 0(a0)252; RV64I-NEXT: lhu a3, 4(a0)253; RV64I-NEXT: lhu a0, 6(a0)254; RV64I-NEXT: slli a1, a1, 16255; RV64I-NEXT: or a1, a1, a2256; RV64I-NEXT: slli a3, a3, 32257; RV64I-NEXT: slli a0, a0, 48258; RV64I-NEXT: or a0, a0, a3259; RV64I-NEXT: or a0, a0, a1260; RV64I-NEXT: ret261;262; RV32IZBKB-LABEL: load_i64_align2:263; RV32IZBKB: # %bb.0:264; RV32IZBKB-NEXT: lhu a1, 0(a0)265; RV32IZBKB-NEXT: lhu a2, 2(a0)266; RV32IZBKB-NEXT: lhu a3, 4(a0)267; RV32IZBKB-NEXT: lhu a4, 6(a0)268; RV32IZBKB-NEXT: pack a0, a1, a2269; RV32IZBKB-NEXT: pack a1, a3, a4270; RV32IZBKB-NEXT: ret271;272; RV64IZBKB-LABEL: load_i64_align2:273; RV64IZBKB: # %bb.0:274; RV64IZBKB-NEXT: lhu a1, 2(a0)275; RV64IZBKB-NEXT: lhu a2, 4(a0)276; RV64IZBKB-NEXT: lhu a3, 6(a0)277; RV64IZBKB-NEXT: lhu a0, 0(a0)278; RV64IZBKB-NEXT: packw a2, a2, a3279; RV64IZBKB-NEXT: packw a0, a0, a1280; RV64IZBKB-NEXT: pack a0, a0, a2281; RV64IZBKB-NEXT: ret282;283; RV32I-FAST-LABEL: load_i64_align2:284; RV32I-FAST: # %bb.0:285; RV32I-FAST-NEXT: lw a2, 0(a0)286; RV32I-FAST-NEXT: lw a1, 4(a0)287; RV32I-FAST-NEXT: mv a0, a2288; RV32I-FAST-NEXT: ret289;290; RV64I-FAST-LABEL: load_i64_align2:291; RV64I-FAST: # %bb.0:292; RV64I-FAST-NEXT: ld a0, 0(a0)293; RV64I-FAST-NEXT: ret294 %res = load i64, ptr %p, align 2295 ret i64 %res296}297 298define void @store_i8(ptr %p, i8 %v) {299; ALL-LABEL: store_i8:300; ALL: # %bb.0:301; ALL-NEXT: sb a1, 0(a0)302; ALL-NEXT: ret303 store i8 %v, ptr %p, align 1304 ret void305}306 307define void @store_i16(ptr %p, i16 %v) {308; SLOW-LABEL: store_i16:309; SLOW: # %bb.0:310; SLOW-NEXT: srli a2, a1, 8311; SLOW-NEXT: sb a1, 0(a0)312; SLOW-NEXT: sb a2, 1(a0)313; SLOW-NEXT: ret314;315; FAST-LABEL: store_i16:316; FAST: # %bb.0:317; FAST-NEXT: sh a1, 0(a0)318; FAST-NEXT: ret319 store i16 %v, ptr %p, align 1320 ret void321}322 323define void @store_i24(ptr %p, i24 %v) {324; SLOW-LABEL: store_i24:325; SLOW: # %bb.0:326; SLOW-NEXT: srli a2, a1, 8327; SLOW-NEXT: srli a3, a1, 16328; SLOW-NEXT: sb a1, 0(a0)329; SLOW-NEXT: sb a2, 1(a0)330; SLOW-NEXT: sb a3, 2(a0)331; SLOW-NEXT: ret332;333; FAST-LABEL: store_i24:334; FAST: # %bb.0:335; FAST-NEXT: srli a2, a1, 16336; FAST-NEXT: sh a1, 0(a0)337; FAST-NEXT: sb a2, 2(a0)338; FAST-NEXT: ret339 store i24 %v, ptr %p, align 1340 ret void341}342 343define void @store_i32(ptr %p, i32 %v) {344; SLOW-LABEL: store_i32:345; SLOW: # %bb.0:346; SLOW-NEXT: srli a2, a1, 24347; SLOW-NEXT: srli a3, a1, 16348; SLOW-NEXT: srli a4, a1, 8349; SLOW-NEXT: sb a1, 0(a0)350; SLOW-NEXT: sb a4, 1(a0)351; SLOW-NEXT: sb a3, 2(a0)352; SLOW-NEXT: sb a2, 3(a0)353; SLOW-NEXT: ret354;355; FAST-LABEL: store_i32:356; FAST: # %bb.0:357; FAST-NEXT: sw a1, 0(a0)358; FAST-NEXT: ret359 store i32 %v, ptr %p, align 1360 ret void361}362 363define void @store_i64(ptr %p, i64 %v) {364; RV32I-LABEL: store_i64:365; RV32I: # %bb.0:366; RV32I-NEXT: srli a3, a2, 24367; RV32I-NEXT: srli a4, a2, 16368; RV32I-NEXT: srli a5, a2, 8369; RV32I-NEXT: srli a6, a1, 24370; RV32I-NEXT: srli a7, a1, 16371; RV32I-NEXT: sb a2, 4(a0)372; RV32I-NEXT: sb a5, 5(a0)373; RV32I-NEXT: sb a4, 6(a0)374; RV32I-NEXT: sb a3, 7(a0)375; RV32I-NEXT: srli a2, a1, 8376; RV32I-NEXT: sb a1, 0(a0)377; RV32I-NEXT: sb a2, 1(a0)378; RV32I-NEXT: sb a7, 2(a0)379; RV32I-NEXT: sb a6, 3(a0)380; RV32I-NEXT: ret381;382; RV64I-LABEL: store_i64:383; RV64I: # %bb.0:384; RV64I-NEXT: srli a2, a1, 56385; RV64I-NEXT: srli a3, a1, 48386; RV64I-NEXT: srli a4, a1, 40387; RV64I-NEXT: srli a5, a1, 32388; RV64I-NEXT: srli a6, a1, 24389; RV64I-NEXT: srli a7, a1, 16390; RV64I-NEXT: sb a5, 4(a0)391; RV64I-NEXT: sb a4, 5(a0)392; RV64I-NEXT: sb a3, 6(a0)393; RV64I-NEXT: sb a2, 7(a0)394; RV64I-NEXT: srli a2, a1, 8395; RV64I-NEXT: sb a1, 0(a0)396; RV64I-NEXT: sb a2, 1(a0)397; RV64I-NEXT: sb a7, 2(a0)398; RV64I-NEXT: sb a6, 3(a0)399; RV64I-NEXT: ret400;401; RV32IZBKB-LABEL: store_i64:402; RV32IZBKB: # %bb.0:403; RV32IZBKB-NEXT: srli a3, a2, 24404; RV32IZBKB-NEXT: srli a4, a2, 16405; RV32IZBKB-NEXT: srli a5, a2, 8406; RV32IZBKB-NEXT: srli a6, a1, 24407; RV32IZBKB-NEXT: srli a7, a1, 16408; RV32IZBKB-NEXT: sb a2, 4(a0)409; RV32IZBKB-NEXT: sb a5, 5(a0)410; RV32IZBKB-NEXT: sb a4, 6(a0)411; RV32IZBKB-NEXT: sb a3, 7(a0)412; RV32IZBKB-NEXT: srli a2, a1, 8413; RV32IZBKB-NEXT: sb a1, 0(a0)414; RV32IZBKB-NEXT: sb a2, 1(a0)415; RV32IZBKB-NEXT: sb a7, 2(a0)416; RV32IZBKB-NEXT: sb a6, 3(a0)417; RV32IZBKB-NEXT: ret418;419; RV64IZBKB-LABEL: store_i64:420; RV64IZBKB: # %bb.0:421; RV64IZBKB-NEXT: srli a2, a1, 56422; RV64IZBKB-NEXT: srli a3, a1, 48423; RV64IZBKB-NEXT: srli a4, a1, 40424; RV64IZBKB-NEXT: srli a5, a1, 32425; RV64IZBKB-NEXT: srli a6, a1, 24426; RV64IZBKB-NEXT: srli a7, a1, 16427; RV64IZBKB-NEXT: sb a5, 4(a0)428; RV64IZBKB-NEXT: sb a4, 5(a0)429; RV64IZBKB-NEXT: sb a3, 6(a0)430; RV64IZBKB-NEXT: sb a2, 7(a0)431; RV64IZBKB-NEXT: srli a2, a1, 8432; RV64IZBKB-NEXT: sb a1, 0(a0)433; RV64IZBKB-NEXT: sb a2, 1(a0)434; RV64IZBKB-NEXT: sb a7, 2(a0)435; RV64IZBKB-NEXT: sb a6, 3(a0)436; RV64IZBKB-NEXT: ret437;438; RV32I-FAST-LABEL: store_i64:439; RV32I-FAST: # %bb.0:440; RV32I-FAST-NEXT: sw a1, 0(a0)441; RV32I-FAST-NEXT: sw a2, 4(a0)442; RV32I-FAST-NEXT: ret443;444; RV64I-FAST-LABEL: store_i64:445; RV64I-FAST: # %bb.0:446; RV64I-FAST-NEXT: sd a1, 0(a0)447; RV64I-FAST-NEXT: ret448 store i64 %v, ptr %p, align 1449 ret void450}451 452define void @merge_stores_i8_i16(ptr %p) {453; SLOW-LABEL: merge_stores_i8_i16:454; SLOW: # %bb.0:455; SLOW-NEXT: sb zero, 0(a0)456; SLOW-NEXT: sb zero, 1(a0)457; SLOW-NEXT: ret458;459; FAST-LABEL: merge_stores_i8_i16:460; FAST: # %bb.0:461; FAST-NEXT: sh zero, 0(a0)462; FAST-NEXT: ret463 store i8 0, ptr %p464 %p2 = getelementptr i8, ptr %p, i32 1465 store i8 0, ptr %p2466 ret void467}468 469define void @merge_stores_i8_i32(ptr %p) {470; SLOW-LABEL: merge_stores_i8_i32:471; SLOW: # %bb.0:472; SLOW-NEXT: sb zero, 0(a0)473; SLOW-NEXT: sb zero, 1(a0)474; SLOW-NEXT: sb zero, 2(a0)475; SLOW-NEXT: sb zero, 3(a0)476; SLOW-NEXT: ret477;478; FAST-LABEL: merge_stores_i8_i32:479; FAST: # %bb.0:480; FAST-NEXT: sw zero, 0(a0)481; FAST-NEXT: ret482 store i8 0, ptr %p483 %p2 = getelementptr i8, ptr %p, i32 1484 store i8 0, ptr %p2485 %p3 = getelementptr i8, ptr %p, i32 2486 store i8 0, ptr %p3487 %p4 = getelementptr i8, ptr %p, i32 3488 store i8 0, ptr %p4489 ret void490}491 492define void @merge_stores_i8_i64(ptr %p) {493; SLOW-LABEL: merge_stores_i8_i64:494; SLOW: # %bb.0:495; SLOW-NEXT: sb zero, 0(a0)496; SLOW-NEXT: sb zero, 1(a0)497; SLOW-NEXT: sb zero, 2(a0)498; SLOW-NEXT: sb zero, 3(a0)499; SLOW-NEXT: sb zero, 4(a0)500; SLOW-NEXT: sb zero, 5(a0)501; SLOW-NEXT: sb zero, 6(a0)502; SLOW-NEXT: sb zero, 7(a0)503; SLOW-NEXT: ret504;505; RV32I-FAST-LABEL: merge_stores_i8_i64:506; RV32I-FAST: # %bb.0:507; RV32I-FAST-NEXT: sw zero, 0(a0)508; RV32I-FAST-NEXT: sw zero, 4(a0)509; RV32I-FAST-NEXT: ret510;511; RV64I-FAST-LABEL: merge_stores_i8_i64:512; RV64I-FAST: # %bb.0:513; RV64I-FAST-NEXT: sd zero, 0(a0)514; RV64I-FAST-NEXT: ret515 store i8 0, ptr %p516 %p2 = getelementptr i8, ptr %p, i32 1517 store i8 0, ptr %p2518 %p3 = getelementptr i8, ptr %p, i32 2519 store i8 0, ptr %p3520 %p4 = getelementptr i8, ptr %p, i32 3521 store i8 0, ptr %p4522 %p5 = getelementptr i8, ptr %p, i32 4523 store i8 0, ptr %p5524 %p6 = getelementptr i8, ptr %p, i32 5525 store i8 0, ptr %p6526 %p7 = getelementptr i8, ptr %p, i32 6527 store i8 0, ptr %p7528 %p8 = getelementptr i8, ptr %p, i32 7529 store i8 0, ptr %p8530 ret void531}532 533define void @merge_stores_i16_i32(ptr %p) {534; SLOW-LABEL: merge_stores_i16_i32:535; SLOW: # %bb.0:536; SLOW-NEXT: sh zero, 0(a0)537; SLOW-NEXT: sh zero, 2(a0)538; SLOW-NEXT: ret539;540; FAST-LABEL: merge_stores_i16_i32:541; FAST: # %bb.0:542; FAST-NEXT: sw zero, 0(a0)543; FAST-NEXT: ret544 store i16 0, ptr %p545 %p2 = getelementptr i16, ptr %p, i32 1546 store i16 0, ptr %p2547 ret void548}549 550define void @merge_stores_i16_i64(ptr %p) {551; SLOW-LABEL: merge_stores_i16_i64:552; SLOW: # %bb.0:553; SLOW-NEXT: sh zero, 0(a0)554; SLOW-NEXT: sh zero, 2(a0)555; SLOW-NEXT: sh zero, 4(a0)556; SLOW-NEXT: sh zero, 6(a0)557; SLOW-NEXT: ret558;559; RV32I-FAST-LABEL: merge_stores_i16_i64:560; RV32I-FAST: # %bb.0:561; RV32I-FAST-NEXT: sw zero, 0(a0)562; RV32I-FAST-NEXT: sw zero, 4(a0)563; RV32I-FAST-NEXT: ret564;565; RV64I-FAST-LABEL: merge_stores_i16_i64:566; RV64I-FAST: # %bb.0:567; RV64I-FAST-NEXT: sd zero, 0(a0)568; RV64I-FAST-NEXT: ret569 store i16 0, ptr %p570 %p2 = getelementptr i16, ptr %p, i32 1571 store i16 0, ptr %p2572 %p3 = getelementptr i16, ptr %p, i32 2573 store i16 0, ptr %p3574 %p4 = getelementptr i16, ptr %p, i32 3575 store i16 0, ptr %p4576 ret void577}578 579define void @merge_stores_i32_i64(ptr %p) {580; SLOW-LABEL: merge_stores_i32_i64:581; SLOW: # %bb.0:582; SLOW-NEXT: sw zero, 0(a0)583; SLOW-NEXT: sw zero, 4(a0)584; SLOW-NEXT: ret585;586; RV32I-FAST-LABEL: merge_stores_i32_i64:587; RV32I-FAST: # %bb.0:588; RV32I-FAST-NEXT: sw zero, 0(a0)589; RV32I-FAST-NEXT: sw zero, 4(a0)590; RV32I-FAST-NEXT: ret591;592; RV64I-FAST-LABEL: merge_stores_i32_i64:593; RV64I-FAST: # %bb.0:594; RV64I-FAST-NEXT: sd zero, 0(a0)595; RV64I-FAST-NEXT: ret596 store i32 0, ptr %p597 %p2 = getelementptr i32, ptr %p, i32 1598 store i32 0, ptr %p2599 ret void600}601 602define void @store_large_constant(ptr %x) {603; SLOW-LABEL: store_large_constant:604; SLOW: # %bb.0:605; SLOW-NEXT: li a1, -2606; SLOW-NEXT: li a2, 220607; SLOW-NEXT: li a3, 186608; SLOW-NEXT: li a4, 152609; SLOW-NEXT: li a5, 118610; SLOW-NEXT: li a6, 84611; SLOW-NEXT: li a7, 50612; SLOW-NEXT: sb a4, 4(a0)613; SLOW-NEXT: sb a3, 5(a0)614; SLOW-NEXT: sb a2, 6(a0)615; SLOW-NEXT: sb a1, 7(a0)616; SLOW-NEXT: li a1, 16617; SLOW-NEXT: sb a1, 0(a0)618; SLOW-NEXT: sb a7, 1(a0)619; SLOW-NEXT: sb a6, 2(a0)620; SLOW-NEXT: sb a5, 3(a0)621; SLOW-NEXT: ret622;623; RV32I-FAST-LABEL: store_large_constant:624; RV32I-FAST: # %bb.0:625; RV32I-FAST-NEXT: lui a1, 1043916626; RV32I-FAST-NEXT: lui a2, 484675627; RV32I-FAST-NEXT: addi a1, a1, -1384628; RV32I-FAST-NEXT: addi a2, a2, 528629; RV32I-FAST-NEXT: sw a2, 0(a0)630; RV32I-FAST-NEXT: sw a1, 4(a0)631; RV32I-FAST-NEXT: ret632;633; RV64I-FAST-LABEL: store_large_constant:634; RV64I-FAST: # %bb.0:635; RV64I-FAST-NEXT: lui a1, %hi(.LCPI17_0)636; RV64I-FAST-NEXT: ld a1, %lo(.LCPI17_0)(a1)637; RV64I-FAST-NEXT: sd a1, 0(a0)638; RV64I-FAST-NEXT: ret639 store i64 18364758544493064720, ptr %x, align 1640 ret void641}642;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:643; SLOWZBKB: {{.*}}644