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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=riscv32 -mattr=+m -verify-machineinstrs | FileCheck %s --check-prefix=RV323; RUN: llc < %s -mtriple=riscv64 -mattr=+m -verify-machineinstrs | FileCheck %s --check-prefix=RV644; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs | FileCheck %s --check-prefix=RV32ZBA5; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zba -verify-machineinstrs | FileCheck %s --check-prefix=RV64ZBA6; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zicond -verify-machineinstrs | FileCheck %s --check-prefix=RV32ZICOND7; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zicond -verify-machineinstrs | FileCheck %s --check-prefix=RV64ZICOND8 9;10; Get the actual value of the overflow bit.11;12define zeroext i1 @saddo1.i32(i32 signext %v1, i32 signext %v2, ptr %res) {13; RV32-LABEL: saddo1.i32:14; RV32:       # %bb.0: # %entry15; RV32-NEXT:    add a3, a0, a116; RV32-NEXT:    slt a0, a3, a017; RV32-NEXT:    srli a1, a1, 3118; RV32-NEXT:    xor a0, a1, a019; RV32-NEXT:    sw a3, 0(a2)20; RV32-NEXT:    ret21;22; RV64-LABEL: saddo1.i32:23; RV64:       # %bb.0: # %entry24; RV64-NEXT:    add a3, a0, a125; RV64-NEXT:    addw a0, a0, a126; RV64-NEXT:    xor a0, a0, a327; RV64-NEXT:    snez a0, a028; RV64-NEXT:    sw a3, 0(a2)29; RV64-NEXT:    ret30;31; RV32ZBA-LABEL: saddo1.i32:32; RV32ZBA:       # %bb.0: # %entry33; RV32ZBA-NEXT:    add a3, a0, a134; RV32ZBA-NEXT:    slt a0, a3, a035; RV32ZBA-NEXT:    srli a1, a1, 3136; RV32ZBA-NEXT:    xor a0, a1, a037; RV32ZBA-NEXT:    sw a3, 0(a2)38; RV32ZBA-NEXT:    ret39;40; RV64ZBA-LABEL: saddo1.i32:41; RV64ZBA:       # %bb.0: # %entry42; RV64ZBA-NEXT:    add a3, a0, a143; RV64ZBA-NEXT:    addw a0, a0, a144; RV64ZBA-NEXT:    xor a0, a0, a345; RV64ZBA-NEXT:    snez a0, a046; RV64ZBA-NEXT:    sw a3, 0(a2)47; RV64ZBA-NEXT:    ret48;49; RV32ZICOND-LABEL: saddo1.i32:50; RV32ZICOND:       # %bb.0: # %entry51; RV32ZICOND-NEXT:    add a3, a0, a152; RV32ZICOND-NEXT:    slt a0, a3, a053; RV32ZICOND-NEXT:    srli a1, a1, 3154; RV32ZICOND-NEXT:    xor a0, a1, a055; RV32ZICOND-NEXT:    sw a3, 0(a2)56; RV32ZICOND-NEXT:    ret57;58; RV64ZICOND-LABEL: saddo1.i32:59; RV64ZICOND:       # %bb.0: # %entry60; RV64ZICOND-NEXT:    add a3, a0, a161; RV64ZICOND-NEXT:    addw a0, a0, a162; RV64ZICOND-NEXT:    xor a0, a0, a363; RV64ZICOND-NEXT:    snez a0, a064; RV64ZICOND-NEXT:    sw a3, 0(a2)65; RV64ZICOND-NEXT:    ret66entry:67  %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)68  %val = extractvalue {i32, i1} %t, 069  %obit = extractvalue {i32, i1} %t, 170  store i32 %val, ptr %res71  ret i1 %obit72}73 74; Test the immediate version.75define zeroext i1 @saddo2.i32(i32 signext %v1, ptr %res) {76; RV32-LABEL: saddo2.i32:77; RV32:       # %bb.0: # %entry78; RV32-NEXT:    addi a2, a0, 479; RV32-NEXT:    slt a0, a2, a080; RV32-NEXT:    sw a2, 0(a1)81; RV32-NEXT:    ret82;83; RV64-LABEL: saddo2.i32:84; RV64:       # %bb.0: # %entry85; RV64-NEXT:    addiw a2, a0, 486; RV64-NEXT:    slt a0, a2, a087; RV64-NEXT:    sw a2, 0(a1)88; RV64-NEXT:    ret89;90; RV32ZBA-LABEL: saddo2.i32:91; RV32ZBA:       # %bb.0: # %entry92; RV32ZBA-NEXT:    addi a2, a0, 493; RV32ZBA-NEXT:    slt a0, a2, a094; RV32ZBA-NEXT:    sw a2, 0(a1)95; RV32ZBA-NEXT:    ret96;97; RV64ZBA-LABEL: saddo2.i32:98; RV64ZBA:       # %bb.0: # %entry99; RV64ZBA-NEXT:    addiw a2, a0, 4100; RV64ZBA-NEXT:    slt a0, a2, a0101; RV64ZBA-NEXT:    sw a2, 0(a1)102; RV64ZBA-NEXT:    ret103;104; RV32ZICOND-LABEL: saddo2.i32:105; RV32ZICOND:       # %bb.0: # %entry106; RV32ZICOND-NEXT:    addi a2, a0, 4107; RV32ZICOND-NEXT:    slt a0, a2, a0108; RV32ZICOND-NEXT:    sw a2, 0(a1)109; RV32ZICOND-NEXT:    ret110;111; RV64ZICOND-LABEL: saddo2.i32:112; RV64ZICOND:       # %bb.0: # %entry113; RV64ZICOND-NEXT:    addiw a2, a0, 4114; RV64ZICOND-NEXT:    slt a0, a2, a0115; RV64ZICOND-NEXT:    sw a2, 0(a1)116; RV64ZICOND-NEXT:    ret117entry:118  %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 4)119  %val = extractvalue {i32, i1} %t, 0120  %obit = extractvalue {i32, i1} %t, 1121  store i32 %val, ptr %res122  ret i1 %obit123}124 125; Test negative immediates.126define zeroext i1 @saddo3.i32(i32 signext %v1, ptr %res) {127; RV32-LABEL: saddo3.i32:128; RV32:       # %bb.0: # %entry129; RV32-NEXT:    addi a2, a0, -4130; RV32-NEXT:    slt a0, a2, a0131; RV32-NEXT:    xori a0, a0, 1132; RV32-NEXT:    sw a2, 0(a1)133; RV32-NEXT:    ret134;135; RV64-LABEL: saddo3.i32:136; RV64:       # %bb.0: # %entry137; RV64-NEXT:    addiw a2, a0, -4138; RV64-NEXT:    slt a0, a2, a0139; RV64-NEXT:    xori a0, a0, 1140; RV64-NEXT:    sw a2, 0(a1)141; RV64-NEXT:    ret142;143; RV32ZBA-LABEL: saddo3.i32:144; RV32ZBA:       # %bb.0: # %entry145; RV32ZBA-NEXT:    addi a2, a0, -4146; RV32ZBA-NEXT:    slt a0, a2, a0147; RV32ZBA-NEXT:    xori a0, a0, 1148; RV32ZBA-NEXT:    sw a2, 0(a1)149; RV32ZBA-NEXT:    ret150;151; RV64ZBA-LABEL: saddo3.i32:152; RV64ZBA:       # %bb.0: # %entry153; RV64ZBA-NEXT:    addiw a2, a0, -4154; RV64ZBA-NEXT:    slt a0, a2, a0155; RV64ZBA-NEXT:    xori a0, a0, 1156; RV64ZBA-NEXT:    sw a2, 0(a1)157; RV64ZBA-NEXT:    ret158;159; RV32ZICOND-LABEL: saddo3.i32:160; RV32ZICOND:       # %bb.0: # %entry161; RV32ZICOND-NEXT:    addi a2, a0, -4162; RV32ZICOND-NEXT:    slt a0, a2, a0163; RV32ZICOND-NEXT:    xori a0, a0, 1164; RV32ZICOND-NEXT:    sw a2, 0(a1)165; RV32ZICOND-NEXT:    ret166;167; RV64ZICOND-LABEL: saddo3.i32:168; RV64ZICOND:       # %bb.0: # %entry169; RV64ZICOND-NEXT:    addiw a2, a0, -4170; RV64ZICOND-NEXT:    slt a0, a2, a0171; RV64ZICOND-NEXT:    xori a0, a0, 1172; RV64ZICOND-NEXT:    sw a2, 0(a1)173; RV64ZICOND-NEXT:    ret174entry:175  %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 -4)176  %val = extractvalue {i32, i1} %t, 0177  %obit = extractvalue {i32, i1} %t, 1178  store i32 %val, ptr %res179  ret i1 %obit180}181 182; Test immediates that are too large to be encoded.183define zeroext i1 @saddo4.i32(i32 signext %v1, ptr %res) {184; RV32-LABEL: saddo4.i32:185; RV32:       # %bb.0: # %entry186; RV32-NEXT:    lui a2, 4096187; RV32-NEXT:    addi a2, a2, -1188; RV32-NEXT:    add a2, a0, a2189; RV32-NEXT:    slt a0, a2, a0190; RV32-NEXT:    sw a2, 0(a1)191; RV32-NEXT:    ret192;193; RV64-LABEL: saddo4.i32:194; RV64:       # %bb.0: # %entry195; RV64-NEXT:    lui a2, 4096196; RV64-NEXT:    addi a2, a2, -1197; RV64-NEXT:    addw a2, a0, a2198; RV64-NEXT:    slt a0, a2, a0199; RV64-NEXT:    sw a2, 0(a1)200; RV64-NEXT:    ret201;202; RV32ZBA-LABEL: saddo4.i32:203; RV32ZBA:       # %bb.0: # %entry204; RV32ZBA-NEXT:    lui a2, 4096205; RV32ZBA-NEXT:    addi a2, a2, -1206; RV32ZBA-NEXT:    add a2, a0, a2207; RV32ZBA-NEXT:    slt a0, a2, a0208; RV32ZBA-NEXT:    sw a2, 0(a1)209; RV32ZBA-NEXT:    ret210;211; RV64ZBA-LABEL: saddo4.i32:212; RV64ZBA:       # %bb.0: # %entry213; RV64ZBA-NEXT:    lui a2, 4096214; RV64ZBA-NEXT:    addi a2, a2, -1215; RV64ZBA-NEXT:    addw a2, a0, a2216; RV64ZBA-NEXT:    slt a0, a2, a0217; RV64ZBA-NEXT:    sw a2, 0(a1)218; RV64ZBA-NEXT:    ret219;220; RV32ZICOND-LABEL: saddo4.i32:221; RV32ZICOND:       # %bb.0: # %entry222; RV32ZICOND-NEXT:    lui a2, 4096223; RV32ZICOND-NEXT:    addi a2, a2, -1224; RV32ZICOND-NEXT:    add a2, a0, a2225; RV32ZICOND-NEXT:    slt a0, a2, a0226; RV32ZICOND-NEXT:    sw a2, 0(a1)227; RV32ZICOND-NEXT:    ret228;229; RV64ZICOND-LABEL: saddo4.i32:230; RV64ZICOND:       # %bb.0: # %entry231; RV64ZICOND-NEXT:    lui a2, 4096232; RV64ZICOND-NEXT:    addi a2, a2, -1233; RV64ZICOND-NEXT:    addw a2, a0, a2234; RV64ZICOND-NEXT:    slt a0, a2, a0235; RV64ZICOND-NEXT:    sw a2, 0(a1)236; RV64ZICOND-NEXT:    ret237entry:238  %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 16777215)239  %val = extractvalue {i32, i1} %t, 0240  %obit = extractvalue {i32, i1} %t, 1241  store i32 %val, ptr %res242  ret i1 %obit243}244 245define zeroext i1 @saddo1.i64(i64 %v1, i64 %v2, ptr %res) {246; RV32-LABEL: saddo1.i64:247; RV32:       # %bb.0: # %entry248; RV32-NEXT:    add a5, a1, a3249; RV32-NEXT:    add a2, a0, a2250; RV32-NEXT:    xor a3, a1, a3251; RV32-NEXT:    sltu a0, a2, a0252; RV32-NEXT:    not a3, a3253; RV32-NEXT:    add a5, a5, a0254; RV32-NEXT:    xor a1, a1, a5255; RV32-NEXT:    and a0, a3, a1256; RV32-NEXT:    srli a0, a0, 31257; RV32-NEXT:    sw a2, 0(a4)258; RV32-NEXT:    sw a5, 4(a4)259; RV32-NEXT:    ret260;261; RV64-LABEL: saddo1.i64:262; RV64:       # %bb.0: # %entry263; RV64-NEXT:    add a3, a0, a1264; RV64-NEXT:    slt a0, a3, a0265; RV64-NEXT:    srli a1, a1, 63266; RV64-NEXT:    xor a0, a1, a0267; RV64-NEXT:    sd a3, 0(a2)268; RV64-NEXT:    ret269;270; RV32ZBA-LABEL: saddo1.i64:271; RV32ZBA:       # %bb.0: # %entry272; RV32ZBA-NEXT:    add a5, a1, a3273; RV32ZBA-NEXT:    add a2, a0, a2274; RV32ZBA-NEXT:    xor a3, a1, a3275; RV32ZBA-NEXT:    sltu a0, a2, a0276; RV32ZBA-NEXT:    not a3, a3277; RV32ZBA-NEXT:    add a5, a5, a0278; RV32ZBA-NEXT:    xor a1, a1, a5279; RV32ZBA-NEXT:    and a0, a3, a1280; RV32ZBA-NEXT:    srli a0, a0, 31281; RV32ZBA-NEXT:    sw a2, 0(a4)282; RV32ZBA-NEXT:    sw a5, 4(a4)283; RV32ZBA-NEXT:    ret284;285; RV64ZBA-LABEL: saddo1.i64:286; RV64ZBA:       # %bb.0: # %entry287; RV64ZBA-NEXT:    add a3, a0, a1288; RV64ZBA-NEXT:    slt a0, a3, a0289; RV64ZBA-NEXT:    srli a1, a1, 63290; RV64ZBA-NEXT:    xor a0, a1, a0291; RV64ZBA-NEXT:    sd a3, 0(a2)292; RV64ZBA-NEXT:    ret293;294; RV32ZICOND-LABEL: saddo1.i64:295; RV32ZICOND:       # %bb.0: # %entry296; RV32ZICOND-NEXT:    add a5, a1, a3297; RV32ZICOND-NEXT:    add a2, a0, a2298; RV32ZICOND-NEXT:    xor a3, a1, a3299; RV32ZICOND-NEXT:    sltu a0, a2, a0300; RV32ZICOND-NEXT:    not a3, a3301; RV32ZICOND-NEXT:    add a5, a5, a0302; RV32ZICOND-NEXT:    xor a1, a1, a5303; RV32ZICOND-NEXT:    and a0, a3, a1304; RV32ZICOND-NEXT:    srli a0, a0, 31305; RV32ZICOND-NEXT:    sw a2, 0(a4)306; RV32ZICOND-NEXT:    sw a5, 4(a4)307; RV32ZICOND-NEXT:    ret308;309; RV64ZICOND-LABEL: saddo1.i64:310; RV64ZICOND:       # %bb.0: # %entry311; RV64ZICOND-NEXT:    add a3, a0, a1312; RV64ZICOND-NEXT:    slt a0, a3, a0313; RV64ZICOND-NEXT:    srli a1, a1, 63314; RV64ZICOND-NEXT:    xor a0, a1, a0315; RV64ZICOND-NEXT:    sd a3, 0(a2)316; RV64ZICOND-NEXT:    ret317entry:318  %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %v1, i64 %v2)319  %val = extractvalue {i64, i1} %t, 0320  %obit = extractvalue {i64, i1} %t, 1321  store i64 %val, ptr %res322  ret i1 %obit323}324 325define zeroext i1 @saddo2.i64(i64 %v1, ptr %res) {326; RV32-LABEL: saddo2.i64:327; RV32:       # %bb.0: # %entry328; RV32-NEXT:    addi a3, a0, 4329; RV32-NEXT:    not a4, a1330; RV32-NEXT:    sltu a0, a3, a0331; RV32-NEXT:    add a5, a1, a0332; RV32-NEXT:    xor a1, a1, a5333; RV32-NEXT:    and a0, a4, a1334; RV32-NEXT:    srli a0, a0, 31335; RV32-NEXT:    sw a3, 0(a2)336; RV32-NEXT:    sw a5, 4(a2)337; RV32-NEXT:    ret338;339; RV64-LABEL: saddo2.i64:340; RV64:       # %bb.0: # %entry341; RV64-NEXT:    addi a2, a0, 4342; RV64-NEXT:    slt a0, a2, a0343; RV64-NEXT:    sd a2, 0(a1)344; RV64-NEXT:    ret345;346; RV32ZBA-LABEL: saddo2.i64:347; RV32ZBA:       # %bb.0: # %entry348; RV32ZBA-NEXT:    addi a3, a0, 4349; RV32ZBA-NEXT:    not a4, a1350; RV32ZBA-NEXT:    sltu a0, a3, a0351; RV32ZBA-NEXT:    add a5, a1, a0352; RV32ZBA-NEXT:    xor a1, a1, a5353; RV32ZBA-NEXT:    and a0, a4, a1354; RV32ZBA-NEXT:    srli a0, a0, 31355; RV32ZBA-NEXT:    sw a3, 0(a2)356; RV32ZBA-NEXT:    sw a5, 4(a2)357; RV32ZBA-NEXT:    ret358;359; RV64ZBA-LABEL: saddo2.i64:360; RV64ZBA:       # %bb.0: # %entry361; RV64ZBA-NEXT:    addi a2, a0, 4362; RV64ZBA-NEXT:    slt a0, a2, a0363; RV64ZBA-NEXT:    sd a2, 0(a1)364; RV64ZBA-NEXT:    ret365;366; RV32ZICOND-LABEL: saddo2.i64:367; RV32ZICOND:       # %bb.0: # %entry368; RV32ZICOND-NEXT:    addi a3, a0, 4369; RV32ZICOND-NEXT:    not a4, a1370; RV32ZICOND-NEXT:    sltu a0, a3, a0371; RV32ZICOND-NEXT:    add a5, a1, a0372; RV32ZICOND-NEXT:    xor a1, a1, a5373; RV32ZICOND-NEXT:    and a0, a4, a1374; RV32ZICOND-NEXT:    srli a0, a0, 31375; RV32ZICOND-NEXT:    sw a3, 0(a2)376; RV32ZICOND-NEXT:    sw a5, 4(a2)377; RV32ZICOND-NEXT:    ret378;379; RV64ZICOND-LABEL: saddo2.i64:380; RV64ZICOND:       # %bb.0: # %entry381; RV64ZICOND-NEXT:    addi a2, a0, 4382; RV64ZICOND-NEXT:    slt a0, a2, a0383; RV64ZICOND-NEXT:    sd a2, 0(a1)384; RV64ZICOND-NEXT:    ret385entry:386  %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %v1, i64 4)387  %val = extractvalue {i64, i1} %t, 0388  %obit = extractvalue {i64, i1} %t, 1389  store i64 %val, ptr %res390  ret i1 %obit391}392 393define zeroext i1 @saddo3.i64(i64 %v1, ptr %res) {394; RV32-LABEL: saddo3.i64:395; RV32:       # %bb.0: # %entry396; RV32-NEXT:    addi a3, a0, -4397; RV32-NEXT:    sltu a0, a3, a0398; RV32-NEXT:    add a0, a1, a0399; RV32-NEXT:    addi a4, a0, -1400; RV32-NEXT:    xor a0, a1, a4401; RV32-NEXT:    and a0, a1, a0402; RV32-NEXT:    srli a0, a0, 31403; RV32-NEXT:    sw a3, 0(a2)404; RV32-NEXT:    sw a4, 4(a2)405; RV32-NEXT:    ret406;407; RV64-LABEL: saddo3.i64:408; RV64:       # %bb.0: # %entry409; RV64-NEXT:    addi a2, a0, -4410; RV64-NEXT:    slt a0, a2, a0411; RV64-NEXT:    xori a0, a0, 1412; RV64-NEXT:    sd a2, 0(a1)413; RV64-NEXT:    ret414;415; RV32ZBA-LABEL: saddo3.i64:416; RV32ZBA:       # %bb.0: # %entry417; RV32ZBA-NEXT:    addi a3, a0, -4418; RV32ZBA-NEXT:    sltu a0, a3, a0419; RV32ZBA-NEXT:    add a0, a1, a0420; RV32ZBA-NEXT:    addi a4, a0, -1421; RV32ZBA-NEXT:    xor a0, a1, a4422; RV32ZBA-NEXT:    and a0, a1, a0423; RV32ZBA-NEXT:    srli a0, a0, 31424; RV32ZBA-NEXT:    sw a3, 0(a2)425; RV32ZBA-NEXT:    sw a4, 4(a2)426; RV32ZBA-NEXT:    ret427;428; RV64ZBA-LABEL: saddo3.i64:429; RV64ZBA:       # %bb.0: # %entry430; RV64ZBA-NEXT:    addi a2, a0, -4431; RV64ZBA-NEXT:    slt a0, a2, a0432; RV64ZBA-NEXT:    xori a0, a0, 1433; RV64ZBA-NEXT:    sd a2, 0(a1)434; RV64ZBA-NEXT:    ret435;436; RV32ZICOND-LABEL: saddo3.i64:437; RV32ZICOND:       # %bb.0: # %entry438; RV32ZICOND-NEXT:    addi a3, a0, -4439; RV32ZICOND-NEXT:    sltu a0, a3, a0440; RV32ZICOND-NEXT:    add a0, a1, a0441; RV32ZICOND-NEXT:    addi a4, a0, -1442; RV32ZICOND-NEXT:    xor a0, a1, a4443; RV32ZICOND-NEXT:    and a0, a1, a0444; RV32ZICOND-NEXT:    srli a0, a0, 31445; RV32ZICOND-NEXT:    sw a3, 0(a2)446; RV32ZICOND-NEXT:    sw a4, 4(a2)447; RV32ZICOND-NEXT:    ret448;449; RV64ZICOND-LABEL: saddo3.i64:450; RV64ZICOND:       # %bb.0: # %entry451; RV64ZICOND-NEXT:    addi a2, a0, -4452; RV64ZICOND-NEXT:    slt a0, a2, a0453; RV64ZICOND-NEXT:    xori a0, a0, 1454; RV64ZICOND-NEXT:    sd a2, 0(a1)455; RV64ZICOND-NEXT:    ret456entry:457  %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %v1, i64 -4)458  %val = extractvalue {i64, i1} %t, 0459  %obit = extractvalue {i64, i1} %t, 1460  store i64 %val, ptr %res461  ret i1 %obit462}463 464define zeroext i1 @uaddo.i32(i32 signext %v1, i32 signext %v2, ptr %res) {465; RV32-LABEL: uaddo.i32:466; RV32:       # %bb.0: # %entry467; RV32-NEXT:    add a1, a0, a1468; RV32-NEXT:    sltu a0, a1, a0469; RV32-NEXT:    sw a1, 0(a2)470; RV32-NEXT:    ret471;472; RV64-LABEL: uaddo.i32:473; RV64:       # %bb.0: # %entry474; RV64-NEXT:    addw a1, a0, a1475; RV64-NEXT:    sltu a0, a1, a0476; RV64-NEXT:    sw a1, 0(a2)477; RV64-NEXT:    ret478;479; RV32ZBA-LABEL: uaddo.i32:480; RV32ZBA:       # %bb.0: # %entry481; RV32ZBA-NEXT:    add a1, a0, a1482; RV32ZBA-NEXT:    sltu a0, a1, a0483; RV32ZBA-NEXT:    sw a1, 0(a2)484; RV32ZBA-NEXT:    ret485;486; RV64ZBA-LABEL: uaddo.i32:487; RV64ZBA:       # %bb.0: # %entry488; RV64ZBA-NEXT:    addw a1, a0, a1489; RV64ZBA-NEXT:    sltu a0, a1, a0490; RV64ZBA-NEXT:    sw a1, 0(a2)491; RV64ZBA-NEXT:    ret492;493; RV32ZICOND-LABEL: uaddo.i32:494; RV32ZICOND:       # %bb.0: # %entry495; RV32ZICOND-NEXT:    add a1, a0, a1496; RV32ZICOND-NEXT:    sltu a0, a1, a0497; RV32ZICOND-NEXT:    sw a1, 0(a2)498; RV32ZICOND-NEXT:    ret499;500; RV64ZICOND-LABEL: uaddo.i32:501; RV64ZICOND:       # %bb.0: # %entry502; RV64ZICOND-NEXT:    addw a1, a0, a1503; RV64ZICOND-NEXT:    sltu a0, a1, a0504; RV64ZICOND-NEXT:    sw a1, 0(a2)505; RV64ZICOND-NEXT:    ret506entry:507  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)508  %val = extractvalue {i32, i1} %t, 0509  %obit = extractvalue {i32, i1} %t, 1510  store i32 %val, ptr %res511  ret i1 %obit512}513 514define zeroext i1 @uaddo.i32.constant(i32 signext %v1, ptr %res) {515; RV32-LABEL: uaddo.i32.constant:516; RV32:       # %bb.0: # %entry517; RV32-NEXT:    addi a2, a0, -2518; RV32-NEXT:    sltu a0, a2, a0519; RV32-NEXT:    sw a2, 0(a1)520; RV32-NEXT:    ret521;522; RV64-LABEL: uaddo.i32.constant:523; RV64:       # %bb.0: # %entry524; RV64-NEXT:    addiw a2, a0, -2525; RV64-NEXT:    sltu a0, a2, a0526; RV64-NEXT:    sw a2, 0(a1)527; RV64-NEXT:    ret528;529; RV32ZBA-LABEL: uaddo.i32.constant:530; RV32ZBA:       # %bb.0: # %entry531; RV32ZBA-NEXT:    addi a2, a0, -2532; RV32ZBA-NEXT:    sltu a0, a2, a0533; RV32ZBA-NEXT:    sw a2, 0(a1)534; RV32ZBA-NEXT:    ret535;536; RV64ZBA-LABEL: uaddo.i32.constant:537; RV64ZBA:       # %bb.0: # %entry538; RV64ZBA-NEXT:    addiw a2, a0, -2539; RV64ZBA-NEXT:    sltu a0, a2, a0540; RV64ZBA-NEXT:    sw a2, 0(a1)541; RV64ZBA-NEXT:    ret542;543; RV32ZICOND-LABEL: uaddo.i32.constant:544; RV32ZICOND:       # %bb.0: # %entry545; RV32ZICOND-NEXT:    addi a2, a0, -2546; RV32ZICOND-NEXT:    sltu a0, a2, a0547; RV32ZICOND-NEXT:    sw a2, 0(a1)548; RV32ZICOND-NEXT:    ret549;550; RV64ZICOND-LABEL: uaddo.i32.constant:551; RV64ZICOND:       # %bb.0: # %entry552; RV64ZICOND-NEXT:    addiw a2, a0, -2553; RV64ZICOND-NEXT:    sltu a0, a2, a0554; RV64ZICOND-NEXT:    sw a2, 0(a1)555; RV64ZICOND-NEXT:    ret556entry:557  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 -2)558  %val = extractvalue {i32, i1} %t, 0559  %obit = extractvalue {i32, i1} %t, 1560  store i32 %val, ptr %res561  ret i1 %obit562}563 564define zeroext i1 @uaddo.i32.constant_one(i32 signext %v1, ptr %res) {565; RV32-LABEL: uaddo.i32.constant_one:566; RV32:       # %bb.0: # %entry567; RV32-NEXT:    addi a2, a0, 1568; RV32-NEXT:    seqz a0, a2569; RV32-NEXT:    sw a2, 0(a1)570; RV32-NEXT:    ret571;572; RV64-LABEL: uaddo.i32.constant_one:573; RV64:       # %bb.0: # %entry574; RV64-NEXT:    addiw a2, a0, 1575; RV64-NEXT:    seqz a0, a2576; RV64-NEXT:    sw a2, 0(a1)577; RV64-NEXT:    ret578;579; RV32ZBA-LABEL: uaddo.i32.constant_one:580; RV32ZBA:       # %bb.0: # %entry581; RV32ZBA-NEXT:    addi a2, a0, 1582; RV32ZBA-NEXT:    seqz a0, a2583; RV32ZBA-NEXT:    sw a2, 0(a1)584; RV32ZBA-NEXT:    ret585;586; RV64ZBA-LABEL: uaddo.i32.constant_one:587; RV64ZBA:       # %bb.0: # %entry588; RV64ZBA-NEXT:    addiw a2, a0, 1589; RV64ZBA-NEXT:    seqz a0, a2590; RV64ZBA-NEXT:    sw a2, 0(a1)591; RV64ZBA-NEXT:    ret592;593; RV32ZICOND-LABEL: uaddo.i32.constant_one:594; RV32ZICOND:       # %bb.0: # %entry595; RV32ZICOND-NEXT:    addi a2, a0, 1596; RV32ZICOND-NEXT:    seqz a0, a2597; RV32ZICOND-NEXT:    sw a2, 0(a1)598; RV32ZICOND-NEXT:    ret599;600; RV64ZICOND-LABEL: uaddo.i32.constant_one:601; RV64ZICOND:       # %bb.0: # %entry602; RV64ZICOND-NEXT:    addiw a2, a0, 1603; RV64ZICOND-NEXT:    seqz a0, a2604; RV64ZICOND-NEXT:    sw a2, 0(a1)605; RV64ZICOND-NEXT:    ret606entry:607  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 1)608  %val = extractvalue {i32, i1} %t, 0609  %obit = extractvalue {i32, i1} %t, 1610  store i32 %val, ptr %res611  ret i1 %obit612}613 614define zeroext i1 @uaddo.i64(i64 %v1, i64 %v2, ptr %res) {615; RV32-LABEL: uaddo.i64:616; RV32:       # %bb.0: # %entry617; RV32-NEXT:    add a3, a1, a3618; RV32-NEXT:    add a2, a0, a2619; RV32-NEXT:    sltu a0, a2, a0620; RV32-NEXT:    add a3, a3, a0621; RV32-NEXT:    beq a3, a1, .LBB10_2622; RV32-NEXT:  # %bb.1: # %entry623; RV32-NEXT:    sltu a0, a3, a1624; RV32-NEXT:  .LBB10_2: # %entry625; RV32-NEXT:    sw a2, 0(a4)626; RV32-NEXT:    sw a3, 4(a4)627; RV32-NEXT:    ret628;629; RV64-LABEL: uaddo.i64:630; RV64:       # %bb.0: # %entry631; RV64-NEXT:    add a1, a0, a1632; RV64-NEXT:    sltu a0, a1, a0633; RV64-NEXT:    sd a1, 0(a2)634; RV64-NEXT:    ret635;636; RV32ZBA-LABEL: uaddo.i64:637; RV32ZBA:       # %bb.0: # %entry638; RV32ZBA-NEXT:    add a3, a1, a3639; RV32ZBA-NEXT:    add a2, a0, a2640; RV32ZBA-NEXT:    sltu a0, a2, a0641; RV32ZBA-NEXT:    add a3, a3, a0642; RV32ZBA-NEXT:    beq a3, a1, .LBB10_2643; RV32ZBA-NEXT:  # %bb.1: # %entry644; RV32ZBA-NEXT:    sltu a0, a3, a1645; RV32ZBA-NEXT:  .LBB10_2: # %entry646; RV32ZBA-NEXT:    sw a2, 0(a4)647; RV32ZBA-NEXT:    sw a3, 4(a4)648; RV32ZBA-NEXT:    ret649;650; RV64ZBA-LABEL: uaddo.i64:651; RV64ZBA:       # %bb.0: # %entry652; RV64ZBA-NEXT:    add a1, a0, a1653; RV64ZBA-NEXT:    sltu a0, a1, a0654; RV64ZBA-NEXT:    sd a1, 0(a2)655; RV64ZBA-NEXT:    ret656;657; RV32ZICOND-LABEL: uaddo.i64:658; RV32ZICOND:       # %bb.0: # %entry659; RV32ZICOND-NEXT:    add a3, a1, a3660; RV32ZICOND-NEXT:    add a2, a0, a2661; RV32ZICOND-NEXT:    sltu a0, a2, a0662; RV32ZICOND-NEXT:    add a3, a3, a0663; RV32ZICOND-NEXT:    xor a5, a3, a1664; RV32ZICOND-NEXT:    sltu a1, a3, a1665; RV32ZICOND-NEXT:    czero.eqz a1, a1, a5666; RV32ZICOND-NEXT:    czero.nez a0, a0, a5667; RV32ZICOND-NEXT:    or a0, a0, a1668; RV32ZICOND-NEXT:    sw a2, 0(a4)669; RV32ZICOND-NEXT:    sw a3, 4(a4)670; RV32ZICOND-NEXT:    ret671;672; RV64ZICOND-LABEL: uaddo.i64:673; RV64ZICOND:       # %bb.0: # %entry674; RV64ZICOND-NEXT:    add a1, a0, a1675; RV64ZICOND-NEXT:    sltu a0, a1, a0676; RV64ZICOND-NEXT:    sd a1, 0(a2)677; RV64ZICOND-NEXT:    ret678entry:679  %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %v1, i64 %v2)680  %val = extractvalue {i64, i1} %t, 0681  %obit = extractvalue {i64, i1} %t, 1682  store i64 %val, ptr %res683  ret i1 %obit684}685 686define zeroext i1 @uaddo.i64.constant_one(i64 %v1, ptr %res) {687; RV32-LABEL: uaddo.i64.constant_one:688; RV32:       # %bb.0: # %entry689; RV32-NEXT:    addi a3, a0, 1690; RV32-NEXT:    seqz a0, a3691; RV32-NEXT:    add a1, a1, a0692; RV32-NEXT:    or a0, a3, a1693; RV32-NEXT:    seqz a0, a0694; RV32-NEXT:    sw a3, 0(a2)695; RV32-NEXT:    sw a1, 4(a2)696; RV32-NEXT:    ret697;698; RV64-LABEL: uaddo.i64.constant_one:699; RV64:       # %bb.0: # %entry700; RV64-NEXT:    addi a2, a0, 1701; RV64-NEXT:    seqz a0, a2702; RV64-NEXT:    sd a2, 0(a1)703; RV64-NEXT:    ret704;705; RV32ZBA-LABEL: uaddo.i64.constant_one:706; RV32ZBA:       # %bb.0: # %entry707; RV32ZBA-NEXT:    addi a3, a0, 1708; RV32ZBA-NEXT:    seqz a0, a3709; RV32ZBA-NEXT:    add a1, a1, a0710; RV32ZBA-NEXT:    or a0, a3, a1711; RV32ZBA-NEXT:    seqz a0, a0712; RV32ZBA-NEXT:    sw a3, 0(a2)713; RV32ZBA-NEXT:    sw a1, 4(a2)714; RV32ZBA-NEXT:    ret715;716; RV64ZBA-LABEL: uaddo.i64.constant_one:717; RV64ZBA:       # %bb.0: # %entry718; RV64ZBA-NEXT:    addi a2, a0, 1719; RV64ZBA-NEXT:    seqz a0, a2720; RV64ZBA-NEXT:    sd a2, 0(a1)721; RV64ZBA-NEXT:    ret722;723; RV32ZICOND-LABEL: uaddo.i64.constant_one:724; RV32ZICOND:       # %bb.0: # %entry725; RV32ZICOND-NEXT:    addi a3, a0, 1726; RV32ZICOND-NEXT:    seqz a0, a3727; RV32ZICOND-NEXT:    add a1, a1, a0728; RV32ZICOND-NEXT:    or a0, a3, a1729; RV32ZICOND-NEXT:    seqz a0, a0730; RV32ZICOND-NEXT:    sw a3, 0(a2)731; RV32ZICOND-NEXT:    sw a1, 4(a2)732; RV32ZICOND-NEXT:    ret733;734; RV64ZICOND-LABEL: uaddo.i64.constant_one:735; RV64ZICOND:       # %bb.0: # %entry736; RV64ZICOND-NEXT:    addi a2, a0, 1737; RV64ZICOND-NEXT:    seqz a0, a2738; RV64ZICOND-NEXT:    sd a2, 0(a1)739; RV64ZICOND-NEXT:    ret740entry:741  %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %v1, i64 1)742  %val = extractvalue {i64, i1} %t, 0743  %obit = extractvalue {i64, i1} %t, 1744  store i64 %val, ptr %res745  ret i1 %obit746}747 748define zeroext i1 @ssubo1.i32(i32 signext %v1, i32 signext %v2, ptr %res) {749; RV32-LABEL: ssubo1.i32:750; RV32:       # %bb.0: # %entry751; RV32-NEXT:    sgtz a3, a1752; RV32-NEXT:    sub a1, a0, a1753; RV32-NEXT:    slt a0, a1, a0754; RV32-NEXT:    xor a0, a3, a0755; RV32-NEXT:    sw a1, 0(a2)756; RV32-NEXT:    ret757;758; RV64-LABEL: ssubo1.i32:759; RV64:       # %bb.0: # %entry760; RV64-NEXT:    sub a3, a0, a1761; RV64-NEXT:    subw a0, a0, a1762; RV64-NEXT:    xor a0, a0, a3763; RV64-NEXT:    snez a0, a0764; RV64-NEXT:    sw a3, 0(a2)765; RV64-NEXT:    ret766;767; RV32ZBA-LABEL: ssubo1.i32:768; RV32ZBA:       # %bb.0: # %entry769; RV32ZBA-NEXT:    sgtz a3, a1770; RV32ZBA-NEXT:    sub a1, a0, a1771; RV32ZBA-NEXT:    slt a0, a1, a0772; RV32ZBA-NEXT:    xor a0, a3, a0773; RV32ZBA-NEXT:    sw a1, 0(a2)774; RV32ZBA-NEXT:    ret775;776; RV64ZBA-LABEL: ssubo1.i32:777; RV64ZBA:       # %bb.0: # %entry778; RV64ZBA-NEXT:    sub a3, a0, a1779; RV64ZBA-NEXT:    subw a0, a0, a1780; RV64ZBA-NEXT:    xor a0, a0, a3781; RV64ZBA-NEXT:    snez a0, a0782; RV64ZBA-NEXT:    sw a3, 0(a2)783; RV64ZBA-NEXT:    ret784;785; RV32ZICOND-LABEL: ssubo1.i32:786; RV32ZICOND:       # %bb.0: # %entry787; RV32ZICOND-NEXT:    sgtz a3, a1788; RV32ZICOND-NEXT:    sub a1, a0, a1789; RV32ZICOND-NEXT:    slt a0, a1, a0790; RV32ZICOND-NEXT:    xor a0, a3, a0791; RV32ZICOND-NEXT:    sw a1, 0(a2)792; RV32ZICOND-NEXT:    ret793;794; RV64ZICOND-LABEL: ssubo1.i32:795; RV64ZICOND:       # %bb.0: # %entry796; RV64ZICOND-NEXT:    sub a3, a0, a1797; RV64ZICOND-NEXT:    subw a0, a0, a1798; RV64ZICOND-NEXT:    xor a0, a0, a3799; RV64ZICOND-NEXT:    snez a0, a0800; RV64ZICOND-NEXT:    sw a3, 0(a2)801; RV64ZICOND-NEXT:    ret802entry:803  %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %v1, i32 %v2)804  %val = extractvalue {i32, i1} %t, 0805  %obit = extractvalue {i32, i1} %t, 1806  store i32 %val, ptr %res807  ret i1 %obit808}809 810define zeroext i1 @ssubo2.i32(i32 signext %v1, ptr %res) {811; RV32-LABEL: ssubo2.i32:812; RV32:       # %bb.0: # %entry813; RV32-NEXT:    addi a2, a0, 4814; RV32-NEXT:    slt a0, a2, a0815; RV32-NEXT:    sw a2, 0(a1)816; RV32-NEXT:    ret817;818; RV64-LABEL: ssubo2.i32:819; RV64:       # %bb.0: # %entry820; RV64-NEXT:    addiw a2, a0, 4821; RV64-NEXT:    slt a0, a2, a0822; RV64-NEXT:    sw a2, 0(a1)823; RV64-NEXT:    ret824;825; RV32ZBA-LABEL: ssubo2.i32:826; RV32ZBA:       # %bb.0: # %entry827; RV32ZBA-NEXT:    addi a2, a0, 4828; RV32ZBA-NEXT:    slt a0, a2, a0829; RV32ZBA-NEXT:    sw a2, 0(a1)830; RV32ZBA-NEXT:    ret831;832; RV64ZBA-LABEL: ssubo2.i32:833; RV64ZBA:       # %bb.0: # %entry834; RV64ZBA-NEXT:    addiw a2, a0, 4835; RV64ZBA-NEXT:    slt a0, a2, a0836; RV64ZBA-NEXT:    sw a2, 0(a1)837; RV64ZBA-NEXT:    ret838;839; RV32ZICOND-LABEL: ssubo2.i32:840; RV32ZICOND:       # %bb.0: # %entry841; RV32ZICOND-NEXT:    addi a2, a0, 4842; RV32ZICOND-NEXT:    slt a0, a2, a0843; RV32ZICOND-NEXT:    sw a2, 0(a1)844; RV32ZICOND-NEXT:    ret845;846; RV64ZICOND-LABEL: ssubo2.i32:847; RV64ZICOND:       # %bb.0: # %entry848; RV64ZICOND-NEXT:    addiw a2, a0, 4849; RV64ZICOND-NEXT:    slt a0, a2, a0850; RV64ZICOND-NEXT:    sw a2, 0(a1)851; RV64ZICOND-NEXT:    ret852entry:853  %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %v1, i32 -4)854  %val = extractvalue {i32, i1} %t, 0855  %obit = extractvalue {i32, i1} %t, 1856  store i32 %val, ptr %res857  ret i1 %obit858}859 860define zeroext i1 @ssubo.i64(i64 %v1, i64 %v2, ptr %res) {861; RV32-LABEL: ssubo.i64:862; RV32:       # %bb.0: # %entry863; RV32-NEXT:    sltu a5, a0, a2864; RV32-NEXT:    sub a6, a1, a3865; RV32-NEXT:    xor a3, a1, a3866; RV32-NEXT:    sub a2, a0, a2867; RV32-NEXT:    sub a5, a6, a5868; RV32-NEXT:    xor a1, a1, a5869; RV32-NEXT:    and a0, a3, a1870; RV32-NEXT:    srli a0, a0, 31871; RV32-NEXT:    sw a2, 0(a4)872; RV32-NEXT:    sw a5, 4(a4)873; RV32-NEXT:    ret874;875; RV64-LABEL: ssubo.i64:876; RV64:       # %bb.0: # %entry877; RV64-NEXT:    sgtz a3, a1878; RV64-NEXT:    sub a1, a0, a1879; RV64-NEXT:    slt a0, a1, a0880; RV64-NEXT:    xor a0, a3, a0881; RV64-NEXT:    sd a1, 0(a2)882; RV64-NEXT:    ret883;884; RV32ZBA-LABEL: ssubo.i64:885; RV32ZBA:       # %bb.0: # %entry886; RV32ZBA-NEXT:    sltu a5, a0, a2887; RV32ZBA-NEXT:    sub a6, a1, a3888; RV32ZBA-NEXT:    xor a3, a1, a3889; RV32ZBA-NEXT:    sub a2, a0, a2890; RV32ZBA-NEXT:    sub a5, a6, a5891; RV32ZBA-NEXT:    xor a1, a1, a5892; RV32ZBA-NEXT:    and a0, a3, a1893; RV32ZBA-NEXT:    srli a0, a0, 31894; RV32ZBA-NEXT:    sw a2, 0(a4)895; RV32ZBA-NEXT:    sw a5, 4(a4)896; RV32ZBA-NEXT:    ret897;898; RV64ZBA-LABEL: ssubo.i64:899; RV64ZBA:       # %bb.0: # %entry900; RV64ZBA-NEXT:    sgtz a3, a1901; RV64ZBA-NEXT:    sub a1, a0, a1902; RV64ZBA-NEXT:    slt a0, a1, a0903; RV64ZBA-NEXT:    xor a0, a3, a0904; RV64ZBA-NEXT:    sd a1, 0(a2)905; RV64ZBA-NEXT:    ret906;907; RV32ZICOND-LABEL: ssubo.i64:908; RV32ZICOND:       # %bb.0: # %entry909; RV32ZICOND-NEXT:    sltu a5, a0, a2910; RV32ZICOND-NEXT:    sub a6, a1, a3911; RV32ZICOND-NEXT:    xor a3, a1, a3912; RV32ZICOND-NEXT:    sub a2, a0, a2913; RV32ZICOND-NEXT:    sub a5, a6, a5914; RV32ZICOND-NEXT:    xor a1, a1, a5915; RV32ZICOND-NEXT:    and a0, a3, a1916; RV32ZICOND-NEXT:    srli a0, a0, 31917; RV32ZICOND-NEXT:    sw a2, 0(a4)918; RV32ZICOND-NEXT:    sw a5, 4(a4)919; RV32ZICOND-NEXT:    ret920;921; RV64ZICOND-LABEL: ssubo.i64:922; RV64ZICOND:       # %bb.0: # %entry923; RV64ZICOND-NEXT:    sgtz a3, a1924; RV64ZICOND-NEXT:    sub a1, a0, a1925; RV64ZICOND-NEXT:    slt a0, a1, a0926; RV64ZICOND-NEXT:    xor a0, a3, a0927; RV64ZICOND-NEXT:    sd a1, 0(a2)928; RV64ZICOND-NEXT:    ret929entry:930  %t = call {i64, i1} @llvm.ssub.with.overflow.i64(i64 %v1, i64 %v2)931  %val = extractvalue {i64, i1} %t, 0932  %obit = extractvalue {i64, i1} %t, 1933  store i64 %val, ptr %res934  ret i1 %obit935}936 937define zeroext i1 @usubo.i32(i32 signext %v1, i32 signext %v2, ptr %res) {938; RV32-LABEL: usubo.i32:939; RV32:       # %bb.0: # %entry940; RV32-NEXT:    sub a1, a0, a1941; RV32-NEXT:    sltu a0, a0, a1942; RV32-NEXT:    sw a1, 0(a2)943; RV32-NEXT:    ret944;945; RV64-LABEL: usubo.i32:946; RV64:       # %bb.0: # %entry947; RV64-NEXT:    subw a1, a0, a1948; RV64-NEXT:    sltu a0, a0, a1949; RV64-NEXT:    sw a1, 0(a2)950; RV64-NEXT:    ret951;952; RV32ZBA-LABEL: usubo.i32:953; RV32ZBA:       # %bb.0: # %entry954; RV32ZBA-NEXT:    sub a1, a0, a1955; RV32ZBA-NEXT:    sltu a0, a0, a1956; RV32ZBA-NEXT:    sw a1, 0(a2)957; RV32ZBA-NEXT:    ret958;959; RV64ZBA-LABEL: usubo.i32:960; RV64ZBA:       # %bb.0: # %entry961; RV64ZBA-NEXT:    subw a1, a0, a1962; RV64ZBA-NEXT:    sltu a0, a0, a1963; RV64ZBA-NEXT:    sw a1, 0(a2)964; RV64ZBA-NEXT:    ret965;966; RV32ZICOND-LABEL: usubo.i32:967; RV32ZICOND:       # %bb.0: # %entry968; RV32ZICOND-NEXT:    sub a1, a0, a1969; RV32ZICOND-NEXT:    sltu a0, a0, a1970; RV32ZICOND-NEXT:    sw a1, 0(a2)971; RV32ZICOND-NEXT:    ret972;973; RV64ZICOND-LABEL: usubo.i32:974; RV64ZICOND:       # %bb.0: # %entry975; RV64ZICOND-NEXT:    subw a1, a0, a1976; RV64ZICOND-NEXT:    sltu a0, a0, a1977; RV64ZICOND-NEXT:    sw a1, 0(a2)978; RV64ZICOND-NEXT:    ret979entry:980  %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %v1, i32 %v2)981  %val = extractvalue {i32, i1} %t, 0982  %obit = extractvalue {i32, i1} %t, 1983  store i32 %val, ptr %res984  ret i1 %obit985}986 987define zeroext i1 @usubo.i32.constant.rhs(i32 signext %v1, ptr %res) {988; RV32-LABEL: usubo.i32.constant.rhs:989; RV32:       # %bb.0: # %entry990; RV32-NEXT:    addi a2, a0, 2991; RV32-NEXT:    sltu a0, a0, a2992; RV32-NEXT:    sw a2, 0(a1)993; RV32-NEXT:    ret994;995; RV64-LABEL: usubo.i32.constant.rhs:996; RV64:       # %bb.0: # %entry997; RV64-NEXT:    addiw a2, a0, 2998; RV64-NEXT:    sltu a0, a0, a2999; RV64-NEXT:    sw a2, 0(a1)1000; RV64-NEXT:    ret1001;1002; RV32ZBA-LABEL: usubo.i32.constant.rhs:1003; RV32ZBA:       # %bb.0: # %entry1004; RV32ZBA-NEXT:    addi a2, a0, 21005; RV32ZBA-NEXT:    sltu a0, a0, a21006; RV32ZBA-NEXT:    sw a2, 0(a1)1007; RV32ZBA-NEXT:    ret1008;1009; RV64ZBA-LABEL: usubo.i32.constant.rhs:1010; RV64ZBA:       # %bb.0: # %entry1011; RV64ZBA-NEXT:    addiw a2, a0, 21012; RV64ZBA-NEXT:    sltu a0, a0, a21013; RV64ZBA-NEXT:    sw a2, 0(a1)1014; RV64ZBA-NEXT:    ret1015;1016; RV32ZICOND-LABEL: usubo.i32.constant.rhs:1017; RV32ZICOND:       # %bb.0: # %entry1018; RV32ZICOND-NEXT:    addi a2, a0, 21019; RV32ZICOND-NEXT:    sltu a0, a0, a21020; RV32ZICOND-NEXT:    sw a2, 0(a1)1021; RV32ZICOND-NEXT:    ret1022;1023; RV64ZICOND-LABEL: usubo.i32.constant.rhs:1024; RV64ZICOND:       # %bb.0: # %entry1025; RV64ZICOND-NEXT:    addiw a2, a0, 21026; RV64ZICOND-NEXT:    sltu a0, a0, a21027; RV64ZICOND-NEXT:    sw a2, 0(a1)1028; RV64ZICOND-NEXT:    ret1029entry:1030  %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %v1, i32 -2)1031  %val = extractvalue {i32, i1} %t, 01032  %obit = extractvalue {i32, i1} %t, 11033  store i32 %val, ptr %res1034  ret i1 %obit1035}1036 1037define zeroext i1 @usubo.i32.constant.lhs(i32 signext %v1, ptr %res) {1038; RV32-LABEL: usubo.i32.constant.lhs:1039; RV32:       # %bb.0: # %entry1040; RV32-NEXT:    li a2, -21041; RV32-NEXT:    sub a2, a2, a01042; RV32-NEXT:    addi a0, a2, 11043; RV32-NEXT:    seqz a0, a01044; RV32-NEXT:    sw a2, 0(a1)1045; RV32-NEXT:    ret1046;1047; RV64-LABEL: usubo.i32.constant.lhs:1048; RV64:       # %bb.0: # %entry1049; RV64-NEXT:    li a2, -21050; RV64-NEXT:    sub a2, a2, a01051; RV64-NEXT:    addiw a0, a2, 11052; RV64-NEXT:    seqz a0, a01053; RV64-NEXT:    sw a2, 0(a1)1054; RV64-NEXT:    ret1055;1056; RV32ZBA-LABEL: usubo.i32.constant.lhs:1057; RV32ZBA:       # %bb.0: # %entry1058; RV32ZBA-NEXT:    li a2, -21059; RV32ZBA-NEXT:    sub a2, a2, a01060; RV32ZBA-NEXT:    addi a0, a2, 11061; RV32ZBA-NEXT:    seqz a0, a01062; RV32ZBA-NEXT:    sw a2, 0(a1)1063; RV32ZBA-NEXT:    ret1064;1065; RV64ZBA-LABEL: usubo.i32.constant.lhs:1066; RV64ZBA:       # %bb.0: # %entry1067; RV64ZBA-NEXT:    li a2, -21068; RV64ZBA-NEXT:    sub a2, a2, a01069; RV64ZBA-NEXT:    addiw a0, a2, 11070; RV64ZBA-NEXT:    seqz a0, a01071; RV64ZBA-NEXT:    sw a2, 0(a1)1072; RV64ZBA-NEXT:    ret1073;1074; RV32ZICOND-LABEL: usubo.i32.constant.lhs:1075; RV32ZICOND:       # %bb.0: # %entry1076; RV32ZICOND-NEXT:    li a2, -21077; RV32ZICOND-NEXT:    sub a2, a2, a01078; RV32ZICOND-NEXT:    addi a0, a2, 11079; RV32ZICOND-NEXT:    seqz a0, a01080; RV32ZICOND-NEXT:    sw a2, 0(a1)1081; RV32ZICOND-NEXT:    ret1082;1083; RV64ZICOND-LABEL: usubo.i32.constant.lhs:1084; RV64ZICOND:       # %bb.0: # %entry1085; RV64ZICOND-NEXT:    li a2, -21086; RV64ZICOND-NEXT:    sub a2, a2, a01087; RV64ZICOND-NEXT:    addiw a0, a2, 11088; RV64ZICOND-NEXT:    seqz a0, a01089; RV64ZICOND-NEXT:    sw a2, 0(a1)1090; RV64ZICOND-NEXT:    ret1091entry:1092  %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 -2, i32 %v1)1093  %val = extractvalue {i32, i1} %t, 01094  %obit = extractvalue {i32, i1} %t, 11095  store i32 %val, ptr %res1096  ret i1 %obit1097}1098 1099define zeroext i1 @usubo.i64(i64 %v1, i64 %v2, ptr %res) {1100; RV32-LABEL: usubo.i64:1101; RV32:       # %bb.0: # %entry1102; RV32-NEXT:    sltu a5, a0, a21103; RV32-NEXT:    sub a3, a1, a31104; RV32-NEXT:    sub a3, a3, a51105; RV32-NEXT:    sub a2, a0, a21106; RV32-NEXT:    beq a3, a1, .LBB18_21107; RV32-NEXT:  # %bb.1: # %entry1108; RV32-NEXT:    sltu a0, a1, a31109; RV32-NEXT:    j .LBB18_31110; RV32-NEXT:  .LBB18_2:1111; RV32-NEXT:    sltu a0, a0, a21112; RV32-NEXT:  .LBB18_3: # %entry1113; RV32-NEXT:    sw a2, 0(a4)1114; RV32-NEXT:    sw a3, 4(a4)1115; RV32-NEXT:    ret1116;1117; RV64-LABEL: usubo.i64:1118; RV64:       # %bb.0: # %entry1119; RV64-NEXT:    sub a1, a0, a11120; RV64-NEXT:    sltu a0, a0, a11121; RV64-NEXT:    sd a1, 0(a2)1122; RV64-NEXT:    ret1123;1124; RV32ZBA-LABEL: usubo.i64:1125; RV32ZBA:       # %bb.0: # %entry1126; RV32ZBA-NEXT:    sltu a5, a0, a21127; RV32ZBA-NEXT:    sub a3, a1, a31128; RV32ZBA-NEXT:    sub a3, a3, a51129; RV32ZBA-NEXT:    sub a2, a0, a21130; RV32ZBA-NEXT:    beq a3, a1, .LBB18_21131; RV32ZBA-NEXT:  # %bb.1: # %entry1132; RV32ZBA-NEXT:    sltu a0, a1, a31133; RV32ZBA-NEXT:    j .LBB18_31134; RV32ZBA-NEXT:  .LBB18_2:1135; RV32ZBA-NEXT:    sltu a0, a0, a21136; RV32ZBA-NEXT:  .LBB18_3: # %entry1137; RV32ZBA-NEXT:    sw a2, 0(a4)1138; RV32ZBA-NEXT:    sw a3, 4(a4)1139; RV32ZBA-NEXT:    ret1140;1141; RV64ZBA-LABEL: usubo.i64:1142; RV64ZBA:       # %bb.0: # %entry1143; RV64ZBA-NEXT:    sub a1, a0, a11144; RV64ZBA-NEXT:    sltu a0, a0, a11145; RV64ZBA-NEXT:    sd a1, 0(a2)1146; RV64ZBA-NEXT:    ret1147;1148; RV32ZICOND-LABEL: usubo.i64:1149; RV32ZICOND:       # %bb.0: # %entry1150; RV32ZICOND-NEXT:    sltu a5, a0, a21151; RV32ZICOND-NEXT:    sub a3, a1, a31152; RV32ZICOND-NEXT:    sub a2, a0, a21153; RV32ZICOND-NEXT:    sub a3, a3, a51154; RV32ZICOND-NEXT:    sltu a0, a0, a21155; RV32ZICOND-NEXT:    xor a5, a3, a11156; RV32ZICOND-NEXT:    sltu a1, a1, a31157; RV32ZICOND-NEXT:    czero.eqz a1, a1, a51158; RV32ZICOND-NEXT:    czero.nez a0, a0, a51159; RV32ZICOND-NEXT:    or a0, a0, a11160; RV32ZICOND-NEXT:    sw a2, 0(a4)1161; RV32ZICOND-NEXT:    sw a3, 4(a4)1162; RV32ZICOND-NEXT:    ret1163;1164; RV64ZICOND-LABEL: usubo.i64:1165; RV64ZICOND:       # %bb.0: # %entry1166; RV64ZICOND-NEXT:    sub a1, a0, a11167; RV64ZICOND-NEXT:    sltu a0, a0, a11168; RV64ZICOND-NEXT:    sd a1, 0(a2)1169; RV64ZICOND-NEXT:    ret1170entry:1171  %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %v1, i64 %v2)1172  %val = extractvalue {i64, i1} %t, 01173  %obit = extractvalue {i64, i1} %t, 11174  store i64 %val, ptr %res1175  ret i1 %obit1176}1177 1178define zeroext i1 @smulo.i32(i32 signext %v1, i32 signext %v2, ptr %res) {1179; RV32-LABEL: smulo.i32:1180; RV32:       # %bb.0: # %entry1181; RV32-NEXT:    mulh a3, a0, a11182; RV32-NEXT:    mul a1, a0, a11183; RV32-NEXT:    srai a0, a1, 311184; RV32-NEXT:    xor a0, a3, a01185; RV32-NEXT:    snez a0, a01186; RV32-NEXT:    sw a1, 0(a2)1187; RV32-NEXT:    ret1188;1189; RV64-LABEL: smulo.i32:1190; RV64:       # %bb.0: # %entry1191; RV64-NEXT:    mul a3, a0, a11192; RV64-NEXT:    mulw a0, a0, a11193; RV64-NEXT:    xor a0, a0, a31194; RV64-NEXT:    snez a0, a01195; RV64-NEXT:    sw a3, 0(a2)1196; RV64-NEXT:    ret1197;1198; RV32ZBA-LABEL: smulo.i32:1199; RV32ZBA:       # %bb.0: # %entry1200; RV32ZBA-NEXT:    mulh a3, a0, a11201; RV32ZBA-NEXT:    mul a1, a0, a11202; RV32ZBA-NEXT:    srai a0, a1, 311203; RV32ZBA-NEXT:    xor a0, a3, a01204; RV32ZBA-NEXT:    snez a0, a01205; RV32ZBA-NEXT:    sw a1, 0(a2)1206; RV32ZBA-NEXT:    ret1207;1208; RV64ZBA-LABEL: smulo.i32:1209; RV64ZBA:       # %bb.0: # %entry1210; RV64ZBA-NEXT:    mul a3, a0, a11211; RV64ZBA-NEXT:    mulw a0, a0, a11212; RV64ZBA-NEXT:    xor a0, a0, a31213; RV64ZBA-NEXT:    snez a0, a01214; RV64ZBA-NEXT:    sw a3, 0(a2)1215; RV64ZBA-NEXT:    ret1216;1217; RV32ZICOND-LABEL: smulo.i32:1218; RV32ZICOND:       # %bb.0: # %entry1219; RV32ZICOND-NEXT:    mulh a3, a0, a11220; RV32ZICOND-NEXT:    mul a1, a0, a11221; RV32ZICOND-NEXT:    srai a0, a1, 311222; RV32ZICOND-NEXT:    xor a0, a3, a01223; RV32ZICOND-NEXT:    snez a0, a01224; RV32ZICOND-NEXT:    sw a1, 0(a2)1225; RV32ZICOND-NEXT:    ret1226;1227; RV64ZICOND-LABEL: smulo.i32:1228; RV64ZICOND:       # %bb.0: # %entry1229; RV64ZICOND-NEXT:    mul a3, a0, a11230; RV64ZICOND-NEXT:    mulw a0, a0, a11231; RV64ZICOND-NEXT:    xor a0, a0, a31232; RV64ZICOND-NEXT:    snez a0, a01233; RV64ZICOND-NEXT:    sw a3, 0(a2)1234; RV64ZICOND-NEXT:    ret1235entry:1236  %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)1237  %val = extractvalue {i32, i1} %t, 01238  %obit = extractvalue {i32, i1} %t, 11239  store i32 %val, ptr %res1240  ret i1 %obit1241}1242 1243define zeroext i1 @smulo2.i32(i32 signext %v1, ptr %res) {1244; RV32-LABEL: smulo2.i32:1245; RV32:       # %bb.0: # %entry1246; RV32-NEXT:    li a2, 131247; RV32-NEXT:    mulh a3, a0, a21248; RV32-NEXT:    mul a2, a0, a21249; RV32-NEXT:    srai a0, a2, 311250; RV32-NEXT:    xor a0, a3, a01251; RV32-NEXT:    snez a0, a01252; RV32-NEXT:    sw a2, 0(a1)1253; RV32-NEXT:    ret1254;1255; RV64-LABEL: smulo2.i32:1256; RV64:       # %bb.0: # %entry1257; RV64-NEXT:    li a2, 131258; RV64-NEXT:    mul a3, a0, a21259; RV64-NEXT:    mulw a0, a0, a21260; RV64-NEXT:    xor a0, a0, a31261; RV64-NEXT:    snez a0, a01262; RV64-NEXT:    sw a3, 0(a1)1263; RV64-NEXT:    ret1264;1265; RV32ZBA-LABEL: smulo2.i32:1266; RV32ZBA:       # %bb.0: # %entry1267; RV32ZBA-NEXT:    li a2, 131268; RV32ZBA-NEXT:    sh1add a3, a0, a01269; RV32ZBA-NEXT:    mulh a2, a0, a21270; RV32ZBA-NEXT:    sh2add a3, a3, a01271; RV32ZBA-NEXT:    srai a0, a3, 311272; RV32ZBA-NEXT:    xor a0, a2, a01273; RV32ZBA-NEXT:    snez a0, a01274; RV32ZBA-NEXT:    sw a3, 0(a1)1275; RV32ZBA-NEXT:    ret1276;1277; RV64ZBA-LABEL: smulo2.i32:1278; RV64ZBA:       # %bb.0: # %entry1279; RV64ZBA-NEXT:    sh1add a2, a0, a01280; RV64ZBA-NEXT:    sh2add a2, a2, a01281; RV64ZBA-NEXT:    sext.w a0, a21282; RV64ZBA-NEXT:    xor a0, a0, a21283; RV64ZBA-NEXT:    snez a0, a01284; RV64ZBA-NEXT:    sw a2, 0(a1)1285; RV64ZBA-NEXT:    ret1286;1287; RV32ZICOND-LABEL: smulo2.i32:1288; RV32ZICOND:       # %bb.0: # %entry1289; RV32ZICOND-NEXT:    li a2, 131290; RV32ZICOND-NEXT:    mulh a3, a0, a21291; RV32ZICOND-NEXT:    mul a2, a0, a21292; RV32ZICOND-NEXT:    srai a0, a2, 311293; RV32ZICOND-NEXT:    xor a0, a3, a01294; RV32ZICOND-NEXT:    snez a0, a01295; RV32ZICOND-NEXT:    sw a2, 0(a1)1296; RV32ZICOND-NEXT:    ret1297;1298; RV64ZICOND-LABEL: smulo2.i32:1299; RV64ZICOND:       # %bb.0: # %entry1300; RV64ZICOND-NEXT:    li a2, 131301; RV64ZICOND-NEXT:    mul a3, a0, a21302; RV64ZICOND-NEXT:    mulw a0, a0, a21303; RV64ZICOND-NEXT:    xor a0, a0, a31304; RV64ZICOND-NEXT:    snez a0, a01305; RV64ZICOND-NEXT:    sw a3, 0(a1)1306; RV64ZICOND-NEXT:    ret1307entry:1308  %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 13)1309  %val = extractvalue {i32, i1} %t, 01310  %obit = extractvalue {i32, i1} %t, 11311  store i32 %val, ptr %res1312  ret i1 %obit1313}1314 1315define zeroext i1 @smulo.i64(i64 %v1, i64 %v2, ptr %res) {1316; RV32-LABEL: smulo.i64:1317; RV32:       # %bb.0: # %entry1318; RV32-NEXT:    mulhu a5, a0, a21319; RV32-NEXT:    mul a6, a1, a21320; RV32-NEXT:    mulhsu a7, a1, a21321; RV32-NEXT:    mul t0, a3, a01322; RV32-NEXT:    mulh t1, a1, a31323; RV32-NEXT:    mul a1, a1, a31324; RV32-NEXT:    mulhsu a3, a3, a01325; RV32-NEXT:    mul a2, a0, a21326; RV32-NEXT:    add a5, a6, a51327; RV32-NEXT:    sltu a0, a5, a61328; RV32-NEXT:    add a5, t0, a51329; RV32-NEXT:    add a0, a7, a01330; RV32-NEXT:    sltu a6, a5, t01331; RV32-NEXT:    srai a7, a5, 311332; RV32-NEXT:    add a3, a3, a61333; RV32-NEXT:    srai a6, a0, 311334; RV32-NEXT:    add t0, a0, a31335; RV32-NEXT:    srai a3, a3, 311336; RV32-NEXT:    sltu a0, t0, a01337; RV32-NEXT:    add a3, a6, a31338; RV32-NEXT:    add t0, a1, t01339; RV32-NEXT:    add a0, a3, a01340; RV32-NEXT:    sltu a1, t0, a11341; RV32-NEXT:    xor a3, t0, a71342; RV32-NEXT:    add a0, t1, a01343; RV32-NEXT:    add a0, a0, a11344; RV32-NEXT:    xor a0, a0, a71345; RV32-NEXT:    or a0, a3, a01346; RV32-NEXT:    snez a0, a01347; RV32-NEXT:    sw a2, 0(a4)1348; RV32-NEXT:    sw a5, 4(a4)1349; RV32-NEXT:    ret1350;1351; RV64-LABEL: smulo.i64:1352; RV64:       # %bb.0: # %entry1353; RV64-NEXT:    mulh a3, a0, a11354; RV64-NEXT:    mul a1, a0, a11355; RV64-NEXT:    srai a0, a1, 631356; RV64-NEXT:    xor a0, a3, a01357; RV64-NEXT:    snez a0, a01358; RV64-NEXT:    sd a1, 0(a2)1359; RV64-NEXT:    ret1360;1361; RV32ZBA-LABEL: smulo.i64:1362; RV32ZBA:       # %bb.0: # %entry1363; RV32ZBA-NEXT:    mulhu a5, a0, a21364; RV32ZBA-NEXT:    mul a6, a1, a21365; RV32ZBA-NEXT:    mulhsu a7, a1, a21366; RV32ZBA-NEXT:    mul t0, a3, a01367; RV32ZBA-NEXT:    mulh t1, a1, a31368; RV32ZBA-NEXT:    mul a1, a1, a31369; RV32ZBA-NEXT:    mulhsu a3, a3, a01370; RV32ZBA-NEXT:    mul a2, a0, a21371; RV32ZBA-NEXT:    add a5, a6, a51372; RV32ZBA-NEXT:    sltu a0, a5, a61373; RV32ZBA-NEXT:    add a5, t0, a51374; RV32ZBA-NEXT:    add a0, a7, a01375; RV32ZBA-NEXT:    sltu a6, a5, t01376; RV32ZBA-NEXT:    srai a7, a5, 311377; RV32ZBA-NEXT:    add a3, a3, a61378; RV32ZBA-NEXT:    srai a6, a0, 311379; RV32ZBA-NEXT:    add t0, a0, a31380; RV32ZBA-NEXT:    srai a3, a3, 311381; RV32ZBA-NEXT:    sltu a0, t0, a01382; RV32ZBA-NEXT:    add a3, a6, a31383; RV32ZBA-NEXT:    add t0, a1, t01384; RV32ZBA-NEXT:    add a0, a3, a01385; RV32ZBA-NEXT:    sltu a1, t0, a11386; RV32ZBA-NEXT:    xor a3, t0, a71387; RV32ZBA-NEXT:    add a0, t1, a01388; RV32ZBA-NEXT:    add a0, a0, a11389; RV32ZBA-NEXT:    xor a0, a0, a71390; RV32ZBA-NEXT:    or a0, a3, a01391; RV32ZBA-NEXT:    snez a0, a01392; RV32ZBA-NEXT:    sw a2, 0(a4)1393; RV32ZBA-NEXT:    sw a5, 4(a4)1394; RV32ZBA-NEXT:    ret1395;1396; RV64ZBA-LABEL: smulo.i64:1397; RV64ZBA:       # %bb.0: # %entry1398; RV64ZBA-NEXT:    mulh a3, a0, a11399; RV64ZBA-NEXT:    mul a1, a0, a11400; RV64ZBA-NEXT:    srai a0, a1, 631401; RV64ZBA-NEXT:    xor a0, a3, a01402; RV64ZBA-NEXT:    snez a0, a01403; RV64ZBA-NEXT:    sd a1, 0(a2)1404; RV64ZBA-NEXT:    ret1405;1406; RV32ZICOND-LABEL: smulo.i64:1407; RV32ZICOND:       # %bb.0: # %entry1408; RV32ZICOND-NEXT:    mulhu a5, a0, a21409; RV32ZICOND-NEXT:    mul a6, a1, a21410; RV32ZICOND-NEXT:    mulhsu a7, a1, a21411; RV32ZICOND-NEXT:    mul t0, a3, a01412; RV32ZICOND-NEXT:    mulh t1, a1, a31413; RV32ZICOND-NEXT:    mul a1, a1, a31414; RV32ZICOND-NEXT:    mulhsu a3, a3, a01415; RV32ZICOND-NEXT:    mul a2, a0, a21416; RV32ZICOND-NEXT:    add a5, a6, a51417; RV32ZICOND-NEXT:    sltu a0, a5, a61418; RV32ZICOND-NEXT:    add a5, t0, a51419; RV32ZICOND-NEXT:    add a0, a7, a01420; RV32ZICOND-NEXT:    sltu a6, a5, t01421; RV32ZICOND-NEXT:    srai a7, a5, 311422; RV32ZICOND-NEXT:    add a3, a3, a61423; RV32ZICOND-NEXT:    srai a6, a0, 311424; RV32ZICOND-NEXT:    add t0, a0, a31425; RV32ZICOND-NEXT:    srai a3, a3, 311426; RV32ZICOND-NEXT:    sltu a0, t0, a01427; RV32ZICOND-NEXT:    add a3, a6, a31428; RV32ZICOND-NEXT:    add t0, a1, t01429; RV32ZICOND-NEXT:    add a0, a3, a01430; RV32ZICOND-NEXT:    sltu a1, t0, a11431; RV32ZICOND-NEXT:    xor a3, t0, a71432; RV32ZICOND-NEXT:    add a0, t1, a01433; RV32ZICOND-NEXT:    add a0, a0, a11434; RV32ZICOND-NEXT:    xor a0, a0, a71435; RV32ZICOND-NEXT:    or a0, a3, a01436; RV32ZICOND-NEXT:    snez a0, a01437; RV32ZICOND-NEXT:    sw a2, 0(a4)1438; RV32ZICOND-NEXT:    sw a5, 4(a4)1439; RV32ZICOND-NEXT:    ret1440;1441; RV64ZICOND-LABEL: smulo.i64:1442; RV64ZICOND:       # %bb.0: # %entry1443; RV64ZICOND-NEXT:    mulh a3, a0, a11444; RV64ZICOND-NEXT:    mul a1, a0, a11445; RV64ZICOND-NEXT:    srai a0, a1, 631446; RV64ZICOND-NEXT:    xor a0, a3, a01447; RV64ZICOND-NEXT:    snez a0, a01448; RV64ZICOND-NEXT:    sd a1, 0(a2)1449; RV64ZICOND-NEXT:    ret1450entry:1451  %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)1452  %val = extractvalue {i64, i1} %t, 01453  %obit = extractvalue {i64, i1} %t, 11454  store i64 %val, ptr %res1455  ret i1 %obit1456}1457 1458define zeroext i1 @smulo2.i64(i64 %v1, ptr %res) {1459; RV32-LABEL: smulo2.i64:1460; RV32:       # %bb.0: # %entry1461; RV32-NEXT:    li a3, 131462; RV32-NEXT:    mulhu a4, a0, a31463; RV32-NEXT:    mul a5, a1, a31464; RV32-NEXT:    mulh a1, a1, a31465; RV32-NEXT:    mul a3, a0, a31466; RV32-NEXT:    add a4, a5, a41467; RV32-NEXT:    sltu a0, a4, a51468; RV32-NEXT:    srai a5, a4, 311469; RV32-NEXT:    add a0, a1, a01470; RV32-NEXT:    xor a1, a0, a51471; RV32-NEXT:    srai a0, a0, 311472; RV32-NEXT:    xor a0, a0, a51473; RV32-NEXT:    or a0, a1, a01474; RV32-NEXT:    snez a0, a01475; RV32-NEXT:    sw a3, 0(a2)1476; RV32-NEXT:    sw a4, 4(a2)1477; RV32-NEXT:    ret1478;1479; RV64-LABEL: smulo2.i64:1480; RV64:       # %bb.0: # %entry1481; RV64-NEXT:    li a2, 131482; RV64-NEXT:    mulh a3, a0, a21483; RV64-NEXT:    mul a2, a0, a21484; RV64-NEXT:    srai a0, a2, 631485; RV64-NEXT:    xor a0, a3, a01486; RV64-NEXT:    snez a0, a01487; RV64-NEXT:    sd a2, 0(a1)1488; RV64-NEXT:    ret1489;1490; RV32ZBA-LABEL: smulo2.i64:1491; RV32ZBA:       # %bb.0: # %entry1492; RV32ZBA-NEXT:    li a3, 131493; RV32ZBA-NEXT:    sh1add a4, a1, a11494; RV32ZBA-NEXT:    sh1add a5, a0, a01495; RV32ZBA-NEXT:    sh2add a4, a4, a11496; RV32ZBA-NEXT:    mulh a1, a1, a31497; RV32ZBA-NEXT:    mulhu a3, a0, a31498; RV32ZBA-NEXT:    sh2add a5, a5, a01499; RV32ZBA-NEXT:    add a3, a4, a31500; RV32ZBA-NEXT:    sltu a0, a3, a41501; RV32ZBA-NEXT:    srai a4, a3, 311502; RV32ZBA-NEXT:    add a0, a1, a01503; RV32ZBA-NEXT:    xor a1, a0, a41504; RV32ZBA-NEXT:    srai a0, a0, 311505; RV32ZBA-NEXT:    xor a0, a0, a41506; RV32ZBA-NEXT:    or a0, a1, a01507; RV32ZBA-NEXT:    snez a0, a01508; RV32ZBA-NEXT:    sw a5, 0(a2)1509; RV32ZBA-NEXT:    sw a3, 4(a2)1510; RV32ZBA-NEXT:    ret1511;1512; RV64ZBA-LABEL: smulo2.i64:1513; RV64ZBA:       # %bb.0: # %entry1514; RV64ZBA-NEXT:    li a2, 131515; RV64ZBA-NEXT:    sh1add a3, a0, a01516; RV64ZBA-NEXT:    mulh a2, a0, a21517; RV64ZBA-NEXT:    sh2add a3, a3, a01518; RV64ZBA-NEXT:    srai a0, a3, 631519; RV64ZBA-NEXT:    xor a0, a2, a01520; RV64ZBA-NEXT:    snez a0, a01521; RV64ZBA-NEXT:    sd a3, 0(a1)1522; RV64ZBA-NEXT:    ret1523;1524; RV32ZICOND-LABEL: smulo2.i64:1525; RV32ZICOND:       # %bb.0: # %entry1526; RV32ZICOND-NEXT:    li a3, 131527; RV32ZICOND-NEXT:    mulhu a4, a0, a31528; RV32ZICOND-NEXT:    mul a5, a1, a31529; RV32ZICOND-NEXT:    mulh a1, a1, a31530; RV32ZICOND-NEXT:    mul a3, a0, a31531; RV32ZICOND-NEXT:    add a4, a5, a41532; RV32ZICOND-NEXT:    sltu a0, a4, a51533; RV32ZICOND-NEXT:    srai a5, a4, 311534; RV32ZICOND-NEXT:    add a0, a1, a01535; RV32ZICOND-NEXT:    xor a1, a0, a51536; RV32ZICOND-NEXT:    srai a0, a0, 311537; RV32ZICOND-NEXT:    xor a0, a0, a51538; RV32ZICOND-NEXT:    or a0, a1, a01539; RV32ZICOND-NEXT:    snez a0, a01540; RV32ZICOND-NEXT:    sw a3, 0(a2)1541; RV32ZICOND-NEXT:    sw a4, 4(a2)1542; RV32ZICOND-NEXT:    ret1543;1544; RV64ZICOND-LABEL: smulo2.i64:1545; RV64ZICOND:       # %bb.0: # %entry1546; RV64ZICOND-NEXT:    li a2, 131547; RV64ZICOND-NEXT:    mulh a3, a0, a21548; RV64ZICOND-NEXT:    mul a2, a0, a21549; RV64ZICOND-NEXT:    srai a0, a2, 631550; RV64ZICOND-NEXT:    xor a0, a3, a01551; RV64ZICOND-NEXT:    snez a0, a01552; RV64ZICOND-NEXT:    sd a2, 0(a1)1553; RV64ZICOND-NEXT:    ret1554entry:1555  %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 13)1556  %val = extractvalue {i64, i1} %t, 01557  %obit = extractvalue {i64, i1} %t, 11558  store i64 %val, ptr %res1559  ret i1 %obit1560}1561 1562define zeroext i1 @umulo.i32(i32 signext %v1, i32 signext %v2, ptr %res) {1563; RV32-LABEL: umulo.i32:1564; RV32:       # %bb.0: # %entry1565; RV32-NEXT:    mulhu a3, a0, a11566; RV32-NEXT:    snez a3, a31567; RV32-NEXT:    mul a0, a0, a11568; RV32-NEXT:    sw a0, 0(a2)1569; RV32-NEXT:    mv a0, a31570; RV32-NEXT:    ret1571;1572; RV64-LABEL: umulo.i32:1573; RV64:       # %bb.0: # %entry1574; RV64-NEXT:    slli a1, a1, 321575; RV64-NEXT:    slli a0, a0, 321576; RV64-NEXT:    mulhu a1, a0, a11577; RV64-NEXT:    srli a0, a1, 321578; RV64-NEXT:    snez a0, a01579; RV64-NEXT:    sw a1, 0(a2)1580; RV64-NEXT:    ret1581;1582; RV32ZBA-LABEL: umulo.i32:1583; RV32ZBA:       # %bb.0: # %entry1584; RV32ZBA-NEXT:    mulhu a3, a0, a11585; RV32ZBA-NEXT:    snez a3, a31586; RV32ZBA-NEXT:    mul a0, a0, a11587; RV32ZBA-NEXT:    sw a0, 0(a2)1588; RV32ZBA-NEXT:    mv a0, a31589; RV32ZBA-NEXT:    ret1590;1591; RV64ZBA-LABEL: umulo.i32:1592; RV64ZBA:       # %bb.0: # %entry1593; RV64ZBA-NEXT:    zext.w a1, a11594; RV64ZBA-NEXT:    zext.w a0, a01595; RV64ZBA-NEXT:    mul a1, a0, a11596; RV64ZBA-NEXT:    srli a0, a1, 321597; RV64ZBA-NEXT:    snez a0, a01598; RV64ZBA-NEXT:    sw a1, 0(a2)1599; RV64ZBA-NEXT:    ret1600;1601; RV32ZICOND-LABEL: umulo.i32:1602; RV32ZICOND:       # %bb.0: # %entry1603; RV32ZICOND-NEXT:    mulhu a3, a0, a11604; RV32ZICOND-NEXT:    snez a3, a31605; RV32ZICOND-NEXT:    mul a0, a0, a11606; RV32ZICOND-NEXT:    sw a0, 0(a2)1607; RV32ZICOND-NEXT:    mv a0, a31608; RV32ZICOND-NEXT:    ret1609;1610; RV64ZICOND-LABEL: umulo.i32:1611; RV64ZICOND:       # %bb.0: # %entry1612; RV64ZICOND-NEXT:    slli a1, a1, 321613; RV64ZICOND-NEXT:    slli a0, a0, 321614; RV64ZICOND-NEXT:    mulhu a1, a0, a11615; RV64ZICOND-NEXT:    srli a0, a1, 321616; RV64ZICOND-NEXT:    snez a0, a01617; RV64ZICOND-NEXT:    sw a1, 0(a2)1618; RV64ZICOND-NEXT:    ret1619entry:1620  %t = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %v1, i32 %v2)1621  %val = extractvalue {i32, i1} %t, 01622  %obit = extractvalue {i32, i1} %t, 11623  store i32 %val, ptr %res1624  ret i1 %obit1625}1626 1627define zeroext i1 @umulo2.i32(i32 signext %v1, ptr %res) {1628; RV32-LABEL: umulo2.i32:1629; RV32:       # %bb.0: # %entry1630; RV32-NEXT:    li a3, 131631; RV32-NEXT:    mulhu a2, a0, a31632; RV32-NEXT:    snez a2, a21633; RV32-NEXT:    mul a0, a0, a31634; RV32-NEXT:    sw a0, 0(a1)1635; RV32-NEXT:    mv a0, a21636; RV32-NEXT:    ret1637;1638; RV64-LABEL: umulo2.i32:1639; RV64:       # %bb.0: # %entry1640; RV64-NEXT:    li a2, 131641; RV64-NEXT:    slli a2, a2, 321642; RV64-NEXT:    slli a0, a0, 321643; RV64-NEXT:    mulhu a2, a0, a21644; RV64-NEXT:    srli a0, a2, 321645; RV64-NEXT:    snez a0, a01646; RV64-NEXT:    sw a2, 0(a1)1647; RV64-NEXT:    ret1648;1649; RV32ZBA-LABEL: umulo2.i32:1650; RV32ZBA:       # %bb.0: # %entry1651; RV32ZBA-NEXT:    li a2, 131652; RV32ZBA-NEXT:    sh1add a3, a0, a01653; RV32ZBA-NEXT:    mulhu a2, a0, a21654; RV32ZBA-NEXT:    snez a2, a21655; RV32ZBA-NEXT:    sh2add a0, a3, a01656; RV32ZBA-NEXT:    sw a0, 0(a1)1657; RV32ZBA-NEXT:    mv a0, a21658; RV32ZBA-NEXT:    ret1659;1660; RV64ZBA-LABEL: umulo2.i32:1661; RV64ZBA:       # %bb.0: # %entry1662; RV64ZBA-NEXT:    zext.w a2, a01663; RV64ZBA-NEXT:    sh1add.uw a0, a0, a21664; RV64ZBA-NEXT:    sh2add a2, a0, a21665; RV64ZBA-NEXT:    srli a0, a2, 321666; RV64ZBA-NEXT:    snez a0, a01667; RV64ZBA-NEXT:    sw a2, 0(a1)1668; RV64ZBA-NEXT:    ret1669;1670; RV32ZICOND-LABEL: umulo2.i32:1671; RV32ZICOND:       # %bb.0: # %entry1672; RV32ZICOND-NEXT:    li a3, 131673; RV32ZICOND-NEXT:    mulhu a2, a0, a31674; RV32ZICOND-NEXT:    snez a2, a21675; RV32ZICOND-NEXT:    mul a0, a0, a31676; RV32ZICOND-NEXT:    sw a0, 0(a1)1677; RV32ZICOND-NEXT:    mv a0, a21678; RV32ZICOND-NEXT:    ret1679;1680; RV64ZICOND-LABEL: umulo2.i32:1681; RV64ZICOND:       # %bb.0: # %entry1682; RV64ZICOND-NEXT:    li a2, 131683; RV64ZICOND-NEXT:    slli a2, a2, 321684; RV64ZICOND-NEXT:    slli a0, a0, 321685; RV64ZICOND-NEXT:    mulhu a2, a0, a21686; RV64ZICOND-NEXT:    srli a0, a2, 321687; RV64ZICOND-NEXT:    snez a0, a01688; RV64ZICOND-NEXT:    sw a2, 0(a1)1689; RV64ZICOND-NEXT:    ret1690entry:1691  %t = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %v1, i32 13)1692  %val = extractvalue {i32, i1} %t, 01693  %obit = extractvalue {i32, i1} %t, 11694  store i32 %val, ptr %res1695  ret i1 %obit1696}1697 1698; Similar to umulo.i32, but storing the overflow and returning the result.1699define signext i32 @umulo3.i32(i32 signext %0, i32 signext %1, ptr %2) {1700; RV32-LABEL: umulo3.i32:1701; RV32:       # %bb.0:1702; RV32-NEXT:    mul a3, a0, a11703; RV32-NEXT:    mulhu a0, a0, a11704; RV32-NEXT:    snez a0, a01705; RV32-NEXT:    sw a0, 0(a2)1706; RV32-NEXT:    mv a0, a31707; RV32-NEXT:    ret1708;1709; RV64-LABEL: umulo3.i32:1710; RV64:       # %bb.0:1711; RV64-NEXT:    slli a1, a1, 321712; RV64-NEXT:    slli a0, a0, 321713; RV64-NEXT:    mulhu a0, a0, a11714; RV64-NEXT:    srli a1, a0, 321715; RV64-NEXT:    snez a1, a11716; RV64-NEXT:    sext.w a0, a01717; RV64-NEXT:    sw a1, 0(a2)1718; RV64-NEXT:    ret1719;1720; RV32ZBA-LABEL: umulo3.i32:1721; RV32ZBA:       # %bb.0:1722; RV32ZBA-NEXT:    mul a3, a0, a11723; RV32ZBA-NEXT:    mulhu a0, a0, a11724; RV32ZBA-NEXT:    snez a0, a01725; RV32ZBA-NEXT:    sw a0, 0(a2)1726; RV32ZBA-NEXT:    mv a0, a31727; RV32ZBA-NEXT:    ret1728;1729; RV64ZBA-LABEL: umulo3.i32:1730; RV64ZBA:       # %bb.0:1731; RV64ZBA-NEXT:    zext.w a1, a11732; RV64ZBA-NEXT:    zext.w a0, a01733; RV64ZBA-NEXT:    mul a3, a0, a11734; RV64ZBA-NEXT:    srli a3, a3, 321735; RV64ZBA-NEXT:    snez a3, a31736; RV64ZBA-NEXT:    mulw a0, a0, a11737; RV64ZBA-NEXT:    sw a3, 0(a2)1738; RV64ZBA-NEXT:    ret1739;1740; RV32ZICOND-LABEL: umulo3.i32:1741; RV32ZICOND:       # %bb.0:1742; RV32ZICOND-NEXT:    mul a3, a0, a11743; RV32ZICOND-NEXT:    mulhu a0, a0, a11744; RV32ZICOND-NEXT:    snez a0, a01745; RV32ZICOND-NEXT:    sw a0, 0(a2)1746; RV32ZICOND-NEXT:    mv a0, a31747; RV32ZICOND-NEXT:    ret1748;1749; RV64ZICOND-LABEL: umulo3.i32:1750; RV64ZICOND:       # %bb.0:1751; RV64ZICOND-NEXT:    slli a1, a1, 321752; RV64ZICOND-NEXT:    slli a0, a0, 321753; RV64ZICOND-NEXT:    mulhu a0, a0, a11754; RV64ZICOND-NEXT:    srli a1, a0, 321755; RV64ZICOND-NEXT:    snez a1, a11756; RV64ZICOND-NEXT:    sext.w a0, a01757; RV64ZICOND-NEXT:    sw a1, 0(a2)1758; RV64ZICOND-NEXT:    ret1759  %4 = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %0, i32 %1)1760  %5 = extractvalue { i32, i1 } %4, 11761  %6 = extractvalue { i32, i1 } %4, 01762  %7 = zext i1 %5 to i321763  store i32 %7, ptr %2, align 41764  ret i32 %61765}1766 1767define zeroext i1 @umulo.i64(i64 %v1, i64 %v2, ptr %res) {1768; RV32-LABEL: umulo.i64:1769; RV32:       # %bb.0: # %entry1770; RV32-NEXT:    mul a5, a3, a01771; RV32-NEXT:    mul a6, a1, a21772; RV32-NEXT:    mulhu a7, a0, a21773; RV32-NEXT:    snez t0, a31774; RV32-NEXT:    mulhu a3, a3, a01775; RV32-NEXT:    mul t1, a0, a21776; RV32-NEXT:    mulhu a0, a1, a21777; RV32-NEXT:    snez a1, a11778; RV32-NEXT:    add a5, a6, a51779; RV32-NEXT:    and a1, a1, t01780; RV32-NEXT:    snez a0, a01781; RV32-NEXT:    snez a2, a31782; RV32-NEXT:    add a5, a7, a51783; RV32-NEXT:    or a0, a1, a01784; RV32-NEXT:    sltu a1, a5, a71785; RV32-NEXT:    or a0, a0, a21786; RV32-NEXT:    or a0, a0, a11787; RV32-NEXT:    sw t1, 0(a4)1788; RV32-NEXT:    sw a5, 4(a4)1789; RV32-NEXT:    ret1790;1791; RV64-LABEL: umulo.i64:1792; RV64:       # %bb.0: # %entry1793; RV64-NEXT:    mulhu a3, a0, a11794; RV64-NEXT:    snez a3, a31795; RV64-NEXT:    mul a0, a0, a11796; RV64-NEXT:    sd a0, 0(a2)1797; RV64-NEXT:    mv a0, a31798; RV64-NEXT:    ret1799;1800; RV32ZBA-LABEL: umulo.i64:1801; RV32ZBA:       # %bb.0: # %entry1802; RV32ZBA-NEXT:    mul a5, a3, a01803; RV32ZBA-NEXT:    mul a6, a1, a21804; RV32ZBA-NEXT:    mulhu a7, a0, a21805; RV32ZBA-NEXT:    snez t0, a31806; RV32ZBA-NEXT:    mulhu a3, a3, a01807; RV32ZBA-NEXT:    mul t1, a0, a21808; RV32ZBA-NEXT:    mulhu a0, a1, a21809; RV32ZBA-NEXT:    snez a1, a11810; RV32ZBA-NEXT:    add a5, a6, a51811; RV32ZBA-NEXT:    and a1, a1, t01812; RV32ZBA-NEXT:    snez a0, a01813; RV32ZBA-NEXT:    snez a2, a31814; RV32ZBA-NEXT:    add a5, a7, a51815; RV32ZBA-NEXT:    or a0, a1, a01816; RV32ZBA-NEXT:    sltu a1, a5, a71817; RV32ZBA-NEXT:    or a0, a0, a21818; RV32ZBA-NEXT:    or a0, a0, a11819; RV32ZBA-NEXT:    sw t1, 0(a4)1820; RV32ZBA-NEXT:    sw a5, 4(a4)1821; RV32ZBA-NEXT:    ret1822;1823; RV64ZBA-LABEL: umulo.i64:1824; RV64ZBA:       # %bb.0: # %entry1825; RV64ZBA-NEXT:    mulhu a3, a0, a11826; RV64ZBA-NEXT:    snez a3, a31827; RV64ZBA-NEXT:    mul a0, a0, a11828; RV64ZBA-NEXT:    sd a0, 0(a2)1829; RV64ZBA-NEXT:    mv a0, a31830; RV64ZBA-NEXT:    ret1831;1832; RV32ZICOND-LABEL: umulo.i64:1833; RV32ZICOND:       # %bb.0: # %entry1834; RV32ZICOND-NEXT:    mul a5, a3, a01835; RV32ZICOND-NEXT:    mul a6, a1, a21836; RV32ZICOND-NEXT:    mulhu a7, a0, a21837; RV32ZICOND-NEXT:    add a5, a6, a51838; RV32ZICOND-NEXT:    snez a6, a31839; RV32ZICOND-NEXT:    mulhu a3, a3, a01840; RV32ZICOND-NEXT:    mul t0, a0, a21841; RV32ZICOND-NEXT:    mulhu a0, a1, a21842; RV32ZICOND-NEXT:    czero.eqz a1, a6, a11843; RV32ZICOND-NEXT:    snez a0, a01844; RV32ZICOND-NEXT:    snez a2, a31845; RV32ZICOND-NEXT:    add a5, a7, a51846; RV32ZICOND-NEXT:    or a0, a1, a01847; RV32ZICOND-NEXT:    sltu a1, a5, a71848; RV32ZICOND-NEXT:    or a0, a0, a21849; RV32ZICOND-NEXT:    or a0, a0, a11850; RV32ZICOND-NEXT:    sw t0, 0(a4)1851; RV32ZICOND-NEXT:    sw a5, 4(a4)1852; RV32ZICOND-NEXT:    ret1853;1854; RV64ZICOND-LABEL: umulo.i64:1855; RV64ZICOND:       # %bb.0: # %entry1856; RV64ZICOND-NEXT:    mulhu a3, a0, a11857; RV64ZICOND-NEXT:    snez a3, a31858; RV64ZICOND-NEXT:    mul a0, a0, a11859; RV64ZICOND-NEXT:    sd a0, 0(a2)1860; RV64ZICOND-NEXT:    mv a0, a31861; RV64ZICOND-NEXT:    ret1862entry:1863  %t = call {i64, i1} @llvm.umul.with.overflow.i64(i64 %v1, i64 %v2)1864  %val = extractvalue {i64, i1} %t, 01865  %obit = extractvalue {i64, i1} %t, 11866  store i64 %val, ptr %res1867  ret i1 %obit1868}1869 1870define zeroext i1 @umulo2.i64(i64 %v1, ptr %res) {1871; RV32-LABEL: umulo2.i64:1872; RV32:       # %bb.0: # %entry1873; RV32-NEXT:    li a3, 131874; RV32-NEXT:    mul a4, a1, a31875; RV32-NEXT:    mulhu a5, a0, a31876; RV32-NEXT:    mulhu a1, a1, a31877; RV32-NEXT:    mul a3, a0, a31878; RV32-NEXT:    add a4, a5, a41879; RV32-NEXT:    snez a0, a11880; RV32-NEXT:    sltu a1, a4, a51881; RV32-NEXT:    or a0, a0, a11882; RV32-NEXT:    sw a3, 0(a2)1883; RV32-NEXT:    sw a4, 4(a2)1884; RV32-NEXT:    ret1885;1886; RV64-LABEL: umulo2.i64:1887; RV64:       # %bb.0: # %entry1888; RV64-NEXT:    li a3, 131889; RV64-NEXT:    mulhu a2, a0, a31890; RV64-NEXT:    snez a2, a21891; RV64-NEXT:    mul a0, a0, a31892; RV64-NEXT:    sd a0, 0(a1)1893; RV64-NEXT:    mv a0, a21894; RV64-NEXT:    ret1895;1896; RV32ZBA-LABEL: umulo2.i64:1897; RV32ZBA:       # %bb.0: # %entry1898; RV32ZBA-NEXT:    li a3, 131899; RV32ZBA-NEXT:    sh1add a4, a1, a11900; RV32ZBA-NEXT:    sh1add a5, a0, a01901; RV32ZBA-NEXT:    sh2add a4, a4, a11902; RV32ZBA-NEXT:    mulhu a1, a1, a31903; RV32ZBA-NEXT:    mulhu a3, a0, a31904; RV32ZBA-NEXT:    sh2add a5, a5, a01905; RV32ZBA-NEXT:    add a4, a3, a41906; RV32ZBA-NEXT:    snez a0, a11907; RV32ZBA-NEXT:    sltu a1, a4, a31908; RV32ZBA-NEXT:    or a0, a0, a11909; RV32ZBA-NEXT:    sw a5, 0(a2)1910; RV32ZBA-NEXT:    sw a4, 4(a2)1911; RV32ZBA-NEXT:    ret1912;1913; RV64ZBA-LABEL: umulo2.i64:1914; RV64ZBA:       # %bb.0: # %entry1915; RV64ZBA-NEXT:    li a2, 131916; RV64ZBA-NEXT:    sh1add a3, a0, a01917; RV64ZBA-NEXT:    mulhu a2, a0, a21918; RV64ZBA-NEXT:    snez a2, a21919; RV64ZBA-NEXT:    sh2add a0, a3, a01920; RV64ZBA-NEXT:    sd a0, 0(a1)1921; RV64ZBA-NEXT:    mv a0, a21922; RV64ZBA-NEXT:    ret1923;1924; RV32ZICOND-LABEL: umulo2.i64:1925; RV32ZICOND:       # %bb.0: # %entry1926; RV32ZICOND-NEXT:    li a3, 131927; RV32ZICOND-NEXT:    mul a4, a1, a31928; RV32ZICOND-NEXT:    mulhu a5, a0, a31929; RV32ZICOND-NEXT:    mulhu a1, a1, a31930; RV32ZICOND-NEXT:    mul a3, a0, a31931; RV32ZICOND-NEXT:    add a4, a5, a41932; RV32ZICOND-NEXT:    snez a0, a11933; RV32ZICOND-NEXT:    sltu a1, a4, a51934; RV32ZICOND-NEXT:    or a0, a0, a11935; RV32ZICOND-NEXT:    sw a3, 0(a2)1936; RV32ZICOND-NEXT:    sw a4, 4(a2)1937; RV32ZICOND-NEXT:    ret1938;1939; RV64ZICOND-LABEL: umulo2.i64:1940; RV64ZICOND:       # %bb.0: # %entry1941; RV64ZICOND-NEXT:    li a3, 131942; RV64ZICOND-NEXT:    mulhu a2, a0, a31943; RV64ZICOND-NEXT:    snez a2, a21944; RV64ZICOND-NEXT:    mul a0, a0, a31945; RV64ZICOND-NEXT:    sd a0, 0(a1)1946; RV64ZICOND-NEXT:    mv a0, a21947; RV64ZICOND-NEXT:    ret1948entry:1949  %t = call {i64, i1} @llvm.umul.with.overflow.i64(i64 %v1, i64 13)1950  %val = extractvalue {i64, i1} %t, 01951  %obit = extractvalue {i64, i1} %t, 11952  store i64 %val, ptr %res1953  ret i1 %obit1954}1955 1956;1957; Check the use of the overflow bit in combination with a select instruction.1958;1959define i32 @saddo.select.i32(i32 signext %v1, i32 signext %v2) {1960; RV32-LABEL: saddo.select.i32:1961; RV32:       # %bb.0: # %entry1962; RV32-NEXT:    add a2, a0, a11963; RV32-NEXT:    slt a2, a2, a01964; RV32-NEXT:    srli a3, a1, 311965; RV32-NEXT:    bne a3, a2, .LBB28_21966; RV32-NEXT:  # %bb.1: # %entry1967; RV32-NEXT:    mv a0, a11968; RV32-NEXT:  .LBB28_2: # %entry1969; RV32-NEXT:    ret1970;1971; RV64-LABEL: saddo.select.i32:1972; RV64:       # %bb.0: # %entry1973; RV64-NEXT:    add a2, a0, a11974; RV64-NEXT:    addw a3, a0, a11975; RV64-NEXT:    bne a3, a2, .LBB28_21976; RV64-NEXT:  # %bb.1: # %entry1977; RV64-NEXT:    mv a0, a11978; RV64-NEXT:  .LBB28_2: # %entry1979; RV64-NEXT:    ret1980;1981; RV32ZBA-LABEL: saddo.select.i32:1982; RV32ZBA:       # %bb.0: # %entry1983; RV32ZBA-NEXT:    add a2, a0, a11984; RV32ZBA-NEXT:    slt a2, a2, a01985; RV32ZBA-NEXT:    srli a3, a1, 311986; RV32ZBA-NEXT:    bne a3, a2, .LBB28_21987; RV32ZBA-NEXT:  # %bb.1: # %entry1988; RV32ZBA-NEXT:    mv a0, a11989; RV32ZBA-NEXT:  .LBB28_2: # %entry1990; RV32ZBA-NEXT:    ret1991;1992; RV64ZBA-LABEL: saddo.select.i32:1993; RV64ZBA:       # %bb.0: # %entry1994; RV64ZBA-NEXT:    add a2, a0, a11995; RV64ZBA-NEXT:    addw a3, a0, a11996; RV64ZBA-NEXT:    bne a3, a2, .LBB28_21997; RV64ZBA-NEXT:  # %bb.1: # %entry1998; RV64ZBA-NEXT:    mv a0, a11999; RV64ZBA-NEXT:  .LBB28_2: # %entry2000; RV64ZBA-NEXT:    ret2001;2002; RV32ZICOND-LABEL: saddo.select.i32:2003; RV32ZICOND:       # %bb.0: # %entry2004; RV32ZICOND-NEXT:    add a2, a0, a12005; RV32ZICOND-NEXT:    srli a3, a1, 312006; RV32ZICOND-NEXT:    slt a2, a2, a02007; RV32ZICOND-NEXT:    xor a2, a3, a22008; RV32ZICOND-NEXT:    czero.nez a1, a1, a22009; RV32ZICOND-NEXT:    czero.eqz a0, a0, a22010; RV32ZICOND-NEXT:    or a0, a0, a12011; RV32ZICOND-NEXT:    ret2012;2013; RV64ZICOND-LABEL: saddo.select.i32:2014; RV64ZICOND:       # %bb.0: # %entry2015; RV64ZICOND-NEXT:    add a2, a0, a12016; RV64ZICOND-NEXT:    addw a3, a0, a12017; RV64ZICOND-NEXT:    xor a2, a3, a22018; RV64ZICOND-NEXT:    czero.nez a1, a1, a22019; RV64ZICOND-NEXT:    czero.eqz a0, a0, a22020; RV64ZICOND-NEXT:    or a0, a0, a12021; RV64ZICOND-NEXT:    ret2022entry:2023  %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)2024  %obit = extractvalue {i32, i1} %t, 12025  %ret = select i1 %obit, i32 %v1, i32 %v22026  ret i32 %ret2027}2028 2029define i1 @saddo.not.i32(i32 signext %v1, i32 signext %v2) {2030; RV32-LABEL: saddo.not.i32:2031; RV32:       # %bb.0: # %entry2032; RV32-NEXT:    add a2, a0, a12033; RV32-NEXT:    slt a0, a2, a02034; RV32-NEXT:    srli a1, a1, 312035; RV32-NEXT:    xor a0, a1, a02036; RV32-NEXT:    xori a0, a0, 12037; RV32-NEXT:    ret2038;2039; RV64-LABEL: saddo.not.i32:2040; RV64:       # %bb.0: # %entry2041; RV64-NEXT:    add a2, a0, a12042; RV64-NEXT:    addw a0, a0, a12043; RV64-NEXT:    xor a0, a0, a22044; RV64-NEXT:    seqz a0, a02045; RV64-NEXT:    ret2046;2047; RV32ZBA-LABEL: saddo.not.i32:2048; RV32ZBA:       # %bb.0: # %entry2049; RV32ZBA-NEXT:    add a2, a0, a12050; RV32ZBA-NEXT:    slt a0, a2, a02051; RV32ZBA-NEXT:    srli a1, a1, 312052; RV32ZBA-NEXT:    xor a0, a1, a02053; RV32ZBA-NEXT:    xori a0, a0, 12054; RV32ZBA-NEXT:    ret2055;2056; RV64ZBA-LABEL: saddo.not.i32:2057; RV64ZBA:       # %bb.0: # %entry2058; RV64ZBA-NEXT:    add a2, a0, a12059; RV64ZBA-NEXT:    addw a0, a0, a12060; RV64ZBA-NEXT:    xor a0, a0, a22061; RV64ZBA-NEXT:    seqz a0, a02062; RV64ZBA-NEXT:    ret2063;2064; RV32ZICOND-LABEL: saddo.not.i32:2065; RV32ZICOND:       # %bb.0: # %entry2066; RV32ZICOND-NEXT:    add a2, a0, a12067; RV32ZICOND-NEXT:    slt a0, a2, a02068; RV32ZICOND-NEXT:    srli a1, a1, 312069; RV32ZICOND-NEXT:    xor a0, a1, a02070; RV32ZICOND-NEXT:    xori a0, a0, 12071; RV32ZICOND-NEXT:    ret2072;2073; RV64ZICOND-LABEL: saddo.not.i32:2074; RV64ZICOND:       # %bb.0: # %entry2075; RV64ZICOND-NEXT:    add a2, a0, a12076; RV64ZICOND-NEXT:    addw a0, a0, a12077; RV64ZICOND-NEXT:    xor a0, a0, a22078; RV64ZICOND-NEXT:    seqz a0, a02079; RV64ZICOND-NEXT:    ret2080entry:2081  %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)2082  %obit = extractvalue {i32, i1} %t, 12083  %ret = xor i1 %obit, true2084  ret i1 %ret2085}2086 2087define i64 @saddo.select.i64(i64 %v1, i64 %v2) {2088; RV32-LABEL: saddo.select.i64:2089; RV32:       # %bb.0: # %entry2090; RV32-NEXT:    add a4, a1, a32091; RV32-NEXT:    add a5, a0, a22092; RV32-NEXT:    sltu a5, a5, a02093; RV32-NEXT:    add a4, a4, a52094; RV32-NEXT:    xor a5, a1, a32095; RV32-NEXT:    xor a4, a1, a42096; RV32-NEXT:    not a5, a52097; RV32-NEXT:    and a4, a5, a42098; RV32-NEXT:    bltz a4, .LBB30_22099; RV32-NEXT:  # %bb.1: # %entry2100; RV32-NEXT:    mv a0, a22101; RV32-NEXT:    mv a1, a32102; RV32-NEXT:  .LBB30_2: # %entry2103; RV32-NEXT:    ret2104;2105; RV64-LABEL: saddo.select.i64:2106; RV64:       # %bb.0: # %entry2107; RV64-NEXT:    add a2, a0, a12108; RV64-NEXT:    slt a2, a2, a02109; RV64-NEXT:    srli a3, a1, 632110; RV64-NEXT:    bne a3, a2, .LBB30_22111; RV64-NEXT:  # %bb.1: # %entry2112; RV64-NEXT:    mv a0, a12113; RV64-NEXT:  .LBB30_2: # %entry2114; RV64-NEXT:    ret2115;2116; RV32ZBA-LABEL: saddo.select.i64:2117; RV32ZBA:       # %bb.0: # %entry2118; RV32ZBA-NEXT:    add a4, a1, a32119; RV32ZBA-NEXT:    add a5, a0, a22120; RV32ZBA-NEXT:    sltu a5, a5, a02121; RV32ZBA-NEXT:    add a4, a4, a52122; RV32ZBA-NEXT:    xor a5, a1, a32123; RV32ZBA-NEXT:    xor a4, a1, a42124; RV32ZBA-NEXT:    not a5, a52125; RV32ZBA-NEXT:    and a4, a5, a42126; RV32ZBA-NEXT:    bltz a4, .LBB30_22127; RV32ZBA-NEXT:  # %bb.1: # %entry2128; RV32ZBA-NEXT:    mv a0, a22129; RV32ZBA-NEXT:    mv a1, a32130; RV32ZBA-NEXT:  .LBB30_2: # %entry2131; RV32ZBA-NEXT:    ret2132;2133; RV64ZBA-LABEL: saddo.select.i64:2134; RV64ZBA:       # %bb.0: # %entry2135; RV64ZBA-NEXT:    add a2, a0, a12136; RV64ZBA-NEXT:    slt a2, a2, a02137; RV64ZBA-NEXT:    srli a3, a1, 632138; RV64ZBA-NEXT:    bne a3, a2, .LBB30_22139; RV64ZBA-NEXT:  # %bb.1: # %entry2140; RV64ZBA-NEXT:    mv a0, a12141; RV64ZBA-NEXT:  .LBB30_2: # %entry2142; RV64ZBA-NEXT:    ret2143;2144; RV32ZICOND-LABEL: saddo.select.i64:2145; RV32ZICOND:       # %bb.0: # %entry2146; RV32ZICOND-NEXT:    add a4, a1, a32147; RV32ZICOND-NEXT:    add a5, a0, a22148; RV32ZICOND-NEXT:    sltu a5, a5, a02149; RV32ZICOND-NEXT:    add a4, a4, a52150; RV32ZICOND-NEXT:    xor a5, a1, a32151; RV32ZICOND-NEXT:    not a5, a52152; RV32ZICOND-NEXT:    xor a4, a1, a42153; RV32ZICOND-NEXT:    and a4, a5, a42154; RV32ZICOND-NEXT:    srli a4, a4, 312155; RV32ZICOND-NEXT:    czero.nez a2, a2, a42156; RV32ZICOND-NEXT:    czero.eqz a0, a0, a42157; RV32ZICOND-NEXT:    czero.nez a3, a3, a42158; RV32ZICOND-NEXT:    czero.eqz a1, a1, a42159; RV32ZICOND-NEXT:    or a0, a0, a22160; RV32ZICOND-NEXT:    or a1, a1, a32161; RV32ZICOND-NEXT:    ret2162;2163; RV64ZICOND-LABEL: saddo.select.i64:2164; RV64ZICOND:       # %bb.0: # %entry2165; RV64ZICOND-NEXT:    add a2, a0, a12166; RV64ZICOND-NEXT:    srli a3, a1, 632167; RV64ZICOND-NEXT:    slt a2, a2, a02168; RV64ZICOND-NEXT:    xor a2, a3, a22169; RV64ZICOND-NEXT:    czero.nez a1, a1, a22170; RV64ZICOND-NEXT:    czero.eqz a0, a0, a22171; RV64ZICOND-NEXT:    or a0, a0, a12172; RV64ZICOND-NEXT:    ret2173entry:2174  %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %v1, i64 %v2)2175  %obit = extractvalue {i64, i1} %t, 12176  %ret = select i1 %obit, i64 %v1, i64 %v22177  ret i64 %ret2178}2179 2180define i1 @saddo.not.i64(i64 %v1, i64 %v2) {2181; RV32-LABEL: saddo.not.i64:2182; RV32:       # %bb.0: # %entry2183; RV32-NEXT:    add a4, a1, a32184; RV32-NEXT:    add a2, a0, a22185; RV32-NEXT:    xor a3, a1, a32186; RV32-NEXT:    sltu a0, a2, a02187; RV32-NEXT:    add a0, a4, a02188; RV32-NEXT:    xor a0, a1, a02189; RV32-NEXT:    not a1, a32190; RV32-NEXT:    and a0, a1, a02191; RV32-NEXT:    srli a0, a0, 312192; RV32-NEXT:    xori a0, a0, 12193; RV32-NEXT:    ret2194;2195; RV64-LABEL: saddo.not.i64:2196; RV64:       # %bb.0: # %entry2197; RV64-NEXT:    add a2, a0, a12198; RV64-NEXT:    slt a0, a2, a02199; RV64-NEXT:    srli a1, a1, 632200; RV64-NEXT:    xor a0, a1, a02201; RV64-NEXT:    xori a0, a0, 12202; RV64-NEXT:    ret2203;2204; RV32ZBA-LABEL: saddo.not.i64:2205; RV32ZBA:       # %bb.0: # %entry2206; RV32ZBA-NEXT:    add a4, a1, a32207; RV32ZBA-NEXT:    add a2, a0, a22208; RV32ZBA-NEXT:    xor a3, a1, a32209; RV32ZBA-NEXT:    sltu a0, a2, a02210; RV32ZBA-NEXT:    add a0, a4, a02211; RV32ZBA-NEXT:    xor a0, a1, a02212; RV32ZBA-NEXT:    not a1, a32213; RV32ZBA-NEXT:    and a0, a1, a02214; RV32ZBA-NEXT:    srli a0, a0, 312215; RV32ZBA-NEXT:    xori a0, a0, 12216; RV32ZBA-NEXT:    ret2217;2218; RV64ZBA-LABEL: saddo.not.i64:2219; RV64ZBA:       # %bb.0: # %entry2220; RV64ZBA-NEXT:    add a2, a0, a12221; RV64ZBA-NEXT:    slt a0, a2, a02222; RV64ZBA-NEXT:    srli a1, a1, 632223; RV64ZBA-NEXT:    xor a0, a1, a02224; RV64ZBA-NEXT:    xori a0, a0, 12225; RV64ZBA-NEXT:    ret2226;2227; RV32ZICOND-LABEL: saddo.not.i64:2228; RV32ZICOND:       # %bb.0: # %entry2229; RV32ZICOND-NEXT:    add a4, a1, a32230; RV32ZICOND-NEXT:    add a2, a0, a22231; RV32ZICOND-NEXT:    xor a3, a1, a32232; RV32ZICOND-NEXT:    sltu a0, a2, a02233; RV32ZICOND-NEXT:    add a0, a4, a02234; RV32ZICOND-NEXT:    xor a0, a1, a02235; RV32ZICOND-NEXT:    not a1, a32236; RV32ZICOND-NEXT:    and a0, a1, a02237; RV32ZICOND-NEXT:    srli a0, a0, 312238; RV32ZICOND-NEXT:    xori a0, a0, 12239; RV32ZICOND-NEXT:    ret2240;2241; RV64ZICOND-LABEL: saddo.not.i64:2242; RV64ZICOND:       # %bb.0: # %entry2243; RV64ZICOND-NEXT:    add a2, a0, a12244; RV64ZICOND-NEXT:    slt a0, a2, a02245; RV64ZICOND-NEXT:    srli a1, a1, 632246; RV64ZICOND-NEXT:    xor a0, a1, a02247; RV64ZICOND-NEXT:    xori a0, a0, 12248; RV64ZICOND-NEXT:    ret2249entry:2250  %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %v1, i64 %v2)2251  %obit = extractvalue {i64, i1} %t, 12252  %ret = xor i1 %obit, true2253  ret i1 %ret2254}2255 2256define i32 @uaddo.select.i32(i32 signext %v1, i32 signext %v2) {2257; RV32-LABEL: uaddo.select.i32:2258; RV32:       # %bb.0: # %entry2259; RV32-NEXT:    add a2, a0, a12260; RV32-NEXT:    bltu a2, a0, .LBB32_22261; RV32-NEXT:  # %bb.1: # %entry2262; RV32-NEXT:    mv a0, a12263; RV32-NEXT:  .LBB32_2: # %entry2264; RV32-NEXT:    ret2265;2266; RV64-LABEL: uaddo.select.i32:2267; RV64:       # %bb.0: # %entry2268; RV64-NEXT:    addw a2, a0, a12269; RV64-NEXT:    bltu a2, a0, .LBB32_22270; RV64-NEXT:  # %bb.1: # %entry2271; RV64-NEXT:    mv a0, a12272; RV64-NEXT:  .LBB32_2: # %entry2273; RV64-NEXT:    ret2274;2275; RV32ZBA-LABEL: uaddo.select.i32:2276; RV32ZBA:       # %bb.0: # %entry2277; RV32ZBA-NEXT:    add a2, a0, a12278; RV32ZBA-NEXT:    bltu a2, a0, .LBB32_22279; RV32ZBA-NEXT:  # %bb.1: # %entry2280; RV32ZBA-NEXT:    mv a0, a12281; RV32ZBA-NEXT:  .LBB32_2: # %entry2282; RV32ZBA-NEXT:    ret2283;2284; RV64ZBA-LABEL: uaddo.select.i32:2285; RV64ZBA:       # %bb.0: # %entry2286; RV64ZBA-NEXT:    addw a2, a0, a12287; RV64ZBA-NEXT:    bltu a2, a0, .LBB32_22288; RV64ZBA-NEXT:  # %bb.1: # %entry2289; RV64ZBA-NEXT:    mv a0, a12290; RV64ZBA-NEXT:  .LBB32_2: # %entry2291; RV64ZBA-NEXT:    ret2292;2293; RV32ZICOND-LABEL: uaddo.select.i32:2294; RV32ZICOND:       # %bb.0: # %entry2295; RV32ZICOND-NEXT:    add a2, a0, a12296; RV32ZICOND-NEXT:    sltu a2, a2, a02297; RV32ZICOND-NEXT:    czero.nez a1, a1, a22298; RV32ZICOND-NEXT:    czero.eqz a0, a0, a22299; RV32ZICOND-NEXT:    or a0, a0, a12300; RV32ZICOND-NEXT:    ret2301;2302; RV64ZICOND-LABEL: uaddo.select.i32:2303; RV64ZICOND:       # %bb.0: # %entry2304; RV64ZICOND-NEXT:    addw a2, a0, a12305; RV64ZICOND-NEXT:    sltu a2, a2, a02306; RV64ZICOND-NEXT:    czero.nez a1, a1, a22307; RV64ZICOND-NEXT:    czero.eqz a0, a0, a22308; RV64ZICOND-NEXT:    or a0, a0, a12309; RV64ZICOND-NEXT:    ret2310entry:2311  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)2312  %obit = extractvalue {i32, i1} %t, 12313  %ret = select i1 %obit, i32 %v1, i32 %v22314  ret i32 %ret2315}2316 2317define i1 @uaddo.not.i32(i32 signext %v1, i32 signext %v2) {2318; RV32-LABEL: uaddo.not.i32:2319; RV32:       # %bb.0: # %entry2320; RV32-NEXT:    add a1, a0, a12321; RV32-NEXT:    sltu a0, a1, a02322; RV32-NEXT:    xori a0, a0, 12323; RV32-NEXT:    ret2324;2325; RV64-LABEL: uaddo.not.i32:2326; RV64:       # %bb.0: # %entry2327; RV64-NEXT:    addw a1, a0, a12328; RV64-NEXT:    sltu a0, a1, a02329; RV64-NEXT:    xori a0, a0, 12330; RV64-NEXT:    ret2331;2332; RV32ZBA-LABEL: uaddo.not.i32:2333; RV32ZBA:       # %bb.0: # %entry2334; RV32ZBA-NEXT:    add a1, a0, a12335; RV32ZBA-NEXT:    sltu a0, a1, a02336; RV32ZBA-NEXT:    xori a0, a0, 12337; RV32ZBA-NEXT:    ret2338;2339; RV64ZBA-LABEL: uaddo.not.i32:2340; RV64ZBA:       # %bb.0: # %entry2341; RV64ZBA-NEXT:    addw a1, a0, a12342; RV64ZBA-NEXT:    sltu a0, a1, a02343; RV64ZBA-NEXT:    xori a0, a0, 12344; RV64ZBA-NEXT:    ret2345;2346; RV32ZICOND-LABEL: uaddo.not.i32:2347; RV32ZICOND:       # %bb.0: # %entry2348; RV32ZICOND-NEXT:    add a1, a0, a12349; RV32ZICOND-NEXT:    sltu a0, a1, a02350; RV32ZICOND-NEXT:    xori a0, a0, 12351; RV32ZICOND-NEXT:    ret2352;2353; RV64ZICOND-LABEL: uaddo.not.i32:2354; RV64ZICOND:       # %bb.0: # %entry2355; RV64ZICOND-NEXT:    addw a1, a0, a12356; RV64ZICOND-NEXT:    sltu a0, a1, a02357; RV64ZICOND-NEXT:    xori a0, a0, 12358; RV64ZICOND-NEXT:    ret2359entry:2360  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)2361  %obit = extractvalue {i32, i1} %t, 12362  %ret = xor i1 %obit, true2363  ret i1 %ret2364}2365 2366define i64 @uaddo.select.i64(i64 %v1, i64 %v2) {2367; RV32-LABEL: uaddo.select.i64:2368; RV32:       # %bb.0: # %entry2369; RV32-NEXT:    add a5, a1, a32370; RV32-NEXT:    add a4, a0, a22371; RV32-NEXT:    sltu a4, a4, a02372; RV32-NEXT:    add a5, a5, a42373; RV32-NEXT:    bne a5, a1, .LBB34_32374; RV32-NEXT:  # %bb.1: # %entry2375; RV32-NEXT:    beqz a4, .LBB34_42376; RV32-NEXT:  .LBB34_2: # %entry2377; RV32-NEXT:    ret2378; RV32-NEXT:  .LBB34_3: # %entry2379; RV32-NEXT:    sltu a4, a5, a12380; RV32-NEXT:    bnez a4, .LBB34_22381; RV32-NEXT:  .LBB34_4: # %entry2382; RV32-NEXT:    mv a0, a22383; RV32-NEXT:    mv a1, a32384; RV32-NEXT:    ret2385;2386; RV64-LABEL: uaddo.select.i64:2387; RV64:       # %bb.0: # %entry2388; RV64-NEXT:    add a2, a0, a12389; RV64-NEXT:    bltu a2, a0, .LBB34_22390; RV64-NEXT:  # %bb.1: # %entry2391; RV64-NEXT:    mv a0, a12392; RV64-NEXT:  .LBB34_2: # %entry2393; RV64-NEXT:    ret2394;2395; RV32ZBA-LABEL: uaddo.select.i64:2396; RV32ZBA:       # %bb.0: # %entry2397; RV32ZBA-NEXT:    add a5, a1, a32398; RV32ZBA-NEXT:    add a4, a0, a22399; RV32ZBA-NEXT:    sltu a4, a4, a02400; RV32ZBA-NEXT:    add a5, a5, a42401; RV32ZBA-NEXT:    bne a5, a1, .LBB34_32402; RV32ZBA-NEXT:  # %bb.1: # %entry2403; RV32ZBA-NEXT:    beqz a4, .LBB34_42404; RV32ZBA-NEXT:  .LBB34_2: # %entry2405; RV32ZBA-NEXT:    ret2406; RV32ZBA-NEXT:  .LBB34_3: # %entry2407; RV32ZBA-NEXT:    sltu a4, a5, a12408; RV32ZBA-NEXT:    bnez a4, .LBB34_22409; RV32ZBA-NEXT:  .LBB34_4: # %entry2410; RV32ZBA-NEXT:    mv a0, a22411; RV32ZBA-NEXT:    mv a1, a32412; RV32ZBA-NEXT:    ret2413;2414; RV64ZBA-LABEL: uaddo.select.i64:2415; RV64ZBA:       # %bb.0: # %entry2416; RV64ZBA-NEXT:    add a2, a0, a12417; RV64ZBA-NEXT:    bltu a2, a0, .LBB34_22418; RV64ZBA-NEXT:  # %bb.1: # %entry2419; RV64ZBA-NEXT:    mv a0, a12420; RV64ZBA-NEXT:  .LBB34_2: # %entry2421; RV64ZBA-NEXT:    ret2422;2423; RV32ZICOND-LABEL: uaddo.select.i64:2424; RV32ZICOND:       # %bb.0: # %entry2425; RV32ZICOND-NEXT:    add a4, a1, a32426; RV32ZICOND-NEXT:    add a5, a0, a22427; RV32ZICOND-NEXT:    sltu a5, a5, a02428; RV32ZICOND-NEXT:    add a4, a4, a52429; RV32ZICOND-NEXT:    xor a6, a4, a12430; RV32ZICOND-NEXT:    sltu a4, a4, a12431; RV32ZICOND-NEXT:    czero.eqz a4, a4, a62432; RV32ZICOND-NEXT:    czero.nez a5, a5, a62433; RV32ZICOND-NEXT:    or a4, a5, a42434; RV32ZICOND-NEXT:    czero.nez a2, a2, a42435; RV32ZICOND-NEXT:    czero.eqz a0, a0, a42436; RV32ZICOND-NEXT:    czero.nez a3, a3, a42437; RV32ZICOND-NEXT:    czero.eqz a1, a1, a42438; RV32ZICOND-NEXT:    or a0, a0, a22439; RV32ZICOND-NEXT:    or a1, a1, a32440; RV32ZICOND-NEXT:    ret2441;2442; RV64ZICOND-LABEL: uaddo.select.i64:2443; RV64ZICOND:       # %bb.0: # %entry2444; RV64ZICOND-NEXT:    add a2, a0, a12445; RV64ZICOND-NEXT:    sltu a2, a2, a02446; RV64ZICOND-NEXT:    czero.nez a1, a1, a22447; RV64ZICOND-NEXT:    czero.eqz a0, a0, a22448; RV64ZICOND-NEXT:    or a0, a0, a12449; RV64ZICOND-NEXT:    ret2450entry:2451  %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %v1, i64 %v2)2452  %obit = extractvalue {i64, i1} %t, 12453  %ret = select i1 %obit, i64 %v1, i64 %v22454  ret i64 %ret2455}2456 2457define i1 @uaddo.not.i64(i64 %v1, i64 %v2) {2458; RV32-LABEL: uaddo.not.i64:2459; RV32:       # %bb.0: # %entry2460; RV32-NEXT:    add a3, a1, a32461; RV32-NEXT:    add a2, a0, a22462; RV32-NEXT:    sltu a0, a2, a02463; RV32-NEXT:    add a2, a3, a02464; RV32-NEXT:    beq a2, a1, .LBB35_22465; RV32-NEXT:  # %bb.1: # %entry2466; RV32-NEXT:    sltu a0, a2, a12467; RV32-NEXT:  .LBB35_2: # %entry2468; RV32-NEXT:    xori a0, a0, 12469; RV32-NEXT:    ret2470;2471; RV64-LABEL: uaddo.not.i64:2472; RV64:       # %bb.0: # %entry2473; RV64-NEXT:    add a1, a0, a12474; RV64-NEXT:    sltu a0, a1, a02475; RV64-NEXT:    xori a0, a0, 12476; RV64-NEXT:    ret2477;2478; RV32ZBA-LABEL: uaddo.not.i64:2479; RV32ZBA:       # %bb.0: # %entry2480; RV32ZBA-NEXT:    add a3, a1, a32481; RV32ZBA-NEXT:    add a2, a0, a22482; RV32ZBA-NEXT:    sltu a0, a2, a02483; RV32ZBA-NEXT:    add a2, a3, a02484; RV32ZBA-NEXT:    beq a2, a1, .LBB35_22485; RV32ZBA-NEXT:  # %bb.1: # %entry2486; RV32ZBA-NEXT:    sltu a0, a2, a12487; RV32ZBA-NEXT:  .LBB35_2: # %entry2488; RV32ZBA-NEXT:    xori a0, a0, 12489; RV32ZBA-NEXT:    ret2490;2491; RV64ZBA-LABEL: uaddo.not.i64:2492; RV64ZBA:       # %bb.0: # %entry2493; RV64ZBA-NEXT:    add a1, a0, a12494; RV64ZBA-NEXT:    sltu a0, a1, a02495; RV64ZBA-NEXT:    xori a0, a0, 12496; RV64ZBA-NEXT:    ret2497;2498; RV32ZICOND-LABEL: uaddo.not.i64:2499; RV32ZICOND:       # %bb.0: # %entry2500; RV32ZICOND-NEXT:    add a3, a1, a32501; RV32ZICOND-NEXT:    add a2, a0, a22502; RV32ZICOND-NEXT:    sltu a0, a2, a02503; RV32ZICOND-NEXT:    add a3, a3, a02504; RV32ZICOND-NEXT:    xor a2, a3, a12505; RV32ZICOND-NEXT:    sltu a1, a3, a12506; RV32ZICOND-NEXT:    czero.eqz a1, a1, a22507; RV32ZICOND-NEXT:    czero.nez a0, a0, a22508; RV32ZICOND-NEXT:    or a0, a0, a12509; RV32ZICOND-NEXT:    xori a0, a0, 12510; RV32ZICOND-NEXT:    ret2511;2512; RV64ZICOND-LABEL: uaddo.not.i64:2513; RV64ZICOND:       # %bb.0: # %entry2514; RV64ZICOND-NEXT:    add a1, a0, a12515; RV64ZICOND-NEXT:    sltu a0, a1, a02516; RV64ZICOND-NEXT:    xori a0, a0, 12517; RV64ZICOND-NEXT:    ret2518entry:2519  %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %v1, i64 %v2)2520  %obit = extractvalue {i64, i1} %t, 12521  %ret = xor i1 %obit, true2522  ret i1 %ret2523}2524 2525define i32 @ssubo.select.i32(i32 signext %v1, i32 signext %v2) {2526; RV32-LABEL: ssubo.select.i32:2527; RV32:       # %bb.0: # %entry2528; RV32-NEXT:    sgtz a2, a12529; RV32-NEXT:    sub a3, a0, a12530; RV32-NEXT:    slt a3, a3, a02531; RV32-NEXT:    bne a2, a3, .LBB36_22532; RV32-NEXT:  # %bb.1: # %entry2533; RV32-NEXT:    mv a0, a12534; RV32-NEXT:  .LBB36_2: # %entry2535; RV32-NEXT:    ret2536;2537; RV64-LABEL: ssubo.select.i32:2538; RV64:       # %bb.0: # %entry2539; RV64-NEXT:    sub a2, a0, a12540; RV64-NEXT:    subw a3, a0, a12541; RV64-NEXT:    bne a3, a2, .LBB36_22542; RV64-NEXT:  # %bb.1: # %entry2543; RV64-NEXT:    mv a0, a12544; RV64-NEXT:  .LBB36_2: # %entry2545; RV64-NEXT:    ret2546;2547; RV32ZBA-LABEL: ssubo.select.i32:2548; RV32ZBA:       # %bb.0: # %entry2549; RV32ZBA-NEXT:    sgtz a2, a12550; RV32ZBA-NEXT:    sub a3, a0, a12551; RV32ZBA-NEXT:    slt a3, a3, a02552; RV32ZBA-NEXT:    bne a2, a3, .LBB36_22553; RV32ZBA-NEXT:  # %bb.1: # %entry2554; RV32ZBA-NEXT:    mv a0, a12555; RV32ZBA-NEXT:  .LBB36_2: # %entry2556; RV32ZBA-NEXT:    ret2557;2558; RV64ZBA-LABEL: ssubo.select.i32:2559; RV64ZBA:       # %bb.0: # %entry2560; RV64ZBA-NEXT:    sub a2, a0, a12561; RV64ZBA-NEXT:    subw a3, a0, a12562; RV64ZBA-NEXT:    bne a3, a2, .LBB36_22563; RV64ZBA-NEXT:  # %bb.1: # %entry2564; RV64ZBA-NEXT:    mv a0, a12565; RV64ZBA-NEXT:  .LBB36_2: # %entry2566; RV64ZBA-NEXT:    ret2567;2568; RV32ZICOND-LABEL: ssubo.select.i32:2569; RV32ZICOND:       # %bb.0: # %entry2570; RV32ZICOND-NEXT:    sgtz a2, a12571; RV32ZICOND-NEXT:    sub a3, a0, a12572; RV32ZICOND-NEXT:    slt a3, a3, a02573; RV32ZICOND-NEXT:    xor a2, a2, a32574; RV32ZICOND-NEXT:    czero.nez a1, a1, a22575; RV32ZICOND-NEXT:    czero.eqz a0, a0, a22576; RV32ZICOND-NEXT:    or a0, a0, a12577; RV32ZICOND-NEXT:    ret2578;2579; RV64ZICOND-LABEL: ssubo.select.i32:2580; RV64ZICOND:       # %bb.0: # %entry2581; RV64ZICOND-NEXT:    sub a2, a0, a12582; RV64ZICOND-NEXT:    subw a3, a0, a12583; RV64ZICOND-NEXT:    xor a2, a3, a22584; RV64ZICOND-NEXT:    czero.nez a1, a1, a22585; RV64ZICOND-NEXT:    czero.eqz a0, a0, a22586; RV64ZICOND-NEXT:    or a0, a0, a12587; RV64ZICOND-NEXT:    ret2588entry:2589  %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %v1, i32 %v2)2590  %obit = extractvalue {i32, i1} %t, 12591  %ret = select i1 %obit, i32 %v1, i32 %v22592  ret i32 %ret2593}2594 2595define i1 @ssubo.not.i32(i32 signext %v1, i32 signext %v2) {2596; RV32-LABEL: ssubo.not.i32:2597; RV32:       # %bb.0: # %entry2598; RV32-NEXT:    sgtz a2, a12599; RV32-NEXT:    sub a1, a0, a12600; RV32-NEXT:    slt a0, a1, a02601; RV32-NEXT:    xor a0, a2, a02602; RV32-NEXT:    xori a0, a0, 12603; RV32-NEXT:    ret2604;2605; RV64-LABEL: ssubo.not.i32:2606; RV64:       # %bb.0: # %entry2607; RV64-NEXT:    sub a2, a0, a12608; RV64-NEXT:    subw a0, a0, a12609; RV64-NEXT:    xor a0, a0, a22610; RV64-NEXT:    seqz a0, a02611; RV64-NEXT:    ret2612;2613; RV32ZBA-LABEL: ssubo.not.i32:2614; RV32ZBA:       # %bb.0: # %entry2615; RV32ZBA-NEXT:    sgtz a2, a12616; RV32ZBA-NEXT:    sub a1, a0, a12617; RV32ZBA-NEXT:    slt a0, a1, a02618; RV32ZBA-NEXT:    xor a0, a2, a02619; RV32ZBA-NEXT:    xori a0, a0, 12620; RV32ZBA-NEXT:    ret2621;2622; RV64ZBA-LABEL: ssubo.not.i32:2623; RV64ZBA:       # %bb.0: # %entry2624; RV64ZBA-NEXT:    sub a2, a0, a12625; RV64ZBA-NEXT:    subw a0, a0, a12626; RV64ZBA-NEXT:    xor a0, a0, a22627; RV64ZBA-NEXT:    seqz a0, a02628; RV64ZBA-NEXT:    ret2629;2630; RV32ZICOND-LABEL: ssubo.not.i32:2631; RV32ZICOND:       # %bb.0: # %entry2632; RV32ZICOND-NEXT:    sgtz a2, a12633; RV32ZICOND-NEXT:    sub a1, a0, a12634; RV32ZICOND-NEXT:    slt a0, a1, a02635; RV32ZICOND-NEXT:    xor a0, a2, a02636; RV32ZICOND-NEXT:    xori a0, a0, 12637; RV32ZICOND-NEXT:    ret2638;2639; RV64ZICOND-LABEL: ssubo.not.i32:2640; RV64ZICOND:       # %bb.0: # %entry2641; RV64ZICOND-NEXT:    sub a2, a0, a12642; RV64ZICOND-NEXT:    subw a0, a0, a12643; RV64ZICOND-NEXT:    xor a0, a0, a22644; RV64ZICOND-NEXT:    seqz a0, a02645; RV64ZICOND-NEXT:    ret2646entry:2647  %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %v1, i32 %v2)2648  %obit = extractvalue {i32, i1} %t, 12649  %ret = xor i1 %obit, true2650  ret i1 %ret2651}2652 2653define i64 @ssubo.select.i64(i64 %v1, i64 %v2) {2654; RV32-LABEL: ssubo.select.i64:2655; RV32:       # %bb.0: # %entry2656; RV32-NEXT:    sltu a4, a0, a22657; RV32-NEXT:    sub a5, a1, a32658; RV32-NEXT:    sub a5, a5, a42659; RV32-NEXT:    xor a5, a1, a52660; RV32-NEXT:    xor a4, a1, a32661; RV32-NEXT:    and a4, a4, a52662; RV32-NEXT:    bltz a4, .LBB38_22663; RV32-NEXT:  # %bb.1: # %entry2664; RV32-NEXT:    mv a0, a22665; RV32-NEXT:    mv a1, a32666; RV32-NEXT:  .LBB38_2: # %entry2667; RV32-NEXT:    ret2668;2669; RV64-LABEL: ssubo.select.i64:2670; RV64:       # %bb.0: # %entry2671; RV64-NEXT:    sgtz a2, a12672; RV64-NEXT:    sub a3, a0, a12673; RV64-NEXT:    slt a3, a3, a02674; RV64-NEXT:    bne a2, a3, .LBB38_22675; RV64-NEXT:  # %bb.1: # %entry2676; RV64-NEXT:    mv a0, a12677; RV64-NEXT:  .LBB38_2: # %entry2678; RV64-NEXT:    ret2679;2680; RV32ZBA-LABEL: ssubo.select.i64:2681; RV32ZBA:       # %bb.0: # %entry2682; RV32ZBA-NEXT:    sltu a4, a0, a22683; RV32ZBA-NEXT:    sub a5, a1, a32684; RV32ZBA-NEXT:    sub a5, a5, a42685; RV32ZBA-NEXT:    xor a5, a1, a52686; RV32ZBA-NEXT:    xor a4, a1, a32687; RV32ZBA-NEXT:    and a4, a4, a52688; RV32ZBA-NEXT:    bltz a4, .LBB38_22689; RV32ZBA-NEXT:  # %bb.1: # %entry2690; RV32ZBA-NEXT:    mv a0, a22691; RV32ZBA-NEXT:    mv a1, a32692; RV32ZBA-NEXT:  .LBB38_2: # %entry2693; RV32ZBA-NEXT:    ret2694;2695; RV64ZBA-LABEL: ssubo.select.i64:2696; RV64ZBA:       # %bb.0: # %entry2697; RV64ZBA-NEXT:    sgtz a2, a12698; RV64ZBA-NEXT:    sub a3, a0, a12699; RV64ZBA-NEXT:    slt a3, a3, a02700; RV64ZBA-NEXT:    bne a2, a3, .LBB38_22701; RV64ZBA-NEXT:  # %bb.1: # %entry2702; RV64ZBA-NEXT:    mv a0, a12703; RV64ZBA-NEXT:  .LBB38_2: # %entry2704; RV64ZBA-NEXT:    ret2705;2706; RV32ZICOND-LABEL: ssubo.select.i64:2707; RV32ZICOND:       # %bb.0: # %entry2708; RV32ZICOND-NEXT:    sltu a4, a0, a22709; RV32ZICOND-NEXT:    sub a5, a1, a32710; RV32ZICOND-NEXT:    sub a5, a5, a42711; RV32ZICOND-NEXT:    xor a4, a1, a32712; RV32ZICOND-NEXT:    xor a5, a1, a52713; RV32ZICOND-NEXT:    and a4, a4, a52714; RV32ZICOND-NEXT:    srli a4, a4, 312715; RV32ZICOND-NEXT:    czero.nez a2, a2, a42716; RV32ZICOND-NEXT:    czero.eqz a0, a0, a42717; RV32ZICOND-NEXT:    czero.nez a3, a3, a42718; RV32ZICOND-NEXT:    czero.eqz a1, a1, a42719; RV32ZICOND-NEXT:    or a0, a0, a22720; RV32ZICOND-NEXT:    or a1, a1, a32721; RV32ZICOND-NEXT:    ret2722;2723; RV64ZICOND-LABEL: ssubo.select.i64:2724; RV64ZICOND:       # %bb.0: # %entry2725; RV64ZICOND-NEXT:    sgtz a2, a12726; RV64ZICOND-NEXT:    sub a3, a0, a12727; RV64ZICOND-NEXT:    slt a3, a3, a02728; RV64ZICOND-NEXT:    xor a2, a2, a32729; RV64ZICOND-NEXT:    czero.nez a1, a1, a22730; RV64ZICOND-NEXT:    czero.eqz a0, a0, a22731; RV64ZICOND-NEXT:    or a0, a0, a12732; RV64ZICOND-NEXT:    ret2733entry:2734  %t = call {i64, i1} @llvm.ssub.with.overflow.i64(i64 %v1, i64 %v2)2735  %obit = extractvalue {i64, i1} %t, 12736  %ret = select i1 %obit, i64 %v1, i64 %v22737  ret i64 %ret2738}2739 2740define i1 @ssub.not.i64(i64 %v1, i64 %v2) {2741; RV32-LABEL: ssub.not.i64:2742; RV32:       # %bb.0: # %entry2743; RV32-NEXT:    sltu a0, a0, a22744; RV32-NEXT:    sub a2, a1, a32745; RV32-NEXT:    sub a2, a2, a02746; RV32-NEXT:    xor a2, a1, a22747; RV32-NEXT:    xor a1, a1, a32748; RV32-NEXT:    and a1, a1, a22749; RV32-NEXT:    srli a1, a1, 312750; RV32-NEXT:    xori a0, a1, 12751; RV32-NEXT:    ret2752;2753; RV64-LABEL: ssub.not.i64:2754; RV64:       # %bb.0: # %entry2755; RV64-NEXT:    sgtz a2, a12756; RV64-NEXT:    sub a1, a0, a12757; RV64-NEXT:    slt a0, a1, a02758; RV64-NEXT:    xor a0, a2, a02759; RV64-NEXT:    xori a0, a0, 12760; RV64-NEXT:    ret2761;2762; RV32ZBA-LABEL: ssub.not.i64:2763; RV32ZBA:       # %bb.0: # %entry2764; RV32ZBA-NEXT:    sltu a0, a0, a22765; RV32ZBA-NEXT:    sub a2, a1, a32766; RV32ZBA-NEXT:    sub a2, a2, a02767; RV32ZBA-NEXT:    xor a2, a1, a22768; RV32ZBA-NEXT:    xor a1, a1, a32769; RV32ZBA-NEXT:    and a1, a1, a22770; RV32ZBA-NEXT:    srli a1, a1, 312771; RV32ZBA-NEXT:    xori a0, a1, 12772; RV32ZBA-NEXT:    ret2773;2774; RV64ZBA-LABEL: ssub.not.i64:2775; RV64ZBA:       # %bb.0: # %entry2776; RV64ZBA-NEXT:    sgtz a2, a12777; RV64ZBA-NEXT:    sub a1, a0, a12778; RV64ZBA-NEXT:    slt a0, a1, a02779; RV64ZBA-NEXT:    xor a0, a2, a02780; RV64ZBA-NEXT:    xori a0, a0, 12781; RV64ZBA-NEXT:    ret2782;2783; RV32ZICOND-LABEL: ssub.not.i64:2784; RV32ZICOND:       # %bb.0: # %entry2785; RV32ZICOND-NEXT:    sltu a0, a0, a22786; RV32ZICOND-NEXT:    sub a2, a1, a32787; RV32ZICOND-NEXT:    sub a2, a2, a02788; RV32ZICOND-NEXT:    xor a2, a1, a22789; RV32ZICOND-NEXT:    xor a1, a1, a32790; RV32ZICOND-NEXT:    and a1, a1, a22791; RV32ZICOND-NEXT:    srli a1, a1, 312792; RV32ZICOND-NEXT:    xori a0, a1, 12793; RV32ZICOND-NEXT:    ret2794;2795; RV64ZICOND-LABEL: ssub.not.i64:2796; RV64ZICOND:       # %bb.0: # %entry2797; RV64ZICOND-NEXT:    sgtz a2, a12798; RV64ZICOND-NEXT:    sub a1, a0, a12799; RV64ZICOND-NEXT:    slt a0, a1, a02800; RV64ZICOND-NEXT:    xor a0, a2, a02801; RV64ZICOND-NEXT:    xori a0, a0, 12802; RV64ZICOND-NEXT:    ret2803entry:2804  %t = call {i64, i1} @llvm.ssub.with.overflow.i64(i64 %v1, i64 %v2)2805  %obit = extractvalue {i64, i1} %t, 12806  %ret = xor i1 %obit, true2807  ret i1 %ret2808}2809 2810define i32 @usubo.select.i32(i32 signext %v1, i32 signext %v2) {2811; RV32-LABEL: usubo.select.i32:2812; RV32:       # %bb.0: # %entry2813; RV32-NEXT:    sub a2, a0, a12814; RV32-NEXT:    bltu a0, a2, .LBB40_22815; RV32-NEXT:  # %bb.1: # %entry2816; RV32-NEXT:    mv a0, a12817; RV32-NEXT:  .LBB40_2: # %entry2818; RV32-NEXT:    ret2819;2820; RV64-LABEL: usubo.select.i32:2821; RV64:       # %bb.0: # %entry2822; RV64-NEXT:    subw a2, a0, a12823; RV64-NEXT:    bltu a0, a2, .LBB40_22824; RV64-NEXT:  # %bb.1: # %entry2825; RV64-NEXT:    mv a0, a12826; RV64-NEXT:  .LBB40_2: # %entry2827; RV64-NEXT:    ret2828;2829; RV32ZBA-LABEL: usubo.select.i32:2830; RV32ZBA:       # %bb.0: # %entry2831; RV32ZBA-NEXT:    sub a2, a0, a12832; RV32ZBA-NEXT:    bltu a0, a2, .LBB40_22833; RV32ZBA-NEXT:  # %bb.1: # %entry2834; RV32ZBA-NEXT:    mv a0, a12835; RV32ZBA-NEXT:  .LBB40_2: # %entry2836; RV32ZBA-NEXT:    ret2837;2838; RV64ZBA-LABEL: usubo.select.i32:2839; RV64ZBA:       # %bb.0: # %entry2840; RV64ZBA-NEXT:    subw a2, a0, a12841; RV64ZBA-NEXT:    bltu a0, a2, .LBB40_22842; RV64ZBA-NEXT:  # %bb.1: # %entry2843; RV64ZBA-NEXT:    mv a0, a12844; RV64ZBA-NEXT:  .LBB40_2: # %entry2845; RV64ZBA-NEXT:    ret2846;2847; RV32ZICOND-LABEL: usubo.select.i32:2848; RV32ZICOND:       # %bb.0: # %entry2849; RV32ZICOND-NEXT:    sub a2, a0, a12850; RV32ZICOND-NEXT:    sltu a2, a0, a22851; RV32ZICOND-NEXT:    czero.nez a1, a1, a22852; RV32ZICOND-NEXT:    czero.eqz a0, a0, a22853; RV32ZICOND-NEXT:    or a0, a0, a12854; RV32ZICOND-NEXT:    ret2855;2856; RV64ZICOND-LABEL: usubo.select.i32:2857; RV64ZICOND:       # %bb.0: # %entry2858; RV64ZICOND-NEXT:    subw a2, a0, a12859; RV64ZICOND-NEXT:    sltu a2, a0, a22860; RV64ZICOND-NEXT:    czero.nez a1, a1, a22861; RV64ZICOND-NEXT:    czero.eqz a0, a0, a22862; RV64ZICOND-NEXT:    or a0, a0, a12863; RV64ZICOND-NEXT:    ret2864entry:2865  %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %v1, i32 %v2)2866  %obit = extractvalue {i32, i1} %t, 12867  %ret = select i1 %obit, i32 %v1, i32 %v22868  ret i32 %ret2869}2870 2871define i1 @usubo.not.i32(i32 signext %v1, i32 signext %v2) {2872; RV32-LABEL: usubo.not.i32:2873; RV32:       # %bb.0: # %entry2874; RV32-NEXT:    sub a1, a0, a12875; RV32-NEXT:    sltu a0, a0, a12876; RV32-NEXT:    xori a0, a0, 12877; RV32-NEXT:    ret2878;2879; RV64-LABEL: usubo.not.i32:2880; RV64:       # %bb.0: # %entry2881; RV64-NEXT:    subw a1, a0, a12882; RV64-NEXT:    sltu a0, a0, a12883; RV64-NEXT:    xori a0, a0, 12884; RV64-NEXT:    ret2885;2886; RV32ZBA-LABEL: usubo.not.i32:2887; RV32ZBA:       # %bb.0: # %entry2888; RV32ZBA-NEXT:    sub a1, a0, a12889; RV32ZBA-NEXT:    sltu a0, a0, a12890; RV32ZBA-NEXT:    xori a0, a0, 12891; RV32ZBA-NEXT:    ret2892;2893; RV64ZBA-LABEL: usubo.not.i32:2894; RV64ZBA:       # %bb.0: # %entry2895; RV64ZBA-NEXT:    subw a1, a0, a12896; RV64ZBA-NEXT:    sltu a0, a0, a12897; RV64ZBA-NEXT:    xori a0, a0, 12898; RV64ZBA-NEXT:    ret2899;2900; RV32ZICOND-LABEL: usubo.not.i32:2901; RV32ZICOND:       # %bb.0: # %entry2902; RV32ZICOND-NEXT:    sub a1, a0, a12903; RV32ZICOND-NEXT:    sltu a0, a0, a12904; RV32ZICOND-NEXT:    xori a0, a0, 12905; RV32ZICOND-NEXT:    ret2906;2907; RV64ZICOND-LABEL: usubo.not.i32:2908; RV64ZICOND:       # %bb.0: # %entry2909; RV64ZICOND-NEXT:    subw a1, a0, a12910; RV64ZICOND-NEXT:    sltu a0, a0, a12911; RV64ZICOND-NEXT:    xori a0, a0, 12912; RV64ZICOND-NEXT:    ret2913entry:2914  %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %v1, i32 %v2)2915  %obit = extractvalue {i32, i1} %t, 12916  %ret = xor i1 %obit, true2917  ret i1 %ret2918}2919 2920define i64 @usubo.select.i64(i64 %v1, i64 %v2) {2921; RV32-LABEL: usubo.select.i64:2922; RV32:       # %bb.0: # %entry2923; RV32-NEXT:    sltu a4, a0, a22924; RV32-NEXT:    sub a5, a1, a32925; RV32-NEXT:    sub a4, a5, a42926; RV32-NEXT:    beq a4, a1, .LBB42_22927; RV32-NEXT:  # %bb.1: # %entry2928; RV32-NEXT:    sltu a4, a1, a42929; RV32-NEXT:    beqz a4, .LBB42_32930; RV32-NEXT:    j .LBB42_42931; RV32-NEXT:  .LBB42_2:2932; RV32-NEXT:    sub a4, a0, a22933; RV32-NEXT:    sltu a4, a0, a42934; RV32-NEXT:    bnez a4, .LBB42_42935; RV32-NEXT:  .LBB42_3: # %entry2936; RV32-NEXT:    mv a0, a22937; RV32-NEXT:    mv a1, a32938; RV32-NEXT:  .LBB42_4: # %entry2939; RV32-NEXT:    ret2940;2941; RV64-LABEL: usubo.select.i64:2942; RV64:       # %bb.0: # %entry2943; RV64-NEXT:    sub a2, a0, a12944; RV64-NEXT:    bltu a0, a2, .LBB42_22945; RV64-NEXT:  # %bb.1: # %entry2946; RV64-NEXT:    mv a0, a12947; RV64-NEXT:  .LBB42_2: # %entry2948; RV64-NEXT:    ret2949;2950; RV32ZBA-LABEL: usubo.select.i64:2951; RV32ZBA:       # %bb.0: # %entry2952; RV32ZBA-NEXT:    sltu a4, a0, a22953; RV32ZBA-NEXT:    sub a5, a1, a32954; RV32ZBA-NEXT:    sub a4, a5, a42955; RV32ZBA-NEXT:    beq a4, a1, .LBB42_22956; RV32ZBA-NEXT:  # %bb.1: # %entry2957; RV32ZBA-NEXT:    sltu a4, a1, a42958; RV32ZBA-NEXT:    beqz a4, .LBB42_32959; RV32ZBA-NEXT:    j .LBB42_42960; RV32ZBA-NEXT:  .LBB42_2:2961; RV32ZBA-NEXT:    sub a4, a0, a22962; RV32ZBA-NEXT:    sltu a4, a0, a42963; RV32ZBA-NEXT:    bnez a4, .LBB42_42964; RV32ZBA-NEXT:  .LBB42_3: # %entry2965; RV32ZBA-NEXT:    mv a0, a22966; RV32ZBA-NEXT:    mv a1, a32967; RV32ZBA-NEXT:  .LBB42_4: # %entry2968; RV32ZBA-NEXT:    ret2969;2970; RV64ZBA-LABEL: usubo.select.i64:2971; RV64ZBA:       # %bb.0: # %entry2972; RV64ZBA-NEXT:    sub a2, a0, a12973; RV64ZBA-NEXT:    bltu a0, a2, .LBB42_22974; RV64ZBA-NEXT:  # %bb.1: # %entry2975; RV64ZBA-NEXT:    mv a0, a12976; RV64ZBA-NEXT:  .LBB42_2: # %entry2977; RV64ZBA-NEXT:    ret2978;2979; RV32ZICOND-LABEL: usubo.select.i64:2980; RV32ZICOND:       # %bb.0: # %entry2981; RV32ZICOND-NEXT:    sltu a4, a0, a22982; RV32ZICOND-NEXT:    sub a5, a1, a32983; RV32ZICOND-NEXT:    sub a6, a0, a22984; RV32ZICOND-NEXT:    sub a5, a5, a42985; RV32ZICOND-NEXT:    sltu a4, a0, a62986; RV32ZICOND-NEXT:    xor a6, a5, a12987; RV32ZICOND-NEXT:    sltu a5, a1, a52988; RV32ZICOND-NEXT:    czero.eqz a5, a5, a62989; RV32ZICOND-NEXT:    czero.nez a4, a4, a62990; RV32ZICOND-NEXT:    or a4, a4, a52991; RV32ZICOND-NEXT:    czero.nez a2, a2, a42992; RV32ZICOND-NEXT:    czero.eqz a0, a0, a42993; RV32ZICOND-NEXT:    czero.nez a3, a3, a42994; RV32ZICOND-NEXT:    czero.eqz a1, a1, a42995; RV32ZICOND-NEXT:    or a0, a0, a22996; RV32ZICOND-NEXT:    or a1, a1, a32997; RV32ZICOND-NEXT:    ret2998;2999; RV64ZICOND-LABEL: usubo.select.i64:3000; RV64ZICOND:       # %bb.0: # %entry3001; RV64ZICOND-NEXT:    sub a2, a0, a13002; RV64ZICOND-NEXT:    sltu a2, a0, a23003; RV64ZICOND-NEXT:    czero.nez a1, a1, a23004; RV64ZICOND-NEXT:    czero.eqz a0, a0, a23005; RV64ZICOND-NEXT:    or a0, a0, a13006; RV64ZICOND-NEXT:    ret3007entry:3008  %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %v1, i64 %v2)3009  %obit = extractvalue {i64, i1} %t, 13010  %ret = select i1 %obit, i64 %v1, i64 %v23011  ret i64 %ret3012}3013 3014define i1 @usubo.not.i64(i64 %v1, i64 %v2) {3015; RV32-LABEL: usubo.not.i64:3016; RV32:       # %bb.0: # %entry3017; RV32-NEXT:    sltu a4, a0, a23018; RV32-NEXT:    sub a3, a1, a33019; RV32-NEXT:    sub a3, a3, a43020; RV32-NEXT:    beq a3, a1, .LBB43_23021; RV32-NEXT:  # %bb.1: # %entry3022; RV32-NEXT:    sltu a0, a1, a33023; RV32-NEXT:    xori a0, a0, 13024; RV32-NEXT:    ret3025; RV32-NEXT:  .LBB43_2:3026; RV32-NEXT:    sub a1, a0, a23027; RV32-NEXT:    sltu a0, a0, a13028; RV32-NEXT:    xori a0, a0, 13029; RV32-NEXT:    ret3030;3031; RV64-LABEL: usubo.not.i64:3032; RV64:       # %bb.0: # %entry3033; RV64-NEXT:    sub a1, a0, a13034; RV64-NEXT:    sltu a0, a0, a13035; RV64-NEXT:    xori a0, a0, 13036; RV64-NEXT:    ret3037;3038; RV32ZBA-LABEL: usubo.not.i64:3039; RV32ZBA:       # %bb.0: # %entry3040; RV32ZBA-NEXT:    sltu a4, a0, a23041; RV32ZBA-NEXT:    sub a3, a1, a33042; RV32ZBA-NEXT:    sub a3, a3, a43043; RV32ZBA-NEXT:    beq a3, a1, .LBB43_23044; RV32ZBA-NEXT:  # %bb.1: # %entry3045; RV32ZBA-NEXT:    sltu a0, a1, a33046; RV32ZBA-NEXT:    xori a0, a0, 13047; RV32ZBA-NEXT:    ret3048; RV32ZBA-NEXT:  .LBB43_2:3049; RV32ZBA-NEXT:    sub a1, a0, a23050; RV32ZBA-NEXT:    sltu a0, a0, a13051; RV32ZBA-NEXT:    xori a0, a0, 13052; RV32ZBA-NEXT:    ret3053;3054; RV64ZBA-LABEL: usubo.not.i64:3055; RV64ZBA:       # %bb.0: # %entry3056; RV64ZBA-NEXT:    sub a1, a0, a13057; RV64ZBA-NEXT:    sltu a0, a0, a13058; RV64ZBA-NEXT:    xori a0, a0, 13059; RV64ZBA-NEXT:    ret3060;3061; RV32ZICOND-LABEL: usubo.not.i64:3062; RV32ZICOND:       # %bb.0: # %entry3063; RV32ZICOND-NEXT:    sltu a4, a0, a23064; RV32ZICOND-NEXT:    sub a3, a1, a33065; RV32ZICOND-NEXT:    sub a2, a0, a23066; RV32ZICOND-NEXT:    sub a3, a3, a43067; RV32ZICOND-NEXT:    sltu a0, a0, a23068; RV32ZICOND-NEXT:    xor a2, a3, a13069; RV32ZICOND-NEXT:    sltu a1, a1, a33070; RV32ZICOND-NEXT:    czero.eqz a1, a1, a23071; RV32ZICOND-NEXT:    czero.nez a0, a0, a23072; RV32ZICOND-NEXT:    or a0, a0, a13073; RV32ZICOND-NEXT:    xori a0, a0, 13074; RV32ZICOND-NEXT:    ret3075;3076; RV64ZICOND-LABEL: usubo.not.i64:3077; RV64ZICOND:       # %bb.0: # %entry3078; RV64ZICOND-NEXT:    sub a1, a0, a13079; RV64ZICOND-NEXT:    sltu a0, a0, a13080; RV64ZICOND-NEXT:    xori a0, a0, 13081; RV64ZICOND-NEXT:    ret3082entry:3083  %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %v1, i64 %v2)3084  %obit = extractvalue {i64, i1} %t, 13085  %ret = xor i1 %obit, true3086  ret i1 %ret3087}3088 3089define i32 @smulo.select.i32(i32 signext %v1, i32 signext %v2) {3090; RV32-LABEL: smulo.select.i32:3091; RV32:       # %bb.0: # %entry3092; RV32-NEXT:    mulh a2, a0, a13093; RV32-NEXT:    mul a3, a0, a13094; RV32-NEXT:    srai a3, a3, 313095; RV32-NEXT:    bne a2, a3, .LBB44_23096; RV32-NEXT:  # %bb.1: # %entry3097; RV32-NEXT:    mv a0, a13098; RV32-NEXT:  .LBB44_2: # %entry3099; RV32-NEXT:    ret3100;3101; RV64-LABEL: smulo.select.i32:3102; RV64:       # %bb.0: # %entry3103; RV64-NEXT:    mul a2, a0, a13104; RV64-NEXT:    mulw a3, a0, a13105; RV64-NEXT:    bne a3, a2, .LBB44_23106; RV64-NEXT:  # %bb.1: # %entry3107; RV64-NEXT:    mv a0, a13108; RV64-NEXT:  .LBB44_2: # %entry3109; RV64-NEXT:    ret3110;3111; RV32ZBA-LABEL: smulo.select.i32:3112; RV32ZBA:       # %bb.0: # %entry3113; RV32ZBA-NEXT:    mulh a2, a0, a13114; RV32ZBA-NEXT:    mul a3, a0, a13115; RV32ZBA-NEXT:    srai a3, a3, 313116; RV32ZBA-NEXT:    bne a2, a3, .LBB44_23117; RV32ZBA-NEXT:  # %bb.1: # %entry3118; RV32ZBA-NEXT:    mv a0, a13119; RV32ZBA-NEXT:  .LBB44_2: # %entry3120; RV32ZBA-NEXT:    ret3121;3122; RV64ZBA-LABEL: smulo.select.i32:3123; RV64ZBA:       # %bb.0: # %entry3124; RV64ZBA-NEXT:    mul a2, a0, a13125; RV64ZBA-NEXT:    mulw a3, a0, a13126; RV64ZBA-NEXT:    bne a3, a2, .LBB44_23127; RV64ZBA-NEXT:  # %bb.1: # %entry3128; RV64ZBA-NEXT:    mv a0, a13129; RV64ZBA-NEXT:  .LBB44_2: # %entry3130; RV64ZBA-NEXT:    ret3131;3132; RV32ZICOND-LABEL: smulo.select.i32:3133; RV32ZICOND:       # %bb.0: # %entry3134; RV32ZICOND-NEXT:    mulh a2, a0, a13135; RV32ZICOND-NEXT:    mul a3, a0, a13136; RV32ZICOND-NEXT:    srai a3, a3, 313137; RV32ZICOND-NEXT:    xor a2, a2, a33138; RV32ZICOND-NEXT:    czero.nez a1, a1, a23139; RV32ZICOND-NEXT:    czero.eqz a0, a0, a23140; RV32ZICOND-NEXT:    or a0, a0, a13141; RV32ZICOND-NEXT:    ret3142;3143; RV64ZICOND-LABEL: smulo.select.i32:3144; RV64ZICOND:       # %bb.0: # %entry3145; RV64ZICOND-NEXT:    mul a2, a0, a13146; RV64ZICOND-NEXT:    mulw a3, a0, a13147; RV64ZICOND-NEXT:    xor a2, a3, a23148; RV64ZICOND-NEXT:    czero.nez a1, a1, a23149; RV64ZICOND-NEXT:    czero.eqz a0, a0, a23150; RV64ZICOND-NEXT:    or a0, a0, a13151; RV64ZICOND-NEXT:    ret3152entry:3153  %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)3154  %obit = extractvalue {i32, i1} %t, 13155  %ret = select i1 %obit, i32 %v1, i32 %v23156  ret i32 %ret3157}3158 3159define i1 @smulo.not.i32(i32 signext %v1, i32 signext %v2) {3160; RV32-LABEL: smulo.not.i32:3161; RV32:       # %bb.0: # %entry3162; RV32-NEXT:    mulh a2, a0, a13163; RV32-NEXT:    mul a0, a0, a13164; RV32-NEXT:    srai a0, a0, 313165; RV32-NEXT:    xor a0, a2, a03166; RV32-NEXT:    seqz a0, a03167; RV32-NEXT:    ret3168;3169; RV64-LABEL: smulo.not.i32:3170; RV64:       # %bb.0: # %entry3171; RV64-NEXT:    mul a2, a0, a13172; RV64-NEXT:    mulw a0, a0, a13173; RV64-NEXT:    xor a0, a0, a23174; RV64-NEXT:    seqz a0, a03175; RV64-NEXT:    ret3176;3177; RV32ZBA-LABEL: smulo.not.i32:3178; RV32ZBA:       # %bb.0: # %entry3179; RV32ZBA-NEXT:    mulh a2, a0, a13180; RV32ZBA-NEXT:    mul a0, a0, a13181; RV32ZBA-NEXT:    srai a0, a0, 313182; RV32ZBA-NEXT:    xor a0, a2, a03183; RV32ZBA-NEXT:    seqz a0, a03184; RV32ZBA-NEXT:    ret3185;3186; RV64ZBA-LABEL: smulo.not.i32:3187; RV64ZBA:       # %bb.0: # %entry3188; RV64ZBA-NEXT:    mul a2, a0, a13189; RV64ZBA-NEXT:    mulw a0, a0, a13190; RV64ZBA-NEXT:    xor a0, a0, a23191; RV64ZBA-NEXT:    seqz a0, a03192; RV64ZBA-NEXT:    ret3193;3194; RV32ZICOND-LABEL: smulo.not.i32:3195; RV32ZICOND:       # %bb.0: # %entry3196; RV32ZICOND-NEXT:    mulh a2, a0, a13197; RV32ZICOND-NEXT:    mul a0, a0, a13198; RV32ZICOND-NEXT:    srai a0, a0, 313199; RV32ZICOND-NEXT:    xor a0, a2, a03200; RV32ZICOND-NEXT:    seqz a0, a03201; RV32ZICOND-NEXT:    ret3202;3203; RV64ZICOND-LABEL: smulo.not.i32:3204; RV64ZICOND:       # %bb.0: # %entry3205; RV64ZICOND-NEXT:    mul a2, a0, a13206; RV64ZICOND-NEXT:    mulw a0, a0, a13207; RV64ZICOND-NEXT:    xor a0, a0, a23208; RV64ZICOND-NEXT:    seqz a0, a03209; RV64ZICOND-NEXT:    ret3210entry:3211  %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)3212  %obit = extractvalue {i32, i1} %t, 13213  %ret = xor i1 %obit, true3214  ret i1 %ret3215}3216 3217define i64 @smulo.select.i64(i64 %v1, i64 %v2) {3218; RV32-LABEL: smulo.select.i64:3219; RV32:       # %bb.0: # %entry3220; RV32-NEXT:    mulhu a4, a0, a23221; RV32-NEXT:    mul a5, a1, a23222; RV32-NEXT:    mulhsu a6, a1, a23223; RV32-NEXT:    mul a7, a3, a03224; RV32-NEXT:    mulhsu t0, a3, a03225; RV32-NEXT:    add a4, a5, a43226; RV32-NEXT:    sltu a5, a4, a53227; RV32-NEXT:    add a4, a7, a43228; RV32-NEXT:    add a5, a6, a53229; RV32-NEXT:    sltu a6, a4, a73230; RV32-NEXT:    add a6, t0, a63231; RV32-NEXT:    srai a7, a5, 313232; RV32-NEXT:    srai t0, a6, 313233; RV32-NEXT:    add a7, a7, t03234; RV32-NEXT:    mulh t0, a1, a33235; RV32-NEXT:    add a6, a5, a63236; RV32-NEXT:    sltu a5, a6, a53237; RV32-NEXT:    add a5, a7, a53238; RV32-NEXT:    mul a7, a1, a33239; RV32-NEXT:    srai a4, a4, 313240; RV32-NEXT:    add a6, a7, a63241; RV32-NEXT:    sltu a7, a6, a73242; RV32-NEXT:    add a5, t0, a53243; RV32-NEXT:    add a5, a5, a73244; RV32-NEXT:    xor a5, a5, a43245; RV32-NEXT:    xor a4, a6, a43246; RV32-NEXT:    or a4, a4, a53247; RV32-NEXT:    bnez a4, .LBB46_23248; RV32-NEXT:  # %bb.1: # %entry3249; RV32-NEXT:    mv a0, a23250; RV32-NEXT:    mv a1, a33251; RV32-NEXT:  .LBB46_2: # %entry3252; RV32-NEXT:    ret3253;3254; RV64-LABEL: smulo.select.i64:3255; RV64:       # %bb.0: # %entry3256; RV64-NEXT:    mulh a2, a0, a13257; RV64-NEXT:    mul a3, a0, a13258; RV64-NEXT:    srai a3, a3, 633259; RV64-NEXT:    bne a2, a3, .LBB46_23260; RV64-NEXT:  # %bb.1: # %entry3261; RV64-NEXT:    mv a0, a13262; RV64-NEXT:  .LBB46_2: # %entry3263; RV64-NEXT:    ret3264;3265; RV32ZBA-LABEL: smulo.select.i64:3266; RV32ZBA:       # %bb.0: # %entry3267; RV32ZBA-NEXT:    mulhu a4, a0, a23268; RV32ZBA-NEXT:    mul a5, a1, a23269; RV32ZBA-NEXT:    mulhsu a6, a1, a23270; RV32ZBA-NEXT:    mul a7, a3, a03271; RV32ZBA-NEXT:    mulhsu t0, a3, a03272; RV32ZBA-NEXT:    add a4, a5, a43273; RV32ZBA-NEXT:    sltu a5, a4, a53274; RV32ZBA-NEXT:    add a4, a7, a43275; RV32ZBA-NEXT:    add a5, a6, a53276; RV32ZBA-NEXT:    sltu a6, a4, a73277; RV32ZBA-NEXT:    add a6, t0, a63278; RV32ZBA-NEXT:    srai a7, a5, 313279; RV32ZBA-NEXT:    srai t0, a6, 313280; RV32ZBA-NEXT:    add a7, a7, t03281; RV32ZBA-NEXT:    mulh t0, a1, a33282; RV32ZBA-NEXT:    add a6, a5, a63283; RV32ZBA-NEXT:    sltu a5, a6, a53284; RV32ZBA-NEXT:    add a5, a7, a53285; RV32ZBA-NEXT:    mul a7, a1, a33286; RV32ZBA-NEXT:    srai a4, a4, 313287; RV32ZBA-NEXT:    add a6, a7, a63288; RV32ZBA-NEXT:    sltu a7, a6, a73289; RV32ZBA-NEXT:    add a5, t0, a53290; RV32ZBA-NEXT:    add a5, a5, a73291; RV32ZBA-NEXT:    xor a5, a5, a43292; RV32ZBA-NEXT:    xor a4, a6, a43293; RV32ZBA-NEXT:    or a4, a4, a53294; RV32ZBA-NEXT:    bnez a4, .LBB46_23295; RV32ZBA-NEXT:  # %bb.1: # %entry3296; RV32ZBA-NEXT:    mv a0, a23297; RV32ZBA-NEXT:    mv a1, a33298; RV32ZBA-NEXT:  .LBB46_2: # %entry3299; RV32ZBA-NEXT:    ret3300;3301; RV64ZBA-LABEL: smulo.select.i64:3302; RV64ZBA:       # %bb.0: # %entry3303; RV64ZBA-NEXT:    mulh a2, a0, a13304; RV64ZBA-NEXT:    mul a3, a0, a13305; RV64ZBA-NEXT:    srai a3, a3, 633306; RV64ZBA-NEXT:    bne a2, a3, .LBB46_23307; RV64ZBA-NEXT:  # %bb.1: # %entry3308; RV64ZBA-NEXT:    mv a0, a13309; RV64ZBA-NEXT:  .LBB46_2: # %entry3310; RV64ZBA-NEXT:    ret3311;3312; RV32ZICOND-LABEL: smulo.select.i64:3313; RV32ZICOND:       # %bb.0: # %entry3314; RV32ZICOND-NEXT:    mulhu a4, a0, a23315; RV32ZICOND-NEXT:    mul a5, a1, a23316; RV32ZICOND-NEXT:    mulhsu a6, a1, a23317; RV32ZICOND-NEXT:    mul a7, a3, a03318; RV32ZICOND-NEXT:    mulhsu t0, a3, a03319; RV32ZICOND-NEXT:    add a4, a5, a43320; RV32ZICOND-NEXT:    sltu a5, a4, a53321; RV32ZICOND-NEXT:    add a4, a7, a43322; RV32ZICOND-NEXT:    add a5, a6, a53323; RV32ZICOND-NEXT:    sltu a6, a4, a73324; RV32ZICOND-NEXT:    add a6, t0, a63325; RV32ZICOND-NEXT:    srai a7, a5, 313326; RV32ZICOND-NEXT:    srai t0, a6, 313327; RV32ZICOND-NEXT:    add a7, a7, t03328; RV32ZICOND-NEXT:    mulh t0, a1, a33329; RV32ZICOND-NEXT:    add a6, a5, a63330; RV32ZICOND-NEXT:    sltu a5, a6, a53331; RV32ZICOND-NEXT:    add a5, a7, a53332; RV32ZICOND-NEXT:    mul a7, a1, a33333; RV32ZICOND-NEXT:    srai a4, a4, 313334; RV32ZICOND-NEXT:    add a6, a7, a63335; RV32ZICOND-NEXT:    sltu a7, a6, a73336; RV32ZICOND-NEXT:    xor a6, a6, a43337; RV32ZICOND-NEXT:    add a5, t0, a53338; RV32ZICOND-NEXT:    add a5, a5, a73339; RV32ZICOND-NEXT:    xor a4, a5, a43340; RV32ZICOND-NEXT:    or a4, a6, a43341; RV32ZICOND-NEXT:    czero.nez a2, a2, a43342; RV32ZICOND-NEXT:    czero.eqz a0, a0, a43343; RV32ZICOND-NEXT:    czero.nez a3, a3, a43344; RV32ZICOND-NEXT:    czero.eqz a1, a1, a43345; RV32ZICOND-NEXT:    or a0, a0, a23346; RV32ZICOND-NEXT:    or a1, a1, a33347; RV32ZICOND-NEXT:    ret3348;3349; RV64ZICOND-LABEL: smulo.select.i64:3350; RV64ZICOND:       # %bb.0: # %entry3351; RV64ZICOND-NEXT:    mulh a2, a0, a13352; RV64ZICOND-NEXT:    mul a3, a0, a13353; RV64ZICOND-NEXT:    srai a3, a3, 633354; RV64ZICOND-NEXT:    xor a2, a2, a33355; RV64ZICOND-NEXT:    czero.nez a1, a1, a23356; RV64ZICOND-NEXT:    czero.eqz a0, a0, a23357; RV64ZICOND-NEXT:    or a0, a0, a13358; RV64ZICOND-NEXT:    ret3359entry:3360  %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)3361  %obit = extractvalue {i64, i1} %t, 13362  %ret = select i1 %obit, i64 %v1, i64 %v23363  ret i64 %ret3364}3365 3366define i1 @smulo.not.i64(i64 %v1, i64 %v2) {3367; RV32-LABEL: smulo.not.i64:3368; RV32:       # %bb.0: # %entry3369; RV32-NEXT:    mulhu a4, a0, a23370; RV32-NEXT:    mul a5, a1, a23371; RV32-NEXT:    mulhsu a2, a1, a23372; RV32-NEXT:    mul a6, a3, a03373; RV32-NEXT:    mulhsu a0, a3, a03374; RV32-NEXT:    mulh a7, a1, a33375; RV32-NEXT:    mul a1, a1, a33376; RV32-NEXT:    add a4, a5, a43377; RV32-NEXT:    sltu a3, a4, a53378; RV32-NEXT:    add a4, a6, a43379; RV32-NEXT:    add a2, a2, a33380; RV32-NEXT:    sltu a3, a4, a63381; RV32-NEXT:    srai a4, a4, 313382; RV32-NEXT:    add a0, a0, a33383; RV32-NEXT:    srai a3, a2, 313384; RV32-NEXT:    add a5, a2, a03385; RV32-NEXT:    srai a0, a0, 313386; RV32-NEXT:    sltu a2, a5, a23387; RV32-NEXT:    add a0, a3, a03388; RV32-NEXT:    add a5, a1, a53389; RV32-NEXT:    add a0, a0, a23390; RV32-NEXT:    sltu a1, a5, a13391; RV32-NEXT:    add a0, a7, a03392; RV32-NEXT:    add a0, a0, a13393; RV32-NEXT:    xor a0, a0, a43394; RV32-NEXT:    xor a4, a5, a43395; RV32-NEXT:    or a0, a4, a03396; RV32-NEXT:    seqz a0, a03397; RV32-NEXT:    ret3398;3399; RV64-LABEL: smulo.not.i64:3400; RV64:       # %bb.0: # %entry3401; RV64-NEXT:    mulh a2, a0, a13402; RV64-NEXT:    mul a0, a0, a13403; RV64-NEXT:    srai a0, a0, 633404; RV64-NEXT:    xor a0, a2, a03405; RV64-NEXT:    seqz a0, a03406; RV64-NEXT:    ret3407;3408; RV32ZBA-LABEL: smulo.not.i64:3409; RV32ZBA:       # %bb.0: # %entry3410; RV32ZBA-NEXT:    mulhu a4, a0, a23411; RV32ZBA-NEXT:    mul a5, a1, a23412; RV32ZBA-NEXT:    mulhsu a2, a1, a23413; RV32ZBA-NEXT:    mul a6, a3, a03414; RV32ZBA-NEXT:    mulhsu a0, a3, a03415; RV32ZBA-NEXT:    mulh a7, a1, a33416; RV32ZBA-NEXT:    mul a1, a1, a33417; RV32ZBA-NEXT:    add a4, a5, a43418; RV32ZBA-NEXT:    sltu a3, a4, a53419; RV32ZBA-NEXT:    add a4, a6, a43420; RV32ZBA-NEXT:    add a2, a2, a33421; RV32ZBA-NEXT:    sltu a3, a4, a63422; RV32ZBA-NEXT:    srai a4, a4, 313423; RV32ZBA-NEXT:    add a0, a0, a33424; RV32ZBA-NEXT:    srai a3, a2, 313425; RV32ZBA-NEXT:    add a5, a2, a03426; RV32ZBA-NEXT:    srai a0, a0, 313427; RV32ZBA-NEXT:    sltu a2, a5, a23428; RV32ZBA-NEXT:    add a0, a3, a03429; RV32ZBA-NEXT:    add a5, a1, a53430; RV32ZBA-NEXT:    add a0, a0, a23431; RV32ZBA-NEXT:    sltu a1, a5, a13432; RV32ZBA-NEXT:    add a0, a7, a03433; RV32ZBA-NEXT:    add a0, a0, a13434; RV32ZBA-NEXT:    xor a0, a0, a43435; RV32ZBA-NEXT:    xor a4, a5, a43436; RV32ZBA-NEXT:    or a0, a4, a03437; RV32ZBA-NEXT:    seqz a0, a03438; RV32ZBA-NEXT:    ret3439;3440; RV64ZBA-LABEL: smulo.not.i64:3441; RV64ZBA:       # %bb.0: # %entry3442; RV64ZBA-NEXT:    mulh a2, a0, a13443; RV64ZBA-NEXT:    mul a0, a0, a13444; RV64ZBA-NEXT:    srai a0, a0, 633445; RV64ZBA-NEXT:    xor a0, a2, a03446; RV64ZBA-NEXT:    seqz a0, a03447; RV64ZBA-NEXT:    ret3448;3449; RV32ZICOND-LABEL: smulo.not.i64:3450; RV32ZICOND:       # %bb.0: # %entry3451; RV32ZICOND-NEXT:    mulhu a4, a0, a23452; RV32ZICOND-NEXT:    mul a5, a1, a23453; RV32ZICOND-NEXT:    mulhsu a2, a1, a23454; RV32ZICOND-NEXT:    mul a6, a3, a03455; RV32ZICOND-NEXT:    mulhsu a0, a3, a03456; RV32ZICOND-NEXT:    mulh a7, a1, a33457; RV32ZICOND-NEXT:    mul a1, a1, a33458; RV32ZICOND-NEXT:    add a4, a5, a43459; RV32ZICOND-NEXT:    sltu a3, a4, a53460; RV32ZICOND-NEXT:    add a4, a6, a43461; RV32ZICOND-NEXT:    add a2, a2, a33462; RV32ZICOND-NEXT:    sltu a3, a4, a63463; RV32ZICOND-NEXT:    srai a4, a4, 313464; RV32ZICOND-NEXT:    add a0, a0, a33465; RV32ZICOND-NEXT:    srai a3, a2, 313466; RV32ZICOND-NEXT:    add a5, a2, a03467; RV32ZICOND-NEXT:    srai a0, a0, 313468; RV32ZICOND-NEXT:    sltu a2, a5, a23469; RV32ZICOND-NEXT:    add a0, a3, a03470; RV32ZICOND-NEXT:    add a5, a1, a53471; RV32ZICOND-NEXT:    add a0, a0, a23472; RV32ZICOND-NEXT:    sltu a1, a5, a13473; RV32ZICOND-NEXT:    add a0, a7, a03474; RV32ZICOND-NEXT:    add a0, a0, a13475; RV32ZICOND-NEXT:    xor a0, a0, a43476; RV32ZICOND-NEXT:    xor a4, a5, a43477; RV32ZICOND-NEXT:    or a0, a4, a03478; RV32ZICOND-NEXT:    seqz a0, a03479; RV32ZICOND-NEXT:    ret3480;3481; RV64ZICOND-LABEL: smulo.not.i64:3482; RV64ZICOND:       # %bb.0: # %entry3483; RV64ZICOND-NEXT:    mulh a2, a0, a13484; RV64ZICOND-NEXT:    mul a0, a0, a13485; RV64ZICOND-NEXT:    srai a0, a0, 633486; RV64ZICOND-NEXT:    xor a0, a2, a03487; RV64ZICOND-NEXT:    seqz a0, a03488; RV64ZICOND-NEXT:    ret3489entry:3490  %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)3491  %obit = extractvalue {i64, i1} %t, 13492  %ret = xor i1 %obit, true3493  ret i1 %ret3494}3495 3496define i32 @umulo.select.i32(i32 signext %v1, i32 signext %v2) {3497; RV32-LABEL: umulo.select.i32:3498; RV32:       # %bb.0: # %entry3499; RV32-NEXT:    mulhu a2, a0, a13500; RV32-NEXT:    bnez a2, .LBB48_23501; RV32-NEXT:  # %bb.1: # %entry3502; RV32-NEXT:    mv a0, a13503; RV32-NEXT:  .LBB48_2: # %entry3504; RV32-NEXT:    ret3505;3506; RV64-LABEL: umulo.select.i32:3507; RV64:       # %bb.0: # %entry3508; RV64-NEXT:    slli a2, a1, 323509; RV64-NEXT:    slli a3, a0, 323510; RV64-NEXT:    mulhu a2, a3, a23511; RV64-NEXT:    srli a2, a2, 323512; RV64-NEXT:    bnez a2, .LBB48_23513; RV64-NEXT:  # %bb.1: # %entry3514; RV64-NEXT:    mv a0, a13515; RV64-NEXT:  .LBB48_2: # %entry3516; RV64-NEXT:    ret3517;3518; RV32ZBA-LABEL: umulo.select.i32:3519; RV32ZBA:       # %bb.0: # %entry3520; RV32ZBA-NEXT:    mulhu a2, a0, a13521; RV32ZBA-NEXT:    bnez a2, .LBB48_23522; RV32ZBA-NEXT:  # %bb.1: # %entry3523; RV32ZBA-NEXT:    mv a0, a13524; RV32ZBA-NEXT:  .LBB48_2: # %entry3525; RV32ZBA-NEXT:    ret3526;3527; RV64ZBA-LABEL: umulo.select.i32:3528; RV64ZBA:       # %bb.0: # %entry3529; RV64ZBA-NEXT:    zext.w a2, a13530; RV64ZBA-NEXT:    zext.w a3, a03531; RV64ZBA-NEXT:    mul a2, a3, a23532; RV64ZBA-NEXT:    srli a2, a2, 323533; RV64ZBA-NEXT:    bnez a2, .LBB48_23534; RV64ZBA-NEXT:  # %bb.1: # %entry3535; RV64ZBA-NEXT:    mv a0, a13536; RV64ZBA-NEXT:  .LBB48_2: # %entry3537; RV64ZBA-NEXT:    ret3538;3539; RV32ZICOND-LABEL: umulo.select.i32:3540; RV32ZICOND:       # %bb.0: # %entry3541; RV32ZICOND-NEXT:    mulhu a2, a0, a13542; RV32ZICOND-NEXT:    czero.nez a1, a1, a23543; RV32ZICOND-NEXT:    czero.eqz a0, a0, a23544; RV32ZICOND-NEXT:    or a0, a0, a13545; RV32ZICOND-NEXT:    ret3546;3547; RV64ZICOND-LABEL: umulo.select.i32:3548; RV64ZICOND:       # %bb.0: # %entry3549; RV64ZICOND-NEXT:    slli a2, a1, 323550; RV64ZICOND-NEXT:    slli a3, a0, 323551; RV64ZICOND-NEXT:    mulhu a2, a3, a23552; RV64ZICOND-NEXT:    srli a2, a2, 323553; RV64ZICOND-NEXT:    czero.nez a1, a1, a23554; RV64ZICOND-NEXT:    czero.eqz a0, a0, a23555; RV64ZICOND-NEXT:    or a0, a0, a13556; RV64ZICOND-NEXT:    ret3557entry:3558  %t = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %v1, i32 %v2)3559  %obit = extractvalue {i32, i1} %t, 13560  %ret = select i1 %obit, i32 %v1, i32 %v23561  ret i32 %ret3562}3563 3564define i1 @umulo.not.i32(i32 signext %v1, i32 signext %v2) {3565; RV32-LABEL: umulo.not.i32:3566; RV32:       # %bb.0: # %entry3567; RV32-NEXT:    mulhu a0, a0, a13568; RV32-NEXT:    seqz a0, a03569; RV32-NEXT:    ret3570;3571; RV64-LABEL: umulo.not.i32:3572; RV64:       # %bb.0: # %entry3573; RV64-NEXT:    slli a1, a1, 323574; RV64-NEXT:    slli a0, a0, 323575; RV64-NEXT:    mulhu a0, a0, a13576; RV64-NEXT:    srli a0, a0, 323577; RV64-NEXT:    seqz a0, a03578; RV64-NEXT:    ret3579;3580; RV32ZBA-LABEL: umulo.not.i32:3581; RV32ZBA:       # %bb.0: # %entry3582; RV32ZBA-NEXT:    mulhu a0, a0, a13583; RV32ZBA-NEXT:    seqz a0, a03584; RV32ZBA-NEXT:    ret3585;3586; RV64ZBA-LABEL: umulo.not.i32:3587; RV64ZBA:       # %bb.0: # %entry3588; RV64ZBA-NEXT:    zext.w a1, a13589; RV64ZBA-NEXT:    zext.w a0, a03590; RV64ZBA-NEXT:    mul a0, a0, a13591; RV64ZBA-NEXT:    srli a0, a0, 323592; RV64ZBA-NEXT:    seqz a0, a03593; RV64ZBA-NEXT:    ret3594;3595; RV32ZICOND-LABEL: umulo.not.i32:3596; RV32ZICOND:       # %bb.0: # %entry3597; RV32ZICOND-NEXT:    mulhu a0, a0, a13598; RV32ZICOND-NEXT:    seqz a0, a03599; RV32ZICOND-NEXT:    ret3600;3601; RV64ZICOND-LABEL: umulo.not.i32:3602; RV64ZICOND:       # %bb.0: # %entry3603; RV64ZICOND-NEXT:    slli a1, a1, 323604; RV64ZICOND-NEXT:    slli a0, a0, 323605; RV64ZICOND-NEXT:    mulhu a0, a0, a13606; RV64ZICOND-NEXT:    srli a0, a0, 323607; RV64ZICOND-NEXT:    seqz a0, a03608; RV64ZICOND-NEXT:    ret3609entry:3610  %t = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %v1, i32 %v2)3611  %obit = extractvalue {i32, i1} %t, 13612  %ret = xor i1 %obit, true3613  ret i1 %ret3614}3615 3616define i64 @umulo.select.i64(i64 %v1, i64 %v2) {3617; RV32-LABEL: umulo.select.i64:3618; RV32:       # %bb.0: # %entry3619; RV32-NEXT:    mul a4, a3, a03620; RV32-NEXT:    mul a5, a1, a23621; RV32-NEXT:    snez a6, a33622; RV32-NEXT:    add a4, a5, a43623; RV32-NEXT:    snez a5, a13624; RV32-NEXT:    and a5, a5, a63625; RV32-NEXT:    mulhu a6, a1, a23626; RV32-NEXT:    snez a6, a63627; RV32-NEXT:    or a5, a5, a63628; RV32-NEXT:    mulhu a6, a0, a23629; RV32-NEXT:    add a4, a6, a43630; RV32-NEXT:    sltu a4, a4, a63631; RV32-NEXT:    mulhu a6, a3, a03632; RV32-NEXT:    snez a6, a63633; RV32-NEXT:    or a5, a5, a63634; RV32-NEXT:    or a4, a5, a43635; RV32-NEXT:    bnez a4, .LBB50_23636; RV32-NEXT:  # %bb.1: # %entry3637; RV32-NEXT:    mv a0, a23638; RV32-NEXT:    mv a1, a33639; RV32-NEXT:  .LBB50_2: # %entry3640; RV32-NEXT:    ret3641;3642; RV64-LABEL: umulo.select.i64:3643; RV64:       # %bb.0: # %entry3644; RV64-NEXT:    mulhu a2, a0, a13645; RV64-NEXT:    bnez a2, .LBB50_23646; RV64-NEXT:  # %bb.1: # %entry3647; RV64-NEXT:    mv a0, a13648; RV64-NEXT:  .LBB50_2: # %entry3649; RV64-NEXT:    ret3650;3651; RV32ZBA-LABEL: umulo.select.i64:3652; RV32ZBA:       # %bb.0: # %entry3653; RV32ZBA-NEXT:    mul a4, a3, a03654; RV32ZBA-NEXT:    mul a5, a1, a23655; RV32ZBA-NEXT:    snez a6, a33656; RV32ZBA-NEXT:    add a4, a5, a43657; RV32ZBA-NEXT:    snez a5, a13658; RV32ZBA-NEXT:    and a5, a5, a63659; RV32ZBA-NEXT:    mulhu a6, a1, a23660; RV32ZBA-NEXT:    snez a6, a63661; RV32ZBA-NEXT:    or a5, a5, a63662; RV32ZBA-NEXT:    mulhu a6, a0, a23663; RV32ZBA-NEXT:    add a4, a6, a43664; RV32ZBA-NEXT:    sltu a4, a4, a63665; RV32ZBA-NEXT:    mulhu a6, a3, a03666; RV32ZBA-NEXT:    snez a6, a63667; RV32ZBA-NEXT:    or a5, a5, a63668; RV32ZBA-NEXT:    or a4, a5, a43669; RV32ZBA-NEXT:    bnez a4, .LBB50_23670; RV32ZBA-NEXT:  # %bb.1: # %entry3671; RV32ZBA-NEXT:    mv a0, a23672; RV32ZBA-NEXT:    mv a1, a33673; RV32ZBA-NEXT:  .LBB50_2: # %entry3674; RV32ZBA-NEXT:    ret3675;3676; RV64ZBA-LABEL: umulo.select.i64:3677; RV64ZBA:       # %bb.0: # %entry3678; RV64ZBA-NEXT:    mulhu a2, a0, a13679; RV64ZBA-NEXT:    bnez a2, .LBB50_23680; RV64ZBA-NEXT:  # %bb.1: # %entry3681; RV64ZBA-NEXT:    mv a0, a13682; RV64ZBA-NEXT:  .LBB50_2: # %entry3683; RV64ZBA-NEXT:    ret3684;3685; RV32ZICOND-LABEL: umulo.select.i64:3686; RV32ZICOND:       # %bb.0: # %entry3687; RV32ZICOND-NEXT:    mul a4, a3, a03688; RV32ZICOND-NEXT:    mul a5, a1, a23689; RV32ZICOND-NEXT:    snez a6, a33690; RV32ZICOND-NEXT:    add a4, a5, a43691; RV32ZICOND-NEXT:    mulhu a5, a1, a23692; RV32ZICOND-NEXT:    czero.eqz a6, a6, a13693; RV32ZICOND-NEXT:    snez a5, a53694; RV32ZICOND-NEXT:    or a5, a6, a53695; RV32ZICOND-NEXT:    mulhu a6, a0, a23696; RV32ZICOND-NEXT:    add a4, a6, a43697; RV32ZICOND-NEXT:    sltu a4, a4, a63698; RV32ZICOND-NEXT:    mulhu a6, a3, a03699; RV32ZICOND-NEXT:    snez a6, a63700; RV32ZICOND-NEXT:    or a5, a5, a63701; RV32ZICOND-NEXT:    or a4, a5, a43702; RV32ZICOND-NEXT:    czero.nez a2, a2, a43703; RV32ZICOND-NEXT:    czero.eqz a0, a0, a43704; RV32ZICOND-NEXT:    czero.nez a3, a3, a43705; RV32ZICOND-NEXT:    czero.eqz a1, a1, a43706; RV32ZICOND-NEXT:    or a0, a0, a23707; RV32ZICOND-NEXT:    or a1, a1, a33708; RV32ZICOND-NEXT:    ret3709;3710; RV64ZICOND-LABEL: umulo.select.i64:3711; RV64ZICOND:       # %bb.0: # %entry3712; RV64ZICOND-NEXT:    mulhu a2, a0, a13713; RV64ZICOND-NEXT:    czero.nez a1, a1, a23714; RV64ZICOND-NEXT:    czero.eqz a0, a0, a23715; RV64ZICOND-NEXT:    or a0, a0, a13716; RV64ZICOND-NEXT:    ret3717entry:3718  %t = call {i64, i1} @llvm.umul.with.overflow.i64(i64 %v1, i64 %v2)3719  %obit = extractvalue {i64, i1} %t, 13720  %ret = select i1 %obit, i64 %v1, i64 %v23721  ret i64 %ret3722}3723 3724define i1 @umulo.not.i64(i64 %v1, i64 %v2) {3725; RV32-LABEL: umulo.not.i64:3726; RV32:       # %bb.0: # %entry3727; RV32-NEXT:    mul a4, a3, a03728; RV32-NEXT:    mul a5, a1, a23729; RV32-NEXT:    mulhu a6, a0, a23730; RV32-NEXT:    mulhu a0, a3, a03731; RV32-NEXT:    snez a3, a33732; RV32-NEXT:    mulhu a2, a1, a23733; RV32-NEXT:    snez a1, a13734; RV32-NEXT:    add a4, a5, a43735; RV32-NEXT:    and a1, a1, a33736; RV32-NEXT:    snez a2, a23737; RV32-NEXT:    snez a0, a03738; RV32-NEXT:    add a4, a6, a43739; RV32-NEXT:    or a1, a1, a23740; RV32-NEXT:    sltu a2, a4, a63741; RV32-NEXT:    or a0, a1, a03742; RV32-NEXT:    or a0, a0, a23743; RV32-NEXT:    xori a0, a0, 13744; RV32-NEXT:    ret3745;3746; RV64-LABEL: umulo.not.i64:3747; RV64:       # %bb.0: # %entry3748; RV64-NEXT:    mulhu a0, a0, a13749; RV64-NEXT:    seqz a0, a03750; RV64-NEXT:    ret3751;3752; RV32ZBA-LABEL: umulo.not.i64:3753; RV32ZBA:       # %bb.0: # %entry3754; RV32ZBA-NEXT:    mul a4, a3, a03755; RV32ZBA-NEXT:    mul a5, a1, a23756; RV32ZBA-NEXT:    mulhu a6, a0, a23757; RV32ZBA-NEXT:    mulhu a0, a3, a03758; RV32ZBA-NEXT:    snez a3, a33759; RV32ZBA-NEXT:    mulhu a2, a1, a23760; RV32ZBA-NEXT:    snez a1, a13761; RV32ZBA-NEXT:    add a4, a5, a43762; RV32ZBA-NEXT:    and a1, a1, a33763; RV32ZBA-NEXT:    snez a2, a23764; RV32ZBA-NEXT:    snez a0, a03765; RV32ZBA-NEXT:    add a4, a6, a43766; RV32ZBA-NEXT:    or a1, a1, a23767; RV32ZBA-NEXT:    sltu a2, a4, a63768; RV32ZBA-NEXT:    or a0, a1, a03769; RV32ZBA-NEXT:    or a0, a0, a23770; RV32ZBA-NEXT:    xori a0, a0, 13771; RV32ZBA-NEXT:    ret3772;3773; RV64ZBA-LABEL: umulo.not.i64:3774; RV64ZBA:       # %bb.0: # %entry3775; RV64ZBA-NEXT:    mulhu a0, a0, a13776; RV64ZBA-NEXT:    seqz a0, a03777; RV64ZBA-NEXT:    ret3778;3779; RV32ZICOND-LABEL: umulo.not.i64:3780; RV32ZICOND:       # %bb.0: # %entry3781; RV32ZICOND-NEXT:    mul a4, a3, a03782; RV32ZICOND-NEXT:    mul a5, a1, a23783; RV32ZICOND-NEXT:    add a4, a5, a43784; RV32ZICOND-NEXT:    mulhu a5, a0, a23785; RV32ZICOND-NEXT:    mulhu a0, a3, a03786; RV32ZICOND-NEXT:    snez a3, a33787; RV32ZICOND-NEXT:    mulhu a2, a1, a23788; RV32ZICOND-NEXT:    czero.eqz a1, a3, a13789; RV32ZICOND-NEXT:    snez a2, a23790; RV32ZICOND-NEXT:    snez a0, a03791; RV32ZICOND-NEXT:    add a4, a5, a43792; RV32ZICOND-NEXT:    or a1, a1, a23793; RV32ZICOND-NEXT:    sltu a2, a4, a53794; RV32ZICOND-NEXT:    or a0, a1, a03795; RV32ZICOND-NEXT:    or a0, a0, a23796; RV32ZICOND-NEXT:    xori a0, a0, 13797; RV32ZICOND-NEXT:    ret3798;3799; RV64ZICOND-LABEL: umulo.not.i64:3800; RV64ZICOND:       # %bb.0: # %entry3801; RV64ZICOND-NEXT:    mulhu a0, a0, a13802; RV64ZICOND-NEXT:    seqz a0, a03803; RV64ZICOND-NEXT:    ret3804entry:3805  %t = call {i64, i1} @llvm.umul.with.overflow.i64(i64 %v1, i64 %v2)3806  %obit = extractvalue {i64, i1} %t, 13807  %ret = xor i1 %obit, true3808  ret i1 %ret3809}3810 3811;3812; Check the use of the overflow bit in combination with a branch instruction.3813;3814define zeroext i1 @saddo.br.i32(i32 signext %v1, i32 signext %v2) {3815; RV32-LABEL: saddo.br.i32:3816; RV32:       # %bb.0: # %entry3817; RV32-NEXT:    add a2, a0, a13818; RV32-NEXT:    slt a0, a2, a03819; RV32-NEXT:    srli a1, a1, 313820; RV32-NEXT:    beq a1, a0, .LBB52_23821; RV32-NEXT:  # %bb.1: # %overflow3822; RV32-NEXT:    li a0, 03823; RV32-NEXT:    ret3824; RV32-NEXT:  .LBB52_2: # %continue3825; RV32-NEXT:    li a0, 13826; RV32-NEXT:    ret3827;3828; RV64-LABEL: saddo.br.i32:3829; RV64:       # %bb.0: # %entry3830; RV64-NEXT:    add a2, a0, a13831; RV64-NEXT:    addw a0, a0, a13832; RV64-NEXT:    beq a0, a2, .LBB52_23833; RV64-NEXT:  # %bb.1: # %overflow3834; RV64-NEXT:    li a0, 03835; RV64-NEXT:    ret3836; RV64-NEXT:  .LBB52_2: # %continue3837; RV64-NEXT:    li a0, 13838; RV64-NEXT:    ret3839;3840; RV32ZBA-LABEL: saddo.br.i32:3841; RV32ZBA:       # %bb.0: # %entry3842; RV32ZBA-NEXT:    add a2, a0, a13843; RV32ZBA-NEXT:    slt a0, a2, a03844; RV32ZBA-NEXT:    srli a1, a1, 313845; RV32ZBA-NEXT:    beq a1, a0, .LBB52_23846; RV32ZBA-NEXT:  # %bb.1: # %overflow3847; RV32ZBA-NEXT:    li a0, 03848; RV32ZBA-NEXT:    ret3849; RV32ZBA-NEXT:  .LBB52_2: # %continue3850; RV32ZBA-NEXT:    li a0, 13851; RV32ZBA-NEXT:    ret3852;3853; RV64ZBA-LABEL: saddo.br.i32:3854; RV64ZBA:       # %bb.0: # %entry3855; RV64ZBA-NEXT:    add a2, a0, a13856; RV64ZBA-NEXT:    addw a0, a0, a13857; RV64ZBA-NEXT:    beq a0, a2, .LBB52_23858; RV64ZBA-NEXT:  # %bb.1: # %overflow3859; RV64ZBA-NEXT:    li a0, 03860; RV64ZBA-NEXT:    ret3861; RV64ZBA-NEXT:  .LBB52_2: # %continue3862; RV64ZBA-NEXT:    li a0, 13863; RV64ZBA-NEXT:    ret3864;3865; RV32ZICOND-LABEL: saddo.br.i32:3866; RV32ZICOND:       # %bb.0: # %entry3867; RV32ZICOND-NEXT:    add a2, a0, a13868; RV32ZICOND-NEXT:    slt a0, a2, a03869; RV32ZICOND-NEXT:    srli a1, a1, 313870; RV32ZICOND-NEXT:    beq a1, a0, .LBB52_23871; RV32ZICOND-NEXT:  # %bb.1: # %overflow3872; RV32ZICOND-NEXT:    li a0, 03873; RV32ZICOND-NEXT:    ret3874; RV32ZICOND-NEXT:  .LBB52_2: # %continue3875; RV32ZICOND-NEXT:    li a0, 13876; RV32ZICOND-NEXT:    ret3877;3878; RV64ZICOND-LABEL: saddo.br.i32:3879; RV64ZICOND:       # %bb.0: # %entry3880; RV64ZICOND-NEXT:    add a2, a0, a13881; RV64ZICOND-NEXT:    addw a0, a0, a13882; RV64ZICOND-NEXT:    beq a0, a2, .LBB52_23883; RV64ZICOND-NEXT:  # %bb.1: # %overflow3884; RV64ZICOND-NEXT:    li a0, 03885; RV64ZICOND-NEXT:    ret3886; RV64ZICOND-NEXT:  .LBB52_2: # %continue3887; RV64ZICOND-NEXT:    li a0, 13888; RV64ZICOND-NEXT:    ret3889entry:3890  %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)3891  %val = extractvalue {i32, i1} %t, 03892  %obit = extractvalue {i32, i1} %t, 13893  br i1 %obit, label %overflow, label %continue3894 3895overflow:3896  ret i1 false3897 3898continue:3899  ret i1 true3900}3901 3902define zeroext i1 @saddo.br.i64(i64 %v1, i64 %v2) {3903; RV32-LABEL: saddo.br.i64:3904; RV32:       # %bb.0: # %entry3905; RV32-NEXT:    add a4, a1, a33906; RV32-NEXT:    add a2, a0, a23907; RV32-NEXT:    xor a3, a1, a33908; RV32-NEXT:    sltu a0, a2, a03909; RV32-NEXT:    add a0, a4, a03910; RV32-NEXT:    xor a0, a1, a03911; RV32-NEXT:    not a1, a33912; RV32-NEXT:    and a0, a1, a03913; RV32-NEXT:    bgez a0, .LBB53_23914; RV32-NEXT:  # %bb.1: # %overflow3915; RV32-NEXT:    li a0, 03916; RV32-NEXT:    ret3917; RV32-NEXT:  .LBB53_2: # %continue3918; RV32-NEXT:    li a0, 13919; RV32-NEXT:    ret3920;3921; RV64-LABEL: saddo.br.i64:3922; RV64:       # %bb.0: # %entry3923; RV64-NEXT:    add a2, a0, a13924; RV64-NEXT:    slt a0, a2, a03925; RV64-NEXT:    srli a1, a1, 633926; RV64-NEXT:    beq a1, a0, .LBB53_23927; RV64-NEXT:  # %bb.1: # %overflow3928; RV64-NEXT:    li a0, 03929; RV64-NEXT:    ret3930; RV64-NEXT:  .LBB53_2: # %continue3931; RV64-NEXT:    li a0, 13932; RV64-NEXT:    ret3933;3934; RV32ZBA-LABEL: saddo.br.i64:3935; RV32ZBA:       # %bb.0: # %entry3936; RV32ZBA-NEXT:    add a4, a1, a33937; RV32ZBA-NEXT:    add a2, a0, a23938; RV32ZBA-NEXT:    xor a3, a1, a33939; RV32ZBA-NEXT:    sltu a0, a2, a03940; RV32ZBA-NEXT:    add a0, a4, a03941; RV32ZBA-NEXT:    xor a0, a1, a03942; RV32ZBA-NEXT:    not a1, a33943; RV32ZBA-NEXT:    and a0, a1, a03944; RV32ZBA-NEXT:    bgez a0, .LBB53_23945; RV32ZBA-NEXT:  # %bb.1: # %overflow3946; RV32ZBA-NEXT:    li a0, 03947; RV32ZBA-NEXT:    ret3948; RV32ZBA-NEXT:  .LBB53_2: # %continue3949; RV32ZBA-NEXT:    li a0, 13950; RV32ZBA-NEXT:    ret3951;3952; RV64ZBA-LABEL: saddo.br.i64:3953; RV64ZBA:       # %bb.0: # %entry3954; RV64ZBA-NEXT:    add a2, a0, a13955; RV64ZBA-NEXT:    slt a0, a2, a03956; RV64ZBA-NEXT:    srli a1, a1, 633957; RV64ZBA-NEXT:    beq a1, a0, .LBB53_23958; RV64ZBA-NEXT:  # %bb.1: # %overflow3959; RV64ZBA-NEXT:    li a0, 03960; RV64ZBA-NEXT:    ret3961; RV64ZBA-NEXT:  .LBB53_2: # %continue3962; RV64ZBA-NEXT:    li a0, 13963; RV64ZBA-NEXT:    ret3964;3965; RV32ZICOND-LABEL: saddo.br.i64:3966; RV32ZICOND:       # %bb.0: # %entry3967; RV32ZICOND-NEXT:    add a4, a1, a33968; RV32ZICOND-NEXT:    add a2, a0, a23969; RV32ZICOND-NEXT:    xor a3, a1, a33970; RV32ZICOND-NEXT:    sltu a0, a2, a03971; RV32ZICOND-NEXT:    add a0, a4, a03972; RV32ZICOND-NEXT:    xor a0, a1, a03973; RV32ZICOND-NEXT:    not a1, a33974; RV32ZICOND-NEXT:    and a0, a1, a03975; RV32ZICOND-NEXT:    bgez a0, .LBB53_23976; RV32ZICOND-NEXT:  # %bb.1: # %overflow3977; RV32ZICOND-NEXT:    li a0, 03978; RV32ZICOND-NEXT:    ret3979; RV32ZICOND-NEXT:  .LBB53_2: # %continue3980; RV32ZICOND-NEXT:    li a0, 13981; RV32ZICOND-NEXT:    ret3982;3983; RV64ZICOND-LABEL: saddo.br.i64:3984; RV64ZICOND:       # %bb.0: # %entry3985; RV64ZICOND-NEXT:    add a2, a0, a13986; RV64ZICOND-NEXT:    slt a0, a2, a03987; RV64ZICOND-NEXT:    srli a1, a1, 633988; RV64ZICOND-NEXT:    beq a1, a0, .LBB53_23989; RV64ZICOND-NEXT:  # %bb.1: # %overflow3990; RV64ZICOND-NEXT:    li a0, 03991; RV64ZICOND-NEXT:    ret3992; RV64ZICOND-NEXT:  .LBB53_2: # %continue3993; RV64ZICOND-NEXT:    li a0, 13994; RV64ZICOND-NEXT:    ret3995entry:3996  %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %v1, i64 %v2)3997  %val = extractvalue {i64, i1} %t, 03998  %obit = extractvalue {i64, i1} %t, 13999  br i1 %obit, label %overflow, label %continue4000 4001overflow:4002  ret i1 false4003 4004continue:4005  ret i1 true4006}4007 4008define zeroext i1 @uaddo.br.i32(i32 %v1, i32 %v2) {4009; RV32-LABEL: uaddo.br.i32:4010; RV32:       # %bb.0: # %entry4011; RV32-NEXT:    add a1, a0, a14012; RV32-NEXT:    bgeu a1, a0, .LBB54_24013; RV32-NEXT:  # %bb.1: # %overflow4014; RV32-NEXT:    li a0, 04015; RV32-NEXT:    ret4016; RV32-NEXT:  .LBB54_2: # %continue4017; RV32-NEXT:    li a0, 14018; RV32-NEXT:    ret4019;4020; RV64-LABEL: uaddo.br.i32:4021; RV64:       # %bb.0: # %entry4022; RV64-NEXT:    addw a1, a0, a14023; RV64-NEXT:    sext.w a0, a04024; RV64-NEXT:    bgeu a1, a0, .LBB54_24025; RV64-NEXT:  # %bb.1: # %overflow4026; RV64-NEXT:    li a0, 04027; RV64-NEXT:    ret4028; RV64-NEXT:  .LBB54_2: # %continue4029; RV64-NEXT:    li a0, 14030; RV64-NEXT:    ret4031;4032; RV32ZBA-LABEL: uaddo.br.i32:4033; RV32ZBA:       # %bb.0: # %entry4034; RV32ZBA-NEXT:    add a1, a0, a14035; RV32ZBA-NEXT:    bgeu a1, a0, .LBB54_24036; RV32ZBA-NEXT:  # %bb.1: # %overflow4037; RV32ZBA-NEXT:    li a0, 04038; RV32ZBA-NEXT:    ret4039; RV32ZBA-NEXT:  .LBB54_2: # %continue4040; RV32ZBA-NEXT:    li a0, 14041; RV32ZBA-NEXT:    ret4042;4043; RV64ZBA-LABEL: uaddo.br.i32:4044; RV64ZBA:       # %bb.0: # %entry4045; RV64ZBA-NEXT:    addw a1, a0, a14046; RV64ZBA-NEXT:    sext.w a0, a04047; RV64ZBA-NEXT:    bgeu a1, a0, .LBB54_24048; RV64ZBA-NEXT:  # %bb.1: # %overflow4049; RV64ZBA-NEXT:    li a0, 04050; RV64ZBA-NEXT:    ret4051; RV64ZBA-NEXT:  .LBB54_2: # %continue4052; RV64ZBA-NEXT:    li a0, 14053; RV64ZBA-NEXT:    ret4054;4055; RV32ZICOND-LABEL: uaddo.br.i32:4056; RV32ZICOND:       # %bb.0: # %entry4057; RV32ZICOND-NEXT:    add a1, a0, a14058; RV32ZICOND-NEXT:    bgeu a1, a0, .LBB54_24059; RV32ZICOND-NEXT:  # %bb.1: # %overflow4060; RV32ZICOND-NEXT:    li a0, 04061; RV32ZICOND-NEXT:    ret4062; RV32ZICOND-NEXT:  .LBB54_2: # %continue4063; RV32ZICOND-NEXT:    li a0, 14064; RV32ZICOND-NEXT:    ret4065;4066; RV64ZICOND-LABEL: uaddo.br.i32:4067; RV64ZICOND:       # %bb.0: # %entry4068; RV64ZICOND-NEXT:    addw a1, a0, a14069; RV64ZICOND-NEXT:    sext.w a0, a04070; RV64ZICOND-NEXT:    bgeu a1, a0, .LBB54_24071; RV64ZICOND-NEXT:  # %bb.1: # %overflow4072; RV64ZICOND-NEXT:    li a0, 04073; RV64ZICOND-NEXT:    ret4074; RV64ZICOND-NEXT:  .LBB54_2: # %continue4075; RV64ZICOND-NEXT:    li a0, 14076; RV64ZICOND-NEXT:    ret4077entry:4078  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)4079  %val = extractvalue {i32, i1} %t, 04080  %obit = extractvalue {i32, i1} %t, 14081  br i1 %obit, label %overflow, label %continue4082 4083overflow:4084  ret i1 false4085 4086continue:4087  ret i1 true4088}4089 4090define zeroext i1 @uaddo.br.i64(i64 %v1, i64 %v2) {4091; RV32-LABEL: uaddo.br.i64:4092; RV32:       # %bb.0: # %entry4093; RV32-NEXT:    add a3, a1, a34094; RV32-NEXT:    add a2, a0, a24095; RV32-NEXT:    sltu a0, a2, a04096; RV32-NEXT:    add a2, a3, a04097; RV32-NEXT:    beq a2, a1, .LBB55_24098; RV32-NEXT:  # %bb.1: # %entry4099; RV32-NEXT:    sltu a0, a2, a14100; RV32-NEXT:  .LBB55_2: # %entry4101; RV32-NEXT:    beqz a0, .LBB55_44102; RV32-NEXT:  # %bb.3: # %overflow4103; RV32-NEXT:    li a0, 04104; RV32-NEXT:    ret4105; RV32-NEXT:  .LBB55_4: # %continue4106; RV32-NEXT:    li a0, 14107; RV32-NEXT:    ret4108;4109; RV64-LABEL: uaddo.br.i64:4110; RV64:       # %bb.0: # %entry4111; RV64-NEXT:    add a1, a0, a14112; RV64-NEXT:    bgeu a1, a0, .LBB55_24113; RV64-NEXT:  # %bb.1: # %overflow4114; RV64-NEXT:    li a0, 04115; RV64-NEXT:    ret4116; RV64-NEXT:  .LBB55_2: # %continue4117; RV64-NEXT:    li a0, 14118; RV64-NEXT:    ret4119;4120; RV32ZBA-LABEL: uaddo.br.i64:4121; RV32ZBA:       # %bb.0: # %entry4122; RV32ZBA-NEXT:    add a3, a1, a34123; RV32ZBA-NEXT:    add a2, a0, a24124; RV32ZBA-NEXT:    sltu a0, a2, a04125; RV32ZBA-NEXT:    add a2, a3, a04126; RV32ZBA-NEXT:    beq a2, a1, .LBB55_24127; RV32ZBA-NEXT:  # %bb.1: # %entry4128; RV32ZBA-NEXT:    sltu a0, a2, a14129; RV32ZBA-NEXT:  .LBB55_2: # %entry4130; RV32ZBA-NEXT:    beqz a0, .LBB55_44131; RV32ZBA-NEXT:  # %bb.3: # %overflow4132; RV32ZBA-NEXT:    li a0, 04133; RV32ZBA-NEXT:    ret4134; RV32ZBA-NEXT:  .LBB55_4: # %continue4135; RV32ZBA-NEXT:    li a0, 14136; RV32ZBA-NEXT:    ret4137;4138; RV64ZBA-LABEL: uaddo.br.i64:4139; RV64ZBA:       # %bb.0: # %entry4140; RV64ZBA-NEXT:    add a1, a0, a14141; RV64ZBA-NEXT:    bgeu a1, a0, .LBB55_24142; RV64ZBA-NEXT:  # %bb.1: # %overflow4143; RV64ZBA-NEXT:    li a0, 04144; RV64ZBA-NEXT:    ret4145; RV64ZBA-NEXT:  .LBB55_2: # %continue4146; RV64ZBA-NEXT:    li a0, 14147; RV64ZBA-NEXT:    ret4148;4149; RV32ZICOND-LABEL: uaddo.br.i64:4150; RV32ZICOND:       # %bb.0: # %entry4151; RV32ZICOND-NEXT:    add a3, a1, a34152; RV32ZICOND-NEXT:    add a2, a0, a24153; RV32ZICOND-NEXT:    sltu a0, a2, a04154; RV32ZICOND-NEXT:    add a3, a3, a04155; RV32ZICOND-NEXT:    xor a2, a3, a14156; RV32ZICOND-NEXT:    sltu a1, a3, a14157; RV32ZICOND-NEXT:    czero.eqz a1, a1, a24158; RV32ZICOND-NEXT:    czero.nez a0, a0, a24159; RV32ZICOND-NEXT:    or a0, a0, a14160; RV32ZICOND-NEXT:    beqz a0, .LBB55_24161; RV32ZICOND-NEXT:  # %bb.1: # %overflow4162; RV32ZICOND-NEXT:    li a0, 04163; RV32ZICOND-NEXT:    ret4164; RV32ZICOND-NEXT:  .LBB55_2: # %continue4165; RV32ZICOND-NEXT:    li a0, 14166; RV32ZICOND-NEXT:    ret4167;4168; RV64ZICOND-LABEL: uaddo.br.i64:4169; RV64ZICOND:       # %bb.0: # %entry4170; RV64ZICOND-NEXT:    add a1, a0, a14171; RV64ZICOND-NEXT:    bgeu a1, a0, .LBB55_24172; RV64ZICOND-NEXT:  # %bb.1: # %overflow4173; RV64ZICOND-NEXT:    li a0, 04174; RV64ZICOND-NEXT:    ret4175; RV64ZICOND-NEXT:  .LBB55_2: # %continue4176; RV64ZICOND-NEXT:    li a0, 14177; RV64ZICOND-NEXT:    ret4178entry:4179  %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %v1, i64 %v2)4180  %val = extractvalue {i64, i1} %t, 04181  %obit = extractvalue {i64, i1} %t, 14182  br i1 %obit, label %overflow, label %continue4183 4184overflow:4185  ret i1 false4186 4187continue:4188  ret i1 true4189}4190 4191define zeroext i1 @ssubo.br.i32(i32 signext %v1, i32 signext %v2) {4192; RV32-LABEL: ssubo.br.i32:4193; RV32:       # %bb.0: # %entry4194; RV32-NEXT:    sgtz a2, a14195; RV32-NEXT:    sub a1, a0, a14196; RV32-NEXT:    slt a0, a1, a04197; RV32-NEXT:    beq a2, a0, .LBB56_24198; RV32-NEXT:  # %bb.1: # %overflow4199; RV32-NEXT:    li a0, 04200; RV32-NEXT:    ret4201; RV32-NEXT:  .LBB56_2: # %continue4202; RV32-NEXT:    li a0, 14203; RV32-NEXT:    ret4204;4205; RV64-LABEL: ssubo.br.i32:4206; RV64:       # %bb.0: # %entry4207; RV64-NEXT:    sub a2, a0, a14208; RV64-NEXT:    subw a0, a0, a14209; RV64-NEXT:    beq a0, a2, .LBB56_24210; RV64-NEXT:  # %bb.1: # %overflow4211; RV64-NEXT:    li a0, 04212; RV64-NEXT:    ret4213; RV64-NEXT:  .LBB56_2: # %continue4214; RV64-NEXT:    li a0, 14215; RV64-NEXT:    ret4216;4217; RV32ZBA-LABEL: ssubo.br.i32:4218; RV32ZBA:       # %bb.0: # %entry4219; RV32ZBA-NEXT:    sgtz a2, a14220; RV32ZBA-NEXT:    sub a1, a0, a14221; RV32ZBA-NEXT:    slt a0, a1, a04222; RV32ZBA-NEXT:    beq a2, a0, .LBB56_24223; RV32ZBA-NEXT:  # %bb.1: # %overflow4224; RV32ZBA-NEXT:    li a0, 04225; RV32ZBA-NEXT:    ret4226; RV32ZBA-NEXT:  .LBB56_2: # %continue4227; RV32ZBA-NEXT:    li a0, 14228; RV32ZBA-NEXT:    ret4229;4230; RV64ZBA-LABEL: ssubo.br.i32:4231; RV64ZBA:       # %bb.0: # %entry4232; RV64ZBA-NEXT:    sub a2, a0, a14233; RV64ZBA-NEXT:    subw a0, a0, a14234; RV64ZBA-NEXT:    beq a0, a2, .LBB56_24235; RV64ZBA-NEXT:  # %bb.1: # %overflow4236; RV64ZBA-NEXT:    li a0, 04237; RV64ZBA-NEXT:    ret4238; RV64ZBA-NEXT:  .LBB56_2: # %continue4239; RV64ZBA-NEXT:    li a0, 14240; RV64ZBA-NEXT:    ret4241;4242; RV32ZICOND-LABEL: ssubo.br.i32:4243; RV32ZICOND:       # %bb.0: # %entry4244; RV32ZICOND-NEXT:    sgtz a2, a14245; RV32ZICOND-NEXT:    sub a1, a0, a14246; RV32ZICOND-NEXT:    slt a0, a1, a04247; RV32ZICOND-NEXT:    beq a2, a0, .LBB56_24248; RV32ZICOND-NEXT:  # %bb.1: # %overflow4249; RV32ZICOND-NEXT:    li a0, 04250; RV32ZICOND-NEXT:    ret4251; RV32ZICOND-NEXT:  .LBB56_2: # %continue4252; RV32ZICOND-NEXT:    li a0, 14253; RV32ZICOND-NEXT:    ret4254;4255; RV64ZICOND-LABEL: ssubo.br.i32:4256; RV64ZICOND:       # %bb.0: # %entry4257; RV64ZICOND-NEXT:    sub a2, a0, a14258; RV64ZICOND-NEXT:    subw a0, a0, a14259; RV64ZICOND-NEXT:    beq a0, a2, .LBB56_24260; RV64ZICOND-NEXT:  # %bb.1: # %overflow4261; RV64ZICOND-NEXT:    li a0, 04262; RV64ZICOND-NEXT:    ret4263; RV64ZICOND-NEXT:  .LBB56_2: # %continue4264; RV64ZICOND-NEXT:    li a0, 14265; RV64ZICOND-NEXT:    ret4266entry:4267  %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %v1, i32 %v2)4268  %val = extractvalue {i32, i1} %t, 04269  %obit = extractvalue {i32, i1} %t, 14270  br i1 %obit, label %overflow, label %continue4271 4272overflow:4273  ret i1 false4274 4275continue:4276  ret i1 true4277}4278 4279define zeroext i1 @ssubo.br.i64(i64 %v1, i64 %v2) {4280; RV32-LABEL: ssubo.br.i64:4281; RV32:       # %bb.0: # %entry4282; RV32-NEXT:    sltu a0, a0, a24283; RV32-NEXT:    sub a2, a1, a34284; RV32-NEXT:    sub a2, a2, a04285; RV32-NEXT:    xor a2, a1, a24286; RV32-NEXT:    xor a1, a1, a34287; RV32-NEXT:    and a1, a1, a24288; RV32-NEXT:    bgez a1, .LBB57_24289; RV32-NEXT:  # %bb.1: # %overflow4290; RV32-NEXT:    li a0, 04291; RV32-NEXT:    ret4292; RV32-NEXT:  .LBB57_2: # %continue4293; RV32-NEXT:    li a0, 14294; RV32-NEXT:    ret4295;4296; RV64-LABEL: ssubo.br.i64:4297; RV64:       # %bb.0: # %entry4298; RV64-NEXT:    sgtz a2, a14299; RV64-NEXT:    sub a1, a0, a14300; RV64-NEXT:    slt a0, a1, a04301; RV64-NEXT:    beq a2, a0, .LBB57_24302; RV64-NEXT:  # %bb.1: # %overflow4303; RV64-NEXT:    li a0, 04304; RV64-NEXT:    ret4305; RV64-NEXT:  .LBB57_2: # %continue4306; RV64-NEXT:    li a0, 14307; RV64-NEXT:    ret4308;4309; RV32ZBA-LABEL: ssubo.br.i64:4310; RV32ZBA:       # %bb.0: # %entry4311; RV32ZBA-NEXT:    sltu a0, a0, a24312; RV32ZBA-NEXT:    sub a2, a1, a34313; RV32ZBA-NEXT:    sub a2, a2, a04314; RV32ZBA-NEXT:    xor a2, a1, a24315; RV32ZBA-NEXT:    xor a1, a1, a34316; RV32ZBA-NEXT:    and a1, a1, a24317; RV32ZBA-NEXT:    bgez a1, .LBB57_24318; RV32ZBA-NEXT:  # %bb.1: # %overflow4319; RV32ZBA-NEXT:    li a0, 04320; RV32ZBA-NEXT:    ret4321; RV32ZBA-NEXT:  .LBB57_2: # %continue4322; RV32ZBA-NEXT:    li a0, 14323; RV32ZBA-NEXT:    ret4324;4325; RV64ZBA-LABEL: ssubo.br.i64:4326; RV64ZBA:       # %bb.0: # %entry4327; RV64ZBA-NEXT:    sgtz a2, a14328; RV64ZBA-NEXT:    sub a1, a0, a14329; RV64ZBA-NEXT:    slt a0, a1, a04330; RV64ZBA-NEXT:    beq a2, a0, .LBB57_24331; RV64ZBA-NEXT:  # %bb.1: # %overflow4332; RV64ZBA-NEXT:    li a0, 04333; RV64ZBA-NEXT:    ret4334; RV64ZBA-NEXT:  .LBB57_2: # %continue4335; RV64ZBA-NEXT:    li a0, 14336; RV64ZBA-NEXT:    ret4337;4338; RV32ZICOND-LABEL: ssubo.br.i64:4339; RV32ZICOND:       # %bb.0: # %entry4340; RV32ZICOND-NEXT:    sltu a0, a0, a24341; RV32ZICOND-NEXT:    sub a2, a1, a34342; RV32ZICOND-NEXT:    sub a2, a2, a04343; RV32ZICOND-NEXT:    xor a2, a1, a24344; RV32ZICOND-NEXT:    xor a1, a1, a34345; RV32ZICOND-NEXT:    and a1, a1, a24346; RV32ZICOND-NEXT:    bgez a1, .LBB57_24347; RV32ZICOND-NEXT:  # %bb.1: # %overflow4348; RV32ZICOND-NEXT:    li a0, 04349; RV32ZICOND-NEXT:    ret4350; RV32ZICOND-NEXT:  .LBB57_2: # %continue4351; RV32ZICOND-NEXT:    li a0, 14352; RV32ZICOND-NEXT:    ret4353;4354; RV64ZICOND-LABEL: ssubo.br.i64:4355; RV64ZICOND:       # %bb.0: # %entry4356; RV64ZICOND-NEXT:    sgtz a2, a14357; RV64ZICOND-NEXT:    sub a1, a0, a14358; RV64ZICOND-NEXT:    slt a0, a1, a04359; RV64ZICOND-NEXT:    beq a2, a0, .LBB57_24360; RV64ZICOND-NEXT:  # %bb.1: # %overflow4361; RV64ZICOND-NEXT:    li a0, 04362; RV64ZICOND-NEXT:    ret4363; RV64ZICOND-NEXT:  .LBB57_2: # %continue4364; RV64ZICOND-NEXT:    li a0, 14365; RV64ZICOND-NEXT:    ret4366entry:4367  %t = call {i64, i1} @llvm.ssub.with.overflow.i64(i64 %v1, i64 %v2)4368  %val = extractvalue {i64, i1} %t, 04369  %obit = extractvalue {i64, i1} %t, 14370  br i1 %obit, label %overflow, label %continue4371 4372overflow:4373  ret i1 false4374 4375continue:4376  ret i1 true4377}4378 4379define zeroext i1 @usubo.br.i32(i32 signext %v1, i32 signext %v2) {4380; RV32-LABEL: usubo.br.i32:4381; RV32:       # %bb.0: # %entry4382; RV32-NEXT:    sub a1, a0, a14383; RV32-NEXT:    bgeu a0, a1, .LBB58_24384; RV32-NEXT:  # %bb.1: # %overflow4385; RV32-NEXT:    li a0, 04386; RV32-NEXT:    ret4387; RV32-NEXT:  .LBB58_2: # %continue4388; RV32-NEXT:    li a0, 14389; RV32-NEXT:    ret4390;4391; RV64-LABEL: usubo.br.i32:4392; RV64:       # %bb.0: # %entry4393; RV64-NEXT:    subw a1, a0, a14394; RV64-NEXT:    bgeu a0, a1, .LBB58_24395; RV64-NEXT:  # %bb.1: # %overflow4396; RV64-NEXT:    li a0, 04397; RV64-NEXT:    ret4398; RV64-NEXT:  .LBB58_2: # %continue4399; RV64-NEXT:    li a0, 14400; RV64-NEXT:    ret4401;4402; RV32ZBA-LABEL: usubo.br.i32:4403; RV32ZBA:       # %bb.0: # %entry4404; RV32ZBA-NEXT:    sub a1, a0, a14405; RV32ZBA-NEXT:    bgeu a0, a1, .LBB58_24406; RV32ZBA-NEXT:  # %bb.1: # %overflow4407; RV32ZBA-NEXT:    li a0, 04408; RV32ZBA-NEXT:    ret4409; RV32ZBA-NEXT:  .LBB58_2: # %continue4410; RV32ZBA-NEXT:    li a0, 14411; RV32ZBA-NEXT:    ret4412;4413; RV64ZBA-LABEL: usubo.br.i32:4414; RV64ZBA:       # %bb.0: # %entry4415; RV64ZBA-NEXT:    subw a1, a0, a14416; RV64ZBA-NEXT:    bgeu a0, a1, .LBB58_24417; RV64ZBA-NEXT:  # %bb.1: # %overflow4418; RV64ZBA-NEXT:    li a0, 04419; RV64ZBA-NEXT:    ret4420; RV64ZBA-NEXT:  .LBB58_2: # %continue4421; RV64ZBA-NEXT:    li a0, 14422; RV64ZBA-NEXT:    ret4423;4424; RV32ZICOND-LABEL: usubo.br.i32:4425; RV32ZICOND:       # %bb.0: # %entry4426; RV32ZICOND-NEXT:    sub a1, a0, a14427; RV32ZICOND-NEXT:    bgeu a0, a1, .LBB58_24428; RV32ZICOND-NEXT:  # %bb.1: # %overflow4429; RV32ZICOND-NEXT:    li a0, 04430; RV32ZICOND-NEXT:    ret4431; RV32ZICOND-NEXT:  .LBB58_2: # %continue4432; RV32ZICOND-NEXT:    li a0, 14433; RV32ZICOND-NEXT:    ret4434;4435; RV64ZICOND-LABEL: usubo.br.i32:4436; RV64ZICOND:       # %bb.0: # %entry4437; RV64ZICOND-NEXT:    subw a1, a0, a14438; RV64ZICOND-NEXT:    bgeu a0, a1, .LBB58_24439; RV64ZICOND-NEXT:  # %bb.1: # %overflow4440; RV64ZICOND-NEXT:    li a0, 04441; RV64ZICOND-NEXT:    ret4442; RV64ZICOND-NEXT:  .LBB58_2: # %continue4443; RV64ZICOND-NEXT:    li a0, 14444; RV64ZICOND-NEXT:    ret4445entry:4446  %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %v1, i32 %v2)4447  %val = extractvalue {i32, i1} %t, 04448  %obit = extractvalue {i32, i1} %t, 14449  br i1 %obit, label %overflow, label %continue4450 4451overflow:4452  ret i1 false4453 4454continue:4455  ret i1 true4456}4457 4458define zeroext i1 @usubo.br.i64(i64 %v1, i64 %v2) {4459; RV32-LABEL: usubo.br.i64:4460; RV32:       # %bb.0: # %entry4461; RV32-NEXT:    sltu a4, a0, a24462; RV32-NEXT:    sub a3, a1, a34463; RV32-NEXT:    sub a3, a3, a44464; RV32-NEXT:    beq a3, a1, .LBB59_34465; RV32-NEXT:  # %bb.1: # %entry4466; RV32-NEXT:    sltu a0, a1, a34467; RV32-NEXT:    bnez a0, .LBB59_44468; RV32-NEXT:  .LBB59_2: # %continue4469; RV32-NEXT:    li a0, 14470; RV32-NEXT:    ret4471; RV32-NEXT:  .LBB59_3:4472; RV32-NEXT:    sub a1, a0, a24473; RV32-NEXT:    sltu a0, a0, a14474; RV32-NEXT:    beqz a0, .LBB59_24475; RV32-NEXT:  .LBB59_4: # %overflow4476; RV32-NEXT:    li a0, 04477; RV32-NEXT:    ret4478;4479; RV64-LABEL: usubo.br.i64:4480; RV64:       # %bb.0: # %entry4481; RV64-NEXT:    sub a1, a0, a14482; RV64-NEXT:    bgeu a0, a1, .LBB59_24483; RV64-NEXT:  # %bb.1: # %overflow4484; RV64-NEXT:    li a0, 04485; RV64-NEXT:    ret4486; RV64-NEXT:  .LBB59_2: # %continue4487; RV64-NEXT:    li a0, 14488; RV64-NEXT:    ret4489;4490; RV32ZBA-LABEL: usubo.br.i64:4491; RV32ZBA:       # %bb.0: # %entry4492; RV32ZBA-NEXT:    sltu a4, a0, a24493; RV32ZBA-NEXT:    sub a3, a1, a34494; RV32ZBA-NEXT:    sub a3, a3, a44495; RV32ZBA-NEXT:    beq a3, a1, .LBB59_34496; RV32ZBA-NEXT:  # %bb.1: # %entry4497; RV32ZBA-NEXT:    sltu a0, a1, a34498; RV32ZBA-NEXT:    bnez a0, .LBB59_44499; RV32ZBA-NEXT:  .LBB59_2: # %continue4500; RV32ZBA-NEXT:    li a0, 14501; RV32ZBA-NEXT:    ret4502; RV32ZBA-NEXT:  .LBB59_3:4503; RV32ZBA-NEXT:    sub a1, a0, a24504; RV32ZBA-NEXT:    sltu a0, a0, a14505; RV32ZBA-NEXT:    beqz a0, .LBB59_24506; RV32ZBA-NEXT:  .LBB59_4: # %overflow4507; RV32ZBA-NEXT:    li a0, 04508; RV32ZBA-NEXT:    ret4509;4510; RV64ZBA-LABEL: usubo.br.i64:4511; RV64ZBA:       # %bb.0: # %entry4512; RV64ZBA-NEXT:    sub a1, a0, a14513; RV64ZBA-NEXT:    bgeu a0, a1, .LBB59_24514; RV64ZBA-NEXT:  # %bb.1: # %overflow4515; RV64ZBA-NEXT:    li a0, 04516; RV64ZBA-NEXT:    ret4517; RV64ZBA-NEXT:  .LBB59_2: # %continue4518; RV64ZBA-NEXT:    li a0, 14519; RV64ZBA-NEXT:    ret4520;4521; RV32ZICOND-LABEL: usubo.br.i64:4522; RV32ZICOND:       # %bb.0: # %entry4523; RV32ZICOND-NEXT:    sltu a4, a0, a24524; RV32ZICOND-NEXT:    sub a3, a1, a34525; RV32ZICOND-NEXT:    sub a2, a0, a24526; RV32ZICOND-NEXT:    sub a3, a3, a44527; RV32ZICOND-NEXT:    sltu a0, a0, a24528; RV32ZICOND-NEXT:    xor a2, a3, a14529; RV32ZICOND-NEXT:    sltu a1, a1, a34530; RV32ZICOND-NEXT:    czero.eqz a1, a1, a24531; RV32ZICOND-NEXT:    czero.nez a0, a0, a24532; RV32ZICOND-NEXT:    or a0, a0, a14533; RV32ZICOND-NEXT:    beqz a0, .LBB59_24534; RV32ZICOND-NEXT:  # %bb.1: # %overflow4535; RV32ZICOND-NEXT:    li a0, 04536; RV32ZICOND-NEXT:    ret4537; RV32ZICOND-NEXT:  .LBB59_2: # %continue4538; RV32ZICOND-NEXT:    li a0, 14539; RV32ZICOND-NEXT:    ret4540;4541; RV64ZICOND-LABEL: usubo.br.i64:4542; RV64ZICOND:       # %bb.0: # %entry4543; RV64ZICOND-NEXT:    sub a1, a0, a14544; RV64ZICOND-NEXT:    bgeu a0, a1, .LBB59_24545; RV64ZICOND-NEXT:  # %bb.1: # %overflow4546; RV64ZICOND-NEXT:    li a0, 04547; RV64ZICOND-NEXT:    ret4548; RV64ZICOND-NEXT:  .LBB59_2: # %continue4549; RV64ZICOND-NEXT:    li a0, 14550; RV64ZICOND-NEXT:    ret4551entry:4552  %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %v1, i64 %v2)4553  %val = extractvalue {i64, i1} %t, 04554  %obit = extractvalue {i64, i1} %t, 14555  br i1 %obit, label %overflow, label %continue4556 4557overflow:4558  ret i1 false4559 4560continue:4561  ret i1 true4562}4563 4564define zeroext i1 @smulo.br.i32(i32 signext %v1, i32 signext %v2) {4565; RV32-LABEL: smulo.br.i32:4566; RV32:       # %bb.0: # %entry4567; RV32-NEXT:    mulh a2, a0, a14568; RV32-NEXT:    mul a0, a0, a14569; RV32-NEXT:    srai a0, a0, 314570; RV32-NEXT:    beq a2, a0, .LBB60_24571; RV32-NEXT:  # %bb.1: # %overflow4572; RV32-NEXT:    li a0, 04573; RV32-NEXT:    ret4574; RV32-NEXT:  .LBB60_2: # %continue4575; RV32-NEXT:    li a0, 14576; RV32-NEXT:    ret4577;4578; RV64-LABEL: smulo.br.i32:4579; RV64:       # %bb.0: # %entry4580; RV64-NEXT:    mul a2, a0, a14581; RV64-NEXT:    mulw a0, a0, a14582; RV64-NEXT:    beq a0, a2, .LBB60_24583; RV64-NEXT:  # %bb.1: # %overflow4584; RV64-NEXT:    li a0, 04585; RV64-NEXT:    ret4586; RV64-NEXT:  .LBB60_2: # %continue4587; RV64-NEXT:    li a0, 14588; RV64-NEXT:    ret4589;4590; RV32ZBA-LABEL: smulo.br.i32:4591; RV32ZBA:       # %bb.0: # %entry4592; RV32ZBA-NEXT:    mulh a2, a0, a14593; RV32ZBA-NEXT:    mul a0, a0, a14594; RV32ZBA-NEXT:    srai a0, a0, 314595; RV32ZBA-NEXT:    beq a2, a0, .LBB60_24596; RV32ZBA-NEXT:  # %bb.1: # %overflow4597; RV32ZBA-NEXT:    li a0, 04598; RV32ZBA-NEXT:    ret4599; RV32ZBA-NEXT:  .LBB60_2: # %continue4600; RV32ZBA-NEXT:    li a0, 14601; RV32ZBA-NEXT:    ret4602;4603; RV64ZBA-LABEL: smulo.br.i32:4604; RV64ZBA:       # %bb.0: # %entry4605; RV64ZBA-NEXT:    mul a2, a0, a14606; RV64ZBA-NEXT:    mulw a0, a0, a14607; RV64ZBA-NEXT:    beq a0, a2, .LBB60_24608; RV64ZBA-NEXT:  # %bb.1: # %overflow4609; RV64ZBA-NEXT:    li a0, 04610; RV64ZBA-NEXT:    ret4611; RV64ZBA-NEXT:  .LBB60_2: # %continue4612; RV64ZBA-NEXT:    li a0, 14613; RV64ZBA-NEXT:    ret4614;4615; RV32ZICOND-LABEL: smulo.br.i32:4616; RV32ZICOND:       # %bb.0: # %entry4617; RV32ZICOND-NEXT:    mulh a2, a0, a14618; RV32ZICOND-NEXT:    mul a0, a0, a14619; RV32ZICOND-NEXT:    srai a0, a0, 314620; RV32ZICOND-NEXT:    beq a2, a0, .LBB60_24621; RV32ZICOND-NEXT:  # %bb.1: # %overflow4622; RV32ZICOND-NEXT:    li a0, 04623; RV32ZICOND-NEXT:    ret4624; RV32ZICOND-NEXT:  .LBB60_2: # %continue4625; RV32ZICOND-NEXT:    li a0, 14626; RV32ZICOND-NEXT:    ret4627;4628; RV64ZICOND-LABEL: smulo.br.i32:4629; RV64ZICOND:       # %bb.0: # %entry4630; RV64ZICOND-NEXT:    mul a2, a0, a14631; RV64ZICOND-NEXT:    mulw a0, a0, a14632; RV64ZICOND-NEXT:    beq a0, a2, .LBB60_24633; RV64ZICOND-NEXT:  # %bb.1: # %overflow4634; RV64ZICOND-NEXT:    li a0, 04635; RV64ZICOND-NEXT:    ret4636; RV64ZICOND-NEXT:  .LBB60_2: # %continue4637; RV64ZICOND-NEXT:    li a0, 14638; RV64ZICOND-NEXT:    ret4639entry:4640  %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)4641  %val = extractvalue {i32, i1} %t, 04642  %obit = extractvalue {i32, i1} %t, 14643  br i1 %obit, label %overflow, label %continue4644 4645overflow:4646  ret i1 false4647 4648continue:4649  ret i1 true4650}4651 4652define zeroext i1 @smulo.br.i64(i64 %v1, i64 %v2) {4653; RV32-LABEL: smulo.br.i64:4654; RV32:       # %bb.0: # %entry4655; RV32-NEXT:    mulhu a4, a0, a24656; RV32-NEXT:    mul a5, a1, a24657; RV32-NEXT:    mulhsu a2, a1, a24658; RV32-NEXT:    mul a6, a3, a04659; RV32-NEXT:    mulhsu a0, a3, a04660; RV32-NEXT:    mulh a7, a1, a34661; RV32-NEXT:    mul a1, a1, a34662; RV32-NEXT:    add a4, a5, a44663; RV32-NEXT:    sltu a3, a4, a54664; RV32-NEXT:    add a4, a6, a44665; RV32-NEXT:    add a2, a2, a34666; RV32-NEXT:    sltu a3, a4, a64667; RV32-NEXT:    srai a4, a4, 314668; RV32-NEXT:    add a0, a0, a34669; RV32-NEXT:    srai a3, a2, 314670; RV32-NEXT:    add a5, a2, a04671; RV32-NEXT:    srai a0, a0, 314672; RV32-NEXT:    sltu a2, a5, a24673; RV32-NEXT:    add a0, a3, a04674; RV32-NEXT:    add a5, a1, a54675; RV32-NEXT:    add a0, a0, a24676; RV32-NEXT:    sltu a1, a5, a14677; RV32-NEXT:    add a0, a7, a04678; RV32-NEXT:    add a0, a0, a14679; RV32-NEXT:    xor a0, a0, a44680; RV32-NEXT:    xor a4, a5, a44681; RV32-NEXT:    or a0, a4, a04682; RV32-NEXT:    beqz a0, .LBB61_24683; RV32-NEXT:  # %bb.1: # %overflow4684; RV32-NEXT:    li a0, 04685; RV32-NEXT:    ret4686; RV32-NEXT:  .LBB61_2: # %continue4687; RV32-NEXT:    li a0, 14688; RV32-NEXT:    ret4689;4690; RV64-LABEL: smulo.br.i64:4691; RV64:       # %bb.0: # %entry4692; RV64-NEXT:    mulh a2, a0, a14693; RV64-NEXT:    mul a0, a0, a14694; RV64-NEXT:    srai a0, a0, 634695; RV64-NEXT:    beq a2, a0, .LBB61_24696; RV64-NEXT:  # %bb.1: # %overflow4697; RV64-NEXT:    li a0, 04698; RV64-NEXT:    ret4699; RV64-NEXT:  .LBB61_2: # %continue4700; RV64-NEXT:    li a0, 14701; RV64-NEXT:    ret4702;4703; RV32ZBA-LABEL: smulo.br.i64:4704; RV32ZBA:       # %bb.0: # %entry4705; RV32ZBA-NEXT:    mulhu a4, a0, a24706; RV32ZBA-NEXT:    mul a5, a1, a24707; RV32ZBA-NEXT:    mulhsu a2, a1, a24708; RV32ZBA-NEXT:    mul a6, a3, a04709; RV32ZBA-NEXT:    mulhsu a0, a3, a04710; RV32ZBA-NEXT:    mulh a7, a1, a34711; RV32ZBA-NEXT:    mul a1, a1, a34712; RV32ZBA-NEXT:    add a4, a5, a44713; RV32ZBA-NEXT:    sltu a3, a4, a54714; RV32ZBA-NEXT:    add a4, a6, a44715; RV32ZBA-NEXT:    add a2, a2, a34716; RV32ZBA-NEXT:    sltu a3, a4, a64717; RV32ZBA-NEXT:    srai a4, a4, 314718; RV32ZBA-NEXT:    add a0, a0, a34719; RV32ZBA-NEXT:    srai a3, a2, 314720; RV32ZBA-NEXT:    add a5, a2, a04721; RV32ZBA-NEXT:    srai a0, a0, 314722; RV32ZBA-NEXT:    sltu a2, a5, a24723; RV32ZBA-NEXT:    add a0, a3, a04724; RV32ZBA-NEXT:    add a5, a1, a54725; RV32ZBA-NEXT:    add a0, a0, a24726; RV32ZBA-NEXT:    sltu a1, a5, a14727; RV32ZBA-NEXT:    add a0, a7, a04728; RV32ZBA-NEXT:    add a0, a0, a14729; RV32ZBA-NEXT:    xor a0, a0, a44730; RV32ZBA-NEXT:    xor a4, a5, a44731; RV32ZBA-NEXT:    or a0, a4, a04732; RV32ZBA-NEXT:    beqz a0, .LBB61_24733; RV32ZBA-NEXT:  # %bb.1: # %overflow4734; RV32ZBA-NEXT:    li a0, 04735; RV32ZBA-NEXT:    ret4736; RV32ZBA-NEXT:  .LBB61_2: # %continue4737; RV32ZBA-NEXT:    li a0, 14738; RV32ZBA-NEXT:    ret4739;4740; RV64ZBA-LABEL: smulo.br.i64:4741; RV64ZBA:       # %bb.0: # %entry4742; RV64ZBA-NEXT:    mulh a2, a0, a14743; RV64ZBA-NEXT:    mul a0, a0, a14744; RV64ZBA-NEXT:    srai a0, a0, 634745; RV64ZBA-NEXT:    beq a2, a0, .LBB61_24746; RV64ZBA-NEXT:  # %bb.1: # %overflow4747; RV64ZBA-NEXT:    li a0, 04748; RV64ZBA-NEXT:    ret4749; RV64ZBA-NEXT:  .LBB61_2: # %continue4750; RV64ZBA-NEXT:    li a0, 14751; RV64ZBA-NEXT:    ret4752;4753; RV32ZICOND-LABEL: smulo.br.i64:4754; RV32ZICOND:       # %bb.0: # %entry4755; RV32ZICOND-NEXT:    mulhu a4, a0, a24756; RV32ZICOND-NEXT:    mul a5, a1, a24757; RV32ZICOND-NEXT:    mulhsu a2, a1, a24758; RV32ZICOND-NEXT:    mul a6, a3, a04759; RV32ZICOND-NEXT:    mulhsu a0, a3, a04760; RV32ZICOND-NEXT:    mulh a7, a1, a34761; RV32ZICOND-NEXT:    mul a1, a1, a34762; RV32ZICOND-NEXT:    add a4, a5, a44763; RV32ZICOND-NEXT:    sltu a3, a4, a54764; RV32ZICOND-NEXT:    add a4, a6, a44765; RV32ZICOND-NEXT:    add a2, a2, a34766; RV32ZICOND-NEXT:    sltu a3, a4, a64767; RV32ZICOND-NEXT:    srai a4, a4, 314768; RV32ZICOND-NEXT:    add a0, a0, a34769; RV32ZICOND-NEXT:    srai a3, a2, 314770; RV32ZICOND-NEXT:    add a5, a2, a04771; RV32ZICOND-NEXT:    srai a0, a0, 314772; RV32ZICOND-NEXT:    sltu a2, a5, a24773; RV32ZICOND-NEXT:    add a0, a3, a04774; RV32ZICOND-NEXT:    add a5, a1, a54775; RV32ZICOND-NEXT:    add a0, a0, a24776; RV32ZICOND-NEXT:    sltu a1, a5, a14777; RV32ZICOND-NEXT:    add a0, a7, a04778; RV32ZICOND-NEXT:    add a0, a0, a14779; RV32ZICOND-NEXT:    xor a0, a0, a44780; RV32ZICOND-NEXT:    xor a4, a5, a44781; RV32ZICOND-NEXT:    or a0, a4, a04782; RV32ZICOND-NEXT:    beqz a0, .LBB61_24783; RV32ZICOND-NEXT:  # %bb.1: # %overflow4784; RV32ZICOND-NEXT:    li a0, 04785; RV32ZICOND-NEXT:    ret4786; RV32ZICOND-NEXT:  .LBB61_2: # %continue4787; RV32ZICOND-NEXT:    li a0, 14788; RV32ZICOND-NEXT:    ret4789;4790; RV64ZICOND-LABEL: smulo.br.i64:4791; RV64ZICOND:       # %bb.0: # %entry4792; RV64ZICOND-NEXT:    mulh a2, a0, a14793; RV64ZICOND-NEXT:    mul a0, a0, a14794; RV64ZICOND-NEXT:    srai a0, a0, 634795; RV64ZICOND-NEXT:    beq a2, a0, .LBB61_24796; RV64ZICOND-NEXT:  # %bb.1: # %overflow4797; RV64ZICOND-NEXT:    li a0, 04798; RV64ZICOND-NEXT:    ret4799; RV64ZICOND-NEXT:  .LBB61_2: # %continue4800; RV64ZICOND-NEXT:    li a0, 14801; RV64ZICOND-NEXT:    ret4802entry:4803  %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)4804  %val = extractvalue {i64, i1} %t, 04805  %obit = extractvalue {i64, i1} %t, 14806  br i1 %obit, label %overflow, label %continue4807 4808overflow:4809  ret i1 false4810 4811continue:4812  ret i1 true4813}4814 4815define zeroext i1 @smulo2.br.i64(i64 %v1) {4816; RV32-LABEL: smulo2.br.i64:4817; RV32:       # %bb.0: # %entry4818; RV32-NEXT:    li a2, -134819; RV32-NEXT:    neg a3, a04820; RV32-NEXT:    li a4, -14821; RV32-NEXT:    mulhu a5, a0, a24822; RV32-NEXT:    mul a6, a1, a24823; RV32-NEXT:    mulhsu a2, a1, a24824; RV32-NEXT:    add a5, a6, a54825; RV32-NEXT:    sltu a6, a5, a64826; RV32-NEXT:    sub a5, a5, a04827; RV32-NEXT:    mulhsu a0, a4, a04828; RV32-NEXT:    add a2, a2, a64829; RV32-NEXT:    sltu a3, a5, a34830; RV32-NEXT:    add a0, a0, a34831; RV32-NEXT:    srai a3, a2, 314832; RV32-NEXT:    srai a6, a0, 314833; RV32-NEXT:    add a3, a3, a64834; RV32-NEXT:    neg a6, a14835; RV32-NEXT:    mulh a4, a1, a44836; RV32-NEXT:    srai a5, a5, 314837; RV32-NEXT:    add a0, a2, a04838; RV32-NEXT:    sltu a2, a0, a24839; RV32-NEXT:    sub a0, a0, a14840; RV32-NEXT:    add a2, a3, a24841; RV32-NEXT:    sltu a1, a0, a64842; RV32-NEXT:    add a2, a4, a24843; RV32-NEXT:    add a1, a2, a14844; RV32-NEXT:    xor a1, a1, a54845; RV32-NEXT:    xor a0, a0, a54846; RV32-NEXT:    or a0, a0, a14847; RV32-NEXT:    beqz a0, .LBB62_24848; RV32-NEXT:  # %bb.1: # %overflow4849; RV32-NEXT:    li a0, 04850; RV32-NEXT:    ret4851; RV32-NEXT:  .LBB62_2: # %continue4852; RV32-NEXT:    li a0, 14853; RV32-NEXT:    ret4854;4855; RV64-LABEL: smulo2.br.i64:4856; RV64:       # %bb.0: # %entry4857; RV64-NEXT:    li a1, -134858; RV64-NEXT:    mulh a2, a0, a14859; RV64-NEXT:    mul a0, a0, a14860; RV64-NEXT:    srai a0, a0, 634861; RV64-NEXT:    beq a2, a0, .LBB62_24862; RV64-NEXT:  # %bb.1: # %overflow4863; RV64-NEXT:    li a0, 04864; RV64-NEXT:    ret4865; RV64-NEXT:  .LBB62_2: # %continue4866; RV64-NEXT:    li a0, 14867; RV64-NEXT:    ret4868;4869; RV32ZBA-LABEL: smulo2.br.i64:4870; RV32ZBA:       # %bb.0: # %entry4871; RV32ZBA-NEXT:    li a2, -134872; RV32ZBA-NEXT:    neg a3, a04873; RV32ZBA-NEXT:    li a4, -14874; RV32ZBA-NEXT:    mulhu a5, a0, a24875; RV32ZBA-NEXT:    mul a6, a1, a24876; RV32ZBA-NEXT:    mulhsu a2, a1, a24877; RV32ZBA-NEXT:    add a5, a6, a54878; RV32ZBA-NEXT:    sltu a6, a5, a64879; RV32ZBA-NEXT:    sub a5, a5, a04880; RV32ZBA-NEXT:    mulhsu a0, a4, a04881; RV32ZBA-NEXT:    add a2, a2, a64882; RV32ZBA-NEXT:    sltu a3, a5, a34883; RV32ZBA-NEXT:    add a0, a0, a34884; RV32ZBA-NEXT:    srai a3, a2, 314885; RV32ZBA-NEXT:    srai a6, a0, 314886; RV32ZBA-NEXT:    add a3, a3, a64887; RV32ZBA-NEXT:    neg a6, a14888; RV32ZBA-NEXT:    mulh a4, a1, a44889; RV32ZBA-NEXT:    srai a5, a5, 314890; RV32ZBA-NEXT:    add a0, a2, a04891; RV32ZBA-NEXT:    sltu a2, a0, a24892; RV32ZBA-NEXT:    sub a0, a0, a14893; RV32ZBA-NEXT:    add a2, a3, a24894; RV32ZBA-NEXT:    sltu a1, a0, a64895; RV32ZBA-NEXT:    add a2, a4, a24896; RV32ZBA-NEXT:    add a1, a2, a14897; RV32ZBA-NEXT:    xor a1, a1, a54898; RV32ZBA-NEXT:    xor a0, a0, a54899; RV32ZBA-NEXT:    or a0, a0, a14900; RV32ZBA-NEXT:    beqz a0, .LBB62_24901; RV32ZBA-NEXT:  # %bb.1: # %overflow4902; RV32ZBA-NEXT:    li a0, 04903; RV32ZBA-NEXT:    ret4904; RV32ZBA-NEXT:  .LBB62_2: # %continue4905; RV32ZBA-NEXT:    li a0, 14906; RV32ZBA-NEXT:    ret4907;4908; RV64ZBA-LABEL: smulo2.br.i64:4909; RV64ZBA:       # %bb.0: # %entry4910; RV64ZBA-NEXT:    li a1, -134911; RV64ZBA-NEXT:    mulh a2, a0, a14912; RV64ZBA-NEXT:    mul a0, a0, a14913; RV64ZBA-NEXT:    srai a0, a0, 634914; RV64ZBA-NEXT:    beq a2, a0, .LBB62_24915; RV64ZBA-NEXT:  # %bb.1: # %overflow4916; RV64ZBA-NEXT:    li a0, 04917; RV64ZBA-NEXT:    ret4918; RV64ZBA-NEXT:  .LBB62_2: # %continue4919; RV64ZBA-NEXT:    li a0, 14920; RV64ZBA-NEXT:    ret4921;4922; RV32ZICOND-LABEL: smulo2.br.i64:4923; RV32ZICOND:       # %bb.0: # %entry4924; RV32ZICOND-NEXT:    li a2, -134925; RV32ZICOND-NEXT:    neg a3, a04926; RV32ZICOND-NEXT:    li a4, -14927; RV32ZICOND-NEXT:    mulhu a5, a0, a24928; RV32ZICOND-NEXT:    mul a6, a1, a24929; RV32ZICOND-NEXT:    mulhsu a2, a1, a24930; RV32ZICOND-NEXT:    add a5, a6, a54931; RV32ZICOND-NEXT:    sltu a6, a5, a64932; RV32ZICOND-NEXT:    sub a5, a5, a04933; RV32ZICOND-NEXT:    mulhsu a0, a4, a04934; RV32ZICOND-NEXT:    add a2, a2, a64935; RV32ZICOND-NEXT:    sltu a3, a5, a34936; RV32ZICOND-NEXT:    add a0, a0, a34937; RV32ZICOND-NEXT:    srai a3, a2, 314938; RV32ZICOND-NEXT:    srai a6, a0, 314939; RV32ZICOND-NEXT:    add a3, a3, a64940; RV32ZICOND-NEXT:    neg a6, a14941; RV32ZICOND-NEXT:    mulh a4, a1, a44942; RV32ZICOND-NEXT:    srai a5, a5, 314943; RV32ZICOND-NEXT:    add a0, a2, a04944; RV32ZICOND-NEXT:    sltu a2, a0, a24945; RV32ZICOND-NEXT:    sub a0, a0, a14946; RV32ZICOND-NEXT:    add a2, a3, a24947; RV32ZICOND-NEXT:    sltu a1, a0, a64948; RV32ZICOND-NEXT:    add a2, a4, a24949; RV32ZICOND-NEXT:    add a1, a2, a14950; RV32ZICOND-NEXT:    xor a1, a1, a54951; RV32ZICOND-NEXT:    xor a0, a0, a54952; RV32ZICOND-NEXT:    or a0, a0, a14953; RV32ZICOND-NEXT:    beqz a0, .LBB62_24954; RV32ZICOND-NEXT:  # %bb.1: # %overflow4955; RV32ZICOND-NEXT:    li a0, 04956; RV32ZICOND-NEXT:    ret4957; RV32ZICOND-NEXT:  .LBB62_2: # %continue4958; RV32ZICOND-NEXT:    li a0, 14959; RV32ZICOND-NEXT:    ret4960;4961; RV64ZICOND-LABEL: smulo2.br.i64:4962; RV64ZICOND:       # %bb.0: # %entry4963; RV64ZICOND-NEXT:    li a1, -134964; RV64ZICOND-NEXT:    mulh a2, a0, a14965; RV64ZICOND-NEXT:    mul a0, a0, a14966; RV64ZICOND-NEXT:    srai a0, a0, 634967; RV64ZICOND-NEXT:    beq a2, a0, .LBB62_24968; RV64ZICOND-NEXT:  # %bb.1: # %overflow4969; RV64ZICOND-NEXT:    li a0, 04970; RV64ZICOND-NEXT:    ret4971; RV64ZICOND-NEXT:  .LBB62_2: # %continue4972; RV64ZICOND-NEXT:    li a0, 14973; RV64ZICOND-NEXT:    ret4974entry:4975  %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 -13)4976  %val = extractvalue {i64, i1} %t, 04977  %obit = extractvalue {i64, i1} %t, 14978  br i1 %obit, label %overflow, label %continue4979 4980overflow:4981  ret i1 false4982 4983continue:4984  ret i1 true4985}4986 4987define zeroext i1 @umulo.br.i32(i32 signext %v1, i32 signext %v2) {4988; RV32-LABEL: umulo.br.i32:4989; RV32:       # %bb.0: # %entry4990; RV32-NEXT:    mulhu a0, a0, a14991; RV32-NEXT:    beqz a0, .LBB63_24992; RV32-NEXT:  # %bb.1: # %overflow4993; RV32-NEXT:    li a0, 04994; RV32-NEXT:    ret4995; RV32-NEXT:  .LBB63_2: # %continue4996; RV32-NEXT:    li a0, 14997; RV32-NEXT:    ret4998;4999; RV64-LABEL: umulo.br.i32:5000; RV64:       # %bb.0: # %entry5001; RV64-NEXT:    slli a1, a1, 325002; RV64-NEXT:    slli a0, a0, 325003; RV64-NEXT:    mulhu a0, a0, a15004; RV64-NEXT:    srli a0, a0, 325005; RV64-NEXT:    beqz a0, .LBB63_25006; RV64-NEXT:  # %bb.1: # %overflow5007; RV64-NEXT:    li a0, 05008; RV64-NEXT:    ret5009; RV64-NEXT:  .LBB63_2: # %continue5010; RV64-NEXT:    li a0, 15011; RV64-NEXT:    ret5012;5013; RV32ZBA-LABEL: umulo.br.i32:5014; RV32ZBA:       # %bb.0: # %entry5015; RV32ZBA-NEXT:    mulhu a0, a0, a15016; RV32ZBA-NEXT:    beqz a0, .LBB63_25017; RV32ZBA-NEXT:  # %bb.1: # %overflow5018; RV32ZBA-NEXT:    li a0, 05019; RV32ZBA-NEXT:    ret5020; RV32ZBA-NEXT:  .LBB63_2: # %continue5021; RV32ZBA-NEXT:    li a0, 15022; RV32ZBA-NEXT:    ret5023;5024; RV64ZBA-LABEL: umulo.br.i32:5025; RV64ZBA:       # %bb.0: # %entry5026; RV64ZBA-NEXT:    zext.w a1, a15027; RV64ZBA-NEXT:    zext.w a0, a05028; RV64ZBA-NEXT:    mul a0, a0, a15029; RV64ZBA-NEXT:    srli a0, a0, 325030; RV64ZBA-NEXT:    beqz a0, .LBB63_25031; RV64ZBA-NEXT:  # %bb.1: # %overflow5032; RV64ZBA-NEXT:    li a0, 05033; RV64ZBA-NEXT:    ret5034; RV64ZBA-NEXT:  .LBB63_2: # %continue5035; RV64ZBA-NEXT:    li a0, 15036; RV64ZBA-NEXT:    ret5037;5038; RV32ZICOND-LABEL: umulo.br.i32:5039; RV32ZICOND:       # %bb.0: # %entry5040; RV32ZICOND-NEXT:    mulhu a0, a0, a15041; RV32ZICOND-NEXT:    beqz a0, .LBB63_25042; RV32ZICOND-NEXT:  # %bb.1: # %overflow5043; RV32ZICOND-NEXT:    li a0, 05044; RV32ZICOND-NEXT:    ret5045; RV32ZICOND-NEXT:  .LBB63_2: # %continue5046; RV32ZICOND-NEXT:    li a0, 15047; RV32ZICOND-NEXT:    ret5048;5049; RV64ZICOND-LABEL: umulo.br.i32:5050; RV64ZICOND:       # %bb.0: # %entry5051; RV64ZICOND-NEXT:    slli a1, a1, 325052; RV64ZICOND-NEXT:    slli a0, a0, 325053; RV64ZICOND-NEXT:    mulhu a0, a0, a15054; RV64ZICOND-NEXT:    srli a0, a0, 325055; RV64ZICOND-NEXT:    beqz a0, .LBB63_25056; RV64ZICOND-NEXT:  # %bb.1: # %overflow5057; RV64ZICOND-NEXT:    li a0, 05058; RV64ZICOND-NEXT:    ret5059; RV64ZICOND-NEXT:  .LBB63_2: # %continue5060; RV64ZICOND-NEXT:    li a0, 15061; RV64ZICOND-NEXT:    ret5062entry:5063  %t = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %v1, i32 %v2)5064  %val = extractvalue {i32, i1} %t, 05065  %obit = extractvalue {i32, i1} %t, 15066  br i1 %obit, label %overflow, label %continue5067 5068overflow:5069  ret i1 false5070 5071continue:5072  ret i1 true5073}5074 5075define zeroext i1 @umulo.br.i64(i64 %v1, i64 %v2) {5076; RV32-LABEL: umulo.br.i64:5077; RV32:       # %bb.0: # %entry5078; RV32-NEXT:    mul a4, a3, a05079; RV32-NEXT:    mul a5, a1, a25080; RV32-NEXT:    mulhu a6, a0, a25081; RV32-NEXT:    mulhu a0, a3, a05082; RV32-NEXT:    snez a3, a35083; RV32-NEXT:    mulhu a2, a1, a25084; RV32-NEXT:    snez a1, a15085; RV32-NEXT:    add a4, a5, a45086; RV32-NEXT:    and a1, a1, a35087; RV32-NEXT:    snez a2, a25088; RV32-NEXT:    snez a0, a05089; RV32-NEXT:    add a4, a6, a45090; RV32-NEXT:    or a1, a1, a25091; RV32-NEXT:    sltu a2, a4, a65092; RV32-NEXT:    or a0, a1, a05093; RV32-NEXT:    or a0, a0, a25094; RV32-NEXT:    beqz a0, .LBB64_25095; RV32-NEXT:  # %bb.1: # %overflow5096; RV32-NEXT:    li a0, 05097; RV32-NEXT:    ret5098; RV32-NEXT:  .LBB64_2: # %continue5099; RV32-NEXT:    li a0, 15100; RV32-NEXT:    ret5101;5102; RV64-LABEL: umulo.br.i64:5103; RV64:       # %bb.0: # %entry5104; RV64-NEXT:    mulhu a0, a0, a15105; RV64-NEXT:    beqz a0, .LBB64_25106; RV64-NEXT:  # %bb.1: # %overflow5107; RV64-NEXT:    li a0, 05108; RV64-NEXT:    ret5109; RV64-NEXT:  .LBB64_2: # %continue5110; RV64-NEXT:    li a0, 15111; RV64-NEXT:    ret5112;5113; RV32ZBA-LABEL: umulo.br.i64:5114; RV32ZBA:       # %bb.0: # %entry5115; RV32ZBA-NEXT:    mul a4, a3, a05116; RV32ZBA-NEXT:    mul a5, a1, a25117; RV32ZBA-NEXT:    mulhu a6, a0, a25118; RV32ZBA-NEXT:    mulhu a0, a3, a05119; RV32ZBA-NEXT:    snez a3, a35120; RV32ZBA-NEXT:    mulhu a2, a1, a25121; RV32ZBA-NEXT:    snez a1, a15122; RV32ZBA-NEXT:    add a4, a5, a45123; RV32ZBA-NEXT:    and a1, a1, a35124; RV32ZBA-NEXT:    snez a2, a25125; RV32ZBA-NEXT:    snez a0, a05126; RV32ZBA-NEXT:    add a4, a6, a45127; RV32ZBA-NEXT:    or a1, a1, a25128; RV32ZBA-NEXT:    sltu a2, a4, a65129; RV32ZBA-NEXT:    or a0, a1, a05130; RV32ZBA-NEXT:    or a0, a0, a25131; RV32ZBA-NEXT:    beqz a0, .LBB64_25132; RV32ZBA-NEXT:  # %bb.1: # %overflow5133; RV32ZBA-NEXT:    li a0, 05134; RV32ZBA-NEXT:    ret5135; RV32ZBA-NEXT:  .LBB64_2: # %continue5136; RV32ZBA-NEXT:    li a0, 15137; RV32ZBA-NEXT:    ret5138;5139; RV64ZBA-LABEL: umulo.br.i64:5140; RV64ZBA:       # %bb.0: # %entry5141; RV64ZBA-NEXT:    mulhu a0, a0, a15142; RV64ZBA-NEXT:    beqz a0, .LBB64_25143; RV64ZBA-NEXT:  # %bb.1: # %overflow5144; RV64ZBA-NEXT:    li a0, 05145; RV64ZBA-NEXT:    ret5146; RV64ZBA-NEXT:  .LBB64_2: # %continue5147; RV64ZBA-NEXT:    li a0, 15148; RV64ZBA-NEXT:    ret5149;5150; RV32ZICOND-LABEL: umulo.br.i64:5151; RV32ZICOND:       # %bb.0: # %entry5152; RV32ZICOND-NEXT:    mul a4, a3, a05153; RV32ZICOND-NEXT:    mul a5, a1, a25154; RV32ZICOND-NEXT:    add a4, a5, a45155; RV32ZICOND-NEXT:    mulhu a5, a0, a25156; RV32ZICOND-NEXT:    mulhu a0, a3, a05157; RV32ZICOND-NEXT:    snez a3, a35158; RV32ZICOND-NEXT:    mulhu a2, a1, a25159; RV32ZICOND-NEXT:    czero.eqz a1, a3, a15160; RV32ZICOND-NEXT:    snez a2, a25161; RV32ZICOND-NEXT:    snez a0, a05162; RV32ZICOND-NEXT:    add a4, a5, a45163; RV32ZICOND-NEXT:    or a1, a1, a25164; RV32ZICOND-NEXT:    sltu a2, a4, a55165; RV32ZICOND-NEXT:    or a0, a1, a05166; RV32ZICOND-NEXT:    or a0, a0, a25167; RV32ZICOND-NEXT:    beqz a0, .LBB64_25168; RV32ZICOND-NEXT:  # %bb.1: # %overflow5169; RV32ZICOND-NEXT:    li a0, 05170; RV32ZICOND-NEXT:    ret5171; RV32ZICOND-NEXT:  .LBB64_2: # %continue5172; RV32ZICOND-NEXT:    li a0, 15173; RV32ZICOND-NEXT:    ret5174;5175; RV64ZICOND-LABEL: umulo.br.i64:5176; RV64ZICOND:       # %bb.0: # %entry5177; RV64ZICOND-NEXT:    mulhu a0, a0, a15178; RV64ZICOND-NEXT:    beqz a0, .LBB64_25179; RV64ZICOND-NEXT:  # %bb.1: # %overflow5180; RV64ZICOND-NEXT:    li a0, 05181; RV64ZICOND-NEXT:    ret5182; RV64ZICOND-NEXT:  .LBB64_2: # %continue5183; RV64ZICOND-NEXT:    li a0, 15184; RV64ZICOND-NEXT:    ret5185entry:5186  %t = call {i64, i1} @llvm.umul.with.overflow.i64(i64 %v1, i64 %v2)5187  %val = extractvalue {i64, i1} %t, 05188  %obit = extractvalue {i64, i1} %t, 15189  br i1 %obit, label %overflow, label %continue5190 5191overflow:5192  ret i1 false5193 5194continue:5195  ret i1 true5196}5197 5198define zeroext i1 @umulo2.br.i64(i64 %v1) {5199; RV32-LABEL: umulo2.br.i64:5200; RV32:       # %bb.0: # %entry5201; RV32-NEXT:    add a2, a0, a05202; RV32-NEXT:    sltu a0, a2, a05203; RV32-NEXT:    add a2, a1, a15204; RV32-NEXT:    add a2, a2, a05205; RV32-NEXT:    beq a2, a1, .LBB65_25206; RV32-NEXT:  # %bb.1: # %entry5207; RV32-NEXT:    sltu a0, a2, a15208; RV32-NEXT:  .LBB65_2: # %entry5209; RV32-NEXT:    beqz a0, .LBB65_45210; RV32-NEXT:  # %bb.3: # %overflow5211; RV32-NEXT:    li a0, 05212; RV32-NEXT:    ret5213; RV32-NEXT:  .LBB65_4: # %continue5214; RV32-NEXT:    li a0, 15215; RV32-NEXT:    ret5216;5217; RV64-LABEL: umulo2.br.i64:5218; RV64:       # %bb.0: # %entry5219; RV64-NEXT:    add a1, a0, a05220; RV64-NEXT:    bgeu a1, a0, .LBB65_25221; RV64-NEXT:  # %bb.1: # %overflow5222; RV64-NEXT:    li a0, 05223; RV64-NEXT:    ret5224; RV64-NEXT:  .LBB65_2: # %continue5225; RV64-NEXT:    li a0, 15226; RV64-NEXT:    ret5227;5228; RV32ZBA-LABEL: umulo2.br.i64:5229; RV32ZBA:       # %bb.0: # %entry5230; RV32ZBA-NEXT:    add a2, a0, a05231; RV32ZBA-NEXT:    sltu a0, a2, a05232; RV32ZBA-NEXT:    add a2, a1, a15233; RV32ZBA-NEXT:    add a2, a2, a05234; RV32ZBA-NEXT:    beq a2, a1, .LBB65_25235; RV32ZBA-NEXT:  # %bb.1: # %entry5236; RV32ZBA-NEXT:    sltu a0, a2, a15237; RV32ZBA-NEXT:  .LBB65_2: # %entry5238; RV32ZBA-NEXT:    beqz a0, .LBB65_45239; RV32ZBA-NEXT:  # %bb.3: # %overflow5240; RV32ZBA-NEXT:    li a0, 05241; RV32ZBA-NEXT:    ret5242; RV32ZBA-NEXT:  .LBB65_4: # %continue5243; RV32ZBA-NEXT:    li a0, 15244; RV32ZBA-NEXT:    ret5245;5246; RV64ZBA-LABEL: umulo2.br.i64:5247; RV64ZBA:       # %bb.0: # %entry5248; RV64ZBA-NEXT:    add a1, a0, a05249; RV64ZBA-NEXT:    bgeu a1, a0, .LBB65_25250; RV64ZBA-NEXT:  # %bb.1: # %overflow5251; RV64ZBA-NEXT:    li a0, 05252; RV64ZBA-NEXT:    ret5253; RV64ZBA-NEXT:  .LBB65_2: # %continue5254; RV64ZBA-NEXT:    li a0, 15255; RV64ZBA-NEXT:    ret5256;5257; RV32ZICOND-LABEL: umulo2.br.i64:5258; RV32ZICOND:       # %bb.0: # %entry5259; RV32ZICOND-NEXT:    add a2, a0, a05260; RV32ZICOND-NEXT:    add a3, a1, a15261; RV32ZICOND-NEXT:    sltu a0, a2, a05262; RV32ZICOND-NEXT:    add a3, a3, a05263; RV32ZICOND-NEXT:    xor a2, a3, a15264; RV32ZICOND-NEXT:    sltu a1, a3, a15265; RV32ZICOND-NEXT:    czero.eqz a1, a1, a25266; RV32ZICOND-NEXT:    czero.nez a0, a0, a25267; RV32ZICOND-NEXT:    or a0, a0, a15268; RV32ZICOND-NEXT:    beqz a0, .LBB65_25269; RV32ZICOND-NEXT:  # %bb.1: # %overflow5270; RV32ZICOND-NEXT:    li a0, 05271; RV32ZICOND-NEXT:    ret5272; RV32ZICOND-NEXT:  .LBB65_2: # %continue5273; RV32ZICOND-NEXT:    li a0, 15274; RV32ZICOND-NEXT:    ret5275;5276; RV64ZICOND-LABEL: umulo2.br.i64:5277; RV64ZICOND:       # %bb.0: # %entry5278; RV64ZICOND-NEXT:    add a1, a0, a05279; RV64ZICOND-NEXT:    bgeu a1, a0, .LBB65_25280; RV64ZICOND-NEXT:  # %bb.1: # %overflow5281; RV64ZICOND-NEXT:    li a0, 05282; RV64ZICOND-NEXT:    ret5283; RV64ZICOND-NEXT:  .LBB65_2: # %continue5284; RV64ZICOND-NEXT:    li a0, 15285; RV64ZICOND-NEXT:    ret5286entry:5287  %t = call {i64, i1} @llvm.umul.with.overflow.i64(i64 %v1, i64 2)5288  %val = extractvalue {i64, i1} %t, 05289  %obit = extractvalue {i64, i1} %t, 15290  br i1 %obit, label %overflow, label %continue5291 5292overflow:5293  ret i1 false5294 5295continue:5296  ret i1 true5297}5298 5299define zeroext i1 @uaddo.i64.constant(i64 %v1, ptr %res) {5300; RV32-LABEL: uaddo.i64.constant:5301; RV32:       # %bb.0: # %entry5302; RV32-NEXT:    addi a3, a0, 25303; RV32-NEXT:    sltu a0, a3, a05304; RV32-NEXT:    add a4, a1, a05305; RV32-NEXT:    sltu a1, a4, a15306; RV32-NEXT:    and a0, a0, a15307; RV32-NEXT:    sw a3, 0(a2)5308; RV32-NEXT:    sw a4, 4(a2)5309; RV32-NEXT:    ret5310;5311; RV64-LABEL: uaddo.i64.constant:5312; RV64:       # %bb.0: # %entry5313; RV64-NEXT:    addi a2, a0, 25314; RV64-NEXT:    sltu a0, a2, a05315; RV64-NEXT:    sd a2, 0(a1)5316; RV64-NEXT:    ret5317;5318; RV32ZBA-LABEL: uaddo.i64.constant:5319; RV32ZBA:       # %bb.0: # %entry5320; RV32ZBA-NEXT:    addi a3, a0, 25321; RV32ZBA-NEXT:    sltu a0, a3, a05322; RV32ZBA-NEXT:    add a4, a1, a05323; RV32ZBA-NEXT:    sltu a1, a4, a15324; RV32ZBA-NEXT:    and a0, a0, a15325; RV32ZBA-NEXT:    sw a3, 0(a2)5326; RV32ZBA-NEXT:    sw a4, 4(a2)5327; RV32ZBA-NEXT:    ret5328;5329; RV64ZBA-LABEL: uaddo.i64.constant:5330; RV64ZBA:       # %bb.0: # %entry5331; RV64ZBA-NEXT:    addi a2, a0, 25332; RV64ZBA-NEXT:    sltu a0, a2, a05333; RV64ZBA-NEXT:    sd a2, 0(a1)5334; RV64ZBA-NEXT:    ret5335;5336; RV32ZICOND-LABEL: uaddo.i64.constant:5337; RV32ZICOND:       # %bb.0: # %entry5338; RV32ZICOND-NEXT:    addi a3, a0, 25339; RV32ZICOND-NEXT:    sltu a0, a3, a05340; RV32ZICOND-NEXT:    add a4, a1, a05341; RV32ZICOND-NEXT:    sltu a1, a4, a15342; RV32ZICOND-NEXT:    and a0, a0, a15343; RV32ZICOND-NEXT:    sw a3, 0(a2)5344; RV32ZICOND-NEXT:    sw a4, 4(a2)5345; RV32ZICOND-NEXT:    ret5346;5347; RV64ZICOND-LABEL: uaddo.i64.constant:5348; RV64ZICOND:       # %bb.0: # %entry5349; RV64ZICOND-NEXT:    addi a2, a0, 25350; RV64ZICOND-NEXT:    sltu a0, a2, a05351; RV64ZICOND-NEXT:    sd a2, 0(a1)5352; RV64ZICOND-NEXT:    ret5353entry:5354  %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %v1, i64 2)5355  %val = extractvalue {i64, i1} %t, 05356  %obit = extractvalue {i64, i1} %t, 15357  store i64 %val, ptr %res5358  ret i1 %obit5359}5360 5361define zeroext i1 @uaddo.i64.constant_2048(i64 %v1, ptr %res) {5362; RV32-LABEL: uaddo.i64.constant_2048:5363; RV32:       # %bb.0: # %entry5364; RV32-NEXT:    addi a3, a0, 20475365; RV32-NEXT:    addi a3, a3, 15366; RV32-NEXT:    sltu a0, a3, a05367; RV32-NEXT:    add a4, a1, a05368; RV32-NEXT:    sltu a1, a4, a15369; RV32-NEXT:    and a0, a0, a15370; RV32-NEXT:    sw a3, 0(a2)5371; RV32-NEXT:    sw a4, 4(a2)5372; RV32-NEXT:    ret5373;5374; RV64-LABEL: uaddo.i64.constant_2048:5375; RV64:       # %bb.0: # %entry5376; RV64-NEXT:    addi a2, a0, 20475377; RV64-NEXT:    addi a2, a2, 15378; RV64-NEXT:    sltu a0, a2, a05379; RV64-NEXT:    sd a2, 0(a1)5380; RV64-NEXT:    ret5381;5382; RV32ZBA-LABEL: uaddo.i64.constant_2048:5383; RV32ZBA:       # %bb.0: # %entry5384; RV32ZBA-NEXT:    addi a3, a0, 20475385; RV32ZBA-NEXT:    addi a3, a3, 15386; RV32ZBA-NEXT:    sltu a0, a3, a05387; RV32ZBA-NEXT:    add a4, a1, a05388; RV32ZBA-NEXT:    sltu a1, a4, a15389; RV32ZBA-NEXT:    and a0, a0, a15390; RV32ZBA-NEXT:    sw a3, 0(a2)5391; RV32ZBA-NEXT:    sw a4, 4(a2)5392; RV32ZBA-NEXT:    ret5393;5394; RV64ZBA-LABEL: uaddo.i64.constant_2048:5395; RV64ZBA:       # %bb.0: # %entry5396; RV64ZBA-NEXT:    addi a2, a0, 20475397; RV64ZBA-NEXT:    addi a2, a2, 15398; RV64ZBA-NEXT:    sltu a0, a2, a05399; RV64ZBA-NEXT:    sd a2, 0(a1)5400; RV64ZBA-NEXT:    ret5401;5402; RV32ZICOND-LABEL: uaddo.i64.constant_2048:5403; RV32ZICOND:       # %bb.0: # %entry5404; RV32ZICOND-NEXT:    addi a3, a0, 20475405; RV32ZICOND-NEXT:    addi a3, a3, 15406; RV32ZICOND-NEXT:    sltu a0, a3, a05407; RV32ZICOND-NEXT:    add a4, a1, a05408; RV32ZICOND-NEXT:    sltu a1, a4, a15409; RV32ZICOND-NEXT:    and a0, a0, a15410; RV32ZICOND-NEXT:    sw a3, 0(a2)5411; RV32ZICOND-NEXT:    sw a4, 4(a2)5412; RV32ZICOND-NEXT:    ret5413;5414; RV64ZICOND-LABEL: uaddo.i64.constant_2048:5415; RV64ZICOND:       # %bb.0: # %entry5416; RV64ZICOND-NEXT:    addi a2, a0, 20475417; RV64ZICOND-NEXT:    addi a2, a2, 15418; RV64ZICOND-NEXT:    sltu a0, a2, a05419; RV64ZICOND-NEXT:    sd a2, 0(a1)5420; RV64ZICOND-NEXT:    ret5421entry:5422  %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %v1, i64 2048)5423  %val = extractvalue {i64, i1} %t, 05424  %obit = extractvalue {i64, i1} %t, 15425  store i64 %val, ptr %res5426  ret i1 %obit5427}5428 5429define zeroext i1 @uaddo.i64.constant_2049(i64 %v1, ptr %res) {5430; RV32-LABEL: uaddo.i64.constant_2049:5431; RV32:       # %bb.0: # %entry5432; RV32-NEXT:    addi a3, a0, 20475433; RV32-NEXT:    addi a3, a3, 25434; RV32-NEXT:    sltu a0, a3, a05435; RV32-NEXT:    add a4, a1, a05436; RV32-NEXT:    sltu a1, a4, a15437; RV32-NEXT:    and a0, a0, a15438; RV32-NEXT:    sw a3, 0(a2)5439; RV32-NEXT:    sw a4, 4(a2)5440; RV32-NEXT:    ret5441;5442; RV64-LABEL: uaddo.i64.constant_2049:5443; RV64:       # %bb.0: # %entry5444; RV64-NEXT:    addi a2, a0, 20475445; RV64-NEXT:    addi a2, a2, 25446; RV64-NEXT:    sltu a0, a2, a05447; RV64-NEXT:    sd a2, 0(a1)5448; RV64-NEXT:    ret5449;5450; RV32ZBA-LABEL: uaddo.i64.constant_2049:5451; RV32ZBA:       # %bb.0: # %entry5452; RV32ZBA-NEXT:    addi a3, a0, 20475453; RV32ZBA-NEXT:    addi a3, a3, 25454; RV32ZBA-NEXT:    sltu a0, a3, a05455; RV32ZBA-NEXT:    add a4, a1, a05456; RV32ZBA-NEXT:    sltu a1, a4, a15457; RV32ZBA-NEXT:    and a0, a0, a15458; RV32ZBA-NEXT:    sw a3, 0(a2)5459; RV32ZBA-NEXT:    sw a4, 4(a2)5460; RV32ZBA-NEXT:    ret5461;5462; RV64ZBA-LABEL: uaddo.i64.constant_2049:5463; RV64ZBA:       # %bb.0: # %entry5464; RV64ZBA-NEXT:    addi a2, a0, 20475465; RV64ZBA-NEXT:    addi a2, a2, 25466; RV64ZBA-NEXT:    sltu a0, a2, a05467; RV64ZBA-NEXT:    sd a2, 0(a1)5468; RV64ZBA-NEXT:    ret5469;5470; RV32ZICOND-LABEL: uaddo.i64.constant_2049:5471; RV32ZICOND:       # %bb.0: # %entry5472; RV32ZICOND-NEXT:    addi a3, a0, 20475473; RV32ZICOND-NEXT:    addi a3, a3, 25474; RV32ZICOND-NEXT:    sltu a0, a3, a05475; RV32ZICOND-NEXT:    add a4, a1, a05476; RV32ZICOND-NEXT:    sltu a1, a4, a15477; RV32ZICOND-NEXT:    and a0, a0, a15478; RV32ZICOND-NEXT:    sw a3, 0(a2)5479; RV32ZICOND-NEXT:    sw a4, 4(a2)5480; RV32ZICOND-NEXT:    ret5481;5482; RV64ZICOND-LABEL: uaddo.i64.constant_2049:5483; RV64ZICOND:       # %bb.0: # %entry5484; RV64ZICOND-NEXT:    addi a2, a0, 20475485; RV64ZICOND-NEXT:    addi a2, a2, 25486; RV64ZICOND-NEXT:    sltu a0, a2, a05487; RV64ZICOND-NEXT:    sd a2, 0(a1)5488; RV64ZICOND-NEXT:    ret5489entry:5490  %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %v1, i64 2049)5491  %val = extractvalue {i64, i1} %t, 05492  %obit = extractvalue {i64, i1} %t, 15493  store i64 %val, ptr %res5494  ret i1 %obit5495}5496 5497define i64 @uaddo.i64.constant_setcc_on_overflow_flag(ptr %p) {5498; RV32-LABEL: uaddo.i64.constant_setcc_on_overflow_flag:5499; RV32:       # %bb.0: # %entry5500; RV32-NEXT:    lw a1, 0(a0)5501; RV32-NEXT:    lw a2, 4(a0)5502; RV32-NEXT:    addi a0, a1, 25503; RV32-NEXT:    sltu a3, a0, a15504; RV32-NEXT:    add a1, a2, a35505; RV32-NEXT:    sltu a2, a1, a25506; RV32-NEXT:    and a2, a3, a25507; RV32-NEXT:    bnez a2, .LBB69_25508; RV32-NEXT:  # %bb.1: # %IfOverflow5509; RV32-NEXT:    li a0, 05510; RV32-NEXT:    li a1, 05511; RV32-NEXT:  .LBB69_2: # %IfNoOverflow5512; RV32-NEXT:    ret5513;5514; RV64-LABEL: uaddo.i64.constant_setcc_on_overflow_flag:5515; RV64:       # %bb.0: # %entry5516; RV64-NEXT:    ld a1, 0(a0)5517; RV64-NEXT:    addi a0, a1, 25518; RV64-NEXT:    bltu a0, a1, .LBB69_25519; RV64-NEXT:  # %bb.1: # %IfOverflow5520; RV64-NEXT:    li a0, 05521; RV64-NEXT:  .LBB69_2: # %IfNoOverflow5522; RV64-NEXT:    ret5523;5524; RV32ZBA-LABEL: uaddo.i64.constant_setcc_on_overflow_flag:5525; RV32ZBA:       # %bb.0: # %entry5526; RV32ZBA-NEXT:    lw a1, 0(a0)5527; RV32ZBA-NEXT:    lw a2, 4(a0)5528; RV32ZBA-NEXT:    addi a0, a1, 25529; RV32ZBA-NEXT:    sltu a3, a0, a15530; RV32ZBA-NEXT:    add a1, a2, a35531; RV32ZBA-NEXT:    sltu a2, a1, a25532; RV32ZBA-NEXT:    and a2, a3, a25533; RV32ZBA-NEXT:    bnez a2, .LBB69_25534; RV32ZBA-NEXT:  # %bb.1: # %IfOverflow5535; RV32ZBA-NEXT:    li a0, 05536; RV32ZBA-NEXT:    li a1, 05537; RV32ZBA-NEXT:  .LBB69_2: # %IfNoOverflow5538; RV32ZBA-NEXT:    ret5539;5540; RV64ZBA-LABEL: uaddo.i64.constant_setcc_on_overflow_flag:5541; RV64ZBA:       # %bb.0: # %entry5542; RV64ZBA-NEXT:    ld a1, 0(a0)5543; RV64ZBA-NEXT:    addi a0, a1, 25544; RV64ZBA-NEXT:    bltu a0, a1, .LBB69_25545; RV64ZBA-NEXT:  # %bb.1: # %IfOverflow5546; RV64ZBA-NEXT:    li a0, 05547; RV64ZBA-NEXT:  .LBB69_2: # %IfNoOverflow5548; RV64ZBA-NEXT:    ret5549;5550; RV32ZICOND-LABEL: uaddo.i64.constant_setcc_on_overflow_flag:5551; RV32ZICOND:       # %bb.0: # %entry5552; RV32ZICOND-NEXT:    lw a1, 0(a0)5553; RV32ZICOND-NEXT:    lw a2, 4(a0)5554; RV32ZICOND-NEXT:    addi a0, a1, 25555; RV32ZICOND-NEXT:    sltu a3, a0, a15556; RV32ZICOND-NEXT:    add a1, a2, a35557; RV32ZICOND-NEXT:    sltu a2, a1, a25558; RV32ZICOND-NEXT:    and a2, a3, a25559; RV32ZICOND-NEXT:    bnez a2, .LBB69_25560; RV32ZICOND-NEXT:  # %bb.1: # %IfOverflow5561; RV32ZICOND-NEXT:    li a0, 05562; RV32ZICOND-NEXT:    li a1, 05563; RV32ZICOND-NEXT:  .LBB69_2: # %IfNoOverflow5564; RV32ZICOND-NEXT:    ret5565;5566; RV64ZICOND-LABEL: uaddo.i64.constant_setcc_on_overflow_flag:5567; RV64ZICOND:       # %bb.0: # %entry5568; RV64ZICOND-NEXT:    ld a1, 0(a0)5569; RV64ZICOND-NEXT:    addi a0, a1, 25570; RV64ZICOND-NEXT:    bltu a0, a1, .LBB69_25571; RV64ZICOND-NEXT:  # %bb.1: # %IfOverflow5572; RV64ZICOND-NEXT:    li a0, 05573; RV64ZICOND-NEXT:  .LBB69_2: # %IfNoOverflow5574; RV64ZICOND-NEXT:    ret5575entry:5576  %v1 = load i64, ptr %p5577  %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %v1, i64 2)5578  %val = extractvalue {i64, i1} %t, 05579  %obit = extractvalue {i64, i1} %t, 15580  br i1 %obit, label %IfNoOverflow, label %IfOverflow5581IfOverflow:5582  ret i64 05583IfNoOverflow:5584  ret i64 %val5585}5586 5587