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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=riscv32 -mattr=+m -verify-machineinstrs < %s \3; RUN: | FileCheck %s -check-prefix=RV32IM4; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-xqciac -verify-machineinstrs < %s \5; RUN: | FileCheck %s -check-prefix=RV32IMXQCIAC6; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-xqciac,+zba -verify-machineinstrs < %s \7; RUN: | FileCheck %s -check-prefix=RV32IZBAMXQCIAC8 9define dso_local i32 @mul(i32 %a, i32 %b) local_unnamed_addr #0 {10; RV32IM-LABEL: mul:11; RV32IM: # %bb.0: # %entry12; RV32IM-NEXT: slli a0, a1, 513; RV32IM-NEXT: add a0, a0, a114; RV32IM-NEXT: ret15;16; RV32IMXQCIAC-LABEL: mul:17; RV32IMXQCIAC: # %bb.0: # %entry18; RV32IMXQCIAC-NEXT: li a0, 3319; RV32IMXQCIAC-NEXT: mul a0, a1, a020; RV32IMXQCIAC-NEXT: ret21;22; RV32IZBAMXQCIAC-LABEL: mul:23; RV32IZBAMXQCIAC: # %bb.0: # %entry24; RV32IZBAMXQCIAC-NEXT: li a0, 3325; RV32IZBAMXQCIAC-NEXT: mul a0, a1, a026; RV32IZBAMXQCIAC-NEXT: ret27entry:28 %mul = mul nsw i32 %b, 3329 ret i32 %mul30}31 32define dso_local i32 @muliadd(i32 %a, i32 %b) local_unnamed_addr #0 {33; RV32IM-LABEL: muliadd:34; RV32IM: # %bb.0: # %entry35; RV32IM-NEXT: li a2, 16536; RV32IM-NEXT: mul a1, a1, a237; RV32IM-NEXT: add a0, a1, a038; RV32IM-NEXT: ret39;40; RV32IMXQCIAC-LABEL: muliadd:41; RV32IMXQCIAC: # %bb.0: # %entry42; RV32IMXQCIAC-NEXT: qc.muliadd a0, a1, 16543; RV32IMXQCIAC-NEXT: ret44;45; RV32IZBAMXQCIAC-LABEL: muliadd:46; RV32IZBAMXQCIAC: # %bb.0: # %entry47; RV32IZBAMXQCIAC-NEXT: qc.muliadd a0, a1, 16548; RV32IZBAMXQCIAC-NEXT: ret49entry:50 %mul = mul nsw i32 %b, 16551 %add = add nsw i32 %mul, %a52 ret i32 %add53}54 55define dso_local i32 @muliadd2(i32 %a, i32 %b) local_unnamed_addr #0 {56; RV32IM-LABEL: muliadd2:57; RV32IM: # %bb.0: # %entry58; RV32IM-NEXT: li a2, 111159; RV32IM-NEXT: mul a1, a1, a260; RV32IM-NEXT: add a0, a1, a061; RV32IM-NEXT: ret62;63; RV32IMXQCIAC-LABEL: muliadd2:64; RV32IMXQCIAC: # %bb.0: # %entry65; RV32IMXQCIAC-NEXT: qc.muliadd a0, a1, 111166; RV32IMXQCIAC-NEXT: ret67;68; RV32IZBAMXQCIAC-LABEL: muliadd2:69; RV32IZBAMXQCIAC: # %bb.0: # %entry70; RV32IZBAMXQCIAC-NEXT: qc.muliadd a0, a1, 111171; RV32IZBAMXQCIAC-NEXT: ret72entry:73 %mul = mul nsw i32 %b, 111174 %add = add nsw i32 %mul, %a75 ret i32 %add76}77 78define dso_local i32 @muliadd_neg(i32 %a, i32 %b) local_unnamed_addr #0 {79; RV32IM-LABEL: muliadd_neg:80; RV32IM: # %bb.0: # %entry81; RV32IM-NEXT: li a2, -16582; RV32IM-NEXT: mul a1, a1, a283; RV32IM-NEXT: add a0, a1, a084; RV32IM-NEXT: ret85;86; RV32IMXQCIAC-LABEL: muliadd_neg:87; RV32IMXQCIAC: # %bb.0: # %entry88; RV32IMXQCIAC-NEXT: qc.muliadd a0, a1, -16589; RV32IMXQCIAC-NEXT: ret90;91; RV32IZBAMXQCIAC-LABEL: muliadd_neg:92; RV32IZBAMXQCIAC: # %bb.0: # %entry93; RV32IZBAMXQCIAC-NEXT: qc.muliadd a0, a1, -16594; RV32IZBAMXQCIAC-NEXT: ret95entry:96 %mul = mul nsw i32 %b, -16597 %add = add nsw i32 %mul, %a98 ret i32 %add99}100 101define dso_local i32 @muliadd_neg2(i32 %a, i32 %b) local_unnamed_addr #0 {102; RV32IM-LABEL: muliadd_neg2:103; RV32IM: # %bb.0: # %entry104; RV32IM-NEXT: li a2, -2045105; RV32IM-NEXT: mul a1, a1, a2106; RV32IM-NEXT: add a0, a1, a0107; RV32IM-NEXT: ret108;109; RV32IMXQCIAC-LABEL: muliadd_neg2:110; RV32IMXQCIAC: # %bb.0: # %entry111; RV32IMXQCIAC-NEXT: qc.muliadd a0, a1, -2045112; RV32IMXQCIAC-NEXT: ret113;114; RV32IZBAMXQCIAC-LABEL: muliadd_neg2:115; RV32IZBAMXQCIAC: # %bb.0: # %entry116; RV32IZBAMXQCIAC-NEXT: qc.muliadd a0, a1, -2045117; RV32IZBAMXQCIAC-NEXT: ret118entry:119 %mul = mul nsw i32 %b, -2045120 %add = add nsw i32 %mul, %a121 ret i32 %add122}123 124define dso_local i32 @pow2immplus1(i32 %a, i32 %b) local_unnamed_addr #0 {125; RV32IM-LABEL: pow2immplus1:126; RV32IM: # %bb.0: # %entry127; RV32IM-NEXT: slli a2, a1, 5128; RV32IM-NEXT: add a0, a1, a0129; RV32IM-NEXT: add a0, a2, a0130; RV32IM-NEXT: ret131;132; RV32IMXQCIAC-LABEL: pow2immplus1:133; RV32IMXQCIAC: # %bb.0: # %entry134; RV32IMXQCIAC-NEXT: qc.muliadd a0, a1, 33135; RV32IMXQCIAC-NEXT: ret136;137; RV32IZBAMXQCIAC-LABEL: pow2immplus1:138; RV32IZBAMXQCIAC: # %bb.0: # %entry139; RV32IZBAMXQCIAC-NEXT: qc.muliadd a0, a1, 33140; RV32IZBAMXQCIAC-NEXT: ret141entry:142 %mul = mul nsw i32 %b, 33143 %add = add nsw i32 %mul, %a144 ret i32 %add145}146 147define dso_local i32 @pow2immminus2(i32 %a, i32 %b) local_unnamed_addr #0 {148; RV32IM-LABEL: pow2immminus2:149; RV32IM: # %bb.0: # %entry150; RV32IM-NEXT: slli a2, a1, 1151; RV32IM-NEXT: slli a1, a1, 7152; RV32IM-NEXT: sub a1, a1, a2153; RV32IM-NEXT: add a0, a1, a0154; RV32IM-NEXT: ret155;156; RV32IMXQCIAC-LABEL: pow2immminus2:157; RV32IMXQCIAC: # %bb.0: # %entry158; RV32IMXQCIAC-NEXT: qc.muliadd a0, a1, 126159; RV32IMXQCIAC-NEXT: ret160;161; RV32IZBAMXQCIAC-LABEL: pow2immminus2:162; RV32IZBAMXQCIAC: # %bb.0: # %entry163; RV32IZBAMXQCIAC-NEXT: qc.muliadd a0, a1, 126164; RV32IZBAMXQCIAC-NEXT: ret165entry:166 %mul = mul nsw i32 %b, 126167 %add = add nsw i32 %mul, %a168 ret i32 %add169}170 171define dso_local i32 @pow2minuspow2(i32 %a, i32 %b) local_unnamed_addr #0 {172; RV32IM-LABEL: pow2minuspow2:173; RV32IM: # %bb.0: # %entry174; RV32IM-NEXT: slli a2, a1, 7175; RV32IM-NEXT: slli a1, a1, 8176; RV32IM-NEXT: add a1, a1, a2177; RV32IM-NEXT: add a0, a1, a0178; RV32IM-NEXT: ret179;180; RV32IMXQCIAC-LABEL: pow2minuspow2:181; RV32IMXQCIAC: # %bb.0: # %entry182; RV32IMXQCIAC-NEXT: qc.muliadd a0, a1, 384183; RV32IMXQCIAC-NEXT: ret184;185; RV32IZBAMXQCIAC-LABEL: pow2minuspow2:186; RV32IZBAMXQCIAC: # %bb.0: # %entry187; RV32IZBAMXQCIAC-NEXT: qc.muliadd a0, a1, 384188; RV32IZBAMXQCIAC-NEXT: ret189entry:190 %mul = mul nsw i32 %b, 384191 %add = add nsw i32 %mul, %a192 ret i32 %add193}194 195define dso_local i32 @gtsimm12(i32 %a, i32 %b) local_unnamed_addr #0 {196; RV32IM-LABEL: gtsimm12:197; RV32IM: # %bb.0: # %entry198; RV32IM-NEXT: lui a2, 1199; RV32IM-NEXT: addi a2, a2, 477200; RV32IM-NEXT: mul a1, a1, a2201; RV32IM-NEXT: add a0, a1, a0202; RV32IM-NEXT: ret203;204; RV32IMXQCIAC-LABEL: gtsimm12:205; RV32IMXQCIAC: # %bb.0: # %entry206; RV32IMXQCIAC-NEXT: lui a2, 1207; RV32IMXQCIAC-NEXT: addi a2, a2, 477208; RV32IMXQCIAC-NEXT: mul a1, a1, a2209; RV32IMXQCIAC-NEXT: add a0, a0, a1210; RV32IMXQCIAC-NEXT: ret211;212; RV32IZBAMXQCIAC-LABEL: gtsimm12:213; RV32IZBAMXQCIAC: # %bb.0: # %entry214; RV32IZBAMXQCIAC-NEXT: lui a2, 1215; RV32IZBAMXQCIAC-NEXT: addi a2, a2, 477216; RV32IZBAMXQCIAC-NEXT: mul a1, a1, a2217; RV32IZBAMXQCIAC-NEXT: add a0, a0, a1218; RV32IZBAMXQCIAC-NEXT: ret219entry:220 %mul = mul nsw i32 %b, 4573221 %add = add nsw i32 %mul, %a222 ret i32 %add223}224 225define dso_local i32 @pow2(i32 %a, i32 %b) local_unnamed_addr #0 {226; RV32IM-LABEL: pow2:227; RV32IM: # %bb.0: # %entry228; RV32IM-NEXT: slli a1, a1, 5229; RV32IM-NEXT: add a0, a1, a0230; RV32IM-NEXT: ret231;232; RV32IMXQCIAC-LABEL: pow2:233; RV32IMXQCIAC: # %bb.0: # %entry234; RV32IMXQCIAC-NEXT: qc.shladd a0, a1, a0, 5235; RV32IMXQCIAC-NEXT: ret236;237; RV32IZBAMXQCIAC-LABEL: pow2:238; RV32IZBAMXQCIAC: # %bb.0: # %entry239; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a1, a0, 5240; RV32IZBAMXQCIAC-NEXT: ret241entry:242 %mul = mul nsw i32 %b, 32243 %add = add nsw i32 %mul, %a244 ret i32 %add245}246 247define dso_local i32 @shxadd(i32 %a, i32 %b) local_unnamed_addr #0 {248; RV32IM-LABEL: shxadd:249; RV32IM: # %bb.0: # %entry250; RV32IM-NEXT: slli a1, a1, 1251; RV32IM-NEXT: add a0, a1, a0252; RV32IM-NEXT: ret253;254; RV32IMXQCIAC-LABEL: shxadd:255; RV32IMXQCIAC: # %bb.0: # %entry256; RV32IMXQCIAC-NEXT: slli a1, a1, 1257; RV32IMXQCIAC-NEXT: add a0, a0, a1258; RV32IMXQCIAC-NEXT: ret259;260; RV32IZBAMXQCIAC-LABEL: shxadd:261; RV32IZBAMXQCIAC: # %bb.0: # %entry262; RV32IZBAMXQCIAC-NEXT: qc.c.muliadd a0, a1, 2263; RV32IZBAMXQCIAC-NEXT: ret264entry:265 %mul = mul nsw i32 %b, 2266 %add = add nsw i32 %mul, %a267 ret i32 %add268}269 270define dso_local i32 @shladd(i32 %a, i32 %b) local_unnamed_addr #0 {271; RV32IM-LABEL: shladd:272; RV32IM: # %bb.0: # %entry273; RV32IM-NEXT: slli a1, a1, 31274; RV32IM-NEXT: add a0, a1, a0275; RV32IM-NEXT: ret276;277; RV32IMXQCIAC-LABEL: shladd:278; RV32IMXQCIAC: # %bb.0: # %entry279; RV32IMXQCIAC-NEXT: qc.shladd a0, a1, a0, 31280; RV32IMXQCIAC-NEXT: ret281;282; RV32IZBAMXQCIAC-LABEL: shladd:283; RV32IZBAMXQCIAC: # %bb.0: # %entry284; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a1, a0, 31285; RV32IZBAMXQCIAC-NEXT: ret286entry:287 %shl = shl nsw i32 %b, 31288 %add = add nsw i32 %shl, %a289 ret i32 %add290}291 292define dso_local i64 @shladd64(i64 %a, i64 %b) local_unnamed_addr #0 {293; RV32IM-LABEL: shladd64:294; RV32IM: # %bb.0: # %entry295; RV32IM-NEXT: srli a4, a2, 1296; RV32IM-NEXT: slli a3, a3, 31297; RV32IM-NEXT: slli a2, a2, 31298; RV32IM-NEXT: or a3, a3, a4299; RV32IM-NEXT: add a0, a2, a0300; RV32IM-NEXT: sltu a2, a0, a2301; RV32IM-NEXT: add a1, a3, a1302; RV32IM-NEXT: add a1, a1, a2303; RV32IM-NEXT: ret304;305; RV32IMXQCIAC-LABEL: shladd64:306; RV32IMXQCIAC: # %bb.0: # %entry307; RV32IMXQCIAC-NEXT: srli a4, a2, 1308; RV32IMXQCIAC-NEXT: qc.shladd a0, a2, a0, 31309; RV32IMXQCIAC-NEXT: slli a2, a2, 31310; RV32IMXQCIAC-NEXT: qc.shladd a3, a3, a4, 31311; RV32IMXQCIAC-NEXT: sltu a2, a0, a2312; RV32IMXQCIAC-NEXT: add a1, a1, a3313; RV32IMXQCIAC-NEXT: add a1, a1, a2314; RV32IMXQCIAC-NEXT: ret315;316; RV32IZBAMXQCIAC-LABEL: shladd64:317; RV32IZBAMXQCIAC: # %bb.0: # %entry318; RV32IZBAMXQCIAC-NEXT: srli a4, a2, 1319; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a2, a0, 31320; RV32IZBAMXQCIAC-NEXT: slli a2, a2, 31321; RV32IZBAMXQCIAC-NEXT: qc.shladd a3, a3, a4, 31322; RV32IZBAMXQCIAC-NEXT: sltu a2, a0, a2323; RV32IZBAMXQCIAC-NEXT: add a1, a1, a3324; RV32IZBAMXQCIAC-NEXT: add a1, a1, a2325; RV32IZBAMXQCIAC-NEXT: ret326entry:327 %shl = shl nsw i64 %b, 31328 %add = add nsw i64 %shl, %a329 ret i64 %add330}331 332define dso_local i32 @shladd_ordisjoint(i32 %a, i32 %b) local_unnamed_addr #0 {333; RV32IM-LABEL: shladd_ordisjoint:334; RV32IM: # %bb.0: # %entry335; RV32IM-NEXT: slli a1, a1, 22336; RV32IM-NEXT: or a0, a1, a0337; RV32IM-NEXT: ret338;339; RV32IMXQCIAC-LABEL: shladd_ordisjoint:340; RV32IMXQCIAC: # %bb.0: # %entry341; RV32IMXQCIAC-NEXT: qc.shladd a0, a1, a0, 22342; RV32IMXQCIAC-NEXT: ret343;344; RV32IZBAMXQCIAC-LABEL: shladd_ordisjoint:345; RV32IZBAMXQCIAC: # %bb.0: # %entry346; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a1, a0, 22347; RV32IZBAMXQCIAC-NEXT: ret348entry:349 %shl = shl nsw i32 %b, 22350 %or = or disjoint i32 %shl, %a351 ret i32 %or352}353 354define dso_local i32 @shladdc1c2(i32 %a, i32 %b) local_unnamed_addr #0 {355; RV32IM-LABEL: shladdc1c2:356; RV32IM: # %bb.0: # %entry357; RV32IM-NEXT: slli a0, a0, 31358; RV32IM-NEXT: slli a1, a1, 26359; RV32IM-NEXT: add a0, a0, a1360; RV32IM-NEXT: ret361;362; RV32IMXQCIAC-LABEL: shladdc1c2:363; RV32IMXQCIAC: # %bb.0: # %entry364; RV32IMXQCIAC-NEXT: slli a1, a1, 26365; RV32IMXQCIAC-NEXT: qc.shladd a0, a0, a1, 31366; RV32IMXQCIAC-NEXT: ret367;368; RV32IZBAMXQCIAC-LABEL: shladdc1c2:369; RV32IZBAMXQCIAC: # %bb.0: # %entry370; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a0, a1, 5371; RV32IZBAMXQCIAC-NEXT: slli a0, a0, 26372; RV32IZBAMXQCIAC-NEXT: ret373entry:374 %shlc1 = shl nsw i32 %a, 31375 %shlc2 = shl nsw i32 %b, 26376 %add = add nsw i32 %shlc1, %shlc2377 ret i32 %add378}379 380define dso_local i32 @shxaddc1c2(i32 %a, i32 %b) local_unnamed_addr #0 {381; RV32IM-LABEL: shxaddc1c2:382; RV32IM: # %bb.0: # %entry383; RV32IM-NEXT: slli a0, a0, 31384; RV32IM-NEXT: slli a1, a1, 28385; RV32IM-NEXT: add a0, a0, a1386; RV32IM-NEXT: ret387;388; RV32IMXQCIAC-LABEL: shxaddc1c2:389; RV32IMXQCIAC: # %bb.0: # %entry390; RV32IMXQCIAC-NEXT: slli a1, a1, 28391; RV32IMXQCIAC-NEXT: qc.shladd a0, a0, a1, 31392; RV32IMXQCIAC-NEXT: ret393;394; RV32IZBAMXQCIAC-LABEL: shxaddc1c2:395; RV32IZBAMXQCIAC: # %bb.0: # %entry396; RV32IZBAMXQCIAC-NEXT: sh3add a0, a0, a1397; RV32IZBAMXQCIAC-NEXT: slli a0, a0, 28398; RV32IZBAMXQCIAC-NEXT: ret399entry:400 %shlc1 = shl nsw i32 %a, 31401 %shlc2 = shl nsw i32 %b, 28402 %add = add nsw i32 %shlc1, %shlc2403 ret i32 %add404}405 406define dso_local i64 @shladdc1c264(i64 %a, i64 %b) local_unnamed_addr #0 {407; RV32IM-LABEL: shladdc1c264:408; RV32IM: # %bb.0: # %entry409; RV32IM-NEXT: slli a1, a0, 23410; RV32IM-NEXT: srli a0, a2, 12411; RV32IM-NEXT: slli a3, a3, 20412; RV32IM-NEXT: or a3, a3, a0413; RV32IM-NEXT: slli a0, a2, 20414; RV32IM-NEXT: add a1, a1, a3415; RV32IM-NEXT: ret416;417; RV32IMXQCIAC-LABEL: shladdc1c264:418; RV32IMXQCIAC: # %bb.0: # %entry419; RV32IMXQCIAC-NEXT: srli a1, a2, 12420; RV32IMXQCIAC-NEXT: qc.shladd a1, a3, a1, 20421; RV32IMXQCIAC-NEXT: slli a2, a2, 20422; RV32IMXQCIAC-NEXT: qc.shladd a1, a0, a1, 23423; RV32IMXQCIAC-NEXT: mv a0, a2424; RV32IMXQCIAC-NEXT: ret425;426; RV32IZBAMXQCIAC-LABEL: shladdc1c264:427; RV32IZBAMXQCIAC: # %bb.0: # %entry428; RV32IZBAMXQCIAC-NEXT: srli a1, a2, 12429; RV32IZBAMXQCIAC-NEXT: qc.shladd a1, a3, a1, 20430; RV32IZBAMXQCIAC-NEXT: slli a2, a2, 20431; RV32IZBAMXQCIAC-NEXT: qc.shladd a1, a0, a1, 23432; RV32IZBAMXQCIAC-NEXT: mv a0, a2433; RV32IZBAMXQCIAC-NEXT: ret434entry:435 %shlc1 = shl nsw i64 %a, 55436 %shlc2 = shl nsw i64 %b, 20437 %add = add nsw i64 %shlc1, %shlc2438 ret i64 %add439}440 441define dso_local i32 @shladdc1equalc2(i32 %a, i32 %b) local_unnamed_addr #0 {442; RV32IM-LABEL: shladdc1equalc2:443; RV32IM: # %bb.0: # %entry444; RV32IM-NEXT: slli a0, a0, 12445; RV32IM-NEXT: slli a1, a1, 12446; RV32IM-NEXT: add a0, a0, a1447; RV32IM-NEXT: ret448;449; RV32IMXQCIAC-LABEL: shladdc1equalc2:450; RV32IMXQCIAC: # %bb.0: # %entry451; RV32IMXQCIAC-NEXT: slli a1, a1, 12452; RV32IMXQCIAC-NEXT: qc.shladd a0, a0, a1, 12453; RV32IMXQCIAC-NEXT: ret454;455; RV32IZBAMXQCIAC-LABEL: shladdc1equalc2:456; RV32IZBAMXQCIAC: # %bb.0: # %entry457; RV32IZBAMXQCIAC-NEXT: slli a1, a1, 12458; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a0, a1, 12459; RV32IZBAMXQCIAC-NEXT: ret460entry:461 %shlc1 = shl nsw i32 %a, 12462 %shlc2 = shl nsw i32 %b, 12463 %add = add nsw i32 %shlc1, %shlc2464 ret i32 %add465}466 467define i32 @testmuliaddnegimm(i32 %a) {468; RV32IM-LABEL: testmuliaddnegimm:469; RV32IM: # %bb.0:470; RV32IM-NEXT: slli a1, a0, 1471; RV32IM-NEXT: add a0, a1, a0472; RV32IM-NEXT: li a1, 3473; RV32IM-NEXT: sub a0, a1, a0474; RV32IM-NEXT: ret475;476; RV32IMXQCIAC-LABEL: testmuliaddnegimm:477; RV32IMXQCIAC: # %bb.0:478; RV32IMXQCIAC-NEXT: li a1, 3479; RV32IMXQCIAC-NEXT: qc.muliadd a1, a0, -3480; RV32IMXQCIAC-NEXT: mv a0, a1481; RV32IMXQCIAC-NEXT: ret482;483; RV32IZBAMXQCIAC-LABEL: testmuliaddnegimm:484; RV32IZBAMXQCIAC: # %bb.0:485; RV32IZBAMXQCIAC-NEXT: li a1, 3486; RV32IZBAMXQCIAC-NEXT: qc.muliadd a1, a0, -3487; RV32IZBAMXQCIAC-NEXT: mv a0, a1488; RV32IZBAMXQCIAC-NEXT: ret489 %mul = mul i32 %a, -3490 %add = add i32 %mul, 3491 ret i32 %add492}493 494define i32 @add_shl_OneUse_1(i32 %x) {495; RV32IM-LABEL: add_shl_OneUse_1:496; RV32IM: # %bb.0:497; RV32IM-NEXT: ori a1, a0, 1498; RV32IM-NEXT: slli a0, a0, 4499; RV32IM-NEXT: ori a0, a0, 16500; RV32IM-NEXT: add a0, a0, a1501; RV32IM-NEXT: ret502;503; RV32IMXQCIAC-LABEL: add_shl_OneUse_1:504; RV32IMXQCIAC: # %bb.0:505; RV32IMXQCIAC-NEXT: ori a0, a0, 1506; RV32IMXQCIAC-NEXT: qc.shladd a0, a0, a0, 4507; RV32IMXQCIAC-NEXT: ret508;509; RV32IZBAMXQCIAC-LABEL: add_shl_OneUse_1:510; RV32IZBAMXQCIAC: # %bb.0:511; RV32IZBAMXQCIAC-NEXT: ori a0, a0, 1512; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a0, a0, 4513; RV32IZBAMXQCIAC-NEXT: ret514 %or = or i32 %x, 1515 %mul = shl i32 %or, 4516 %add = add i32 %mul, %or517 ret i32 %add518}519 520define i32 @add_shl_OneUse_2(i32 %x) {521; RV32IM-LABEL: add_shl_OneUse_2:522; RV32IM: # %bb.0:523; RV32IM-NEXT: ori a1, a0, 1524; RV32IM-NEXT: slli a0, a0, 10525; RV32IM-NEXT: ori a0, a0, 1024526; RV32IM-NEXT: add a0, a0, a1527; RV32IM-NEXT: ret528;529; RV32IMXQCIAC-LABEL: add_shl_OneUse_2:530; RV32IMXQCIAC: # %bb.0:531; RV32IMXQCIAC-NEXT: ori a0, a0, 1532; RV32IMXQCIAC-NEXT: qc.shladd a0, a0, a0, 10533; RV32IMXQCIAC-NEXT: ret534;535; RV32IZBAMXQCIAC-LABEL: add_shl_OneUse_2:536; RV32IZBAMXQCIAC: # %bb.0:537; RV32IZBAMXQCIAC-NEXT: ori a0, a0, 1538; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a0, a0, 10539; RV32IZBAMXQCIAC-NEXT: ret540 %or = or i32 %x, 1541 %mul = shl i32 %or, 10542 %add = add i32 %mul, %or543 ret i32 %add544}545 546; For shifts greater than 10 the ori immediate cannot fit within 12 bits so547; we don't commute with shift and generate qc.shaldd548define i32 @add_shl_OneUse_3(i32 %x) {549; RV32IM-LABEL: add_shl_OneUse_3:550; RV32IM: # %bb.0:551; RV32IM-NEXT: ori a0, a0, 1552; RV32IM-NEXT: slli a1, a0, 11553; RV32IM-NEXT: add a0, a1, a0554; RV32IM-NEXT: ret555;556; RV32IMXQCIAC-LABEL: add_shl_OneUse_3:557; RV32IMXQCIAC: # %bb.0:558; RV32IMXQCIAC-NEXT: ori a0, a0, 1559; RV32IMXQCIAC-NEXT: qc.shladd a0, a0, a0, 11560; RV32IMXQCIAC-NEXT: ret561;562; RV32IZBAMXQCIAC-LABEL: add_shl_OneUse_3:563; RV32IZBAMXQCIAC: # %bb.0:564; RV32IZBAMXQCIAC-NEXT: ori a0, a0, 1565; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a0, a0, 11566; RV32IZBAMXQCIAC-NEXT: ret567 %or = or i32 %x, 1568 %mul = shl i32 %or, 11569 %add = add i32 %mul, %or570 ret i32 %add571}572 573; The shift left gets converted early and as a result we cannot574; generate the qc.shladd.575; FIXME: Should we handle this case and generate qc.shladd if possible?576define i32 @add_shl_moreOneUse_4(i32 %x) {577; RV32IM-LABEL: add_shl_moreOneUse_4:578; RV32IM: # %bb.0:579; RV32IM-NEXT: ori a0, a0, 7580; RV32IM-NEXT: lui a1, 524288581; RV32IM-NEXT: add a0, a0, a1582; RV32IM-NEXT: ret583;584; RV32IMXQCIAC-LABEL: add_shl_moreOneUse_4:585; RV32IMXQCIAC: # %bb.0:586; RV32IMXQCIAC-NEXT: ori a0, a0, 7587; RV32IMXQCIAC-NEXT: lui a1, 524288588; RV32IMXQCIAC-NEXT: add a0, a0, a1589; RV32IMXQCIAC-NEXT: ret590;591; RV32IZBAMXQCIAC-LABEL: add_shl_moreOneUse_4:592; RV32IZBAMXQCIAC: # %bb.0:593; RV32IZBAMXQCIAC-NEXT: ori a0, a0, 7594; RV32IZBAMXQCIAC-NEXT: lui a1, 524288595; RV32IZBAMXQCIAC-NEXT: add a0, a0, a1596; RV32IZBAMXQCIAC-NEXT: ret597 %or = or i32 %x, 7598 %mul = shl i32 %or, 31599 %add = add i32 %mul, %or600 ret i32 %add601}602 603define i32 @select65(i1 zeroext %x) {604; RV32IM-LABEL: select65:605; RV32IM: # %bb.0:606; RV32IM-NEXT: neg a0, a0607; RV32IM-NEXT: andi a0, a0, 65608; RV32IM-NEXT: ret609;610; RV32IMXQCIAC-LABEL: select65:611; RV32IMXQCIAC: # %bb.0:612; RV32IMXQCIAC-NEXT: qc.shladd a0, a0, a0, 6613; RV32IMXQCIAC-NEXT: ret614;615; RV32IZBAMXQCIAC-LABEL: select65:616; RV32IZBAMXQCIAC: # %bb.0:617; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a0, a0, 6618; RV32IZBAMXQCIAC-NEXT: ret619 %select = select i1 %x, i32 65, i32 0620 ret i32 %select621}622