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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \3; RUN: | FileCheck %s -check-prefixes=RV32I4; RUN: llc -mtriple=riscv32 -mattr=+zbb -verify-machineinstrs < %s \5; RUN: | FileCheck %s -check-prefixes=RV32ZBB6; RUN: llc -mtriple=riscv32 -mattr=+zbb,experimental-xqcibm -verify-machineinstrs < %s \7; RUN: | FileCheck %s -check-prefix=RV32ZBBXQCIBM8 9define i8 @test_cttz_i8(i8 %a) nounwind {10; RV32I-LABEL: test_cttz_i8:11; RV32I: # %bb.0:12; RV32I-NEXT: not a0, a013; RV32I-NEXT: zext.b a1, a014; RV32I-NEXT: beqz a1, .LBB0_215; RV32I-NEXT: # %bb.1: # %cond.false16; RV32I-NEXT: addi a1, a0, -117; RV32I-NEXT: not a0, a018; RV32I-NEXT: and a0, a0, a119; RV32I-NEXT: srli a1, a0, 120; RV32I-NEXT: andi a1, a1, 8521; RV32I-NEXT: sub a0, a0, a122; RV32I-NEXT: andi a1, a0, 5123; RV32I-NEXT: srli a0, a0, 224; RV32I-NEXT: andi a0, a0, 5125; RV32I-NEXT: add a0, a1, a026; RV32I-NEXT: srli a1, a0, 427; RV32I-NEXT: add a0, a0, a128; RV32I-NEXT: andi a0, a0, 1529; RV32I-NEXT: ret30; RV32I-NEXT: .LBB0_2:31; RV32I-NEXT: li a0, 832; RV32I-NEXT: ret33;34; RV32ZBB-LABEL: test_cttz_i8:35; RV32ZBB: # %bb.0:36; RV32ZBB-NEXT: li a1, 25637; RV32ZBB-NEXT: orn a0, a1, a038; RV32ZBB-NEXT: ctz a0, a039; RV32ZBB-NEXT: ret40;41; RV32ZBBXQCIBM-LABEL: test_cttz_i8:42; RV32ZBBXQCIBM: # %bb.0:43; RV32ZBBXQCIBM-NEXT: li a1, 25644; RV32ZBBXQCIBM-NEXT: orn a0, a1, a045; RV32ZBBXQCIBM-NEXT: ctz a0, a046; RV32ZBBXQCIBM-NEXT: ret47 %1 = xor i8 %a, -148 %tmp = call i8 @llvm.cttz.i8(i8 %1, i1 false)49 ret i8 %tmp50}51 52define i16 @test_cttz_i16(i16 %a) nounwind {53; RV32I-LABEL: test_cttz_i16:54; RV32I: # %bb.0:55; RV32I-NEXT: not a0, a056; RV32I-NEXT: slli a1, a0, 1657; RV32I-NEXT: beqz a1, .LBB1_258; RV32I-NEXT: # %bb.1: # %cond.false59; RV32I-NEXT: addi a1, a0, -160; RV32I-NEXT: not a0, a061; RV32I-NEXT: lui a2, 562; RV32I-NEXT: and a0, a0, a163; RV32I-NEXT: addi a1, a2, 136564; RV32I-NEXT: srli a2, a0, 165; RV32I-NEXT: and a1, a2, a166; RV32I-NEXT: lui a2, 367; RV32I-NEXT: addi a2, a2, 81968; RV32I-NEXT: sub a0, a0, a169; RV32I-NEXT: and a1, a0, a270; RV32I-NEXT: srli a0, a0, 271; RV32I-NEXT: and a0, a0, a272; RV32I-NEXT: add a0, a1, a073; RV32I-NEXT: srli a1, a0, 474; RV32I-NEXT: add a0, a0, a175; RV32I-NEXT: andi a1, a0, 1576; RV32I-NEXT: slli a0, a0, 2077; RV32I-NEXT: srli a0, a0, 2878; RV32I-NEXT: add a0, a1, a079; RV32I-NEXT: ret80; RV32I-NEXT: .LBB1_2:81; RV32I-NEXT: li a0, 1682; RV32I-NEXT: ret83;84; RV32ZBB-LABEL: test_cttz_i16:85; RV32ZBB: # %bb.0:86; RV32ZBB-NEXT: lui a1, 1687; RV32ZBB-NEXT: orn a0, a1, a088; RV32ZBB-NEXT: ctz a0, a089; RV32ZBB-NEXT: ret90;91; RV32ZBBXQCIBM-LABEL: test_cttz_i16:92; RV32ZBBXQCIBM: # %bb.0:93; RV32ZBBXQCIBM-NEXT: not a0, a094; RV32ZBBXQCIBM-NEXT: qc.insbi a0, -1, 1, 1695; RV32ZBBXQCIBM-NEXT: ctz a0, a096; RV32ZBBXQCIBM-NEXT: ret97 %1 = xor i16 %a, -198 %tmp = call i16 @llvm.cttz.i16(i16 %1, i1 false)99 ret i16 %tmp100}101 102define i32 @test_cttz_i32(i32 %a) nounwind {103; RV32I-LABEL: test_cttz_i32:104; RV32I: # %bb.0:105; RV32I-NEXT: not a0, a0106; RV32I-NEXT: beqz a0, .LBB2_2107; RV32I-NEXT: # %bb.1: # %cond.false108; RV32I-NEXT: addi sp, sp, -16109; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill110; RV32I-NEXT: neg a1, a0111; RV32I-NEXT: and a0, a0, a1112; RV32I-NEXT: lui a1, 30667113; RV32I-NEXT: addi a1, a1, 1329114; RV32I-NEXT: call __mulsi3115; RV32I-NEXT: srli a0, a0, 27116; RV32I-NEXT: lui a1, %hi(.LCPI2_0)117; RV32I-NEXT: addi a1, a1, %lo(.LCPI2_0)118; RV32I-NEXT: add a0, a1, a0119; RV32I-NEXT: lbu a0, 0(a0)120; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload121; RV32I-NEXT: addi sp, sp, 16122; RV32I-NEXT: ret123; RV32I-NEXT: .LBB2_2:124; RV32I-NEXT: li a0, 32125; RV32I-NEXT: ret126;127; RV32ZBB-LABEL: test_cttz_i32:128; RV32ZBB: # %bb.0:129; RV32ZBB-NEXT: not a0, a0130; RV32ZBB-NEXT: ctz a0, a0131; RV32ZBB-NEXT: ret132;133; RV32ZBBXQCIBM-LABEL: test_cttz_i32:134; RV32ZBBXQCIBM: # %bb.0:135; RV32ZBBXQCIBM-NEXT: qc.cto a0, a0136; RV32ZBBXQCIBM-NEXT: ret137 %1 = xor i32 %a, -1138 %tmp = call i32 @llvm.cttz.i32(i32 %1, i1 false)139 ret i32 %tmp140}141 142define i64 @test_cttz_i64(i64 %a) nounwind {143; RV32I-LABEL: test_cttz_i64:144; RV32I: # %bb.0:145; RV32I-NEXT: addi sp, sp, -32146; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill147; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill148; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill149; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill150; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill151; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill152; RV32I-NEXT: not s3, a1153; RV32I-NEXT: not s2, a0154; RV32I-NEXT: or a0, s2, s3155; RV32I-NEXT: beqz a0, .LBB3_3156; RV32I-NEXT: # %bb.1: # %cond.false157; RV32I-NEXT: neg a0, s2158; RV32I-NEXT: and a0, s2, a0159; RV32I-NEXT: lui s1, 30667160; RV32I-NEXT: addi s1, s1, 1329161; RV32I-NEXT: mv a1, s1162; RV32I-NEXT: call __mulsi3163; RV32I-NEXT: mv s0, a0164; RV32I-NEXT: lui s4, %hi(.LCPI3_0)165; RV32I-NEXT: addi s4, s4, %lo(.LCPI3_0)166; RV32I-NEXT: neg a0, s3167; RV32I-NEXT: and a0, s3, a0168; RV32I-NEXT: mv a1, s1169; RV32I-NEXT: call __mulsi3170; RV32I-NEXT: bnez s2, .LBB3_4171; RV32I-NEXT: # %bb.2: # %cond.false172; RV32I-NEXT: srli a0, a0, 27173; RV32I-NEXT: add a0, s4, a0174; RV32I-NEXT: lbu a0, 0(a0)175; RV32I-NEXT: addi a0, a0, 32176; RV32I-NEXT: j .LBB3_5177; RV32I-NEXT: .LBB3_3:178; RV32I-NEXT: li a1, 0179; RV32I-NEXT: li a0, 64180; RV32I-NEXT: j .LBB3_6181; RV32I-NEXT: .LBB3_4:182; RV32I-NEXT: srli s0, s0, 27183; RV32I-NEXT: add s0, s4, s0184; RV32I-NEXT: lbu a0, 0(s0)185; RV32I-NEXT: .LBB3_5: # %cond.false186; RV32I-NEXT: li a1, 0187; RV32I-NEXT: .LBB3_6: # %cond.end188; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload189; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload190; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload191; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload192; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload193; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload194; RV32I-NEXT: addi sp, sp, 32195; RV32I-NEXT: ret196;197; RV32ZBB-LABEL: test_cttz_i64:198; RV32ZBB: # %bb.0:199; RV32ZBB-NEXT: not a0, a0200; RV32ZBB-NEXT: bnez a0, .LBB3_2201; RV32ZBB-NEXT: # %bb.1:202; RV32ZBB-NEXT: not a0, a1203; RV32ZBB-NEXT: ctz a0, a0204; RV32ZBB-NEXT: addi a0, a0, 32205; RV32ZBB-NEXT: li a1, 0206; RV32ZBB-NEXT: ret207; RV32ZBB-NEXT: .LBB3_2:208; RV32ZBB-NEXT: ctz a0, a0209; RV32ZBB-NEXT: li a1, 0210; RV32ZBB-NEXT: ret211;212; RV32ZBBXQCIBM-LABEL: test_cttz_i64:213; RV32ZBBXQCIBM: # %bb.0:214; RV32ZBBXQCIBM-NEXT: not a2, a0215; RV32ZBBXQCIBM-NEXT: bnez a2, .LBB3_2216; RV32ZBBXQCIBM-NEXT: # %bb.1:217; RV32ZBBXQCIBM-NEXT: qc.cto a0, a1218; RV32ZBBXQCIBM-NEXT: addi a0, a0, 32219; RV32ZBBXQCIBM-NEXT: li a1, 0220; RV32ZBBXQCIBM-NEXT: ret221; RV32ZBBXQCIBM-NEXT: .LBB3_2:222; RV32ZBBXQCIBM-NEXT: qc.cto a0, a0223; RV32ZBBXQCIBM-NEXT: li a1, 0224; RV32ZBBXQCIBM-NEXT: ret225 %1 = xor i64 %a, -1226 %tmp = call i64 @llvm.cttz.i64(i64 %1, i1 false)227 ret i64 %tmp228}229 230define i8 @test_cttz_i8_zero_undef(i8 %a) nounwind {231; RV32I-LABEL: test_cttz_i8_zero_undef:232; RV32I: # %bb.0:233; RV32I-NEXT: not a1, a0234; RV32I-NEXT: addi a1, a1, -1235; RV32I-NEXT: and a0, a0, a1236; RV32I-NEXT: srli a1, a0, 1237; RV32I-NEXT: andi a1, a1, 85238; RV32I-NEXT: sub a0, a0, a1239; RV32I-NEXT: andi a1, a0, 51240; RV32I-NEXT: srli a0, a0, 2241; RV32I-NEXT: andi a0, a0, 51242; RV32I-NEXT: add a0, a1, a0243; RV32I-NEXT: srli a1, a0, 4244; RV32I-NEXT: add a0, a0, a1245; RV32I-NEXT: andi a0, a0, 15246; RV32I-NEXT: ret247;248; RV32ZBB-LABEL: test_cttz_i8_zero_undef:249; RV32ZBB: # %bb.0:250; RV32ZBB-NEXT: not a0, a0251; RV32ZBB-NEXT: ctz a0, a0252; RV32ZBB-NEXT: ret253;254; RV32ZBBXQCIBM-LABEL: test_cttz_i8_zero_undef:255; RV32ZBBXQCIBM: # %bb.0:256; RV32ZBBXQCIBM-NEXT: qc.cto a0, a0257; RV32ZBBXQCIBM-NEXT: ret258 %1 = xor i8 %a, -1259 %tmp = call i8 @llvm.cttz.i8(i8 %1, i1 true)260 ret i8 %tmp261}262 263define i16 @test_cttz_i16_zero_undef(i16 %a) nounwind {264; RV32I-LABEL: test_cttz_i16_zero_undef:265; RV32I: # %bb.0:266; RV32I-NEXT: not a1, a0267; RV32I-NEXT: lui a2, 5268; RV32I-NEXT: addi a1, a1, -1269; RV32I-NEXT: addi a2, a2, 1365270; RV32I-NEXT: and a0, a0, a1271; RV32I-NEXT: srli a1, a0, 1272; RV32I-NEXT: and a1, a1, a2273; RV32I-NEXT: lui a2, 3274; RV32I-NEXT: addi a2, a2, 819275; RV32I-NEXT: sub a0, a0, a1276; RV32I-NEXT: and a1, a0, a2277; RV32I-NEXT: srli a0, a0, 2278; RV32I-NEXT: and a0, a0, a2279; RV32I-NEXT: add a0, a1, a0280; RV32I-NEXT: srli a1, a0, 4281; RV32I-NEXT: add a0, a0, a1282; RV32I-NEXT: andi a1, a0, 15283; RV32I-NEXT: slli a0, a0, 20284; RV32I-NEXT: srli a0, a0, 28285; RV32I-NEXT: add a0, a1, a0286; RV32I-NEXT: ret287;288; RV32ZBB-LABEL: test_cttz_i16_zero_undef:289; RV32ZBB: # %bb.0:290; RV32ZBB-NEXT: not a0, a0291; RV32ZBB-NEXT: ctz a0, a0292; RV32ZBB-NEXT: ret293;294; RV32ZBBXQCIBM-LABEL: test_cttz_i16_zero_undef:295; RV32ZBBXQCIBM: # %bb.0:296; RV32ZBBXQCIBM-NEXT: qc.cto a0, a0297; RV32ZBBXQCIBM-NEXT: ret298 %1 = xor i16 %a, -1299 %tmp = call i16 @llvm.cttz.i16(i16 %1, i1 true)300 ret i16 %tmp301}302 303define i32 @test_cttz_i32_zero_undef(i32 %a) nounwind {304; RV32I-LABEL: test_cttz_i32_zero_undef:305; RV32I: # %bb.0:306; RV32I-NEXT: addi sp, sp, -16307; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill308; RV32I-NEXT: not a0, a0309; RV32I-NEXT: neg a1, a0310; RV32I-NEXT: and a0, a0, a1311; RV32I-NEXT: lui a1, 30667312; RV32I-NEXT: addi a1, a1, 1329313; RV32I-NEXT: call __mulsi3314; RV32I-NEXT: srli a0, a0, 27315; RV32I-NEXT: lui a1, %hi(.LCPI6_0)316; RV32I-NEXT: addi a1, a1, %lo(.LCPI6_0)317; RV32I-NEXT: add a0, a1, a0318; RV32I-NEXT: lbu a0, 0(a0)319; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload320; RV32I-NEXT: addi sp, sp, 16321; RV32I-NEXT: ret322;323; RV32ZBB-LABEL: test_cttz_i32_zero_undef:324; RV32ZBB: # %bb.0:325; RV32ZBB-NEXT: not a0, a0326; RV32ZBB-NEXT: ctz a0, a0327; RV32ZBB-NEXT: ret328;329; RV32ZBBXQCIBM-LABEL: test_cttz_i32_zero_undef:330; RV32ZBBXQCIBM: # %bb.0:331; RV32ZBBXQCIBM-NEXT: qc.cto a0, a0332; RV32ZBBXQCIBM-NEXT: ret333 %1 = xor i32 %a, -1334 %tmp = call i32 @llvm.cttz.i32(i32 %1, i1 true)335 ret i32 %tmp336}337 338define i64 @test_cttz_i64_zero_undef(i64 %a) nounwind {339; RV32I-LABEL: test_cttz_i64_zero_undef:340; RV32I: # %bb.0:341; RV32I-NEXT: addi sp, sp, -32342; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill343; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill344; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill345; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill346; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill347; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill348; RV32I-NEXT: not s3, a1349; RV32I-NEXT: not s4, a0350; RV32I-NEXT: neg a0, s4351; RV32I-NEXT: and a0, s4, a0352; RV32I-NEXT: lui s1, 30667353; RV32I-NEXT: addi s1, s1, 1329354; RV32I-NEXT: mv a1, s1355; RV32I-NEXT: call __mulsi3356; RV32I-NEXT: mv s0, a0357; RV32I-NEXT: lui s2, %hi(.LCPI7_0)358; RV32I-NEXT: addi s2, s2, %lo(.LCPI7_0)359; RV32I-NEXT: neg a0, s3360; RV32I-NEXT: and a0, s3, a0361; RV32I-NEXT: mv a1, s1362; RV32I-NEXT: call __mulsi3363; RV32I-NEXT: bnez s4, .LBB7_2364; RV32I-NEXT: # %bb.1:365; RV32I-NEXT: srli a0, a0, 27366; RV32I-NEXT: add a0, s2, a0367; RV32I-NEXT: lbu a0, 0(a0)368; RV32I-NEXT: addi a0, a0, 32369; RV32I-NEXT: j .LBB7_3370; RV32I-NEXT: .LBB7_2:371; RV32I-NEXT: srli s0, s0, 27372; RV32I-NEXT: add s0, s2, s0373; RV32I-NEXT: lbu a0, 0(s0)374; RV32I-NEXT: .LBB7_3:375; RV32I-NEXT: li a1, 0376; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload377; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload378; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload379; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload380; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload381; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload382; RV32I-NEXT: addi sp, sp, 32383; RV32I-NEXT: ret384;385; RV32ZBB-LABEL: test_cttz_i64_zero_undef:386; RV32ZBB: # %bb.0:387; RV32ZBB-NEXT: not a0, a0388; RV32ZBB-NEXT: bnez a0, .LBB7_2389; RV32ZBB-NEXT: # %bb.1:390; RV32ZBB-NEXT: not a0, a1391; RV32ZBB-NEXT: ctz a0, a0392; RV32ZBB-NEXT: addi a0, a0, 32393; RV32ZBB-NEXT: li a1, 0394; RV32ZBB-NEXT: ret395; RV32ZBB-NEXT: .LBB7_2:396; RV32ZBB-NEXT: ctz a0, a0397; RV32ZBB-NEXT: li a1, 0398; RV32ZBB-NEXT: ret399;400; RV32ZBBXQCIBM-LABEL: test_cttz_i64_zero_undef:401; RV32ZBBXQCIBM: # %bb.0:402; RV32ZBBXQCIBM-NEXT: not a2, a0403; RV32ZBBXQCIBM-NEXT: bnez a2, .LBB7_2404; RV32ZBBXQCIBM-NEXT: # %bb.1:405; RV32ZBBXQCIBM-NEXT: qc.cto a0, a1406; RV32ZBBXQCIBM-NEXT: addi a0, a0, 32407; RV32ZBBXQCIBM-NEXT: li a1, 0408; RV32ZBBXQCIBM-NEXT: ret409; RV32ZBBXQCIBM-NEXT: .LBB7_2:410; RV32ZBBXQCIBM-NEXT: qc.cto a0, a0411; RV32ZBBXQCIBM-NEXT: li a1, 0412; RV32ZBBXQCIBM-NEXT: ret413 %1 = xor i64 %a, -1414 %tmp = call i64 @llvm.cttz.i64(i64 %1, i1 true)415 ret i64 %tmp416}417 418define i8 @test_ctlz_i8(i8 %a) nounwind {419; RV32I-LABEL: test_ctlz_i8:420; RV32I: # %bb.0:421; RV32I-NEXT: not a0, a0422; RV32I-NEXT: zext.b a1, a0423; RV32I-NEXT: beqz a1, .LBB8_2424; RV32I-NEXT: # %bb.1: # %cond.false425; RV32I-NEXT: slli a1, a0, 24426; RV32I-NEXT: srli a1, a1, 25427; RV32I-NEXT: or a0, a0, a1428; RV32I-NEXT: slli a1, a0, 24429; RV32I-NEXT: srli a1, a1, 26430; RV32I-NEXT: or a0, a0, a1431; RV32I-NEXT: slli a1, a0, 24432; RV32I-NEXT: srli a1, a1, 28433; RV32I-NEXT: or a0, a0, a1434; RV32I-NEXT: not a0, a0435; RV32I-NEXT: srli a1, a0, 1436; RV32I-NEXT: andi a1, a1, 85437; RV32I-NEXT: sub a0, a0, a1438; RV32I-NEXT: andi a1, a0, 51439; RV32I-NEXT: srli a0, a0, 2440; RV32I-NEXT: andi a0, a0, 51441; RV32I-NEXT: add a0, a1, a0442; RV32I-NEXT: srli a1, a0, 4443; RV32I-NEXT: add a0, a0, a1444; RV32I-NEXT: andi a0, a0, 15445; RV32I-NEXT: ret446; RV32I-NEXT: .LBB8_2:447; RV32I-NEXT: li a0, 8448; RV32I-NEXT: ret449;450; RV32ZBB-LABEL: test_ctlz_i8:451; RV32ZBB: # %bb.0:452; RV32ZBB-NEXT: slli a0, a0, 24453; RV32ZBB-NEXT: not a0, a0454; RV32ZBB-NEXT: clz a0, a0455; RV32ZBB-NEXT: ret456;457; RV32ZBBXQCIBM-LABEL: test_ctlz_i8:458; RV32ZBBXQCIBM: # %bb.0:459; RV32ZBBXQCIBM-NEXT: slli a0, a0, 24460; RV32ZBBXQCIBM-NEXT: qc.clo a0, a0461; RV32ZBBXQCIBM-NEXT: ret462 %1 = xor i8 %a, -1463 %tmp = call i8 @llvm.ctlz.i8(i8 %1, i1 false)464 ret i8 %tmp465}466 467define i16 @test_ctlz_i16(i16 %a) nounwind {468; RV32I-LABEL: test_ctlz_i16:469; RV32I: # %bb.0:470; RV32I-NEXT: not a0, a0471; RV32I-NEXT: slli a1, a0, 16472; RV32I-NEXT: beqz a1, .LBB9_2473; RV32I-NEXT: # %bb.1: # %cond.false474; RV32I-NEXT: srli a1, a1, 17475; RV32I-NEXT: lui a2, 5476; RV32I-NEXT: or a0, a0, a1477; RV32I-NEXT: addi a1, a2, 1365478; RV32I-NEXT: slli a2, a0, 16479; RV32I-NEXT: srli a2, a2, 18480; RV32I-NEXT: or a0, a0, a2481; RV32I-NEXT: slli a2, a0, 16482; RV32I-NEXT: srli a2, a2, 20483; RV32I-NEXT: or a0, a0, a2484; RV32I-NEXT: slli a2, a0, 16485; RV32I-NEXT: srli a2, a2, 24486; RV32I-NEXT: or a0, a0, a2487; RV32I-NEXT: not a0, a0488; RV32I-NEXT: srli a2, a0, 1489; RV32I-NEXT: and a1, a2, a1490; RV32I-NEXT: lui a2, 3491; RV32I-NEXT: addi a2, a2, 819492; RV32I-NEXT: sub a0, a0, a1493; RV32I-NEXT: and a1, a0, a2494; RV32I-NEXT: srli a0, a0, 2495; RV32I-NEXT: and a0, a0, a2496; RV32I-NEXT: add a0, a1, a0497; RV32I-NEXT: srli a1, a0, 4498; RV32I-NEXT: add a0, a0, a1499; RV32I-NEXT: andi a1, a0, 15500; RV32I-NEXT: slli a0, a0, 20501; RV32I-NEXT: srli a0, a0, 28502; RV32I-NEXT: add a0, a1, a0503; RV32I-NEXT: ret504; RV32I-NEXT: .LBB9_2:505; RV32I-NEXT: li a0, 16506; RV32I-NEXT: ret507;508; RV32ZBB-LABEL: test_ctlz_i16:509; RV32ZBB: # %bb.0:510; RV32ZBB-NEXT: slli a0, a0, 16511; RV32ZBB-NEXT: not a0, a0512; RV32ZBB-NEXT: clz a0, a0513; RV32ZBB-NEXT: ret514;515; RV32ZBBXQCIBM-LABEL: test_ctlz_i16:516; RV32ZBBXQCIBM: # %bb.0:517; RV32ZBBXQCIBM-NEXT: slli a0, a0, 16518; RV32ZBBXQCIBM-NEXT: qc.clo a0, a0519; RV32ZBBXQCIBM-NEXT: ret520 %1 = xor i16 %a, -1521 %tmp = call i16 @llvm.ctlz.i16(i16 %1, i1 false)522 ret i16 %tmp523}524 525define i32 @test_ctlz_i32(i32 %a) nounwind {526; RV32I-LABEL: test_ctlz_i32:527; RV32I: # %bb.0:528; RV32I-NEXT: not a0, a0529; RV32I-NEXT: beqz a0, .LBB10_2530; RV32I-NEXT: # %bb.1: # %cond.false531; RV32I-NEXT: srli a1, a0, 1532; RV32I-NEXT: lui a2, 349525533; RV32I-NEXT: or a0, a0, a1534; RV32I-NEXT: addi a1, a2, 1365535; RV32I-NEXT: srli a2, a0, 2536; RV32I-NEXT: or a0, a0, a2537; RV32I-NEXT: srli a2, a0, 4538; RV32I-NEXT: or a0, a0, a2539; RV32I-NEXT: srli a2, a0, 8540; RV32I-NEXT: or a0, a0, a2541; RV32I-NEXT: srli a2, a0, 16542; RV32I-NEXT: or a0, a0, a2543; RV32I-NEXT: not a0, a0544; RV32I-NEXT: srli a2, a0, 1545; RV32I-NEXT: and a1, a2, a1546; RV32I-NEXT: lui a2, 209715547; RV32I-NEXT: addi a2, a2, 819548; RV32I-NEXT: sub a0, a0, a1549; RV32I-NEXT: and a1, a0, a2550; RV32I-NEXT: srli a0, a0, 2551; RV32I-NEXT: and a0, a0, a2552; RV32I-NEXT: lui a2, 61681553; RV32I-NEXT: add a0, a1, a0554; RV32I-NEXT: srli a1, a0, 4555; RV32I-NEXT: add a0, a0, a1556; RV32I-NEXT: addi a1, a2, -241557; RV32I-NEXT: and a0, a0, a1558; RV32I-NEXT: slli a1, a0, 8559; RV32I-NEXT: add a0, a0, a1560; RV32I-NEXT: slli a1, a0, 16561; RV32I-NEXT: add a0, a0, a1562; RV32I-NEXT: srli a0, a0, 24563; RV32I-NEXT: ret564; RV32I-NEXT: .LBB10_2:565; RV32I-NEXT: li a0, 32566; RV32I-NEXT: ret567;568; RV32ZBB-LABEL: test_ctlz_i32:569; RV32ZBB: # %bb.0:570; RV32ZBB-NEXT: not a0, a0571; RV32ZBB-NEXT: clz a0, a0572; RV32ZBB-NEXT: ret573;574; RV32ZBBXQCIBM-LABEL: test_ctlz_i32:575; RV32ZBBXQCIBM: # %bb.0:576; RV32ZBBXQCIBM-NEXT: qc.clo a0, a0577; RV32ZBBXQCIBM-NEXT: ret578 %1 = xor i32 %a, -1579 %tmp = call i32 @llvm.ctlz.i32(i32 %1, i1 false)580 ret i32 %tmp581}582 583define i64 @test_ctlz_i64(i64 %a) nounwind {584; RV32I-LABEL: test_ctlz_i64:585; RV32I: # %bb.0:586; RV32I-NEXT: not a3, a1587; RV32I-NEXT: not a4, a0588; RV32I-NEXT: or a0, a4, a3589; RV32I-NEXT: beqz a0, .LBB11_3590; RV32I-NEXT: # %bb.1: # %cond.false591; RV32I-NEXT: lui a0, 349525592; RV32I-NEXT: lui a1, 209715593; RV32I-NEXT: lui a5, 61681594; RV32I-NEXT: addi a2, a0, 1365595; RV32I-NEXT: addi a1, a1, 819596; RV32I-NEXT: addi a0, a5, -241597; RV32I-NEXT: bnez a3, .LBB11_4598; RV32I-NEXT: # %bb.2: # %cond.false599; RV32I-NEXT: srli a3, a4, 1600; RV32I-NEXT: or a3, a4, a3601; RV32I-NEXT: srli a4, a3, 2602; RV32I-NEXT: or a3, a3, a4603; RV32I-NEXT: srli a4, a3, 4604; RV32I-NEXT: or a3, a3, a4605; RV32I-NEXT: srli a4, a3, 8606; RV32I-NEXT: or a3, a3, a4607; RV32I-NEXT: srli a4, a3, 16608; RV32I-NEXT: or a3, a3, a4609; RV32I-NEXT: not a3, a3610; RV32I-NEXT: srli a4, a3, 1611; RV32I-NEXT: and a2, a4, a2612; RV32I-NEXT: sub a3, a3, a2613; RV32I-NEXT: and a2, a3, a1614; RV32I-NEXT: srli a3, a3, 2615; RV32I-NEXT: and a1, a3, a1616; RV32I-NEXT: add a1, a2, a1617; RV32I-NEXT: srli a2, a1, 4618; RV32I-NEXT: add a1, a1, a2619; RV32I-NEXT: and a0, a1, a0620; RV32I-NEXT: slli a1, a0, 8621; RV32I-NEXT: add a0, a0, a1622; RV32I-NEXT: slli a1, a0, 16623; RV32I-NEXT: add a0, a0, a1624; RV32I-NEXT: srli a0, a0, 24625; RV32I-NEXT: addi a0, a0, 32626; RV32I-NEXT: li a1, 0627; RV32I-NEXT: ret628; RV32I-NEXT: .LBB11_3:629; RV32I-NEXT: li a1, 0630; RV32I-NEXT: li a0, 64631; RV32I-NEXT: ret632; RV32I-NEXT: .LBB11_4:633; RV32I-NEXT: srli a4, a3, 1634; RV32I-NEXT: or a3, a3, a4635; RV32I-NEXT: srli a4, a3, 2636; RV32I-NEXT: or a3, a3, a4637; RV32I-NEXT: srli a4, a3, 4638; RV32I-NEXT: or a3, a3, a4639; RV32I-NEXT: srli a4, a3, 8640; RV32I-NEXT: or a3, a3, a4641; RV32I-NEXT: srli a4, a3, 16642; RV32I-NEXT: or a3, a3, a4643; RV32I-NEXT: not a3, a3644; RV32I-NEXT: srli a4, a3, 1645; RV32I-NEXT: and a2, a4, a2646; RV32I-NEXT: sub a3, a3, a2647; RV32I-NEXT: and a2, a3, a1648; RV32I-NEXT: srli a3, a3, 2649; RV32I-NEXT: and a1, a3, a1650; RV32I-NEXT: add a1, a2, a1651; RV32I-NEXT: srli a2, a1, 4652; RV32I-NEXT: add a1, a1, a2653; RV32I-NEXT: and a0, a1, a0654; RV32I-NEXT: slli a1, a0, 8655; RV32I-NEXT: add a0, a0, a1656; RV32I-NEXT: slli a1, a0, 16657; RV32I-NEXT: add a0, a0, a1658; RV32I-NEXT: srli a0, a0, 24659; RV32I-NEXT: li a1, 0660; RV32I-NEXT: ret661;662; RV32ZBB-LABEL: test_ctlz_i64:663; RV32ZBB: # %bb.0:664; RV32ZBB-NEXT: not a1, a1665; RV32ZBB-NEXT: bnez a1, .LBB11_2666; RV32ZBB-NEXT: # %bb.1:667; RV32ZBB-NEXT: not a0, a0668; RV32ZBB-NEXT: clz a0, a0669; RV32ZBB-NEXT: addi a0, a0, 32670; RV32ZBB-NEXT: li a1, 0671; RV32ZBB-NEXT: ret672; RV32ZBB-NEXT: .LBB11_2:673; RV32ZBB-NEXT: clz a0, a1674; RV32ZBB-NEXT: li a1, 0675; RV32ZBB-NEXT: ret676;677; RV32ZBBXQCIBM-LABEL: test_ctlz_i64:678; RV32ZBBXQCIBM: # %bb.0:679; RV32ZBBXQCIBM-NEXT: not a2, a1680; RV32ZBBXQCIBM-NEXT: bnez a2, .LBB11_2681; RV32ZBBXQCIBM-NEXT: # %bb.1:682; RV32ZBBXQCIBM-NEXT: qc.clo a0, a0683; RV32ZBBXQCIBM-NEXT: addi a0, a0, 32684; RV32ZBBXQCIBM-NEXT: li a1, 0685; RV32ZBBXQCIBM-NEXT: ret686; RV32ZBBXQCIBM-NEXT: .LBB11_2:687; RV32ZBBXQCIBM-NEXT: qc.clo a0, a1688; RV32ZBBXQCIBM-NEXT: li a1, 0689; RV32ZBBXQCIBM-NEXT: ret690 %1 = xor i64 %a, -1691 %tmp = call i64 @llvm.ctlz.i64(i64 %1, i1 false)692 ret i64 %tmp693}694 695define i8 @test_ctlz_i8_zero_undef(i8 %a) nounwind {696; RV32I-LABEL: test_ctlz_i8_zero_undef:697; RV32I: # %bb.0:698; RV32I-NEXT: not a0, a0699; RV32I-NEXT: slli a1, a0, 24700; RV32I-NEXT: srli a1, a1, 25701; RV32I-NEXT: or a0, a0, a1702; RV32I-NEXT: slli a1, a0, 24703; RV32I-NEXT: srli a1, a1, 26704; RV32I-NEXT: or a0, a0, a1705; RV32I-NEXT: slli a1, a0, 24706; RV32I-NEXT: srli a1, a1, 28707; RV32I-NEXT: or a0, a0, a1708; RV32I-NEXT: not a0, a0709; RV32I-NEXT: srli a1, a0, 1710; RV32I-NEXT: andi a1, a1, 85711; RV32I-NEXT: sub a0, a0, a1712; RV32I-NEXT: andi a1, a0, 51713; RV32I-NEXT: srli a0, a0, 2714; RV32I-NEXT: andi a0, a0, 51715; RV32I-NEXT: add a0, a1, a0716; RV32I-NEXT: srli a1, a0, 4717; RV32I-NEXT: add a0, a0, a1718; RV32I-NEXT: andi a0, a0, 15719; RV32I-NEXT: ret720;721; RV32ZBB-LABEL: test_ctlz_i8_zero_undef:722; RV32ZBB: # %bb.0:723; RV32ZBB-NEXT: not a0, a0724; RV32ZBB-NEXT: slli a0, a0, 24725; RV32ZBB-NEXT: clz a0, a0726; RV32ZBB-NEXT: ret727;728; RV32ZBBXQCIBM-LABEL: test_ctlz_i8_zero_undef:729; RV32ZBBXQCIBM: # %bb.0:730; RV32ZBBXQCIBM-NEXT: not a0, a0731; RV32ZBBXQCIBM-NEXT: slli a0, a0, 24732; RV32ZBBXQCIBM-NEXT: clz a0, a0733; RV32ZBBXQCIBM-NEXT: ret734 %1 = xor i8 %a, -1735 %tmp = call i8 @llvm.ctlz.i8(i8 %1, i1 true)736 ret i8 %tmp737}738 739define i16 @test_ctlz_i16_zero_undef(i16 %a) nounwind {740; RV32I-LABEL: test_ctlz_i16_zero_undef:741; RV32I: # %bb.0:742; RV32I-NEXT: not a0, a0743; RV32I-NEXT: lui a1, 5744; RV32I-NEXT: slli a2, a0, 16745; RV32I-NEXT: addi a1, a1, 1365746; RV32I-NEXT: srli a2, a2, 17747; RV32I-NEXT: or a0, a0, a2748; RV32I-NEXT: slli a2, a0, 16749; RV32I-NEXT: srli a2, a2, 18750; RV32I-NEXT: or a0, a0, a2751; RV32I-NEXT: slli a2, a0, 16752; RV32I-NEXT: srli a2, a2, 20753; RV32I-NEXT: or a0, a0, a2754; RV32I-NEXT: slli a2, a0, 16755; RV32I-NEXT: srli a2, a2, 24756; RV32I-NEXT: or a0, a0, a2757; RV32I-NEXT: not a0, a0758; RV32I-NEXT: srli a2, a0, 1759; RV32I-NEXT: and a1, a2, a1760; RV32I-NEXT: lui a2, 3761; RV32I-NEXT: addi a2, a2, 819762; RV32I-NEXT: sub a0, a0, a1763; RV32I-NEXT: and a1, a0, a2764; RV32I-NEXT: srli a0, a0, 2765; RV32I-NEXT: and a0, a0, a2766; RV32I-NEXT: add a0, a1, a0767; RV32I-NEXT: srli a1, a0, 4768; RV32I-NEXT: add a0, a0, a1769; RV32I-NEXT: andi a1, a0, 15770; RV32I-NEXT: slli a0, a0, 20771; RV32I-NEXT: srli a0, a0, 28772; RV32I-NEXT: add a0, a1, a0773; RV32I-NEXT: ret774;775; RV32ZBB-LABEL: test_ctlz_i16_zero_undef:776; RV32ZBB: # %bb.0:777; RV32ZBB-NEXT: not a0, a0778; RV32ZBB-NEXT: slli a0, a0, 16779; RV32ZBB-NEXT: clz a0, a0780; RV32ZBB-NEXT: ret781;782; RV32ZBBXQCIBM-LABEL: test_ctlz_i16_zero_undef:783; RV32ZBBXQCIBM: # %bb.0:784; RV32ZBBXQCIBM-NEXT: not a0, a0785; RV32ZBBXQCIBM-NEXT: slli a0, a0, 16786; RV32ZBBXQCIBM-NEXT: clz a0, a0787; RV32ZBBXQCIBM-NEXT: ret788 %1 = xor i16 %a, -1789 %tmp = call i16 @llvm.ctlz.i16(i16 %1, i1 true)790 ret i16 %tmp791}792 793define i32 @test_ctlz_i32_zero_undef(i32 %a) nounwind {794; RV32I-LABEL: test_ctlz_i32_zero_undef:795; RV32I: # %bb.0:796; RV32I-NEXT: not a0, a0797; RV32I-NEXT: lui a1, 349525798; RV32I-NEXT: srli a2, a0, 1799; RV32I-NEXT: addi a1, a1, 1365800; RV32I-NEXT: or a0, a0, a2801; RV32I-NEXT: srli a2, a0, 2802; RV32I-NEXT: or a0, a0, a2803; RV32I-NEXT: srli a2, a0, 4804; RV32I-NEXT: or a0, a0, a2805; RV32I-NEXT: srli a2, a0, 8806; RV32I-NEXT: or a0, a0, a2807; RV32I-NEXT: srli a2, a0, 16808; RV32I-NEXT: or a0, a0, a2809; RV32I-NEXT: not a0, a0810; RV32I-NEXT: srli a2, a0, 1811; RV32I-NEXT: and a1, a2, a1812; RV32I-NEXT: lui a2, 209715813; RV32I-NEXT: addi a2, a2, 819814; RV32I-NEXT: sub a0, a0, a1815; RV32I-NEXT: and a1, a0, a2816; RV32I-NEXT: srli a0, a0, 2817; RV32I-NEXT: and a0, a0, a2818; RV32I-NEXT: lui a2, 61681819; RV32I-NEXT: add a0, a1, a0820; RV32I-NEXT: srli a1, a0, 4821; RV32I-NEXT: add a0, a0, a1822; RV32I-NEXT: addi a1, a2, -241823; RV32I-NEXT: and a0, a0, a1824; RV32I-NEXT: slli a1, a0, 8825; RV32I-NEXT: add a0, a0, a1826; RV32I-NEXT: slli a1, a0, 16827; RV32I-NEXT: add a0, a0, a1828; RV32I-NEXT: srli a0, a0, 24829; RV32I-NEXT: ret830;831; RV32ZBB-LABEL: test_ctlz_i32_zero_undef:832; RV32ZBB: # %bb.0:833; RV32ZBB-NEXT: not a0, a0834; RV32ZBB-NEXT: clz a0, a0835; RV32ZBB-NEXT: ret836;837; RV32ZBBXQCIBM-LABEL: test_ctlz_i32_zero_undef:838; RV32ZBBXQCIBM: # %bb.0:839; RV32ZBBXQCIBM-NEXT: qc.clo a0, a0840; RV32ZBBXQCIBM-NEXT: ret841 %1 = xor i32 %a, -1842 %tmp = call i32 @llvm.ctlz.i32(i32 %1, i1 true)843 ret i32 %tmp844}845 846define i64 @test_ctlz_i64_zero_undef(i64 %a) nounwind {847; RV32I-LABEL: test_ctlz_i64_zero_undef:848; RV32I: # %bb.0:849; RV32I-NEXT: not a4, a1850; RV32I-NEXT: lui a1, 349525851; RV32I-NEXT: lui a2, 209715852; RV32I-NEXT: lui a5, 61681853; RV32I-NEXT: addi a3, a1, 1365854; RV32I-NEXT: addi a2, a2, 819855; RV32I-NEXT: addi a1, a5, -241856; RV32I-NEXT: bnez a4, .LBB15_2857; RV32I-NEXT: # %bb.1:858; RV32I-NEXT: not a0, a0859; RV32I-NEXT: srli a4, a0, 1860; RV32I-NEXT: or a0, a0, a4861; RV32I-NEXT: srli a4, a0, 2862; RV32I-NEXT: or a0, a0, a4863; RV32I-NEXT: srli a4, a0, 4864; RV32I-NEXT: or a0, a0, a4865; RV32I-NEXT: srli a4, a0, 8866; RV32I-NEXT: or a0, a0, a4867; RV32I-NEXT: srli a4, a0, 16868; RV32I-NEXT: or a0, a0, a4869; RV32I-NEXT: not a0, a0870; RV32I-NEXT: srli a4, a0, 1871; RV32I-NEXT: and a3, a4, a3872; RV32I-NEXT: sub a0, a0, a3873; RV32I-NEXT: and a3, a0, a2874; RV32I-NEXT: srli a0, a0, 2875; RV32I-NEXT: and a0, a0, a2876; RV32I-NEXT: add a0, a3, a0877; RV32I-NEXT: srli a2, a0, 4878; RV32I-NEXT: add a0, a0, a2879; RV32I-NEXT: and a0, a0, a1880; RV32I-NEXT: slli a1, a0, 8881; RV32I-NEXT: add a0, a0, a1882; RV32I-NEXT: slli a1, a0, 16883; RV32I-NEXT: add a0, a0, a1884; RV32I-NEXT: srli a0, a0, 24885; RV32I-NEXT: addi a0, a0, 32886; RV32I-NEXT: li a1, 0887; RV32I-NEXT: ret888; RV32I-NEXT: .LBB15_2:889; RV32I-NEXT: srli a0, a4, 1890; RV32I-NEXT: or a0, a4, a0891; RV32I-NEXT: srli a4, a0, 2892; RV32I-NEXT: or a0, a0, a4893; RV32I-NEXT: srli a4, a0, 4894; RV32I-NEXT: or a0, a0, a4895; RV32I-NEXT: srli a4, a0, 8896; RV32I-NEXT: or a0, a0, a4897; RV32I-NEXT: srli a4, a0, 16898; RV32I-NEXT: or a0, a0, a4899; RV32I-NEXT: not a0, a0900; RV32I-NEXT: srli a4, a0, 1901; RV32I-NEXT: and a3, a4, a3902; RV32I-NEXT: sub a0, a0, a3903; RV32I-NEXT: and a3, a0, a2904; RV32I-NEXT: srli a0, a0, 2905; RV32I-NEXT: and a0, a0, a2906; RV32I-NEXT: add a0, a3, a0907; RV32I-NEXT: srli a2, a0, 4908; RV32I-NEXT: add a0, a0, a2909; RV32I-NEXT: and a0, a0, a1910; RV32I-NEXT: slli a1, a0, 8911; RV32I-NEXT: add a0, a0, a1912; RV32I-NEXT: slli a1, a0, 16913; RV32I-NEXT: add a0, a0, a1914; RV32I-NEXT: srli a0, a0, 24915; RV32I-NEXT: li a1, 0916; RV32I-NEXT: ret917;918; RV32ZBB-LABEL: test_ctlz_i64_zero_undef:919; RV32ZBB: # %bb.0:920; RV32ZBB-NEXT: not a1, a1921; RV32ZBB-NEXT: bnez a1, .LBB15_2922; RV32ZBB-NEXT: # %bb.1:923; RV32ZBB-NEXT: not a0, a0924; RV32ZBB-NEXT: clz a0, a0925; RV32ZBB-NEXT: addi a0, a0, 32926; RV32ZBB-NEXT: li a1, 0927; RV32ZBB-NEXT: ret928; RV32ZBB-NEXT: .LBB15_2:929; RV32ZBB-NEXT: clz a0, a1930; RV32ZBB-NEXT: li a1, 0931; RV32ZBB-NEXT: ret932;933; RV32ZBBXQCIBM-LABEL: test_ctlz_i64_zero_undef:934; RV32ZBBXQCIBM: # %bb.0:935; RV32ZBBXQCIBM-NEXT: not a2, a1936; RV32ZBBXQCIBM-NEXT: bnez a2, .LBB15_2937; RV32ZBBXQCIBM-NEXT: # %bb.1:938; RV32ZBBXQCIBM-NEXT: qc.clo a0, a0939; RV32ZBBXQCIBM-NEXT: addi a0, a0, 32940; RV32ZBBXQCIBM-NEXT: li a1, 0941; RV32ZBBXQCIBM-NEXT: ret942; RV32ZBBXQCIBM-NEXT: .LBB15_2:943; RV32ZBBXQCIBM-NEXT: qc.clo a0, a1944; RV32ZBBXQCIBM-NEXT: li a1, 0945; RV32ZBBXQCIBM-NEXT: ret946 %1 = xor i64 %a, -1947 %tmp = call i64 @llvm.ctlz.i64(i64 %1, i1 true)948 ret i64 %tmp949}950 951define i8 @brev_i8(i8 %a0) {952; RV32I-LABEL: brev_i8:953; RV32I: # %bb.0:954; RV32I-NEXT: andi a1, a0, 15955; RV32I-NEXT: slli a0, a0, 24956; RV32I-NEXT: slli a1, a1, 4957; RV32I-NEXT: srli a0, a0, 28958; RV32I-NEXT: or a0, a0, a1959; RV32I-NEXT: andi a1, a0, 51960; RV32I-NEXT: srli a0, a0, 2961; RV32I-NEXT: slli a1, a1, 2962; RV32I-NEXT: andi a0, a0, 51963; RV32I-NEXT: or a0, a0, a1964; RV32I-NEXT: andi a1, a0, 85965; RV32I-NEXT: srli a0, a0, 1966; RV32I-NEXT: slli a1, a1, 1967; RV32I-NEXT: andi a0, a0, 85968; RV32I-NEXT: or a0, a0, a1969; RV32I-NEXT: ret970;971; RV32ZBB-LABEL: brev_i8:972; RV32ZBB: # %bb.0:973; RV32ZBB-NEXT: andi a1, a0, 15974; RV32ZBB-NEXT: slli a0, a0, 24975; RV32ZBB-NEXT: slli a1, a1, 4976; RV32ZBB-NEXT: srli a0, a0, 28977; RV32ZBB-NEXT: or a0, a0, a1978; RV32ZBB-NEXT: andi a1, a0, 51979; RV32ZBB-NEXT: srli a0, a0, 2980; RV32ZBB-NEXT: slli a1, a1, 2981; RV32ZBB-NEXT: andi a0, a0, 51982; RV32ZBB-NEXT: or a0, a0, a1983; RV32ZBB-NEXT: andi a1, a0, 85984; RV32ZBB-NEXT: srli a0, a0, 1985; RV32ZBB-NEXT: slli a1, a1, 1986; RV32ZBB-NEXT: andi a0, a0, 85987; RV32ZBB-NEXT: or a0, a0, a1988; RV32ZBB-NEXT: ret989;990; RV32ZBBXQCIBM-LABEL: brev_i8:991; RV32ZBBXQCIBM: # %bb.0:992; RV32ZBBXQCIBM-NEXT: qc.brev32 a0, a0993; RV32ZBBXQCIBM-NEXT: srli a0, a0, 24994; RV32ZBBXQCIBM-NEXT: ret995 %v0 = tail call i8 @llvm.bitreverse.i8(i8 %a0)996 ret i8 %v0997}998 999define i16 @brev_i16(i16 %a0) {1000; RV32I-LABEL: brev_i16:1001; RV32I: # %bb.0:1002; RV32I-NEXT: slli a1, a0, 81003; RV32I-NEXT: slli a0, a0, 161004; RV32I-NEXT: lui a2, 11005; RV32I-NEXT: srli a0, a0, 241006; RV32I-NEXT: addi a2, a2, -2411007; RV32I-NEXT: or a0, a1, a01008; RV32I-NEXT: srli a1, a0, 41009; RV32I-NEXT: and a0, a0, a21010; RV32I-NEXT: and a1, a1, a21011; RV32I-NEXT: lui a2, 31012; RV32I-NEXT: addi a2, a2, 8191013; RV32I-NEXT: slli a0, a0, 41014; RV32I-NEXT: or a0, a1, a01015; RV32I-NEXT: srli a1, a0, 21016; RV32I-NEXT: and a0, a0, a21017; RV32I-NEXT: and a1, a1, a21018; RV32I-NEXT: lui a2, 51019; RV32I-NEXT: addi a2, a2, 13651020; RV32I-NEXT: slli a0, a0, 21021; RV32I-NEXT: or a0, a1, a01022; RV32I-NEXT: srli a1, a0, 11023; RV32I-NEXT: and a0, a0, a21024; RV32I-NEXT: and a1, a1, a21025; RV32I-NEXT: slli a0, a0, 11026; RV32I-NEXT: or a0, a1, a01027; RV32I-NEXT: ret1028;1029; RV32ZBB-LABEL: brev_i16:1030; RV32ZBB: # %bb.0:1031; RV32ZBB-NEXT: rev8 a0, a01032; RV32ZBB-NEXT: lui a1, 151033; RV32ZBB-NEXT: srli a2, a0, 121034; RV32ZBB-NEXT: addi a1, a1, 2401035; RV32ZBB-NEXT: and a1, a2, a11036; RV32ZBB-NEXT: lui a2, 31037; RV32ZBB-NEXT: srli a0, a0, 201038; RV32ZBB-NEXT: addi a2, a2, 8191039; RV32ZBB-NEXT: andi a0, a0, -2411040; RV32ZBB-NEXT: or a0, a0, a11041; RV32ZBB-NEXT: srli a1, a0, 21042; RV32ZBB-NEXT: and a0, a0, a21043; RV32ZBB-NEXT: and a1, a1, a21044; RV32ZBB-NEXT: lui a2, 51045; RV32ZBB-NEXT: addi a2, a2, 13651046; RV32ZBB-NEXT: slli a0, a0, 21047; RV32ZBB-NEXT: or a0, a1, a01048; RV32ZBB-NEXT: srli a1, a0, 11049; RV32ZBB-NEXT: and a0, a0, a21050; RV32ZBB-NEXT: and a1, a1, a21051; RV32ZBB-NEXT: slli a0, a0, 11052; RV32ZBB-NEXT: or a0, a1, a01053; RV32ZBB-NEXT: ret1054;1055; RV32ZBBXQCIBM-LABEL: brev_i16:1056; RV32ZBBXQCIBM: # %bb.0:1057; RV32ZBBXQCIBM-NEXT: qc.brev32 a0, a01058; RV32ZBBXQCIBM-NEXT: srli a0, a0, 161059; RV32ZBBXQCIBM-NEXT: ret1060 %v0 = tail call i16 @llvm.bitreverse.i16(i16 %a0)1061 ret i16 %v01062}1063 1064define i32 @brev_i32(i32 %a0) {1065; RV32I-LABEL: brev_i32:1066; RV32I: # %bb.0:1067; RV32I-NEXT: srli a1, a0, 81068; RV32I-NEXT: lui a2, 161069; RV32I-NEXT: srli a3, a0, 241070; RV32I-NEXT: addi a2, a2, -2561071; RV32I-NEXT: and a1, a1, a21072; RV32I-NEXT: and a2, a0, a21073; RV32I-NEXT: slli a0, a0, 241074; RV32I-NEXT: or a1, a1, a31075; RV32I-NEXT: lui a3, 616811076; RV32I-NEXT: slli a2, a2, 81077; RV32I-NEXT: or a0, a0, a21078; RV32I-NEXT: lui a2, 2097151079; RV32I-NEXT: addi a3, a3, -2411080; RV32I-NEXT: or a0, a0, a11081; RV32I-NEXT: srli a1, a0, 41082; RV32I-NEXT: and a0, a0, a31083; RV32I-NEXT: and a1, a1, a31084; RV32I-NEXT: lui a3, 3495251085; RV32I-NEXT: addi a2, a2, 8191086; RV32I-NEXT: addi a3, a3, 13651087; RV32I-NEXT: slli a0, a0, 41088; RV32I-NEXT: or a0, a1, a01089; RV32I-NEXT: srli a1, a0, 21090; RV32I-NEXT: and a0, a0, a21091; RV32I-NEXT: and a1, a1, a21092; RV32I-NEXT: slli a0, a0, 21093; RV32I-NEXT: or a0, a1, a01094; RV32I-NEXT: srli a1, a0, 11095; RV32I-NEXT: and a0, a0, a31096; RV32I-NEXT: and a1, a1, a31097; RV32I-NEXT: slli a0, a0, 11098; RV32I-NEXT: or a0, a1, a01099; RV32I-NEXT: ret1100;1101; RV32ZBB-LABEL: brev_i32:1102; RV32ZBB: # %bb.0:1103; RV32ZBB-NEXT: rev8 a0, a01104; RV32ZBB-NEXT: lui a1, 616811105; RV32ZBB-NEXT: srli a2, a0, 41106; RV32ZBB-NEXT: addi a1, a1, -2411107; RV32ZBB-NEXT: and a2, a2, a11108; RV32ZBB-NEXT: and a0, a0, a11109; RV32ZBB-NEXT: lui a1, 2097151110; RV32ZBB-NEXT: addi a1, a1, 8191111; RV32ZBB-NEXT: slli a0, a0, 41112; RV32ZBB-NEXT: or a0, a2, a01113; RV32ZBB-NEXT: srli a2, a0, 21114; RV32ZBB-NEXT: and a0, a0, a11115; RV32ZBB-NEXT: and a1, a2, a11116; RV32ZBB-NEXT: lui a2, 3495251117; RV32ZBB-NEXT: addi a2, a2, 13651118; RV32ZBB-NEXT: slli a0, a0, 21119; RV32ZBB-NEXT: or a0, a1, a01120; RV32ZBB-NEXT: srli a1, a0, 11121; RV32ZBB-NEXT: and a0, a0, a21122; RV32ZBB-NEXT: and a1, a1, a21123; RV32ZBB-NEXT: slli a0, a0, 11124; RV32ZBB-NEXT: or a0, a1, a01125; RV32ZBB-NEXT: ret1126;1127; RV32ZBBXQCIBM-LABEL: brev_i32:1128; RV32ZBBXQCIBM: # %bb.0:1129; RV32ZBBXQCIBM-NEXT: qc.brev32 a0, a01130; RV32ZBBXQCIBM-NEXT: ret1131 %v0 = tail call i32 @llvm.bitreverse.i32(i32 %a0)1132 ret i32 %v01133}1134 1135define i64 @brev_i64(i64 %a0) {1136; RV32I-LABEL: brev_i64:1137; RV32I: # %bb.0:1138; RV32I-NEXT: srli a2, a1, 81139; RV32I-NEXT: lui a3, 161140; RV32I-NEXT: srli a4, a1, 241141; RV32I-NEXT: slli a5, a1, 241142; RV32I-NEXT: lui a6, 616811143; RV32I-NEXT: srli a7, a0, 81144; RV32I-NEXT: addi a3, a3, -2561145; RV32I-NEXT: and a2, a2, a31146; RV32I-NEXT: or a2, a2, a41147; RV32I-NEXT: srli a4, a0, 241148; RV32I-NEXT: and a7, a7, a31149; RV32I-NEXT: or a4, a7, a41150; RV32I-NEXT: lui a7, 2097151151; RV32I-NEXT: and a1, a1, a31152; RV32I-NEXT: slli a1, a1, 81153; RV32I-NEXT: or a1, a5, a11154; RV32I-NEXT: lui a5, 3495251155; RV32I-NEXT: and a3, a0, a31156; RV32I-NEXT: slli a0, a0, 241157; RV32I-NEXT: addi a6, a6, -2411158; RV32I-NEXT: addi a7, a7, 8191159; RV32I-NEXT: addi a5, a5, 13651160; RV32I-NEXT: slli a3, a3, 81161; RV32I-NEXT: or a0, a0, a31162; RV32I-NEXT: or a1, a1, a21163; RV32I-NEXT: or a0, a0, a41164; RV32I-NEXT: srli a2, a1, 41165; RV32I-NEXT: and a1, a1, a61166; RV32I-NEXT: srli a3, a0, 41167; RV32I-NEXT: and a0, a0, a61168; RV32I-NEXT: and a2, a2, a61169; RV32I-NEXT: slli a1, a1, 41170; RV32I-NEXT: and a3, a3, a61171; RV32I-NEXT: slli a0, a0, 41172; RV32I-NEXT: or a1, a2, a11173; RV32I-NEXT: or a0, a3, a01174; RV32I-NEXT: srli a2, a1, 21175; RV32I-NEXT: and a1, a1, a71176; RV32I-NEXT: srli a3, a0, 21177; RV32I-NEXT: and a0, a0, a71178; RV32I-NEXT: and a2, a2, a71179; RV32I-NEXT: slli a1, a1, 21180; RV32I-NEXT: and a3, a3, a71181; RV32I-NEXT: slli a0, a0, 21182; RV32I-NEXT: or a1, a2, a11183; RV32I-NEXT: or a0, a3, a01184; RV32I-NEXT: srli a2, a1, 11185; RV32I-NEXT: and a1, a1, a51186; RV32I-NEXT: srli a3, a0, 11187; RV32I-NEXT: and a0, a0, a51188; RV32I-NEXT: and a2, a2, a51189; RV32I-NEXT: slli a1, a1, 11190; RV32I-NEXT: and a3, a3, a51191; RV32I-NEXT: slli a4, a0, 11192; RV32I-NEXT: or a0, a2, a11193; RV32I-NEXT: or a1, a3, a41194; RV32I-NEXT: ret1195;1196; RV32ZBB-LABEL: brev_i64:1197; RV32ZBB: # %bb.0:1198; RV32ZBB-NEXT: rev8 a1, a11199; RV32ZBB-NEXT: lui a2, 616811200; RV32ZBB-NEXT: lui a3, 2097151201; RV32ZBB-NEXT: rev8 a0, a01202; RV32ZBB-NEXT: srli a4, a1, 41203; RV32ZBB-NEXT: addi a2, a2, -2411204; RV32ZBB-NEXT: srli a5, a0, 41205; RV32ZBB-NEXT: and a4, a4, a21206; RV32ZBB-NEXT: and a1, a1, a21207; RV32ZBB-NEXT: and a5, a5, a21208; RV32ZBB-NEXT: and a0, a0, a21209; RV32ZBB-NEXT: lui a2, 3495251210; RV32ZBB-NEXT: addi a3, a3, 8191211; RV32ZBB-NEXT: addi a2, a2, 13651212; RV32ZBB-NEXT: slli a1, a1, 41213; RV32ZBB-NEXT: slli a0, a0, 41214; RV32ZBB-NEXT: or a1, a4, a11215; RV32ZBB-NEXT: or a0, a5, a01216; RV32ZBB-NEXT: srli a4, a1, 21217; RV32ZBB-NEXT: and a1, a1, a31218; RV32ZBB-NEXT: srli a5, a0, 21219; RV32ZBB-NEXT: and a0, a0, a31220; RV32ZBB-NEXT: and a4, a4, a31221; RV32ZBB-NEXT: slli a1, a1, 21222; RV32ZBB-NEXT: and a3, a5, a31223; RV32ZBB-NEXT: slli a0, a0, 21224; RV32ZBB-NEXT: or a1, a4, a11225; RV32ZBB-NEXT: or a0, a3, a01226; RV32ZBB-NEXT: srli a3, a1, 11227; RV32ZBB-NEXT: and a1, a1, a21228; RV32ZBB-NEXT: srli a4, a0, 11229; RV32ZBB-NEXT: and a0, a0, a21230; RV32ZBB-NEXT: and a3, a3, a21231; RV32ZBB-NEXT: slli a1, a1, 11232; RV32ZBB-NEXT: and a2, a4, a21233; RV32ZBB-NEXT: slli a4, a0, 11234; RV32ZBB-NEXT: or a0, a3, a11235; RV32ZBB-NEXT: or a1, a2, a41236; RV32ZBB-NEXT: ret1237;1238; RV32ZBBXQCIBM-LABEL: brev_i64:1239; RV32ZBBXQCIBM: # %bb.0:1240; RV32ZBBXQCIBM-NEXT: qc.brev32 a2, a11241; RV32ZBBXQCIBM-NEXT: qc.brev32 a1, a01242; RV32ZBBXQCIBM-NEXT: mv a0, a21243; RV32ZBBXQCIBM-NEXT: ret1244 %v0 = tail call i64 @llvm.bitreverse.i64(i64 %a0)1245 ret i64 %v01246}1247