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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \3; RUN: | FileCheck %s -check-prefixes=RV32I4; RUN: llc -mtriple=riscv32 -verify-machineinstrs -mattr=+experimental-xqcilsm < %s \5; RUN: | FileCheck %s -check-prefixes=RV32IXQCILSM6 7%struct.anon = type { [16 x i32] }8%struct.anon.0 = type { [47 x i32] }9%struct.anon.1 = type { [48 x i32] }10%struct.anon.2 = type { [64 x i8] }11%struct.struct1_t = type { [16 x i32] }12 13@struct1 = common dso_local local_unnamed_addr global %struct.anon zeroinitializer, align 414@struct4b = common dso_local local_unnamed_addr global %struct.anon.0 zeroinitializer, align 415@struct4b1 = common dso_local local_unnamed_addr global %struct.anon.1 zeroinitializer, align 416@struct2 = common dso_local local_unnamed_addr global %struct.anon.2 zeroinitializer, align 117@arr1 = common dso_local local_unnamed_addr global [100 x i32] zeroinitializer, align 418@struct1_ = common dso_local local_unnamed_addr global %struct.struct1_t zeroinitializer, align 419 20define void @test1(ptr nocapture %p, i32 %n) nounwind {21; RV32I-LABEL: test1:22; RV32I: # %bb.0: # %entry23; RV32I-NEXT: mv a2, a124; RV32I-NEXT: li a1, 025; RV32I-NEXT: tail memset26;27; RV32IXQCILSM-LABEL: test1:28; RV32IXQCILSM: # %bb.0: # %entry29; RV32IXQCILSM-NEXT: mv a2, a130; RV32IXQCILSM-NEXT: li a1, 031; RV32IXQCILSM-NEXT: tail memset32entry:33 tail call void @llvm.memset.p0.i32(ptr align 1 %p, i8 0, i32 %n, i1 false)34 ret void35}36 37define void @test2(ptr nocapture %p) nounwind {38; RV32I-LABEL: test2:39; RV32I: # %bb.0: # %entry40; RV32I-NEXT: li a1, 16541; RV32I-NEXT: li a2, 12842; RV32I-NEXT: tail memset43;44; RV32IXQCILSM-LABEL: test2:45; RV32IXQCILSM: # %bb.0: # %entry46; RV32IXQCILSM-NEXT: lui a1, 67849047; RV32IXQCILSM-NEXT: addi a1, a1, 144548; RV32IXQCILSM-NEXT: qc.setwmi a1, 16, 0(a0)49; RV32IXQCILSM-NEXT: qc.setwmi a1, 16, 64(a0)50; RV32IXQCILSM-NEXT: ret51entry:52 tail call void @llvm.memset.p0.i32(ptr align 4 %p, i8 -91, i32 128, i1 false)53 ret void54}55 56define void @test2a(ptr nocapture %p) nounwind {57; RV32I-LABEL: test2a:58; RV32I: # %bb.0: # %entry59; RV32I-NEXT: li a1, 16560; RV32I-NEXT: li a2, 18861; RV32I-NEXT: tail memset62;63; RV32IXQCILSM-LABEL: test2a:64; RV32IXQCILSM: # %bb.0: # %entry65; RV32IXQCILSM-NEXT: lui a1, 67849066; RV32IXQCILSM-NEXT: addi a1, a1, 144567; RV32IXQCILSM-NEXT: qc.setwmi a1, 16, 0(a0)68; RV32IXQCILSM-NEXT: qc.setwmi a1, 15, 64(a0)69; RV32IXQCILSM-NEXT: qc.setwmi a1, 16, 124(a0)70; RV32IXQCILSM-NEXT: ret71entry:72 tail call void @llvm.memset.p0.i32(ptr align 4 %p, i8 -91, i32 188, i1 false)73 ret void74}75 76define void @test2b(ptr nocapture %p) nounwind {77; RV32I-LABEL: test2b:78; RV32I: # %bb.0: # %entry79; RV32I-NEXT: li a1, 16580; RV32I-NEXT: li a2, 19281; RV32I-NEXT: tail memset82;83; RV32IXQCILSM-LABEL: test2b:84; RV32IXQCILSM: # %bb.0: # %entry85; RV32IXQCILSM-NEXT: li a1, 16586; RV32IXQCILSM-NEXT: li a2, 19287; RV32IXQCILSM-NEXT: tail memset88entry:89 tail call void @llvm.memset.p0.i32(ptr align 4 %p, i8 -91, i32 192, i1 false)90 ret void91}92 93define void @test2c(ptr nocapture %p) nounwind {94; RV32I-LABEL: test2c:95; RV32I: # %bb.0: # %entry96; RV32I-NEXT: li a1, 16597; RV32I-NEXT: li a2, 12898; RV32I-NEXT: tail memset99;100; RV32IXQCILSM-LABEL: test2c:101; RV32IXQCILSM: # %bb.0: # %entry102; RV32IXQCILSM-NEXT: lui a1, 678490103; RV32IXQCILSM-NEXT: addi a1, a1, 1445104; RV32IXQCILSM-NEXT: qc.setwmi a1, 16, 0(a0)105; RV32IXQCILSM-NEXT: qc.setwmi a1, 16, 64(a0)106; RV32IXQCILSM-NEXT: ret107entry:108 tail call void @llvm.memset.p0.i32(ptr align 4 %p, i8 -91, i32 128, i1 false)109 ret void110}111 112define void @test2d(ptr nocapture %p) nounwind {113; RV32I-LABEL: test2d:114; RV32I: # %bb.0: # %entry115; RV32I-NEXT: li a1, -91116; RV32I-NEXT: lui a2, 1048570117; RV32I-NEXT: lui a3, 678490118; RV32I-NEXT: addi a2, a2, 1445119; RV32I-NEXT: addi a3, a3, 1445120; RV32I-NEXT: sw a3, 0(a0)121; RV32I-NEXT: sw a3, 4(a0)122; RV32I-NEXT: sh a2, 8(a0)123; RV32I-NEXT: sb a1, 10(a0)124; RV32I-NEXT: ret125;126; RV32IXQCILSM-LABEL: test2d:127; RV32IXQCILSM: # %bb.0: # %entry128; RV32IXQCILSM-NEXT: li a1, -91129; RV32IXQCILSM-NEXT: lui a2, 1048570130; RV32IXQCILSM-NEXT: lui a3, 678490131; RV32IXQCILSM-NEXT: addi a2, a2, 1445132; RV32IXQCILSM-NEXT: addi a3, a3, 1445133; RV32IXQCILSM-NEXT: sw a3, 0(a0)134; RV32IXQCILSM-NEXT: sw a3, 4(a0)135; RV32IXQCILSM-NEXT: sh a2, 8(a0)136; RV32IXQCILSM-NEXT: sb a1, 10(a0)137; RV32IXQCILSM-NEXT: ret138entry:139 tail call void @llvm.memset.p0.i32(ptr align 4 %p, i8 -91, i32 11, i1 false)140 ret void141}142 143define ptr @test3(ptr %p) nounwind {144; RV32I-LABEL: test3:145; RV32I: # %bb.0: # %entry146; RV32I-NEXT: li a2, 256147; RV32I-NEXT: li a1, 0148; RV32I-NEXT: tail memset149;150; RV32IXQCILSM-LABEL: test3:151; RV32IXQCILSM: # %bb.0: # %entry152; RV32IXQCILSM-NEXT: li a2, 256153; RV32IXQCILSM-NEXT: li a1, 0154; RV32IXQCILSM-NEXT: tail memset155entry:156 tail call void @llvm.memset.p0.i32(ptr align 4 %p, i8 0, i32 256, i1 false)157 ret ptr %p158}159 160define ptr @test3a(ptr %p) nounwind {161; RV32I-LABEL: test3a:162; RV32I: # %bb.0: # %entry163; RV32I-NEXT: li a2, 128164; RV32I-NEXT: li a1, 0165; RV32I-NEXT: tail memset166;167; RV32IXQCILSM-LABEL: test3a:168; RV32IXQCILSM: # %bb.0: # %entry169; RV32IXQCILSM-NEXT: qc.setwmi zero, 16, 0(a0)170; RV32IXQCILSM-NEXT: qc.setwmi zero, 16, 64(a0)171; RV32IXQCILSM-NEXT: ret172entry:173 tail call void @llvm.memset.p0.i32(ptr align 4 %p, i8 0, i32 128, i1 false)174 ret ptr %p175}176 177define void @test4() nounwind {178; RV32I-LABEL: test4:179; RV32I: # %bb.0: # %entry180; RV32I-NEXT: lui a0, %hi(struct1)181; RV32I-NEXT: addi a0, a0, %lo(struct1)182; RV32I-NEXT: li a2, 64183; RV32I-NEXT: li a1, 0184; RV32I-NEXT: tail memset185;186; RV32IXQCILSM-LABEL: test4:187; RV32IXQCILSM: # %bb.0: # %entry188; RV32IXQCILSM-NEXT: lui a0, %hi(struct1)189; RV32IXQCILSM-NEXT: addi a0, a0, %lo(struct1)190; RV32IXQCILSM-NEXT: qc.setwmi zero, 16, 0(a0)191; RV32IXQCILSM-NEXT: ret192entry:193 tail call void @llvm.memset.p0.i32(ptr align 4 @struct1, i8 0, i32 64, i1 false)194 ret void195}196 197define void @test4a(ptr nocapture %s) nounwind {198; RV32I-LABEL: test4a:199; RV32I: # %bb.0: # %entry200; RV32I-NEXT: li a1, 166201; RV32I-NEXT: li a2, 64202; RV32I-NEXT: tail memset203;204; RV32IXQCILSM-LABEL: test4a:205; RV32IXQCILSM: # %bb.0: # %entry206; RV32IXQCILSM-NEXT: lui a1, 682602207; RV32IXQCILSM-NEXT: addi a1, a1, 1702208; RV32IXQCILSM-NEXT: qc.setwmi a1, 16, 0(a0)209; RV32IXQCILSM-NEXT: ret210entry:211 tail call void @llvm.memset.p0.i32(ptr align 4 %s, i8 -90, i32 64, i1 false)212 ret void213}214 215define void @test4b() nounwind {216; RV32I-LABEL: test4b:217; RV32I: # %bb.0: # %entry218; RV32I-NEXT: addi sp, sp, -16219; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill220; RV32I-NEXT: lui a0, %hi(struct4b)221; RV32I-NEXT: addi a0, a0, %lo(struct4b)222; RV32I-NEXT: li a2, 188223; RV32I-NEXT: li a1, 0224; RV32I-NEXT: call memset225; RV32I-NEXT: lui a0, %hi(struct4b1)226; RV32I-NEXT: addi a0, a0, %lo(struct4b1)227; RV32I-NEXT: li a2, 192228; RV32I-NEXT: li a1, 0229; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload230; RV32I-NEXT: addi sp, sp, 16231; RV32I-NEXT: tail memset232;233; RV32IXQCILSM-LABEL: test4b:234; RV32IXQCILSM: # %bb.0: # %entry235; RV32IXQCILSM-NEXT: lui a1, %hi(struct4b)236; RV32IXQCILSM-NEXT: addi a1, a1, %lo(struct4b)237; RV32IXQCILSM-NEXT: lui a0, %hi(struct4b1)238; RV32IXQCILSM-NEXT: addi a0, a0, %lo(struct4b1)239; RV32IXQCILSM-NEXT: li a2, 192240; RV32IXQCILSM-NEXT: qc.setwmi zero, 16, 0(a1)241; RV32IXQCILSM-NEXT: qc.setwmi zero, 15, 64(a1)242; RV32IXQCILSM-NEXT: qc.setwmi zero, 16, 124(a1)243; RV32IXQCILSM-NEXT: li a1, 0244; RV32IXQCILSM-NEXT: tail memset245entry:246 tail call void @llvm.memset.p0.i32(ptr align 4 @struct4b, i8 0, i32 188, i1 false)247 tail call void @llvm.memset.p0.i32(ptr align 4 @struct4b1, i8 0, i32 192, i1 false)248 ret void249}250 251define void @test5() nounwind {252; RV32I-LABEL: test5:253; RV32I: # %bb.0: # %entry254; RV32I-NEXT: lui a0, %hi(struct2)255; RV32I-NEXT: addi a0, a0, %lo(struct2)256; RV32I-NEXT: li a2, 64257; RV32I-NEXT: li a1, 0258; RV32I-NEXT: tail memset259;260; RV32IXQCILSM-LABEL: test5:261; RV32IXQCILSM: # %bb.0: # %entry262; RV32IXQCILSM-NEXT: lui a0, %hi(struct2)263; RV32IXQCILSM-NEXT: addi a0, a0, %lo(struct2)264; RV32IXQCILSM-NEXT: li a2, 64265; RV32IXQCILSM-NEXT: li a1, 0266; RV32IXQCILSM-NEXT: tail memset267entry:268 tail call void @llvm.memset.p0.i32(ptr align 1 @struct2, i8 0, i32 64, i1 false)269 ret void270}271 272define i32 @test6() nounwind {273; RV32I-LABEL: test6:274; RV32I: # %bb.0: # %entry275; RV32I-NEXT: addi sp, sp, -16276; RV32I-NEXT: sw zero, 12(sp)277; RV32I-NEXT: li a0, 0278; RV32I-NEXT: addi sp, sp, 16279; RV32I-NEXT: ret280;281; RV32IXQCILSM-LABEL: test6:282; RV32IXQCILSM: # %bb.0: # %entry283; RV32IXQCILSM-NEXT: addi sp, sp, -16284; RV32IXQCILSM-NEXT: sw zero, 12(sp)285; RV32IXQCILSM-NEXT: li a0, 0286; RV32IXQCILSM-NEXT: addi sp, sp, 16287; RV32IXQCILSM-NEXT: ret288entry:289 %x = alloca i32, align 4290 call void @llvm.memset.p0.i32(ptr align 4 %x, i8 0, i32 4, i1 false)291 %0 = load i32, ptr %x, align 4292 ret i32 %0293}294 295define zeroext i8 @test6b_c() nounwind {296; RV32I-LABEL: test6b_c:297; RV32I: # %bb.0:298; RV32I-NEXT: addi sp, sp, -16299; RV32I-NEXT: sb zero, 12(sp)300; RV32I-NEXT: lbu a0, 12(sp)301; RV32I-NEXT: addi sp, sp, 16302; RV32I-NEXT: ret303;304; RV32IXQCILSM-LABEL: test6b_c:305; RV32IXQCILSM: # %bb.0:306; RV32IXQCILSM-NEXT: addi sp, sp, -16307; RV32IXQCILSM-NEXT: sb zero, 12(sp)308; RV32IXQCILSM-NEXT: lbu a0, 12(sp)309; RV32IXQCILSM-NEXT: addi sp, sp, 16310; RV32IXQCILSM-NEXT: ret311 %x = alloca i8, align 4312 call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %x)313 call void @llvm.memset.p0.i32(ptr nonnull align 4 %x, i8 0, i32 1, i1 false)314 %x.0.x.0. = load volatile i8, ptr %x, align 4315 call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %x)316 ret i8 %x.0.x.0.317}318 319define signext i16 @test6b_s() nounwind {320; RV32I-LABEL: test6b_s:321; RV32I: # %bb.0: # %entry322; RV32I-NEXT: addi sp, sp, -16323; RV32I-NEXT: sh zero, 12(sp)324; RV32I-NEXT: lh a0, 12(sp)325; RV32I-NEXT: addi sp, sp, 16326; RV32I-NEXT: ret327;328; RV32IXQCILSM-LABEL: test6b_s:329; RV32IXQCILSM: # %bb.0: # %entry330; RV32IXQCILSM-NEXT: addi sp, sp, -16331; RV32IXQCILSM-NEXT: sh zero, 12(sp)332; RV32IXQCILSM-NEXT: lh a0, 12(sp)333; RV32IXQCILSM-NEXT: addi sp, sp, 16334; RV32IXQCILSM-NEXT: ret335entry:336 %x = alloca i16, align 4337 call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %x)338 store i16 0, ptr %x, align 4339 %x.0.x.0. = load volatile i16, ptr %x, align 4340 call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %x)341 ret i16 %x.0.x.0.342}343 344define i32 @test6b_l() nounwind {345; RV32I-LABEL: test6b_l:346; RV32I: # %bb.0: # %entry347; RV32I-NEXT: addi sp, sp, -16348; RV32I-NEXT: sw zero, 12(sp)349; RV32I-NEXT: lw a0, 12(sp)350; RV32I-NEXT: addi sp, sp, 16351; RV32I-NEXT: ret352;353; RV32IXQCILSM-LABEL: test6b_l:354; RV32IXQCILSM: # %bb.0: # %entry355; RV32IXQCILSM-NEXT: addi sp, sp, -16356; RV32IXQCILSM-NEXT: sw zero, 12(sp)357; RV32IXQCILSM-NEXT: lw a0, 12(sp)358; RV32IXQCILSM-NEXT: addi sp, sp, 16359; RV32IXQCILSM-NEXT: ret360entry:361 %x = alloca i32, align 4362 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %x)363 store i32 0, ptr %x, align 4364 %x.0.x.0. = load volatile i32, ptr %x, align 4365 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %x)366 ret i32 %x.0.x.0.367}368 369define i64 @test6b_ll() nounwind {370; RV32I-LABEL: test6b_ll:371; RV32I: # %bb.0: # %entry372; RV32I-NEXT: addi sp, sp, -16373; RV32I-NEXT: sw zero, 8(sp)374; RV32I-NEXT: sw zero, 12(sp)375; RV32I-NEXT: lw a0, 8(sp)376; RV32I-NEXT: lw a1, 12(sp)377; RV32I-NEXT: addi sp, sp, 16378; RV32I-NEXT: ret379;380; RV32IXQCILSM-LABEL: test6b_ll:381; RV32IXQCILSM: # %bb.0: # %entry382; RV32IXQCILSM-NEXT: addi sp, sp, -16383; RV32IXQCILSM-NEXT: sw zero, 8(sp)384; RV32IXQCILSM-NEXT: sw zero, 12(sp)385; RV32IXQCILSM-NEXT: lw a0, 8(sp)386; RV32IXQCILSM-NEXT: lw a1, 12(sp)387; RV32IXQCILSM-NEXT: addi sp, sp, 16388; RV32IXQCILSM-NEXT: ret389entry:390 %x = alloca i64, align 8391 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %x)392 call void @llvm.memset.p0.i32(ptr nonnull align 8 %x, i8 0, i32 8, i1 false)393 %x.0.x.0. = load volatile i64, ptr %x, align 8394 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %x)395 ret i64 %x.0.x.0.396}397 398define zeroext i8 @test6c_c() nounwind {399; RV32I-LABEL: test6c_c:400; RV32I: # %bb.0: # %entry401; RV32I-NEXT: addi sp, sp, -16402; RV32I-NEXT: sb zero, 15(sp)403; RV32I-NEXT: li a0, 0404; RV32I-NEXT: addi sp, sp, 16405; RV32I-NEXT: ret406;407; RV32IXQCILSM-LABEL: test6c_c:408; RV32IXQCILSM: # %bb.0: # %entry409; RV32IXQCILSM-NEXT: addi sp, sp, -16410; RV32IXQCILSM-NEXT: sb zero, 15(sp)411; RV32IXQCILSM-NEXT: li a0, 0412; RV32IXQCILSM-NEXT: addi sp, sp, 16413; RV32IXQCILSM-NEXT: ret414entry:415 %x = alloca i8416 call void @llvm.memset.p0.i32(ptr align 1 %x, i8 0, i32 1, i1 false)417 %0 = load i8, ptr %x, align 1418 ret i8 %0419}420 421define signext i16 @test6c_s() nounwind {422; RV32I-LABEL: test6c_s:423; RV32I: # %bb.0: # %entry424; RV32I-NEXT: addi sp, sp, -16425; RV32I-NEXT: sh zero, 14(sp)426; RV32I-NEXT: li a0, 0427; RV32I-NEXT: addi sp, sp, 16428; RV32I-NEXT: ret429;430; RV32IXQCILSM-LABEL: test6c_s:431; RV32IXQCILSM: # %bb.0: # %entry432; RV32IXQCILSM-NEXT: addi sp, sp, -16433; RV32IXQCILSM-NEXT: sh zero, 14(sp)434; RV32IXQCILSM-NEXT: li a0, 0435; RV32IXQCILSM-NEXT: addi sp, sp, 16436; RV32IXQCILSM-NEXT: ret437entry:438 %x = alloca i16439 call void @llvm.memset.p0.i32(ptr align 2 %x, i8 0, i32 2, i1 false)440 %0 = load i16, ptr %x, align 2441 ret i16 %0442}443 444define i32 @test6c_l() nounwind {445; RV32I-LABEL: test6c_l:446; RV32I: # %bb.0: # %entry447; RV32I-NEXT: addi sp, sp, -16448; RV32I-NEXT: sw zero, 12(sp)449; RV32I-NEXT: li a0, 0450; RV32I-NEXT: addi sp, sp, 16451; RV32I-NEXT: ret452;453; RV32IXQCILSM-LABEL: test6c_l:454; RV32IXQCILSM: # %bb.0: # %entry455; RV32IXQCILSM-NEXT: addi sp, sp, -16456; RV32IXQCILSM-NEXT: sw zero, 12(sp)457; RV32IXQCILSM-NEXT: li a0, 0458; RV32IXQCILSM-NEXT: addi sp, sp, 16459; RV32IXQCILSM-NEXT: ret460entry:461 %x = alloca i32, align 4462 call void @llvm.memset.p0.i32(ptr align 4 %x, i8 0, i32 4, i1 false)463 %0 = load i32, ptr %x, align 4464 ret i32 %0465}466 467define i64 @test6c_ll() nounwind {468; RV32I-LABEL: test6c_ll:469; RV32I: # %bb.0: # %entry470; RV32I-NEXT: addi sp, sp, -16471; RV32I-NEXT: sw zero, 8(sp)472; RV32I-NEXT: sw zero, 12(sp)473; RV32I-NEXT: li a0, 0474; RV32I-NEXT: li a1, 0475; RV32I-NEXT: addi sp, sp, 16476; RV32I-NEXT: ret477;478; RV32IXQCILSM-LABEL: test6c_ll:479; RV32IXQCILSM: # %bb.0: # %entry480; RV32IXQCILSM-NEXT: addi sp, sp, -16481; RV32IXQCILSM-NEXT: sw zero, 8(sp)482; RV32IXQCILSM-NEXT: sw zero, 12(sp)483; RV32IXQCILSM-NEXT: li a0, 0484; RV32IXQCILSM-NEXT: li a1, 0485; RV32IXQCILSM-NEXT: addi sp, sp, 16486; RV32IXQCILSM-NEXT: ret487entry:488 %x = alloca i64, align 8489 call void @llvm.memset.p0.i32(ptr align 8 %x, i8 0, i32 8, i1 false)490 %0 = load i64, ptr %x, align 8491 ret i64 %0492}493 494define void @test7() nounwind {495; RV32I-LABEL: test7:496; RV32I: # %bb.0:497; RV32I-NEXT: lui a0, %hi(arr1)498; RV32I-NEXT: addi a0, a0, %lo(arr1)499; RV32I-NEXT: sw zero, 0(a0)500; RV32I-NEXT: sw zero, 4(a0)501; RV32I-NEXT: ret502;503; RV32IXQCILSM-LABEL: test7:504; RV32IXQCILSM: # %bb.0:505; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)506; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)507; RV32IXQCILSM-NEXT: sw zero, 0(a0)508; RV32IXQCILSM-NEXT: sw zero, 4(a0)509; RV32IXQCILSM-NEXT: ret510 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 0, i32 8, i1 false)511 ret void512}513 514define void @test7a() nounwind {515; RV32I-LABEL: test7a:516; RV32I: # %bb.0: # %entry517; RV32I-NEXT: ret518;519; RV32IXQCILSM-LABEL: test7a:520; RV32IXQCILSM: # %bb.0: # %entry521; RV32IXQCILSM-NEXT: ret522entry:523 call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 0, i32 0, i1 false)524 ret void525}526 527define void @test7a_unalign() nounwind {528; RV32I-LABEL: test7a_unalign:529; RV32I: # %bb.0: # %entry530; RV32I-NEXT: lui a0, %hi(arr1)531; RV32I-NEXT: addi a0, a0, %lo(arr1)532; RV32I-NEXT: li a1, -1533; RV32I-NEXT: sb a1, 16(a0)534; RV32I-NEXT: sw a1, 0(a0)535; RV32I-NEXT: sw a1, 4(a0)536; RV32I-NEXT: sw a1, 8(a0)537; RV32I-NEXT: sw a1, 12(a0)538; RV32I-NEXT: ret539;540; RV32IXQCILSM-LABEL: test7a_unalign:541; RV32IXQCILSM: # %bb.0: # %entry542; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)543; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)544; RV32IXQCILSM-NEXT: li a1, -1545; RV32IXQCILSM-NEXT: sb a1, 16(a0)546; RV32IXQCILSM-NEXT: sw a1, 0(a0)547; RV32IXQCILSM-NEXT: sw a1, 4(a0)548; RV32IXQCILSM-NEXT: sw a1, 8(a0)549; RV32IXQCILSM-NEXT: sw a1, 12(a0)550; RV32IXQCILSM-NEXT: ret551entry:552 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 -1, i32 17, i1 false)553 ret void554}555 556define void @test7b() nounwind {557; RV32I-LABEL: test7b:558; RV32I: # %bb.0: # %entry559; RV32I-NEXT: lui a0, %hi(arr1)560; RV32I-NEXT: addi a0, a0, %lo(arr1)561; RV32I-NEXT: li a1, 255562; RV32I-NEXT: li a2, 68563; RV32I-NEXT: tail memset564;565; RV32IXQCILSM-LABEL: test7b:566; RV32IXQCILSM: # %bb.0: # %entry567; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)568; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)569; RV32IXQCILSM-NEXT: li a1, -1570; RV32IXQCILSM-NEXT: qc.setwmi a1, 16, 0(a0)571; RV32IXQCILSM-NEXT: qc.setwmi a1, 1, 64(a0)572; RV32IXQCILSM-NEXT: ret573entry:574 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 -1, i32 68, i1 false)575 ret void576}577 578define void @test7c() nounwind {579; RV32I-LABEL: test7c:580; RV32I: # %bb.0: # %entry581; RV32I-NEXT: lui a0, %hi(arr1)582; RV32I-NEXT: addi a0, a0, %lo(arr1)583; RV32I-NEXT: li a1, 128584; RV32I-NEXT: li a2, 128585; RV32I-NEXT: tail memset586;587; RV32IXQCILSM-LABEL: test7c:588; RV32IXQCILSM: # %bb.0: # %entry589; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)590; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)591; RV32IXQCILSM-NEXT: lui a1, 526344592; RV32IXQCILSM-NEXT: addi a1, a1, 128593; RV32IXQCILSM-NEXT: qc.setwmi a1, 16, 0(a0)594; RV32IXQCILSM-NEXT: qc.setwmi a1, 16, 64(a0)595; RV32IXQCILSM-NEXT: ret596entry:597 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 -128, i32 128, i1 false)598 ret void599}600 601define void @test7d() nounwind {602; RV32I-LABEL: test7d:603; RV32I: # %bb.0: # %entry604; RV32I-NEXT: lui a0, %hi(arr1)605; RV32I-NEXT: addi a0, a0, %lo(arr1)606; RV32I-NEXT: li a1, 13607; RV32I-NEXT: li a2, 148608; RV32I-NEXT: tail memset609;610; RV32IXQCILSM-LABEL: test7d:611; RV32IXQCILSM: # %bb.0: # %entry612; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)613; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)614; RV32IXQCILSM-NEXT: lui a1, 53457615; RV32IXQCILSM-NEXT: addi a1, a1, -755616; RV32IXQCILSM-NEXT: qc.setwmi a1, 16, 0(a0)617; RV32IXQCILSM-NEXT: qc.setwmi a1, 15, 64(a0)618; RV32IXQCILSM-NEXT: qc.setwmi a1, 6, 124(a0)619; RV32IXQCILSM-NEXT: ret620entry:621 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 13, i32 148, i1 false)622 ret void623}624 625define void @test7e() nounwind {626; RV32I-LABEL: test7e:627; RV32I: # %bb.0: # %entry628; RV32I-NEXT: lui a0, %hi(arr1)629; RV32I-NEXT: addi a0, a0, %lo(arr1)630; RV32I-NEXT: li a1, 239631; RV32I-NEXT: li a2, 100632; RV32I-NEXT: tail memset633;634; RV32IXQCILSM-LABEL: test7e:635; RV32IXQCILSM: # %bb.0: # %entry636; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)637; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)638; RV32IXQCILSM-NEXT: lui a1, 982783639; RV32IXQCILSM-NEXT: addi a1, a1, -17640; RV32IXQCILSM-NEXT: qc.setwmi a1, 16, 0(a0)641; RV32IXQCILSM-NEXT: qc.setwmi a1, 9, 64(a0)642; RV32IXQCILSM-NEXT: ret643entry:644 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 -17, i32 100, i1 false)645 ret void646}647 648define void @test8() nounwind {649; RV32I-LABEL: test8:650; RV32I: # %bb.0: # %entry651; RV32I-NEXT: lui a0, %hi(arr1)652; RV32I-NEXT: addi a0, a0, %lo(arr1)653; RV32I-NEXT: sw zero, 0(a0)654; RV32I-NEXT: sw zero, 4(a0)655; RV32I-NEXT: sw zero, 8(a0)656; RV32I-NEXT: sw zero, 12(a0)657; RV32I-NEXT: ret658;659; RV32IXQCILSM-LABEL: test8:660; RV32IXQCILSM: # %bb.0: # %entry661; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)662; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)663; RV32IXQCILSM-NEXT: sw zero, 0(a0)664; RV32IXQCILSM-NEXT: sw zero, 4(a0)665; RV32IXQCILSM-NEXT: sw zero, 8(a0)666; RV32IXQCILSM-NEXT: sw zero, 12(a0)667; RV32IXQCILSM-NEXT: ret668entry:669 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 0, i32 16, i1 false)670 ret void671}672 673define void @test9() nounwind {674; RV32I-LABEL: test9:675; RV32I: # %bb.0: # %entry676; RV32I-NEXT: lui a0, %hi(arr1)677; RV32I-NEXT: addi a0, a0, %lo(arr1)678; RV32I-NEXT: sw zero, 16(a0)679; RV32I-NEXT: sw zero, 20(a0)680; RV32I-NEXT: sw zero, 24(a0)681; RV32I-NEXT: sw zero, 28(a0)682; RV32I-NEXT: sw zero, 0(a0)683; RV32I-NEXT: sw zero, 4(a0)684; RV32I-NEXT: sw zero, 8(a0)685; RV32I-NEXT: sw zero, 12(a0)686; RV32I-NEXT: ret687;688; RV32IXQCILSM-LABEL: test9:689; RV32IXQCILSM: # %bb.0: # %entry690; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)691; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)692; RV32IXQCILSM-NEXT: sw zero, 16(a0)693; RV32IXQCILSM-NEXT: sw zero, 20(a0)694; RV32IXQCILSM-NEXT: sw zero, 24(a0)695; RV32IXQCILSM-NEXT: sw zero, 28(a0)696; RV32IXQCILSM-NEXT: sw zero, 0(a0)697; RV32IXQCILSM-NEXT: sw zero, 4(a0)698; RV32IXQCILSM-NEXT: sw zero, 8(a0)699; RV32IXQCILSM-NEXT: sw zero, 12(a0)700; RV32IXQCILSM-NEXT: ret701entry:702 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 0, i32 32, i1 false)703 ret void704}705 706define void @test10() nounwind {707; RV32I-LABEL: test10:708; RV32I: # %bb.0: # %entry709; RV32I-NEXT: lui a0, %hi(arr1)710; RV32I-NEXT: addi a0, a0, %lo(arr1)711; RV32I-NEXT: li a2, 60712; RV32I-NEXT: li a1, 0713; RV32I-NEXT: tail memset714;715; RV32IXQCILSM-LABEL: test10:716; RV32IXQCILSM: # %bb.0: # %entry717; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)718; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)719; RV32IXQCILSM-NEXT: qc.setwmi zero, 15, 0(a0)720; RV32IXQCILSM-NEXT: ret721entry:722 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 0, i32 60, i1 false)723 ret void724}725 726define void @test11() nounwind {727; RV32I-LABEL: test11:728; RV32I: # %bb.0: # %entry729; RV32I-NEXT: lui a0, %hi(arr1)730; RV32I-NEXT: addi a0, a0, %lo(arr1)731; RV32I-NEXT: li a2, 64732; RV32I-NEXT: li a1, 0733; RV32I-NEXT: tail memset734;735; RV32IXQCILSM-LABEL: test11:736; RV32IXQCILSM: # %bb.0: # %entry737; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)738; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)739; RV32IXQCILSM-NEXT: qc.setwmi zero, 16, 0(a0)740; RV32IXQCILSM-NEXT: ret741entry:742 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 0, i32 64, i1 false)743 ret void744}745 746define void @test12() nounwind {747; RV32I-LABEL: test12:748; RV32I: # %bb.0: # %entry749; RV32I-NEXT: lui a0, %hi(arr1)750; RV32I-NEXT: addi a0, a0, %lo(arr1)751; RV32I-NEXT: li a2, 120752; RV32I-NEXT: li a1, 0753; RV32I-NEXT: tail memset754;755; RV32IXQCILSM-LABEL: test12:756; RV32IXQCILSM: # %bb.0: # %entry757; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)758; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)759; RV32IXQCILSM-NEXT: qc.setwmi zero, 16, 0(a0)760; RV32IXQCILSM-NEXT: qc.setwmi zero, 14, 64(a0)761; RV32IXQCILSM-NEXT: ret762entry:763 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 0, i32 120, i1 false)764 ret void765}766 767define void @test13() nounwind {768; RV32I-LABEL: test13:769; RV32I: # %bb.0: # %entry770; RV32I-NEXT: lui a0, %hi(arr1)771; RV32I-NEXT: addi a0, a0, %lo(arr1)772; RV32I-NEXT: li a2, 124773; RV32I-NEXT: li a1, 0774; RV32I-NEXT: tail memset775;776; RV32IXQCILSM-LABEL: test13:777; RV32IXQCILSM: # %bb.0: # %entry778; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)779; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)780; RV32IXQCILSM-NEXT: qc.setwmi zero, 16, 0(a0)781; RV32IXQCILSM-NEXT: qc.setwmi zero, 15, 64(a0)782; RV32IXQCILSM-NEXT: ret783entry:784 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 0, i32 124, i1 false)785 ret void786}787 788define void @test14() nounwind {789; RV32I-LABEL: test14:790; RV32I: # %bb.0: # %entry791; RV32I-NEXT: lui a0, %hi(arr1)792; RV32I-NEXT: addi a0, a0, %lo(arr1)793; RV32I-NEXT: li a2, 180794; RV32I-NEXT: li a1, 0795; RV32I-NEXT: tail memset796;797; RV32IXQCILSM-LABEL: test14:798; RV32IXQCILSM: # %bb.0: # %entry799; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)800; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)801; RV32IXQCILSM-NEXT: qc.setwmi zero, 16, 0(a0)802; RV32IXQCILSM-NEXT: qc.setwmi zero, 15, 64(a0)803; RV32IXQCILSM-NEXT: qc.setwmi zero, 14, 124(a0)804; RV32IXQCILSM-NEXT: ret805entry:806 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 0, i32 180, i1 false)807 ret void808}809 810define void @test15() nounwind {811; RV32I-LABEL: test15:812; RV32I: # %bb.0: # %entry813; RV32I-NEXT: lui a0, %hi(arr1)814; RV32I-NEXT: addi a0, a0, %lo(arr1)815; RV32I-NEXT: li a2, 184816; RV32I-NEXT: li a1, 0817; RV32I-NEXT: tail memset818;819; RV32IXQCILSM-LABEL: test15:820; RV32IXQCILSM: # %bb.0: # %entry821; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)822; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)823; RV32IXQCILSM-NEXT: qc.setwmi zero, 16, 0(a0)824; RV32IXQCILSM-NEXT: qc.setwmi zero, 15, 64(a0)825; RV32IXQCILSM-NEXT: qc.setwmi zero, 15, 124(a0)826; RV32IXQCILSM-NEXT: ret827entry:828 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 0, i32 184, i1 false)829 ret void830}831 832define void @test15a() nounwind {833; RV32I-LABEL: test15a:834; RV32I: # %bb.0: # %entry835; RV32I-NEXT: lui a0, %hi(arr1)836; RV32I-NEXT: addi a0, a0, %lo(arr1)837; RV32I-NEXT: li a1, 165838; RV32I-NEXT: li a2, 192839; RV32I-NEXT: tail memset840;841; RV32IXQCILSM-LABEL: test15a:842; RV32IXQCILSM: # %bb.0: # %entry843; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)844; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)845; RV32IXQCILSM-NEXT: li a1, 165846; RV32IXQCILSM-NEXT: li a2, 192847; RV32IXQCILSM-NEXT: tail memset848entry:849 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 -91, i32 192, i1 false)850 ret void851}852 853define void @test15b() nounwind {854; RV32I-LABEL: test15b:855; RV32I: # %bb.0:856; RV32I-NEXT: lui a0, %hi(arr1)857; RV32I-NEXT: addi a0, a0, %lo(arr1)858; RV32I-NEXT: li a2, 188859; RV32I-NEXT: li a1, 0860; RV32I-NEXT: tail memset861;862; RV32IXQCILSM-LABEL: test15b:863; RV32IXQCILSM: # %bb.0:864; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)865; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)866; RV32IXQCILSM-NEXT: qc.setwmi zero, 16, 0(a0)867; RV32IXQCILSM-NEXT: qc.setwmi zero, 15, 64(a0)868; RV32IXQCILSM-NEXT: qc.setwmi zero, 16, 124(a0)869; RV32IXQCILSM-NEXT: ret870 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 0, i32 188, i1 false)871 ret void872}873 874define void @test15c() nounwind {875; RV32I-LABEL: test15c:876; RV32I: # %bb.0: # %entry877; RV32I-NEXT: lui a0, %hi(arr1)878; RV32I-NEXT: addi a0, a0, %lo(arr1)879; RV32I-NEXT: li a2, 192880; RV32I-NEXT: li a1, 0881; RV32I-NEXT: tail memset882;883; RV32IXQCILSM-LABEL: test15c:884; RV32IXQCILSM: # %bb.0: # %entry885; RV32IXQCILSM-NEXT: lui a0, %hi(arr1)886; RV32IXQCILSM-NEXT: addi a0, a0, %lo(arr1)887; RV32IXQCILSM-NEXT: li a2, 192888; RV32IXQCILSM-NEXT: li a1, 0889; RV32IXQCILSM-NEXT: tail memset890entry:891 tail call void @llvm.memset.p0.i32(ptr align 4 @arr1, i8 0, i32 192, i1 false)892 ret void893}894