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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \3; RUN: | FileCheck %s -check-prefixes=RV32I4; RUN: llc -mtriple=riscv32 --mattr=+zba -verify-machineinstrs < %s \5; RUN: | FileCheck %s -check-prefixes=RV32IZBA6; RUN: llc -mtriple=riscv32 -mattr=+zba,+experimental-xqcisls -verify-machineinstrs < %s \7; RUN: | FileCheck %s -check-prefixes=RV32IZBAXQCISLS8 9define i32 @lb_ri(i8* %a, i32 %b) {10; RV32I-LABEL: lb_ri:11; RV32I: # %bb.0:12; RV32I-NEXT: slli a1, a1, 313; RV32I-NEXT: add a0, a0, a114; RV32I-NEXT: lb a0, 0(a0)15; RV32I-NEXT: ret16;17; RV32IZBA-LABEL: lb_ri:18; RV32IZBA: # %bb.0:19; RV32IZBA-NEXT: sh3add a0, a1, a020; RV32IZBA-NEXT: lb a0, 0(a0)21; RV32IZBA-NEXT: ret22;23; RV32IZBAXQCISLS-LABEL: lb_ri:24; RV32IZBAXQCISLS: # %bb.0:25; RV32IZBAXQCISLS-NEXT: qc.lrb a0, a0, a1, 326; RV32IZBAXQCISLS-NEXT: ret27 %shl = shl i32 %b, 328 %1 = getelementptr i8, i8* %a, i32 %shl29 %2 = load i8, i8* %130 %3 = sext i8 %2 to i3231 ret i32 %332}33 34define i32 @lbu_ri(i8* %a, i32 %b) {35; RV32I-LABEL: lbu_ri:36; RV32I: # %bb.0:37; RV32I-NEXT: slli a1, a1, 238; RV32I-NEXT: add a0, a0, a139; RV32I-NEXT: lbu a0, 0(a0)40; RV32I-NEXT: ret41;42; RV32IZBA-LABEL: lbu_ri:43; RV32IZBA: # %bb.0:44; RV32IZBA-NEXT: sh2add a0, a1, a045; RV32IZBA-NEXT: lbu a0, 0(a0)46; RV32IZBA-NEXT: ret47;48; RV32IZBAXQCISLS-LABEL: lbu_ri:49; RV32IZBAXQCISLS: # %bb.0:50; RV32IZBAXQCISLS-NEXT: qc.lrbu a0, a0, a1, 251; RV32IZBAXQCISLS-NEXT: ret52 %shl = shl i32 %b, 253 %1 = getelementptr i8, i8* %a, i32 %shl54 %2 = load i8, i8* %155 %3 = zext i8 %2 to i3256 ret i32 %357}58 59define i32 @lh_ri(i16* %a, i32 %b) {60; RV32I-LABEL: lh_ri:61; RV32I: # %bb.0:62; RV32I-NEXT: slli a1, a1, 563; RV32I-NEXT: add a0, a0, a164; RV32I-NEXT: lh a0, 0(a0)65; RV32I-NEXT: ret66;67; RV32IZBA-LABEL: lh_ri:68; RV32IZBA: # %bb.0:69; RV32IZBA-NEXT: slli a1, a1, 570; RV32IZBA-NEXT: add a0, a0, a171; RV32IZBA-NEXT: lh a0, 0(a0)72; RV32IZBA-NEXT: ret73;74; RV32IZBAXQCISLS-LABEL: lh_ri:75; RV32IZBAXQCISLS: # %bb.0:76; RV32IZBAXQCISLS-NEXT: qc.lrh a0, a0, a1, 577; RV32IZBAXQCISLS-NEXT: ret78 %shl = shl i32 %b, 479 %1 = getelementptr i16, i16* %a, i32 %shl80 %2 = load i16, i16* %181 %3 = sext i16 %2 to i3282 ret i32 %383}84 85define i32 @lhu_ri(i16* %a, i32 %b) {86; RV32I-LABEL: lhu_ri:87; RV32I: # %bb.0:88; RV32I-NEXT: slli a1, a1, 689; RV32I-NEXT: add a0, a0, a190; RV32I-NEXT: lhu a0, 0(a0)91; RV32I-NEXT: ret92;93; RV32IZBA-LABEL: lhu_ri:94; RV32IZBA: # %bb.0:95; RV32IZBA-NEXT: slli a1, a1, 696; RV32IZBA-NEXT: add a0, a0, a197; RV32IZBA-NEXT: lhu a0, 0(a0)98; RV32IZBA-NEXT: ret99;100; RV32IZBAXQCISLS-LABEL: lhu_ri:101; RV32IZBAXQCISLS: # %bb.0:102; RV32IZBAXQCISLS-NEXT: qc.lrhu a0, a0, a1, 6103; RV32IZBAXQCISLS-NEXT: ret104 %shl = shl i32 %b, 5105 %1 = getelementptr i16, i16* %a, i32 %shl106 %2 = load i16, i16* %1107 %3 = zext i16 %2 to i32108 ret i32 %3109}110 111define i32 @lw_ri(i32* %a, i32 %b) {112; RV32I-LABEL: lw_ri:113; RV32I: # %bb.0:114; RV32I-NEXT: slli a1, a1, 6115; RV32I-NEXT: add a0, a0, a1116; RV32I-NEXT: lw a0, 0(a0)117; RV32I-NEXT: ret118;119; RV32IZBA-LABEL: lw_ri:120; RV32IZBA: # %bb.0:121; RV32IZBA-NEXT: slli a1, a1, 6122; RV32IZBA-NEXT: add a0, a0, a1123; RV32IZBA-NEXT: lw a0, 0(a0)124; RV32IZBA-NEXT: ret125;126; RV32IZBAXQCISLS-LABEL: lw_ri:127; RV32IZBAXQCISLS: # %bb.0:128; RV32IZBAXQCISLS-NEXT: qc.lrw a0, a0, a1, 6129; RV32IZBAXQCISLS-NEXT: ret130 %shl = shl i32 %b, 4131 %1 = getelementptr i32, i32* %a, i32 %shl132 %2 = load i32, i32* %1133 ret i32 %2134}135 136define void @sb_ri(i8* %a, i8 %b, i32 %c) {137; RV32I-LABEL: sb_ri:138; RV32I: # %bb.0:139; RV32I-NEXT: slli a2, a2, 7140; RV32I-NEXT: add a0, a0, a2141; RV32I-NEXT: sb a1, 0(a0)142; RV32I-NEXT: ret143;144; RV32IZBA-LABEL: sb_ri:145; RV32IZBA: # %bb.0:146; RV32IZBA-NEXT: slli a2, a2, 7147; RV32IZBA-NEXT: add a0, a0, a2148; RV32IZBA-NEXT: sb a1, 0(a0)149; RV32IZBA-NEXT: ret150;151; RV32IZBAXQCISLS-LABEL: sb_ri:152; RV32IZBAXQCISLS: # %bb.0:153; RV32IZBAXQCISLS-NEXT: qc.srb a1, a0, a2, 7154; RV32IZBAXQCISLS-NEXT: ret155 %shl = shl i32 %c, 7156 %1 = getelementptr i8, i8* %a, i32 %shl157 store i8 %b, i8* %1158 ret void159}160 161define void @sh_ri(i16* %a, i16 %b, i32 %c) {162; RV32I-LABEL: sh_ri:163; RV32I: # %bb.0:164; RV32I-NEXT: slli a2, a2, 3165; RV32I-NEXT: add a0, a0, a2166; RV32I-NEXT: sh a1, 0(a0)167; RV32I-NEXT: ret168;169; RV32IZBA-LABEL: sh_ri:170; RV32IZBA: # %bb.0:171; RV32IZBA-NEXT: sh3add a0, a2, a0172; RV32IZBA-NEXT: sh a1, 0(a0)173; RV32IZBA-NEXT: ret174;175; RV32IZBAXQCISLS-LABEL: sh_ri:176; RV32IZBAXQCISLS: # %bb.0:177; RV32IZBAXQCISLS-NEXT: qc.srh a1, a0, a2, 3178; RV32IZBAXQCISLS-NEXT: ret179 %shl = shl i32 %c, 2180 %1 = getelementptr i16, i16* %a, i32 %shl181 store i16 %b, i16* %1182 ret void183}184 185define void @sw_ri(i32* %a, i32 %b, i32 %c) {186; RV32I-LABEL: sw_ri:187; RV32I: # %bb.0:188; RV32I-NEXT: slli a2, a2, 3189; RV32I-NEXT: add a0, a0, a2190; RV32I-NEXT: sw a1, 0(a0)191; RV32I-NEXT: ret192;193; RV32IZBA-LABEL: sw_ri:194; RV32IZBA: # %bb.0:195; RV32IZBA-NEXT: sh3add a0, a2, a0196; RV32IZBA-NEXT: sw a1, 0(a0)197; RV32IZBA-NEXT: ret198;199; RV32IZBAXQCISLS-LABEL: sw_ri:200; RV32IZBAXQCISLS: # %bb.0:201; RV32IZBAXQCISLS-NEXT: qc.srw a1, a0, a2, 3202; RV32IZBAXQCISLS-NEXT: ret203 %shl = shl i32 %c, 1204 %1 = getelementptr i32, i32* %a, i32 %shl205 store i32 %b, i32* %1206 ret void207}208 209define i8 @lrb_anyext(ptr %a, i32 %b) {210; RV32I-LABEL: lrb_anyext:211; RV32I: # %bb.0:212; RV32I-NEXT: add a0, a0, a1213; RV32I-NEXT: lbu a0, 0(a0)214; RV32I-NEXT: ret215;216; RV32IZBA-LABEL: lrb_anyext:217; RV32IZBA: # %bb.0:218; RV32IZBA-NEXT: add a0, a0, a1219; RV32IZBA-NEXT: lbu a0, 0(a0)220; RV32IZBA-NEXT: ret221;222; RV32IZBAXQCISLS-LABEL: lrb_anyext:223; RV32IZBAXQCISLS: # %bb.0:224; RV32IZBAXQCISLS-NEXT: qc.lrbu a0, a0, a1, 0225; RV32IZBAXQCISLS-NEXT: ret226 %1 = getelementptr i8, ptr %a, i32 %b227 %2 = load i8, ptr %1, align 1228 ret i8 %2229}230 231define i32 @lrb(ptr %a, i32 %b) {232; RV32I-LABEL: lrb:233; RV32I: # %bb.0:234; RV32I-NEXT: add a0, a0, a1235; RV32I-NEXT: lb a0, 0(a0)236; RV32I-NEXT: add a0, a0, a0237; RV32I-NEXT: ret238;239; RV32IZBA-LABEL: lrb:240; RV32IZBA: # %bb.0:241; RV32IZBA-NEXT: add a0, a0, a1242; RV32IZBA-NEXT: lb a0, 0(a0)243; RV32IZBA-NEXT: add a0, a0, a0244; RV32IZBA-NEXT: ret245;246; RV32IZBAXQCISLS-LABEL: lrb:247; RV32IZBAXQCISLS: # %bb.0:248; RV32IZBAXQCISLS-NEXT: qc.lrb a0, a0, a1, 0249; RV32IZBAXQCISLS-NEXT: add a0, a0, a0250; RV32IZBAXQCISLS-NEXT: ret251 %1 = getelementptr i8, ptr %a, i32 %b252 %2 = load i8, ptr %1, align 1253 %3 = sext i8 %2 to i32254 %4 = add i32 %3, %3255 ret i32 %4256}257 258define i32 @lrbu(ptr %a, i32 %b) {259; RV32I-LABEL: lrbu:260; RV32I: # %bb.0:261; RV32I-NEXT: add a0, a0, a1262; RV32I-NEXT: lbu a0, 0(a0)263; RV32I-NEXT: add a0, a0, a0264; RV32I-NEXT: ret265;266; RV32IZBA-LABEL: lrbu:267; RV32IZBA: # %bb.0:268; RV32IZBA-NEXT: add a0, a0, a1269; RV32IZBA-NEXT: lbu a0, 0(a0)270; RV32IZBA-NEXT: add a0, a0, a0271; RV32IZBA-NEXT: ret272;273; RV32IZBAXQCISLS-LABEL: lrbu:274; RV32IZBAXQCISLS: # %bb.0:275; RV32IZBAXQCISLS-NEXT: qc.lrbu a0, a0, a1, 0276; RV32IZBAXQCISLS-NEXT: add a0, a0, a0277; RV32IZBAXQCISLS-NEXT: ret278 %1 = getelementptr i8, ptr %a, i32 %b279 %2 = load i8, ptr %1, align 1280 %3 = zext i8 %2 to i32281 %4 = add i32 %3, %3282 ret i32 %4283}284 285define i64 @lrd(ptr %a, i32 %b) {286; RV32I-LABEL: lrd:287; RV32I: # %bb.0:288; RV32I-NEXT: slli a1, a1, 3289; RV32I-NEXT: add a0, a0, a1290; RV32I-NEXT: lw a1, 0(a0)291; RV32I-NEXT: lw a2, 4(a0)292; RV32I-NEXT: add a0, a1, a1293; RV32I-NEXT: sltu a1, a0, a1294; RV32I-NEXT: add a2, a2, a2295; RV32I-NEXT: add a1, a2, a1296; RV32I-NEXT: ret297;298; RV32IZBA-LABEL: lrd:299; RV32IZBA: # %bb.0:300; RV32IZBA-NEXT: sh3add a0, a1, a0301; RV32IZBA-NEXT: lw a1, 0(a0)302; RV32IZBA-NEXT: lw a2, 4(a0)303; RV32IZBA-NEXT: add a0, a1, a1304; RV32IZBA-NEXT: sltu a1, a0, a1305; RV32IZBA-NEXT: add a2, a2, a2306; RV32IZBA-NEXT: add a1, a2, a1307; RV32IZBA-NEXT: ret308;309; RV32IZBAXQCISLS-LABEL: lrd:310; RV32IZBAXQCISLS: # %bb.0:311; RV32IZBAXQCISLS-NEXT: sh3add a0, a1, a0312; RV32IZBAXQCISLS-NEXT: lw a1, 0(a0)313; RV32IZBAXQCISLS-NEXT: lw a2, 4(a0)314; RV32IZBAXQCISLS-NEXT: add a0, a1, a1315; RV32IZBAXQCISLS-NEXT: sltu a1, a0, a1316; RV32IZBAXQCISLS-NEXT: add a2, a2, a2317; RV32IZBAXQCISLS-NEXT: add a1, a2, a1318; RV32IZBAXQCISLS-NEXT: ret319 %1 = getelementptr i64, ptr %a, i32 %b320 %2 = load i64, ptr %1, align 8321 %3 = add i64 %2, %2322 ret i64 %3323}324 325define i64 @lrd_2(ptr %a, i32 %b) {326; RV32I-LABEL: lrd_2:327; RV32I: # %bb.0:328; RV32I-NEXT: slli a1, a1, 3329; RV32I-NEXT: add a0, a1, a0330; RV32I-NEXT: lw a1, 96(a0)331; RV32I-NEXT: lw a2, 100(a0)332; RV32I-NEXT: add a0, a1, a1333; RV32I-NEXT: sltu a1, a0, a1334; RV32I-NEXT: add a2, a2, a2335; RV32I-NEXT: add a1, a2, a1336; RV32I-NEXT: ret337;338; RV32IZBA-LABEL: lrd_2:339; RV32IZBA: # %bb.0:340; RV32IZBA-NEXT: sh3add a0, a1, a0341; RV32IZBA-NEXT: lw a1, 96(a0)342; RV32IZBA-NEXT: lw a2, 100(a0)343; RV32IZBA-NEXT: add a0, a1, a1344; RV32IZBA-NEXT: sltu a1, a0, a1345; RV32IZBA-NEXT: add a2, a2, a2346; RV32IZBA-NEXT: add a1, a2, a1347; RV32IZBA-NEXT: ret348;349; RV32IZBAXQCISLS-LABEL: lrd_2:350; RV32IZBAXQCISLS: # %bb.0:351; RV32IZBAXQCISLS-NEXT: sh3add a0, a1, a0352; RV32IZBAXQCISLS-NEXT: lw a1, 96(a0)353; RV32IZBAXQCISLS-NEXT: lw a2, 100(a0)354; RV32IZBAXQCISLS-NEXT: add a0, a1, a1355; RV32IZBAXQCISLS-NEXT: sltu a1, a0, a1356; RV32IZBAXQCISLS-NEXT: add a2, a2, a2357; RV32IZBAXQCISLS-NEXT: add a1, a2, a1358; RV32IZBAXQCISLS-NEXT: ret359 %1 = add i32 %b, 12360 %2 = getelementptr i64, ptr %a, i32 %1361 %3 = load i64, ptr %2, align 8362 %4 = add i64 %3, %3363 ret i64 %4364}365 366define void @srb(ptr %a, i32 %b, i8 %c) {367; RV32I-LABEL: srb:368; RV32I: # %bb.0:369; RV32I-NEXT: add a2, a2, a2370; RV32I-NEXT: add a0, a0, a1371; RV32I-NEXT: sb a2, 0(a0)372; RV32I-NEXT: ret373;374; RV32IZBA-LABEL: srb:375; RV32IZBA: # %bb.0:376; RV32IZBA-NEXT: add a2, a2, a2377; RV32IZBA-NEXT: add a0, a0, a1378; RV32IZBA-NEXT: sb a2, 0(a0)379; RV32IZBA-NEXT: ret380;381; RV32IZBAXQCISLS-LABEL: srb:382; RV32IZBAXQCISLS: # %bb.0:383; RV32IZBAXQCISLS-NEXT: add a2, a2, a2384; RV32IZBAXQCISLS-NEXT: qc.srb a2, a0, a1, 0385; RV32IZBAXQCISLS-NEXT: ret386 %1 = add i8 %c, %c387 %2 = getelementptr i8, ptr %a, i32 %b388 store i8 %1, ptr %2, align 1389 ret void390}391 392define void @srh(ptr %a, i32 %b, i16 %c) {393; RV32I-LABEL: srh:394; RV32I: # %bb.0:395; RV32I-NEXT: add a2, a2, a2396; RV32I-NEXT: slli a1, a1, 1397; RV32I-NEXT: add a0, a0, a1398; RV32I-NEXT: sh a2, 0(a0)399; RV32I-NEXT: ret400;401; RV32IZBA-LABEL: srh:402; RV32IZBA: # %bb.0:403; RV32IZBA-NEXT: add a2, a2, a2404; RV32IZBA-NEXT: sh1add a0, a1, a0405; RV32IZBA-NEXT: sh a2, 0(a0)406; RV32IZBA-NEXT: ret407;408; RV32IZBAXQCISLS-LABEL: srh:409; RV32IZBAXQCISLS: # %bb.0:410; RV32IZBAXQCISLS-NEXT: add a2, a2, a2411; RV32IZBAXQCISLS-NEXT: qc.srh a2, a0, a1, 1412; RV32IZBAXQCISLS-NEXT: ret413 %1 = add i16 %c, %c414 %2 = getelementptr i16, ptr %a, i32 %b415 store i16 %1, ptr %2, align 2416 ret void417}418 419define void @srw(ptr %a, i32 %b, i32 %c) {420; RV32I-LABEL: srw:421; RV32I: # %bb.0:422; RV32I-NEXT: add a2, a2, a2423; RV32I-NEXT: slli a1, a1, 2424; RV32I-NEXT: add a0, a0, a1425; RV32I-NEXT: sw a2, 0(a0)426; RV32I-NEXT: ret427;428; RV32IZBA-LABEL: srw:429; RV32IZBA: # %bb.0:430; RV32IZBA-NEXT: add a2, a2, a2431; RV32IZBA-NEXT: sh2add a0, a1, a0432; RV32IZBA-NEXT: sw a2, 0(a0)433; RV32IZBA-NEXT: ret434;435; RV32IZBAXQCISLS-LABEL: srw:436; RV32IZBAXQCISLS: # %bb.0:437; RV32IZBAXQCISLS-NEXT: add a2, a2, a2438; RV32IZBAXQCISLS-NEXT: qc.srw a2, a0, a1, 2439; RV32IZBAXQCISLS-NEXT: ret440 %1 = add i32 %c, %c441 %2 = getelementptr i32, ptr %a, i32 %b442 store i32 %1, ptr %2, align 4443 ret void444}445 446define void @srd(ptr %a, i32 %b, i64 %c) {447; RV32I-LABEL: srd:448; RV32I: # %bb.0:449; RV32I-NEXT: add a4, a2, a2450; RV32I-NEXT: add a3, a3, a3451; RV32I-NEXT: slli a1, a1, 3452; RV32I-NEXT: sltu a2, a4, a2453; RV32I-NEXT: add a0, a0, a1454; RV32I-NEXT: add a2, a3, a2455; RV32I-NEXT: sw a4, 0(a0)456; RV32I-NEXT: sw a2, 4(a0)457; RV32I-NEXT: ret458;459; RV32IZBA-LABEL: srd:460; RV32IZBA: # %bb.0:461; RV32IZBA-NEXT: add a4, a2, a2462; RV32IZBA-NEXT: add a3, a3, a3463; RV32IZBA-NEXT: sh3add a0, a1, a0464; RV32IZBA-NEXT: sltu a1, a4, a2465; RV32IZBA-NEXT: add a1, a3, a1466; RV32IZBA-NEXT: sw a4, 0(a0)467; RV32IZBA-NEXT: sw a1, 4(a0)468; RV32IZBA-NEXT: ret469;470; RV32IZBAXQCISLS-LABEL: srd:471; RV32IZBAXQCISLS: # %bb.0:472; RV32IZBAXQCISLS-NEXT: add a4, a2, a2473; RV32IZBAXQCISLS-NEXT: add a3, a3, a3474; RV32IZBAXQCISLS-NEXT: sh3add a0, a1, a0475; RV32IZBAXQCISLS-NEXT: sltu a1, a4, a2476; RV32IZBAXQCISLS-NEXT: add a1, a3, a1477; RV32IZBAXQCISLS-NEXT: sw a4, 0(a0)478; RV32IZBAXQCISLS-NEXT: sw a1, 4(a0)479; RV32IZBAXQCISLS-NEXT: ret480 %1 = add i64 %c, %c481 %2 = getelementptr i64, ptr %a, i32 %b482 store i64 %1, ptr %2, align 8483 ret void484}485 486define i64 @lrd_large_shift(ptr %a, i32 %b) {487; RV32I-LABEL: lrd_large_shift:488; RV32I: # %bb.0:489; RV32I-NEXT: slli a1, a1, 5490; RV32I-NEXT: add a1, a1, a0491; RV32I-NEXT: lw a0, 384(a1)492; RV32I-NEXT: lw a1, 388(a1)493; RV32I-NEXT: ret494;495; RV32IZBA-LABEL: lrd_large_shift:496; RV32IZBA: # %bb.0:497; RV32IZBA-NEXT: slli a1, a1, 5498; RV32IZBA-NEXT: add a1, a1, a0499; RV32IZBA-NEXT: lw a0, 384(a1)500; RV32IZBA-NEXT: lw a1, 388(a1)501; RV32IZBA-NEXT: ret502;503; RV32IZBAXQCISLS-LABEL: lrd_large_shift:504; RV32IZBAXQCISLS: # %bb.0:505; RV32IZBAXQCISLS-NEXT: slli a1, a1, 5506; RV32IZBAXQCISLS-NEXT: add a1, a1, a0507; RV32IZBAXQCISLS-NEXT: lw a0, 384(a1)508; RV32IZBAXQCISLS-NEXT: lw a1, 388(a1)509; RV32IZBAXQCISLS-NEXT: ret510 %1 = add i32 %b, 12511 %2 = shl i32 %1, 2512 %3 = getelementptr i64, ptr %a, i32 %2513 %4 = load i64, ptr %3, align 8514 ret i64 %4515}516