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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=riscv32 -mattr=+a,+experimental-zalasr | FileCheck %s3 4; Make sure we don't fold -1920 into the lw instruction because we still5; need it for the sw.rl.6 7define i32 @test(ptr %p) {8; CHECK-LABEL: test:9; CHECK: # %bb.0: # %entry10; CHECK-NEXT: lui a1, 2011; CHECK-NEXT: addi a1, a1, -192012; CHECK-NEXT: add a0, a0, a113; CHECK-NEXT: li a1, 214; CHECK-NEXT: sw.rl a1, (a0)15; CHECK-NEXT: lw a0, 0(a0)16; CHECK-NEXT: ret17entry:18 %gep0 = getelementptr [65536 x i32], ptr %p, i64 0, i32 2000019 store atomic i32 2, ptr %gep0 seq_cst, align 420 %a = load i32, ptr %gep021 ret i32 %a22}23