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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+zbb -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV32,NOZBS324; RUN: llc -mtriple=riscv64 -mattr=+zbb -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV64,NOZBS646; RUN: llc -mtriple=riscv32 -mattr=+zbb,+zbs -verify-machineinstrs < %s \7; RUN: | FileCheck %s --check-prefixes=CHECK,RV32,ZBS,ZBS328; RUN: llc -mtriple=riscv64 -mattr=+zbb,+zbs -verify-machineinstrs < %s \9; RUN: | FileCheck %s --check-prefixes=CHECK,RV64,ZBS,ZBS6410 11define i32 @and0xabcdefff(i32 %x) {12; CHECK-LABEL: and0xabcdefff:13; CHECK: # %bb.0:14; CHECK-NEXT: lui a1, 34486515; CHECK-NEXT: andn a0, a0, a116; CHECK-NEXT: ret17 %and = and i32 %x, -141256704118 ret i32 %and19}20 21define i32 @orlow13(i32 %x) {22; CHECK-LABEL: orlow13:23; CHECK: # %bb.0:24; CHECK-NEXT: lui a1, 104857425; CHECK-NEXT: orn a0, a0, a126; CHECK-NEXT: ret27 %or = or i32 %x, 819128 ret i32 %or29}30 31define i64 @orlow24(i64 %x) {32; RV32-LABEL: orlow24:33; RV32: # %bb.0:34; RV32-NEXT: lui a2, 104448035; RV32-NEXT: orn a0, a0, a236; RV32-NEXT: ret37;38; RV64-LABEL: orlow24:39; RV64: # %bb.0:40; RV64-NEXT: lui a1, 104448041; RV64-NEXT: orn a0, a0, a142; RV64-NEXT: ret43 %or = or i64 %x, 1677721544 ret i64 %or45}46 47define i32 @xorlow16(i32 %x) {48; CHECK-LABEL: xorlow16:49; CHECK: # %bb.0:50; CHECK-NEXT: lui a1, 104856051; CHECK-NEXT: xnor a0, a0, a152; CHECK-NEXT: ret53 %xor = xor i32 %x, 6553554 ret i32 %xor55}56 57define i32 @xorlow31(i32 %x) {58; CHECK-LABEL: xorlow31:59; CHECK: # %bb.0:60; CHECK-NEXT: lui a1, 52428861; CHECK-NEXT: xnor a0, a0, a162; CHECK-NEXT: ret63 %xor = xor i32 %x, 214748364764 ret i32 %xor65}66 67define i32 @oraddlow16(i32 %x) {68; RV32-LABEL: oraddlow16:69; RV32: # %bb.0:70; RV32-NEXT: lui a1, 1671; RV32-NEXT: addi a1, a1, -172; RV32-NEXT: or a0, a0, a173; RV32-NEXT: add a0, a0, a174; RV32-NEXT: ret75;76; RV64-LABEL: oraddlow16:77; RV64: # %bb.0:78; RV64-NEXT: lui a1, 1679; RV64-NEXT: addi a1, a1, -180; RV64-NEXT: or a0, a0, a181; RV64-NEXT: addw a0, a0, a182; RV64-NEXT: ret83 %or = or i32 %x, 6553584 %add = add nsw i32 %or, 6553585 ret i32 %add86}87 88define i32 @addorlow16(i32 %x) {89; RV32-LABEL: addorlow16:90; RV32: # %bb.0:91; RV32-NEXT: lui a1, 1692; RV32-NEXT: addi a1, a1, -193; RV32-NEXT: add a0, a0, a194; RV32-NEXT: or a0, a0, a195; RV32-NEXT: ret96;97; RV64-LABEL: addorlow16:98; RV64: # %bb.0:99; RV64-NEXT: lui a1, 16100; RV64-NEXT: addi a1, a1, -1101; RV64-NEXT: addw a0, a0, a1102; RV64-NEXT: or a0, a0, a1103; RV64-NEXT: ret104 %add = add nsw i32 %x, 65535105 %or = or i32 %add, 65535106 ret i32 %or107}108 109define i32 @andxorlow16(i32 %x) {110; CHECK-LABEL: andxorlow16:111; CHECK: # %bb.0:112; CHECK-NEXT: lui a1, 16113; CHECK-NEXT: addi a1, a1, -1114; CHECK-NEXT: andn a0, a1, a0115; CHECK-NEXT: ret116 %and = and i32 %x, 65535117 %xor = xor i32 %and, 65535118 ret i32 %xor119}120 121define void @orarray100(ptr %a) {122; RV32-LABEL: orarray100:123; RV32: # %bb.0: # %entry124; RV32-NEXT: li a1, 0125; RV32-NEXT: li a2, 0126; RV32-NEXT: lui a3, 1048560127; RV32-NEXT: .LBB8_1: # %for.body128; RV32-NEXT: # =>This Inner Loop Header: Depth=1129; RV32-NEXT: slli a4, a1, 2130; RV32-NEXT: addi a1, a1, 1131; RV32-NEXT: add a4, a0, a4132; RV32-NEXT: lw a5, 0(a4)133; RV32-NEXT: seqz a6, a1134; RV32-NEXT: add a2, a2, a6135; RV32-NEXT: xori a6, a1, 100136; RV32-NEXT: orn a5, a5, a3137; RV32-NEXT: or a6, a6, a2138; RV32-NEXT: sw a5, 0(a4)139; RV32-NEXT: bnez a6, .LBB8_1140; RV32-NEXT: # %bb.2: # %for.cond.cleanup141; RV32-NEXT: ret142;143; RV64-LABEL: orarray100:144; RV64: # %bb.0: # %entry145; RV64-NEXT: addi a1, a0, 400146; RV64-NEXT: lui a2, 1048560147; RV64-NEXT: .LBB8_1: # %for.body148; RV64-NEXT: # =>This Inner Loop Header: Depth=1149; RV64-NEXT: lw a3, 0(a0)150; RV64-NEXT: orn a3, a3, a2151; RV64-NEXT: sw a3, 0(a0)152; RV64-NEXT: addi a0, a0, 4153; RV64-NEXT: bne a0, a1, .LBB8_1154; RV64-NEXT: # %bb.2: # %for.cond.cleanup155; RV64-NEXT: ret156entry:157 br label %for.body158 159for.cond.cleanup:160 ret void161 162for.body:163 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]164 %arrayidx = getelementptr inbounds nuw i32, ptr %a, i64 %indvars.iv165 %1 = load i32, ptr %arrayidx, align 4166 %or = or i32 %1, 65535167 store i32 %or, ptr %arrayidx, align 4168 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1169 %exitcond.not = icmp eq i64 %indvars.iv.next, 100170 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body171}172 173define void @orarray3(ptr %a) {174; CHECK-LABEL: orarray3:175; CHECK: # %bb.0:176; CHECK-NEXT: lw a1, 0(a0)177; CHECK-NEXT: lw a2, 4(a0)178; CHECK-NEXT: lw a3, 8(a0)179; CHECK-NEXT: lui a4, 1048560180; CHECK-NEXT: orn a1, a1, a4181; CHECK-NEXT: orn a2, a2, a4182; CHECK-NEXT: orn a3, a3, a4183; CHECK-NEXT: sw a1, 0(a0)184; CHECK-NEXT: sw a2, 4(a0)185; CHECK-NEXT: sw a3, 8(a0)186; CHECK-NEXT: ret187 %1 = load i32, ptr %a, align 4188 %or = or i32 %1, 65535189 store i32 %or, ptr %a, align 4190 %arrayidx.1 = getelementptr inbounds nuw i8, ptr %a, i64 4191 %2 = load i32, ptr %arrayidx.1, align 4192 %or.1 = or i32 %2, 65535193 store i32 %or.1, ptr %arrayidx.1, align 4194 %arrayidx.2 = getelementptr inbounds nuw i8, ptr %a, i64 8195 %3 = load i32, ptr %arrayidx.2, align 4196 %or.2 = or i32 %3, 65535197 store i32 %or.2, ptr %arrayidx.2, align 4198 ret void199}200 201define i32 @andlow16(i32 %x) {202; CHECK-LABEL: andlow16:203; CHECK: # %bb.0:204; CHECK-NEXT: zext.h a0, a0205; CHECK-NEXT: ret206 %and = and i32 %x, 65535207 ret i32 %and208}209 210define i32 @andlow24(i32 %x) {211; RV32-LABEL: andlow24:212; RV32: # %bb.0:213; RV32-NEXT: slli a0, a0, 8214; RV32-NEXT: srli a0, a0, 8215; RV32-NEXT: ret216;217; RV64-LABEL: andlow24:218; RV64: # %bb.0:219; RV64-NEXT: slli a0, a0, 40220; RV64-NEXT: srli a0, a0, 40221; RV64-NEXT: ret222 %and = and i32 %x, 16777215223 ret i32 %and224}225 226define i32 @compl(i32 %x) {227; CHECK-LABEL: compl:228; CHECK: # %bb.0:229; CHECK-NEXT: not a0, a0230; CHECK-NEXT: ret231 %not = xor i32 %x, -1232 ret i32 %not233}234 235define i32 @orlow12(i32 %x) {236; NOZBS32-LABEL: orlow12:237; NOZBS32: # %bb.0:238; NOZBS32-NEXT: lui a1, 1048575239; NOZBS32-NEXT: orn a0, a0, a1240; NOZBS32-NEXT: ret241;242; NOZBS64-LABEL: orlow12:243; NOZBS64: # %bb.0:244; NOZBS64-NEXT: lui a1, 1048575245; NOZBS64-NEXT: orn a0, a0, a1246; NOZBS64-NEXT: ret247;248; ZBS-LABEL: orlow12:249; ZBS: # %bb.0:250; ZBS-NEXT: ori a0, a0, 2047251; ZBS-NEXT: bseti a0, a0, 11252; ZBS-NEXT: ret253 %or = or i32 %x, 4095254 ret i32 %or255}256 257define i32 @xorlow12(i32 %x) {258; NOZBS32-LABEL: xorlow12:259; NOZBS32: # %bb.0:260; NOZBS32-NEXT: lui a1, 1048575261; NOZBS32-NEXT: xnor a0, a0, a1262; NOZBS32-NEXT: ret263;264; NOZBS64-LABEL: xorlow12:265; NOZBS64: # %bb.0:266; NOZBS64-NEXT: lui a1, 1048575267; NOZBS64-NEXT: xnor a0, a0, a1268; NOZBS64-NEXT: ret269;270; ZBS-LABEL: xorlow12:271; ZBS: # %bb.0:272; ZBS-NEXT: xori a0, a0, 2047273; ZBS-NEXT: binvi a0, a0, 11274; ZBS-NEXT: ret275 %xor = xor i32 %x, 4095276 ret i32 %xor277}278 279define i64 @andimm64(i64 %x) {280; RV32-LABEL: andimm64:281; RV32: # %bb.0:282; RV32-NEXT: lui a1, 4080283; RV32-NEXT: andn a0, a0, a1284; RV32-NEXT: li a1, 0285; RV32-NEXT: ret286;287; RV64-LABEL: andimm64:288; RV64: # %bb.0:289; RV64-NEXT: lui a1, 983295290; RV64-NEXT: slli a1, a1, 4291; RV64-NEXT: andn a0, a0, a1292; RV64-NEXT: ret293 %and = and i64 %x, 4278255615294 ret i64 %and295}296 297define i64 @orimm64srli(i64 %x) {298; RV32-LABEL: orimm64srli:299; RV32: # %bb.0:300; RV32-NEXT: lui a2, 1040384301; RV32-NEXT: orn a0, a0, a2302; RV32-NEXT: lui a2, 917504303; RV32-NEXT: or a1, a1, a2304; RV32-NEXT: ret305;306; RV64-LABEL: orimm64srli:307; RV64: # %bb.0:308; RV64-NEXT: lui a1, 983040309; RV64-NEXT: srli a1, a1, 3310; RV64-NEXT: orn a0, a0, a1311; RV64-NEXT: ret312 %or = or i64 %x, -2305843009180139521313 ret i64 %or314}315 316define i64 @andnofff(i64 %x) {317; RV32-LABEL: andnofff:318; RV32: # %bb.0:319; RV32-NEXT: lui a2, 1044480320; RV32-NEXT: and a1, a1, a2321; RV32-NEXT: zext.b a0, a0322; RV32-NEXT: ret323;324; RV64-LABEL: andnofff:325; RV64: # %bb.0:326; RV64-NEXT: lui a1, 1048560327; RV64-NEXT: srli a1, a1, 8328; RV64-NEXT: andn a0, a0, a1329; RV64-NEXT: ret330 %and = and i64 %x, -72057594037927681331 ret i64 %and332}333 334define i64 @ornofff(i64 %x) {335; NOZBS32-LABEL: ornofff:336; NOZBS32: # %bb.0:337; NOZBS32-NEXT: lui a2, 524288338; NOZBS32-NEXT: or a1, a1, a2339; NOZBS32-NEXT: ori a0, a0, 2047340; NOZBS32-NEXT: ret341;342; NOZBS64-LABEL: ornofff:343; NOZBS64: # %bb.0:344; NOZBS64-NEXT: lui a1, 1048575345; NOZBS64-NEXT: srli a1, a1, 1346; NOZBS64-NEXT: orn a0, a0, a1347; NOZBS64-NEXT: ret348;349; ZBS32-LABEL: ornofff:350; ZBS32: # %bb.0:351; ZBS32-NEXT: ori a0, a0, 2047352; ZBS32-NEXT: bseti a1, a1, 31353; ZBS32-NEXT: ret354;355; ZBS64-LABEL: ornofff:356; ZBS64: # %bb.0:357; ZBS64-NEXT: ori a0, a0, 2047358; ZBS64-NEXT: bseti a0, a0, 63359; ZBS64-NEXT: ret360 %or = or i64 %x, -9223372036854773761361 ret i64 %or362}363 364define i64 @xornofff(i64 %x) {365; RV32-LABEL: xornofff:366; RV32: # %bb.0:367; RV32-NEXT: lui a2, 983040368; RV32-NEXT: xor a1, a1, a2369; RV32-NEXT: xori a0, a0, 255370; RV32-NEXT: ret371;372; RV64-LABEL: xornofff:373; RV64: # %bb.0:374; RV64-NEXT: lui a1, 1048575375; RV64-NEXT: srli a1, a1, 4376; RV64-NEXT: xnor a0, a0, a1377; RV64-NEXT: ret378 %xor = xor i64 %x, -1152921504606846721379 ret i64 %xor380}381 382define i64 @and_or_or(i64 %x, i64 %y) {383; RV32-LABEL: and_or_or:384; RV32: # %bb.0:385; RV32-NEXT: ori a1, a1, -2386; RV32-NEXT: ori a0, a0, 1387; RV32-NEXT: ori a3, a3, 1388; RV32-NEXT: ori a2, a2, -2389; RV32-NEXT: and a0, a0, a2390; RV32-NEXT: and a1, a1, a3391; RV32-NEXT: ret392;393; NOZBS64-LABEL: and_or_or:394; NOZBS64: # %bb.0:395; NOZBS64-NEXT: li a2, -1396; NOZBS64-NEXT: slli a2, a2, 33397; NOZBS64-NEXT: addi a2, a2, 1398; NOZBS64-NEXT: or a0, a0, a2399; NOZBS64-NEXT: li a2, 1400; NOZBS64-NEXT: slli a2, a2, 33401; NOZBS64-NEXT: addi a2, a2, -2402; NOZBS64-NEXT: or a1, a1, a2403; NOZBS64-NEXT: and a0, a0, a1404; NOZBS64-NEXT: ret405;406; ZBS64-LABEL: and_or_or:407; ZBS64: # %bb.0:408; ZBS64-NEXT: bseti a2, zero, 33409; ZBS64-NEXT: addi a2, a2, -2410; ZBS64-NEXT: orn a0, a0, a2411; ZBS64-NEXT: or a1, a1, a2412; ZBS64-NEXT: and a0, a0, a1413; ZBS64-NEXT: ret414 %a = or i64 %x, -8589934591415 %b = or i64 %y, 8589934590416 %c = and i64 %a, %b417 ret i64 %c418}419