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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zfh \3; RUN: -verify-machineinstrs -target-abi ilp32f -disable-strictnode-mutation \4; RUN: | FileCheck -check-prefix=RV32IZFH %s5; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zfh \6; RUN: -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation \7; RUN: | FileCheck -check-prefix=RV64IZFH %s8; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+d \9; RUN: -mattr=+zfh -verify-machineinstrs -target-abi ilp32d \10; RUN: -disable-strictnode-mutation | FileCheck -check-prefix=RV32IZFH %s11; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+d \12; RUN: -mattr=+zfh -verify-machineinstrs -target-abi lp64d \13; RUN: -disable-strictnode-mutation | FileCheck -check-prefix=RV64IZFH %s14; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zhinx \15; RUN: -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation \16; RUN: | FileCheck -check-prefix=RV32IZHINX %s17; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zhinx \18; RUN: -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation \19; RUN: | FileCheck -check-prefix=RV64IZHINX %s20; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zdinx \21; RUN: -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 | \22; RUN: FileCheck -check-prefix=RV32IZDINXZHINX %s23; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zdinx \24; RUN: -mattr=+zhinx -verify-machineinstrs -target-abi lp64 | \25; RUN: FileCheck -check-prefix=RV64IZDINXZHINX %s26 27define half @sqrt_f16(half %a) nounwind strictfp {28; RV32IZFH-LABEL: sqrt_f16:29; RV32IZFH: # %bb.0:30; RV32IZFH-NEXT: fsqrt.h fa0, fa031; RV32IZFH-NEXT: ret32;33; RV64IZFH-LABEL: sqrt_f16:34; RV64IZFH: # %bb.0:35; RV64IZFH-NEXT: fsqrt.h fa0, fa036; RV64IZFH-NEXT: ret37;38; RV32IZHINX-LABEL: sqrt_f16:39; RV32IZHINX: # %bb.0:40; RV32IZHINX-NEXT: fsqrt.h a0, a041; RV32IZHINX-NEXT: ret42;43; RV64IZHINX-LABEL: sqrt_f16:44; RV64IZHINX: # %bb.0:45; RV64IZHINX-NEXT: fsqrt.h a0, a046; RV64IZHINX-NEXT: ret47;48; RV32IZDINXZHINX-LABEL: sqrt_f16:49; RV32IZDINXZHINX: # %bb.0:50; RV32IZDINXZHINX-NEXT: fsqrt.h a0, a051; RV32IZDINXZHINX-NEXT: ret52;53; RV64IZDINXZHINX-LABEL: sqrt_f16:54; RV64IZDINXZHINX: # %bb.0:55; RV64IZDINXZHINX-NEXT: fsqrt.h a0, a056; RV64IZDINXZHINX-NEXT: ret57 %1 = call half @llvm.experimental.constrained.sqrt.f16(half %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp58 ret half %159}60 61define half @floor_f16(half %a) nounwind strictfp {62; RV32IZFH-LABEL: floor_f16:63; RV32IZFH: # %bb.0:64; RV32IZFH-NEXT: addi sp, sp, -1665; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill66; RV32IZFH-NEXT: fcvt.s.h fa0, fa067; RV32IZFH-NEXT: call floorf68; RV32IZFH-NEXT: fcvt.h.s fa0, fa069; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload70; RV32IZFH-NEXT: addi sp, sp, 1671; RV32IZFH-NEXT: ret72;73; RV64IZFH-LABEL: floor_f16:74; RV64IZFH: # %bb.0:75; RV64IZFH-NEXT: addi sp, sp, -1676; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill77; RV64IZFH-NEXT: fcvt.s.h fa0, fa078; RV64IZFH-NEXT: call floorf79; RV64IZFH-NEXT: fcvt.h.s fa0, fa080; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload81; RV64IZFH-NEXT: addi sp, sp, 1682; RV64IZFH-NEXT: ret83;84; RV32IZHINX-LABEL: floor_f16:85; RV32IZHINX: # %bb.0:86; RV32IZHINX-NEXT: addi sp, sp, -1687; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill88; RV32IZHINX-NEXT: fcvt.s.h a0, a089; RV32IZHINX-NEXT: call floorf90; RV32IZHINX-NEXT: fcvt.h.s a0, a091; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload92; RV32IZHINX-NEXT: addi sp, sp, 1693; RV32IZHINX-NEXT: ret94;95; RV64IZHINX-LABEL: floor_f16:96; RV64IZHINX: # %bb.0:97; RV64IZHINX-NEXT: addi sp, sp, -1698; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill99; RV64IZHINX-NEXT: fcvt.s.h a0, a0100; RV64IZHINX-NEXT: call floorf101; RV64IZHINX-NEXT: fcvt.h.s a0, a0102; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload103; RV64IZHINX-NEXT: addi sp, sp, 16104; RV64IZHINX-NEXT: ret105;106; RV32IZDINXZHINX-LABEL: floor_f16:107; RV32IZDINXZHINX: # %bb.0:108; RV32IZDINXZHINX-NEXT: addi sp, sp, -16109; RV32IZDINXZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill110; RV32IZDINXZHINX-NEXT: fcvt.s.h a0, a0111; RV32IZDINXZHINX-NEXT: call floorf112; RV32IZDINXZHINX-NEXT: fcvt.h.s a0, a0113; RV32IZDINXZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload114; RV32IZDINXZHINX-NEXT: addi sp, sp, 16115; RV32IZDINXZHINX-NEXT: ret116;117; RV64IZDINXZHINX-LABEL: floor_f16:118; RV64IZDINXZHINX: # %bb.0:119; RV64IZDINXZHINX-NEXT: addi sp, sp, -16120; RV64IZDINXZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill121; RV64IZDINXZHINX-NEXT: fcvt.s.h a0, a0122; RV64IZDINXZHINX-NEXT: call floorf123; RV64IZDINXZHINX-NEXT: fcvt.h.s a0, a0124; RV64IZDINXZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload125; RV64IZDINXZHINX-NEXT: addi sp, sp, 16126; RV64IZDINXZHINX-NEXT: ret127 %1 = call half @llvm.experimental.constrained.floor.f16(half %a, metadata !"fpexcept.strict") strictfp128 ret half %1129}130 131define half @ceil_f16(half %a) nounwind strictfp {132; RV32IZFH-LABEL: ceil_f16:133; RV32IZFH: # %bb.0:134; RV32IZFH-NEXT: addi sp, sp, -16135; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill136; RV32IZFH-NEXT: fcvt.s.h fa0, fa0137; RV32IZFH-NEXT: call ceilf138; RV32IZFH-NEXT: fcvt.h.s fa0, fa0139; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload140; RV32IZFH-NEXT: addi sp, sp, 16141; RV32IZFH-NEXT: ret142;143; RV64IZFH-LABEL: ceil_f16:144; RV64IZFH: # %bb.0:145; RV64IZFH-NEXT: addi sp, sp, -16146; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill147; RV64IZFH-NEXT: fcvt.s.h fa0, fa0148; RV64IZFH-NEXT: call ceilf149; RV64IZFH-NEXT: fcvt.h.s fa0, fa0150; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload151; RV64IZFH-NEXT: addi sp, sp, 16152; RV64IZFH-NEXT: ret153;154; RV32IZHINX-LABEL: ceil_f16:155; RV32IZHINX: # %bb.0:156; RV32IZHINX-NEXT: addi sp, sp, -16157; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill158; RV32IZHINX-NEXT: fcvt.s.h a0, a0159; RV32IZHINX-NEXT: call ceilf160; RV32IZHINX-NEXT: fcvt.h.s a0, a0161; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload162; RV32IZHINX-NEXT: addi sp, sp, 16163; RV32IZHINX-NEXT: ret164;165; RV64IZHINX-LABEL: ceil_f16:166; RV64IZHINX: # %bb.0:167; RV64IZHINX-NEXT: addi sp, sp, -16168; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill169; RV64IZHINX-NEXT: fcvt.s.h a0, a0170; RV64IZHINX-NEXT: call ceilf171; RV64IZHINX-NEXT: fcvt.h.s a0, a0172; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload173; RV64IZHINX-NEXT: addi sp, sp, 16174; RV64IZHINX-NEXT: ret175;176; RV32IZDINXZHINX-LABEL: ceil_f16:177; RV32IZDINXZHINX: # %bb.0:178; RV32IZDINXZHINX-NEXT: addi sp, sp, -16179; RV32IZDINXZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill180; RV32IZDINXZHINX-NEXT: fcvt.s.h a0, a0181; RV32IZDINXZHINX-NEXT: call ceilf182; RV32IZDINXZHINX-NEXT: fcvt.h.s a0, a0183; RV32IZDINXZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload184; RV32IZDINXZHINX-NEXT: addi sp, sp, 16185; RV32IZDINXZHINX-NEXT: ret186;187; RV64IZDINXZHINX-LABEL: ceil_f16:188; RV64IZDINXZHINX: # %bb.0:189; RV64IZDINXZHINX-NEXT: addi sp, sp, -16190; RV64IZDINXZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill191; RV64IZDINXZHINX-NEXT: fcvt.s.h a0, a0192; RV64IZDINXZHINX-NEXT: call ceilf193; RV64IZDINXZHINX-NEXT: fcvt.h.s a0, a0194; RV64IZDINXZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload195; RV64IZDINXZHINX-NEXT: addi sp, sp, 16196; RV64IZDINXZHINX-NEXT: ret197 %1 = call half @llvm.experimental.constrained.ceil.f16(half %a, metadata !"fpexcept.strict") strictfp198 ret half %1199}200 201define half @trunc_f16(half %a) nounwind strictfp {202; RV32IZFH-LABEL: trunc_f16:203; RV32IZFH: # %bb.0:204; RV32IZFH-NEXT: addi sp, sp, -16205; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill206; RV32IZFH-NEXT: fcvt.s.h fa0, fa0207; RV32IZFH-NEXT: call truncf208; RV32IZFH-NEXT: fcvt.h.s fa0, fa0209; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload210; RV32IZFH-NEXT: addi sp, sp, 16211; RV32IZFH-NEXT: ret212;213; RV64IZFH-LABEL: trunc_f16:214; RV64IZFH: # %bb.0:215; RV64IZFH-NEXT: addi sp, sp, -16216; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill217; RV64IZFH-NEXT: fcvt.s.h fa0, fa0218; RV64IZFH-NEXT: call truncf219; RV64IZFH-NEXT: fcvt.h.s fa0, fa0220; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload221; RV64IZFH-NEXT: addi sp, sp, 16222; RV64IZFH-NEXT: ret223;224; RV32IZHINX-LABEL: trunc_f16:225; RV32IZHINX: # %bb.0:226; RV32IZHINX-NEXT: addi sp, sp, -16227; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill228; RV32IZHINX-NEXT: fcvt.s.h a0, a0229; RV32IZHINX-NEXT: call truncf230; RV32IZHINX-NEXT: fcvt.h.s a0, a0231; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload232; RV32IZHINX-NEXT: addi sp, sp, 16233; RV32IZHINX-NEXT: ret234;235; RV64IZHINX-LABEL: trunc_f16:236; RV64IZHINX: # %bb.0:237; RV64IZHINX-NEXT: addi sp, sp, -16238; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill239; RV64IZHINX-NEXT: fcvt.s.h a0, a0240; RV64IZHINX-NEXT: call truncf241; RV64IZHINX-NEXT: fcvt.h.s a0, a0242; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload243; RV64IZHINX-NEXT: addi sp, sp, 16244; RV64IZHINX-NEXT: ret245;246; RV32IZDINXZHINX-LABEL: trunc_f16:247; RV32IZDINXZHINX: # %bb.0:248; RV32IZDINXZHINX-NEXT: addi sp, sp, -16249; RV32IZDINXZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill250; RV32IZDINXZHINX-NEXT: fcvt.s.h a0, a0251; RV32IZDINXZHINX-NEXT: call truncf252; RV32IZDINXZHINX-NEXT: fcvt.h.s a0, a0253; RV32IZDINXZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload254; RV32IZDINXZHINX-NEXT: addi sp, sp, 16255; RV32IZDINXZHINX-NEXT: ret256;257; RV64IZDINXZHINX-LABEL: trunc_f16:258; RV64IZDINXZHINX: # %bb.0:259; RV64IZDINXZHINX-NEXT: addi sp, sp, -16260; RV64IZDINXZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill261; RV64IZDINXZHINX-NEXT: fcvt.s.h a0, a0262; RV64IZDINXZHINX-NEXT: call truncf263; RV64IZDINXZHINX-NEXT: fcvt.h.s a0, a0264; RV64IZDINXZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload265; RV64IZDINXZHINX-NEXT: addi sp, sp, 16266; RV64IZDINXZHINX-NEXT: ret267 %1 = call half @llvm.experimental.constrained.trunc.f16(half %a, metadata !"fpexcept.strict") strictfp268 ret half %1269}270 271define half @rint_f16(half %a) nounwind strictfp {272; RV32IZFH-LABEL: rint_f16:273; RV32IZFH: # %bb.0:274; RV32IZFH-NEXT: addi sp, sp, -16275; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill276; RV32IZFH-NEXT: fcvt.s.h fa0, fa0277; RV32IZFH-NEXT: call rintf278; RV32IZFH-NEXT: fcvt.h.s fa0, fa0279; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload280; RV32IZFH-NEXT: addi sp, sp, 16281; RV32IZFH-NEXT: ret282;283; RV64IZFH-LABEL: rint_f16:284; RV64IZFH: # %bb.0:285; RV64IZFH-NEXT: addi sp, sp, -16286; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill287; RV64IZFH-NEXT: fcvt.s.h fa0, fa0288; RV64IZFH-NEXT: call rintf289; RV64IZFH-NEXT: fcvt.h.s fa0, fa0290; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload291; RV64IZFH-NEXT: addi sp, sp, 16292; RV64IZFH-NEXT: ret293;294; RV32IZHINX-LABEL: rint_f16:295; RV32IZHINX: # %bb.0:296; RV32IZHINX-NEXT: addi sp, sp, -16297; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill298; RV32IZHINX-NEXT: fcvt.s.h a0, a0299; RV32IZHINX-NEXT: call rintf300; RV32IZHINX-NEXT: fcvt.h.s a0, a0301; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload302; RV32IZHINX-NEXT: addi sp, sp, 16303; RV32IZHINX-NEXT: ret304;305; RV64IZHINX-LABEL: rint_f16:306; RV64IZHINX: # %bb.0:307; RV64IZHINX-NEXT: addi sp, sp, -16308; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill309; RV64IZHINX-NEXT: fcvt.s.h a0, a0310; RV64IZHINX-NEXT: call rintf311; RV64IZHINX-NEXT: fcvt.h.s a0, a0312; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload313; RV64IZHINX-NEXT: addi sp, sp, 16314; RV64IZHINX-NEXT: ret315;316; RV32IZDINXZHINX-LABEL: rint_f16:317; RV32IZDINXZHINX: # %bb.0:318; RV32IZDINXZHINX-NEXT: addi sp, sp, -16319; RV32IZDINXZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill320; RV32IZDINXZHINX-NEXT: fcvt.s.h a0, a0321; RV32IZDINXZHINX-NEXT: call rintf322; RV32IZDINXZHINX-NEXT: fcvt.h.s a0, a0323; RV32IZDINXZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload324; RV32IZDINXZHINX-NEXT: addi sp, sp, 16325; RV32IZDINXZHINX-NEXT: ret326;327; RV64IZDINXZHINX-LABEL: rint_f16:328; RV64IZDINXZHINX: # %bb.0:329; RV64IZDINXZHINX-NEXT: addi sp, sp, -16330; RV64IZDINXZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill331; RV64IZDINXZHINX-NEXT: fcvt.s.h a0, a0332; RV64IZDINXZHINX-NEXT: call rintf333; RV64IZDINXZHINX-NEXT: fcvt.h.s a0, a0334; RV64IZDINXZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload335; RV64IZDINXZHINX-NEXT: addi sp, sp, 16336; RV64IZDINXZHINX-NEXT: ret337 %1 = call half @llvm.experimental.constrained.rint.f16(half %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp338 ret half %1339}340 341define half @nearbyint_f16(half %a) nounwind strictfp {342; RV32IZFH-LABEL: nearbyint_f16:343; RV32IZFH: # %bb.0:344; RV32IZFH-NEXT: addi sp, sp, -16345; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill346; RV32IZFH-NEXT: fcvt.s.h fa0, fa0347; RV32IZFH-NEXT: call nearbyintf348; RV32IZFH-NEXT: fcvt.h.s fa0, fa0349; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload350; RV32IZFH-NEXT: addi sp, sp, 16351; RV32IZFH-NEXT: ret352;353; RV64IZFH-LABEL: nearbyint_f16:354; RV64IZFH: # %bb.0:355; RV64IZFH-NEXT: addi sp, sp, -16356; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill357; RV64IZFH-NEXT: fcvt.s.h fa0, fa0358; RV64IZFH-NEXT: call nearbyintf359; RV64IZFH-NEXT: fcvt.h.s fa0, fa0360; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload361; RV64IZFH-NEXT: addi sp, sp, 16362; RV64IZFH-NEXT: ret363;364; RV32IZHINX-LABEL: nearbyint_f16:365; RV32IZHINX: # %bb.0:366; RV32IZHINX-NEXT: addi sp, sp, -16367; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill368; RV32IZHINX-NEXT: fcvt.s.h a0, a0369; RV32IZHINX-NEXT: call nearbyintf370; RV32IZHINX-NEXT: fcvt.h.s a0, a0371; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload372; RV32IZHINX-NEXT: addi sp, sp, 16373; RV32IZHINX-NEXT: ret374;375; RV64IZHINX-LABEL: nearbyint_f16:376; RV64IZHINX: # %bb.0:377; RV64IZHINX-NEXT: addi sp, sp, -16378; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill379; RV64IZHINX-NEXT: fcvt.s.h a0, a0380; RV64IZHINX-NEXT: call nearbyintf381; RV64IZHINX-NEXT: fcvt.h.s a0, a0382; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload383; RV64IZHINX-NEXT: addi sp, sp, 16384; RV64IZHINX-NEXT: ret385;386; RV32IZDINXZHINX-LABEL: nearbyint_f16:387; RV32IZDINXZHINX: # %bb.0:388; RV32IZDINXZHINX-NEXT: addi sp, sp, -16389; RV32IZDINXZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill390; RV32IZDINXZHINX-NEXT: fcvt.s.h a0, a0391; RV32IZDINXZHINX-NEXT: call nearbyintf392; RV32IZDINXZHINX-NEXT: fcvt.h.s a0, a0393; RV32IZDINXZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload394; RV32IZDINXZHINX-NEXT: addi sp, sp, 16395; RV32IZDINXZHINX-NEXT: ret396;397; RV64IZDINXZHINX-LABEL: nearbyint_f16:398; RV64IZDINXZHINX: # %bb.0:399; RV64IZDINXZHINX-NEXT: addi sp, sp, -16400; RV64IZDINXZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill401; RV64IZDINXZHINX-NEXT: fcvt.s.h a0, a0402; RV64IZDINXZHINX-NEXT: call nearbyintf403; RV64IZDINXZHINX-NEXT: fcvt.h.s a0, a0404; RV64IZDINXZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload405; RV64IZDINXZHINX-NEXT: addi sp, sp, 16406; RV64IZDINXZHINX-NEXT: ret407 %1 = call half @llvm.experimental.constrained.nearbyint.f16(half %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp408 ret half %1409}410 411define half @round_f16(half %a) nounwind strictfp {412; RV32IZFH-LABEL: round_f16:413; RV32IZFH: # %bb.0:414; RV32IZFH-NEXT: addi sp, sp, -16415; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill416; RV32IZFH-NEXT: fcvt.s.h fa0, fa0417; RV32IZFH-NEXT: call roundf418; RV32IZFH-NEXT: fcvt.h.s fa0, fa0419; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload420; RV32IZFH-NEXT: addi sp, sp, 16421; RV32IZFH-NEXT: ret422;423; RV64IZFH-LABEL: round_f16:424; RV64IZFH: # %bb.0:425; RV64IZFH-NEXT: addi sp, sp, -16426; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill427; RV64IZFH-NEXT: fcvt.s.h fa0, fa0428; RV64IZFH-NEXT: call roundf429; RV64IZFH-NEXT: fcvt.h.s fa0, fa0430; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload431; RV64IZFH-NEXT: addi sp, sp, 16432; RV64IZFH-NEXT: ret433;434; RV32IZHINX-LABEL: round_f16:435; RV32IZHINX: # %bb.0:436; RV32IZHINX-NEXT: addi sp, sp, -16437; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill438; RV32IZHINX-NEXT: fcvt.s.h a0, a0439; RV32IZHINX-NEXT: call roundf440; RV32IZHINX-NEXT: fcvt.h.s a0, a0441; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload442; RV32IZHINX-NEXT: addi sp, sp, 16443; RV32IZHINX-NEXT: ret444;445; RV64IZHINX-LABEL: round_f16:446; RV64IZHINX: # %bb.0:447; RV64IZHINX-NEXT: addi sp, sp, -16448; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill449; RV64IZHINX-NEXT: fcvt.s.h a0, a0450; RV64IZHINX-NEXT: call roundf451; RV64IZHINX-NEXT: fcvt.h.s a0, a0452; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload453; RV64IZHINX-NEXT: addi sp, sp, 16454; RV64IZHINX-NEXT: ret455;456; RV32IZDINXZHINX-LABEL: round_f16:457; RV32IZDINXZHINX: # %bb.0:458; RV32IZDINXZHINX-NEXT: addi sp, sp, -16459; RV32IZDINXZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill460; RV32IZDINXZHINX-NEXT: fcvt.s.h a0, a0461; RV32IZDINXZHINX-NEXT: call roundf462; RV32IZDINXZHINX-NEXT: fcvt.h.s a0, a0463; RV32IZDINXZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload464; RV32IZDINXZHINX-NEXT: addi sp, sp, 16465; RV32IZDINXZHINX-NEXT: ret466;467; RV64IZDINXZHINX-LABEL: round_f16:468; RV64IZDINXZHINX: # %bb.0:469; RV64IZDINXZHINX-NEXT: addi sp, sp, -16470; RV64IZDINXZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill471; RV64IZDINXZHINX-NEXT: fcvt.s.h a0, a0472; RV64IZDINXZHINX-NEXT: call roundf473; RV64IZDINXZHINX-NEXT: fcvt.h.s a0, a0474; RV64IZDINXZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload475; RV64IZDINXZHINX-NEXT: addi sp, sp, 16476; RV64IZDINXZHINX-NEXT: ret477 %1 = call half @llvm.experimental.constrained.round.f16(half %a, metadata !"fpexcept.strict") strictfp478 ret half %1479}480 481define half @roundeven_f16(half %a) nounwind strictfp {482; RV32IZFH-LABEL: roundeven_f16:483; RV32IZFH: # %bb.0:484; RV32IZFH-NEXT: addi sp, sp, -16485; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill486; RV32IZFH-NEXT: fcvt.s.h fa0, fa0487; RV32IZFH-NEXT: call roundevenf488; RV32IZFH-NEXT: fcvt.h.s fa0, fa0489; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload490; RV32IZFH-NEXT: addi sp, sp, 16491; RV32IZFH-NEXT: ret492;493; RV64IZFH-LABEL: roundeven_f16:494; RV64IZFH: # %bb.0:495; RV64IZFH-NEXT: addi sp, sp, -16496; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill497; RV64IZFH-NEXT: fcvt.s.h fa0, fa0498; RV64IZFH-NEXT: call roundevenf499; RV64IZFH-NEXT: fcvt.h.s fa0, fa0500; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload501; RV64IZFH-NEXT: addi sp, sp, 16502; RV64IZFH-NEXT: ret503;504; RV32IZHINX-LABEL: roundeven_f16:505; RV32IZHINX: # %bb.0:506; RV32IZHINX-NEXT: addi sp, sp, -16507; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill508; RV32IZHINX-NEXT: fcvt.s.h a0, a0509; RV32IZHINX-NEXT: call roundevenf510; RV32IZHINX-NEXT: fcvt.h.s a0, a0511; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload512; RV32IZHINX-NEXT: addi sp, sp, 16513; RV32IZHINX-NEXT: ret514;515; RV64IZHINX-LABEL: roundeven_f16:516; RV64IZHINX: # %bb.0:517; RV64IZHINX-NEXT: addi sp, sp, -16518; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill519; RV64IZHINX-NEXT: fcvt.s.h a0, a0520; RV64IZHINX-NEXT: call roundevenf521; RV64IZHINX-NEXT: fcvt.h.s a0, a0522; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload523; RV64IZHINX-NEXT: addi sp, sp, 16524; RV64IZHINX-NEXT: ret525;526; RV32IZDINXZHINX-LABEL: roundeven_f16:527; RV32IZDINXZHINX: # %bb.0:528; RV32IZDINXZHINX-NEXT: addi sp, sp, -16529; RV32IZDINXZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill530; RV32IZDINXZHINX-NEXT: fcvt.s.h a0, a0531; RV32IZDINXZHINX-NEXT: call roundevenf532; RV32IZDINXZHINX-NEXT: fcvt.h.s a0, a0533; RV32IZDINXZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload534; RV32IZDINXZHINX-NEXT: addi sp, sp, 16535; RV32IZDINXZHINX-NEXT: ret536;537; RV64IZDINXZHINX-LABEL: roundeven_f16:538; RV64IZDINXZHINX: # %bb.0:539; RV64IZDINXZHINX-NEXT: addi sp, sp, -16540; RV64IZDINXZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill541; RV64IZDINXZHINX-NEXT: fcvt.s.h a0, a0542; RV64IZDINXZHINX-NEXT: call roundevenf543; RV64IZDINXZHINX-NEXT: fcvt.h.s a0, a0544; RV64IZDINXZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload545; RV64IZDINXZHINX-NEXT: addi sp, sp, 16546; RV64IZDINXZHINX-NEXT: ret547 %1 = call half @llvm.experimental.constrained.roundeven.f16(half %a, metadata !"fpexcept.strict") strictfp548 ret half %1549}550 551define iXLen @lrint_f16(half %a) nounwind strictfp {552; RV32IZFH-LABEL: lrint_f16:553; RV32IZFH: # %bb.0:554; RV32IZFH-NEXT: fcvt.w.h a0, fa0555; RV32IZFH-NEXT: ret556;557; RV64IZFH-LABEL: lrint_f16:558; RV64IZFH: # %bb.0:559; RV64IZFH-NEXT: fcvt.l.h a0, fa0560; RV64IZFH-NEXT: ret561;562; RV32IZHINX-LABEL: lrint_f16:563; RV32IZHINX: # %bb.0:564; RV32IZHINX-NEXT: fcvt.w.h a0, a0565; RV32IZHINX-NEXT: ret566;567; RV64IZHINX-LABEL: lrint_f16:568; RV64IZHINX: # %bb.0:569; RV64IZHINX-NEXT: fcvt.l.h a0, a0570; RV64IZHINX-NEXT: ret571;572; RV32IZDINXZHINX-LABEL: lrint_f16:573; RV32IZDINXZHINX: # %bb.0:574; RV32IZDINXZHINX-NEXT: fcvt.w.h a0, a0575; RV32IZDINXZHINX-NEXT: ret576;577; RV64IZDINXZHINX-LABEL: lrint_f16:578; RV64IZDINXZHINX: # %bb.0:579; RV64IZDINXZHINX-NEXT: fcvt.l.h a0, a0580; RV64IZDINXZHINX-NEXT: ret581 %1 = call iXLen @llvm.experimental.constrained.lrint.iXLen.f16(half %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp582 ret iXLen %1583}584 585define iXLen @lround_f16(half %a) nounwind strictfp {586; RV32IZFH-LABEL: lround_f16:587; RV32IZFH: # %bb.0:588; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rmm589; RV32IZFH-NEXT: ret590;591; RV64IZFH-LABEL: lround_f16:592; RV64IZFH: # %bb.0:593; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rmm594; RV64IZFH-NEXT: ret595;596; RV32IZHINX-LABEL: lround_f16:597; RV32IZHINX: # %bb.0:598; RV32IZHINX-NEXT: fcvt.w.h a0, a0, rmm599; RV32IZHINX-NEXT: ret600;601; RV64IZHINX-LABEL: lround_f16:602; RV64IZHINX: # %bb.0:603; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rmm604; RV64IZHINX-NEXT: ret605;606; RV32IZDINXZHINX-LABEL: lround_f16:607; RV32IZDINXZHINX: # %bb.0:608; RV32IZDINXZHINX-NEXT: fcvt.w.h a0, a0, rmm609; RV32IZDINXZHINX-NEXT: ret610;611; RV64IZDINXZHINX-LABEL: lround_f16:612; RV64IZDINXZHINX: # %bb.0:613; RV64IZDINXZHINX-NEXT: fcvt.l.h a0, a0, rmm614; RV64IZDINXZHINX-NEXT: ret615 %1 = call iXLen @llvm.experimental.constrained.lround.iXLen.f16(half %a, metadata !"fpexcept.strict") strictfp616 ret iXLen %1617}618 619define i64 @llrint_f16(half %a) nounwind strictfp {620; RV32IZFH-LABEL: llrint_f16:621; RV32IZFH: # %bb.0:622; RV32IZFH-NEXT: addi sp, sp, -16623; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill624; RV32IZFH-NEXT: fcvt.s.h fa0, fa0625; RV32IZFH-NEXT: call llrintf626; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload627; RV32IZFH-NEXT: addi sp, sp, 16628; RV32IZFH-NEXT: ret629;630; RV64IZFH-LABEL: llrint_f16:631; RV64IZFH: # %bb.0:632; RV64IZFH-NEXT: fcvt.l.h a0, fa0633; RV64IZFH-NEXT: ret634;635; RV32IZHINX-LABEL: llrint_f16:636; RV32IZHINX: # %bb.0:637; RV32IZHINX-NEXT: addi sp, sp, -16638; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill639; RV32IZHINX-NEXT: fcvt.s.h a0, a0640; RV32IZHINX-NEXT: call llrintf641; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload642; RV32IZHINX-NEXT: addi sp, sp, 16643; RV32IZHINX-NEXT: ret644;645; RV64IZHINX-LABEL: llrint_f16:646; RV64IZHINX: # %bb.0:647; RV64IZHINX-NEXT: fcvt.l.h a0, a0648; RV64IZHINX-NEXT: ret649;650; RV32IZDINXZHINX-LABEL: llrint_f16:651; RV32IZDINXZHINX: # %bb.0:652; RV32IZDINXZHINX-NEXT: addi sp, sp, -16653; RV32IZDINXZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill654; RV32IZDINXZHINX-NEXT: fcvt.s.h a0, a0655; RV32IZDINXZHINX-NEXT: call llrintf656; RV32IZDINXZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload657; RV32IZDINXZHINX-NEXT: addi sp, sp, 16658; RV32IZDINXZHINX-NEXT: ret659;660; RV64IZDINXZHINX-LABEL: llrint_f16:661; RV64IZDINXZHINX: # %bb.0:662; RV64IZDINXZHINX-NEXT: fcvt.l.h a0, a0663; RV64IZDINXZHINX-NEXT: ret664 %1 = call i64 @llvm.experimental.constrained.llrint.i64.f16(half %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp665 ret i64 %1666}667 668define i64 @llround_f16(half %a) nounwind strictfp {669; RV32IZFH-LABEL: llround_f16:670; RV32IZFH: # %bb.0:671; RV32IZFH-NEXT: addi sp, sp, -16672; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill673; RV32IZFH-NEXT: fcvt.s.h fa0, fa0674; RV32IZFH-NEXT: call llroundf675; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload676; RV32IZFH-NEXT: addi sp, sp, 16677; RV32IZFH-NEXT: ret678;679; RV64IZFH-LABEL: llround_f16:680; RV64IZFH: # %bb.0:681; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rmm682; RV64IZFH-NEXT: ret683;684; RV32IZHINX-LABEL: llround_f16:685; RV32IZHINX: # %bb.0:686; RV32IZHINX-NEXT: addi sp, sp, -16687; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill688; RV32IZHINX-NEXT: fcvt.s.h a0, a0689; RV32IZHINX-NEXT: call llroundf690; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload691; RV32IZHINX-NEXT: addi sp, sp, 16692; RV32IZHINX-NEXT: ret693;694; RV64IZHINX-LABEL: llround_f16:695; RV64IZHINX: # %bb.0:696; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rmm697; RV64IZHINX-NEXT: ret698;699; RV32IZDINXZHINX-LABEL: llround_f16:700; RV32IZDINXZHINX: # %bb.0:701; RV32IZDINXZHINX-NEXT: addi sp, sp, -16702; RV32IZDINXZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill703; RV32IZDINXZHINX-NEXT: fcvt.s.h a0, a0704; RV32IZDINXZHINX-NEXT: call llroundf705; RV32IZDINXZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload706; RV32IZDINXZHINX-NEXT: addi sp, sp, 16707; RV32IZDINXZHINX-NEXT: ret708;709; RV64IZDINXZHINX-LABEL: llround_f16:710; RV64IZDINXZHINX: # %bb.0:711; RV64IZDINXZHINX-NEXT: fcvt.l.h a0, a0, rmm712; RV64IZDINXZHINX-NEXT: ret713 %1 = call i64 @llvm.experimental.constrained.llround.i64.f16(half %a, metadata !"fpexcept.strict") strictfp714 ret i64 %1715}716 717define half @ldexp_f16(half %x, i32 signext %y) nounwind {718; RV32IZFH-LABEL: ldexp_f16:719; RV32IZFH: # %bb.0:720; RV32IZFH-NEXT: addi sp, sp, -16721; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill722; RV32IZFH-NEXT: fcvt.s.h fa0, fa0723; RV32IZFH-NEXT: call ldexpf724; RV32IZFH-NEXT: fcvt.h.s fa0, fa0725; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload726; RV32IZFH-NEXT: addi sp, sp, 16727; RV32IZFH-NEXT: ret728;729; RV64IZFH-LABEL: ldexp_f16:730; RV64IZFH: # %bb.0:731; RV64IZFH-NEXT: addi sp, sp, -16732; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill733; RV64IZFH-NEXT: fcvt.s.h fa0, fa0734; RV64IZFH-NEXT: call ldexpf735; RV64IZFH-NEXT: fcvt.h.s fa0, fa0736; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload737; RV64IZFH-NEXT: addi sp, sp, 16738; RV64IZFH-NEXT: ret739;740; RV32IZHINX-LABEL: ldexp_f16:741; RV32IZHINX: # %bb.0:742; RV32IZHINX-NEXT: addi sp, sp, -16743; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill744; RV32IZHINX-NEXT: fcvt.s.h a0, a0745; RV32IZHINX-NEXT: call ldexpf746; RV32IZHINX-NEXT: fcvt.h.s a0, a0747; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload748; RV32IZHINX-NEXT: addi sp, sp, 16749; RV32IZHINX-NEXT: ret750;751; RV64IZHINX-LABEL: ldexp_f16:752; RV64IZHINX: # %bb.0:753; RV64IZHINX-NEXT: addi sp, sp, -16754; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill755; RV64IZHINX-NEXT: fcvt.s.h a0, a0756; RV64IZHINX-NEXT: call ldexpf757; RV64IZHINX-NEXT: fcvt.h.s a0, a0758; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload759; RV64IZHINX-NEXT: addi sp, sp, 16760; RV64IZHINX-NEXT: ret761;762; RV32IZDINXZHINX-LABEL: ldexp_f16:763; RV32IZDINXZHINX: # %bb.0:764; RV32IZDINXZHINX-NEXT: addi sp, sp, -16765; RV32IZDINXZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill766; RV32IZDINXZHINX-NEXT: fcvt.s.h a0, a0767; RV32IZDINXZHINX-NEXT: call ldexpf768; RV32IZDINXZHINX-NEXT: fcvt.h.s a0, a0769; RV32IZDINXZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload770; RV32IZDINXZHINX-NEXT: addi sp, sp, 16771; RV32IZDINXZHINX-NEXT: ret772;773; RV64IZDINXZHINX-LABEL: ldexp_f16:774; RV64IZDINXZHINX: # %bb.0:775; RV64IZDINXZHINX-NEXT: addi sp, sp, -16776; RV64IZDINXZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill777; RV64IZDINXZHINX-NEXT: fcvt.s.h a0, a0778; RV64IZDINXZHINX-NEXT: call ldexpf779; RV64IZDINXZHINX-NEXT: fcvt.h.s a0, a0780; RV64IZDINXZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload781; RV64IZDINXZHINX-NEXT: addi sp, sp, 16782; RV64IZDINXZHINX-NEXT: ret783 %z = call half @llvm.experimental.constrained.ldexp.f16.i32(half %x, i32 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp784 ret half %z785}786