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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+experimental-zibi -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefixes=ZIBI,ZIBI-RV32 %s4; RUN: llc -mtriple=riscv64 -mattr=+experimental-zibi -verify-machineinstrs < %s \5; RUN: | FileCheck -check-prefixes=ZIBI,ZIBI-RV64 %s6 7define void @test_bne_neg(ptr %b) nounwind {8; ZIBI-LABEL: test_bne_neg:9; ZIBI: # %bb.0:10; ZIBI-NEXT: lw a1, 0(a0)11; ZIBI-NEXT: bnei a1, -1, .LBB0_212; ZIBI-NEXT: # %bb.1: # %test213; ZIBI-NEXT: lw zero, 0(a0)14; ZIBI-NEXT: .LBB0_2: # %end15; ZIBI-NEXT: ret16 %val1 = load volatile i32, ptr %b17 %tst1 = icmp ne i32 %val1, -118 br i1 %tst1, label %end, label %test2, !prof !019test2:20 %val2 = load volatile i32, ptr %b21 br label %end22end:23 ret void24}25 26define void @test_beq_neg(ptr %b) nounwind {27; ZIBI-LABEL: test_beq_neg:28; ZIBI: # %bb.0:29; ZIBI-NEXT: lw a1, 0(a0)30; ZIBI-NEXT: beqi a1, -1, .LBB1_231; ZIBI-NEXT: # %bb.1: # %test232; ZIBI-NEXT: lw zero, 0(a0)33; ZIBI-NEXT: .LBB1_2: # %end34; ZIBI-NEXT: ret35 %val1 = load volatile i32, ptr %b36 %tst1 = icmp eq i32 %val1, -137 br i1 %tst1, label %end, label %test2, !prof !038test2:39 %val2 = load volatile i32, ptr %b40 br label %end41end:42 ret void43}44 45define void @test_bne_zero(ptr %b) nounwind {46; ZIBI-LABEL: test_bne_zero:47; ZIBI: # %bb.0:48; ZIBI-NEXT: lw a1, 0(a0)49; ZIBI-NEXT: bnez a1, .LBB2_250; ZIBI-NEXT: # %bb.1: # %test251; ZIBI-NEXT: lw zero, 0(a0)52; ZIBI-NEXT: .LBB2_2: # %end53; ZIBI-NEXT: ret54 %val1 = load volatile i32, ptr %b55 %tst1 = icmp ne i32 %val1, 056 br i1 %tst1, label %end, label %test2, !prof !057test2:58 %val2 = load volatile i32, ptr %b59 br label %end60end:61 ret void62}63 64define void @test_beq_zero(ptr %b) nounwind {65; ZIBI-LABEL: test_beq_zero:66; ZIBI: # %bb.0:67; ZIBI-NEXT: lw a1, 0(a0)68; ZIBI-NEXT: beqz a1, .LBB3_269; ZIBI-NEXT: # %bb.1: # %test270; ZIBI-NEXT: lw zero, 0(a0)71; ZIBI-NEXT: .LBB3_2: # %end72; ZIBI-NEXT: ret73 %val1 = load volatile i32, ptr %b74 %tst1 = icmp eq i32 %val1, 075 br i1 %tst1, label %end, label %test2, !prof !076test2:77 %val2 = load volatile i32, ptr %b78 br label %end79end:80 ret void81}82 83define void @test_bne_1(ptr %b) nounwind {84; ZIBI-LABEL: test_bne_1:85; ZIBI: # %bb.0:86; ZIBI-NEXT: lw a1, 0(a0)87; ZIBI-NEXT: bnei a1, 1, .LBB4_288; ZIBI-NEXT: # %bb.1: # %test289; ZIBI-NEXT: lw zero, 0(a0)90; ZIBI-NEXT: .LBB4_2: # %end91; ZIBI-NEXT: ret92 %val1 = load volatile i32, ptr %b93 %tst1 = icmp ne i32 %val1, 194 br i1 %tst1, label %end, label %test2, !prof !095test2:96 %val2 = load volatile i32, ptr %b97 br label %end98end:99 ret void100}101 102define void @test_beq_1(ptr %b) nounwind {103; ZIBI-LABEL: test_beq_1:104; ZIBI: # %bb.0:105; ZIBI-NEXT: lw a1, 0(a0)106; ZIBI-NEXT: beqi a1, 1, .LBB5_2107; ZIBI-NEXT: # %bb.1: # %test2108; ZIBI-NEXT: lw zero, 0(a0)109; ZIBI-NEXT: .LBB5_2: # %end110; ZIBI-NEXT: ret111 %val1 = load volatile i32, ptr %b112 %tst1 = icmp eq i32 %val1, 1113 br i1 %tst1, label %end, label %test2, !prof !0114test2:115 %val2 = load volatile i32, ptr %b116 br label %end117end:118 ret void119}120 121define void @test_bne_31(ptr %b) nounwind {122; ZIBI-LABEL: test_bne_31:123; ZIBI: # %bb.0:124; ZIBI-NEXT: lw a1, 0(a0)125; ZIBI-NEXT: bnei a1, 31, .LBB6_2126; ZIBI-NEXT: # %bb.1: # %test2127; ZIBI-NEXT: lw zero, 0(a0)128; ZIBI-NEXT: .LBB6_2: # %end129; ZIBI-NEXT: ret130 %val1 = load volatile i32, ptr %b131 %tst1 = icmp ne i32 %val1, 31132 br i1 %tst1, label %end, label %test2, !prof !0133test2:134 %val2 = load volatile i32, ptr %b135 br label %end136end:137 ret void138}139 140define void @test_beq_31(ptr %b) nounwind {141; ZIBI-LABEL: test_beq_31:142; ZIBI: # %bb.0:143; ZIBI-NEXT: lw a1, 0(a0)144; ZIBI-NEXT: beqi a1, 31, .LBB7_2145; ZIBI-NEXT: # %bb.1: # %test2146; ZIBI-NEXT: lw zero, 0(a0)147; ZIBI-NEXT: .LBB7_2: # %end148; ZIBI-NEXT: ret149 %val1 = load volatile i32, ptr %b150 %tst1 = icmp eq i32 %val1, 31151 br i1 %tst1, label %end, label %test2, !prof !0152test2:153 %val2 = load volatile i32, ptr %b154 br label %end155end:156 ret void157}158 159define void @test_bne_32(ptr %b) nounwind {160; ZIBI-LABEL: test_bne_32:161; ZIBI: # %bb.0:162; ZIBI-NEXT: lw a1, 0(a0)163; ZIBI-NEXT: li a2, 32164; ZIBI-NEXT: bne a1, a2, .LBB8_2165; ZIBI-NEXT: # %bb.1: # %test2166; ZIBI-NEXT: lw zero, 0(a0)167; ZIBI-NEXT: .LBB8_2: # %end168; ZIBI-NEXT: ret169 %val1 = load volatile i32, ptr %b170 %tst1 = icmp ne i32 %val1, 32171 br i1 %tst1, label %end, label %test2, !prof !0172test2:173 %val2 = load volatile i32, ptr %b174 br label %end175end:176 ret void177}178 179define void @test_beq_32(ptr %b) nounwind {180; ZIBI-LABEL: test_beq_32:181; ZIBI: # %bb.0:182; ZIBI-NEXT: lw a1, 0(a0)183; ZIBI-NEXT: li a2, 32184; ZIBI-NEXT: beq a1, a2, .LBB9_2185; ZIBI-NEXT: # %bb.1: # %test2186; ZIBI-NEXT: lw zero, 0(a0)187; ZIBI-NEXT: .LBB9_2: # %end188; ZIBI-NEXT: ret189 %val1 = load volatile i32, ptr %b190 %tst1 = icmp eq i32 %val1, 32191 br i1 %tst1, label %end, label %test2, !prof !0192test2:193 %val2 = load volatile i32, ptr %b194 br label %end195end:196 ret void197}198!0 = !{!"branch_weights", i32 1, i32 99}199 200define i32 @test_select_beq_neg(i32 %a, i32 %b, i32 %c) nounwind {201; ZIBI-RV32-LABEL: test_select_beq_neg:202; ZIBI-RV32: # %bb.0:203; ZIBI-RV32-NEXT: beqi a0, -1, .LBB10_2204; ZIBI-RV32-NEXT: # %bb.1:205; ZIBI-RV32-NEXT: mv a1, a2206; ZIBI-RV32-NEXT: .LBB10_2:207; ZIBI-RV32-NEXT: mv a0, a1208; ZIBI-RV32-NEXT: ret209;210; ZIBI-RV64-LABEL: test_select_beq_neg:211; ZIBI-RV64: # %bb.0:212; ZIBI-RV64-NEXT: sext.w a3, a0213; ZIBI-RV64-NEXT: mv a0, a1214; ZIBI-RV64-NEXT: beqi a3, -1, .LBB10_2215; ZIBI-RV64-NEXT: # %bb.1:216; ZIBI-RV64-NEXT: mv a0, a2217; ZIBI-RV64-NEXT: .LBB10_2:218; ZIBI-RV64-NEXT: ret219 %tst = icmp eq i32 %a, -1220 %ret = select i1 %tst, i32 %b, i32 %c221 ret i32 %ret222}223 224define i32 @test_select_bne_neg(i32 %a, i32 %b, i32 %c) nounwind {225; ZIBI-RV32-LABEL: test_select_bne_neg:226; ZIBI-RV32: # %bb.0:227; ZIBI-RV32-NEXT: bnei a0, -1, .LBB11_2228; ZIBI-RV32-NEXT: # %bb.1:229; ZIBI-RV32-NEXT: mv a1, a2230; ZIBI-RV32-NEXT: .LBB11_2:231; ZIBI-RV32-NEXT: mv a0, a1232; ZIBI-RV32-NEXT: ret233;234; ZIBI-RV64-LABEL: test_select_bne_neg:235; ZIBI-RV64: # %bb.0:236; ZIBI-RV64-NEXT: sext.w a3, a0237; ZIBI-RV64-NEXT: mv a0, a1238; ZIBI-RV64-NEXT: bnei a3, -1, .LBB11_2239; ZIBI-RV64-NEXT: # %bb.1:240; ZIBI-RV64-NEXT: mv a0, a2241; ZIBI-RV64-NEXT: .LBB11_2:242; ZIBI-RV64-NEXT: ret243 %tst = icmp ne i32 %a, -1244 %ret = select i1 %tst, i32 %b, i32 %c245 ret i32 %ret246}247 248define i32 @test_select_beq_zero(i32 %a, i32 %b, i32 %c) nounwind {249; ZIBI-RV32-LABEL: test_select_beq_zero:250; ZIBI-RV32: # %bb.0:251; ZIBI-RV32-NEXT: beqz a0, .LBB12_2252; ZIBI-RV32-NEXT: # %bb.1:253; ZIBI-RV32-NEXT: mv a1, a2254; ZIBI-RV32-NEXT: .LBB12_2:255; ZIBI-RV32-NEXT: mv a0, a1256; ZIBI-RV32-NEXT: ret257;258; ZIBI-RV64-LABEL: test_select_beq_zero:259; ZIBI-RV64: # %bb.0:260; ZIBI-RV64-NEXT: sext.w a3, a0261; ZIBI-RV64-NEXT: mv a0, a1262; ZIBI-RV64-NEXT: beqz a3, .LBB12_2263; ZIBI-RV64-NEXT: # %bb.1:264; ZIBI-RV64-NEXT: mv a0, a2265; ZIBI-RV64-NEXT: .LBB12_2:266; ZIBI-RV64-NEXT: ret267 %tst = icmp eq i32 %a, 0268 %ret = select i1 %tst, i32 %b, i32 %c269 ret i32 %ret270}271 272define i32 @test_select_bne_zero(i32 %a, i32 %b, i32 %c) nounwind {273; ZIBI-RV32-LABEL: test_select_bne_zero:274; ZIBI-RV32: # %bb.0:275; ZIBI-RV32-NEXT: bnez a0, .LBB13_2276; ZIBI-RV32-NEXT: # %bb.1:277; ZIBI-RV32-NEXT: mv a1, a2278; ZIBI-RV32-NEXT: .LBB13_2:279; ZIBI-RV32-NEXT: mv a0, a1280; ZIBI-RV32-NEXT: ret281;282; ZIBI-RV64-LABEL: test_select_bne_zero:283; ZIBI-RV64: # %bb.0:284; ZIBI-RV64-NEXT: sext.w a3, a0285; ZIBI-RV64-NEXT: mv a0, a1286; ZIBI-RV64-NEXT: bnez a3, .LBB13_2287; ZIBI-RV64-NEXT: # %bb.1:288; ZIBI-RV64-NEXT: mv a0, a2289; ZIBI-RV64-NEXT: .LBB13_2:290; ZIBI-RV64-NEXT: ret291 %tst = icmp ne i32 %a, 0292 %ret = select i1 %tst, i32 %b, i32 %c293 ret i32 %ret294}295 296define i32 @test_select_beq_1(i32 %a, i32 %b, i32 %c) nounwind {297; ZIBI-RV32-LABEL: test_select_beq_1:298; ZIBI-RV32: # %bb.0:299; ZIBI-RV32-NEXT: beqi a0, 1, .LBB14_2300; ZIBI-RV32-NEXT: # %bb.1:301; ZIBI-RV32-NEXT: mv a1, a2302; ZIBI-RV32-NEXT: .LBB14_2:303; ZIBI-RV32-NEXT: mv a0, a1304; ZIBI-RV32-NEXT: ret305;306; ZIBI-RV64-LABEL: test_select_beq_1:307; ZIBI-RV64: # %bb.0:308; ZIBI-RV64-NEXT: sext.w a3, a0309; ZIBI-RV64-NEXT: mv a0, a1310; ZIBI-RV64-NEXT: beqi a3, 1, .LBB14_2311; ZIBI-RV64-NEXT: # %bb.1:312; ZIBI-RV64-NEXT: mv a0, a2313; ZIBI-RV64-NEXT: .LBB14_2:314; ZIBI-RV64-NEXT: ret315 %tst = icmp eq i32 %a, 1316 %ret = select i1 %tst, i32 %b, i32 %c317 ret i32 %ret318}319 320define i32 @test_select_bne_1(i32 %a, i32 %b, i32 %c) nounwind {321; ZIBI-RV32-LABEL: test_select_bne_1:322; ZIBI-RV32: # %bb.0:323; ZIBI-RV32-NEXT: bnei a0, 1, .LBB15_2324; ZIBI-RV32-NEXT: # %bb.1:325; ZIBI-RV32-NEXT: mv a1, a2326; ZIBI-RV32-NEXT: .LBB15_2:327; ZIBI-RV32-NEXT: mv a0, a1328; ZIBI-RV32-NEXT: ret329;330; ZIBI-RV64-LABEL: test_select_bne_1:331; ZIBI-RV64: # %bb.0:332; ZIBI-RV64-NEXT: sext.w a3, a0333; ZIBI-RV64-NEXT: mv a0, a1334; ZIBI-RV64-NEXT: bnei a3, 1, .LBB15_2335; ZIBI-RV64-NEXT: # %bb.1:336; ZIBI-RV64-NEXT: mv a0, a2337; ZIBI-RV64-NEXT: .LBB15_2:338; ZIBI-RV64-NEXT: ret339 %tst = icmp ne i32 %a, 1340 %ret = select i1 %tst, i32 %b, i32 %c341 ret i32 %ret342}343 344define i32 @test_select_beq_31(i32 %a, i32 %b, i32 %c) nounwind {345; ZIBI-RV32-LABEL: test_select_beq_31:346; ZIBI-RV32: # %bb.0:347; ZIBI-RV32-NEXT: beqi a0, 31, .LBB16_2348; ZIBI-RV32-NEXT: # %bb.1:349; ZIBI-RV32-NEXT: mv a1, a2350; ZIBI-RV32-NEXT: .LBB16_2:351; ZIBI-RV32-NEXT: mv a0, a1352; ZIBI-RV32-NEXT: ret353;354; ZIBI-RV64-LABEL: test_select_beq_31:355; ZIBI-RV64: # %bb.0:356; ZIBI-RV64-NEXT: sext.w a3, a0357; ZIBI-RV64-NEXT: mv a0, a1358; ZIBI-RV64-NEXT: beqi a3, 31, .LBB16_2359; ZIBI-RV64-NEXT: # %bb.1:360; ZIBI-RV64-NEXT: mv a0, a2361; ZIBI-RV64-NEXT: .LBB16_2:362; ZIBI-RV64-NEXT: ret363 %tst = icmp eq i32 %a, 31364 %ret = select i1 %tst, i32 %b, i32 %c365 ret i32 %ret366}367 368define i32 @test_select_bne_31(i32 %a, i32 %b, i32 %c) nounwind {369; ZIBI-RV32-LABEL: test_select_bne_31:370; ZIBI-RV32: # %bb.0:371; ZIBI-RV32-NEXT: bnei a0, 31, .LBB17_2372; ZIBI-RV32-NEXT: # %bb.1:373; ZIBI-RV32-NEXT: mv a1, a2374; ZIBI-RV32-NEXT: .LBB17_2:375; ZIBI-RV32-NEXT: mv a0, a1376; ZIBI-RV32-NEXT: ret377;378; ZIBI-RV64-LABEL: test_select_bne_31:379; ZIBI-RV64: # %bb.0:380; ZIBI-RV64-NEXT: sext.w a3, a0381; ZIBI-RV64-NEXT: mv a0, a1382; ZIBI-RV64-NEXT: bnei a3, 31, .LBB17_2383; ZIBI-RV64-NEXT: # %bb.1:384; ZIBI-RV64-NEXT: mv a0, a2385; ZIBI-RV64-NEXT: .LBB17_2:386; ZIBI-RV64-NEXT: ret387 %tst = icmp ne i32 %a, 31388 %ret = select i1 %tst, i32 %b, i32 %c389 ret i32 %ret390}391 392define i32 @test_select_beq_32(i32 %a, i32 %b, i32 %c) nounwind {393; ZIBI-RV32-LABEL: test_select_beq_32:394; ZIBI-RV32: # %bb.0:395; ZIBI-RV32-NEXT: li a3, 32396; ZIBI-RV32-NEXT: beq a0, a3, .LBB18_2397; ZIBI-RV32-NEXT: # %bb.1:398; ZIBI-RV32-NEXT: mv a1, a2399; ZIBI-RV32-NEXT: .LBB18_2:400; ZIBI-RV32-NEXT: mv a0, a1401; ZIBI-RV32-NEXT: ret402;403; ZIBI-RV64-LABEL: test_select_beq_32:404; ZIBI-RV64: # %bb.0:405; ZIBI-RV64-NEXT: sext.w a3, a0406; ZIBI-RV64-NEXT: li a4, 32407; ZIBI-RV64-NEXT: mv a0, a1408; ZIBI-RV64-NEXT: beq a3, a4, .LBB18_2409; ZIBI-RV64-NEXT: # %bb.1:410; ZIBI-RV64-NEXT: mv a0, a2411; ZIBI-RV64-NEXT: .LBB18_2:412; ZIBI-RV64-NEXT: ret413 %tst = icmp eq i32 %a, 32414 %ret = select i1 %tst, i32 %b, i32 %c415 ret i32 %ret416}417 418define i32 @test_select_bne_32(i32 %a, i32 %b, i32 %c) nounwind {419; ZIBI-RV32-LABEL: test_select_bne_32:420; ZIBI-RV32: # %bb.0:421; ZIBI-RV32-NEXT: li a3, 32422; ZIBI-RV32-NEXT: bne a0, a3, .LBB19_2423; ZIBI-RV32-NEXT: # %bb.1:424; ZIBI-RV32-NEXT: mv a1, a2425; ZIBI-RV32-NEXT: .LBB19_2:426; ZIBI-RV32-NEXT: mv a0, a1427; ZIBI-RV32-NEXT: ret428;429; ZIBI-RV64-LABEL: test_select_bne_32:430; ZIBI-RV64: # %bb.0:431; ZIBI-RV64-NEXT: sext.w a3, a0432; ZIBI-RV64-NEXT: li a4, 32433; ZIBI-RV64-NEXT: mv a0, a1434; ZIBI-RV64-NEXT: bne a3, a4, .LBB19_2435; ZIBI-RV64-NEXT: # %bb.1:436; ZIBI-RV64-NEXT: mv a0, a2437; ZIBI-RV64-NEXT: .LBB19_2:438; ZIBI-RV64-NEXT: ret439 %tst = icmp ne i32 %a, 32440 %ret = select i1 %tst, i32 %b, i32 %c441 ret i32 %ret442}443