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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=sparc %s -o - | FileCheck %s -check-prefix=V83; RUN: llc -mtriple=sparc -mattr=v9 %s -o - | FileCheck %s -check-prefix=V94; RUN: llc -mtriple=sparc64-unknown-linux %s -o - | FileCheck %s -check-prefix=SPARC645; RUN: llc -mtriple=sparc64-unknown-linux -mattr=vis3 %s -o - | FileCheck %s -check-prefix=SPARC64-VIS36 7define i32 @test_addx(i64 %a, i64 %b, i64 %c) nounwind {8; V8-LABEL: test_addx:9; V8: ! %bb.0: ! %entry10; V8-NEXT: addcc %o1, %o3, %o311; V8-NEXT: addxcc %o0, %o2, %o112; V8-NEXT: mov 1, %o013; V8-NEXT: cmp %o1, %o414; V8-NEXT: bleu .LBB0_415; V8-NEXT: mov %o0, %o216; V8-NEXT: ! %bb.1: ! %entry17; V8-NEXT: cmp %o3, %o518; V8-NEXT: bleu .LBB0_519; V8-NEXT: nop20; V8-NEXT: .LBB0_2: ! %entry21; V8-NEXT: cmp %o1, %o422; V8-NEXT: bne .LBB0_623; V8-NEXT: nop24; V8-NEXT: .LBB0_3: ! %entry25; V8-NEXT: retl26; V8-NEXT: nop27; V8-NEXT: .LBB0_4: ! %entry28; V8-NEXT: mov %g0, %o229; V8-NEXT: cmp %o3, %o530; V8-NEXT: bgu .LBB0_231; V8-NEXT: nop32; V8-NEXT: .LBB0_5: ! %entry33; V8-NEXT: mov %g0, %o034; V8-NEXT: cmp %o1, %o435; V8-NEXT: be .LBB0_336; V8-NEXT: nop37; V8-NEXT: .LBB0_6: ! %entry38; V8-NEXT: retl39; V8-NEXT: mov %o2, %o040;41; V9-LABEL: test_addx:42; V9: ! %bb.0: ! %entry43; V9-NEXT: mov %g0, %g244; V9-NEXT: mov %g0, %g345; V9-NEXT: addcc %o1, %o3, %o146; V9-NEXT: addxcc %o0, %o2, %o047; V9-NEXT: cmp %o0, %o448; V9-NEXT: movgu %icc, 1, %g249; V9-NEXT: cmp %o1, %o550; V9-NEXT: movgu %icc, 1, %g351; V9-NEXT: cmp %o0, %o452; V9-NEXT: move %icc, %g3, %g253; V9-NEXT: retl54; V9-NEXT: mov %g2, %o055;56; SPARC64-LABEL: test_addx:57; SPARC64: ! %bb.0: ! %entry58; SPARC64-NEXT: mov %g0, %o359; SPARC64-NEXT: add %o0, %o1, %o060; SPARC64-NEXT: cmp %o0, %o261; SPARC64-NEXT: movgu %xcc, 1, %o362; SPARC64-NEXT: retl63; SPARC64-NEXT: srl %o3, 0, %o064;65; SPARC64-VIS3-LABEL: test_addx:66; SPARC64-VIS3: ! %bb.0: ! %entry67; SPARC64-VIS3-NEXT: mov %g0, %o368; SPARC64-VIS3-NEXT: add %o0, %o1, %o069; SPARC64-VIS3-NEXT: cmp %o0, %o270; SPARC64-VIS3-NEXT: movgu %xcc, 1, %o371; SPARC64-VIS3-NEXT: retl72; SPARC64-VIS3-NEXT: srl %o3, 0, %o073entry:74 %0 = add i64 %a, %b75 %1 = icmp ugt i64 %0, %c76 %2 = zext i1 %1 to i3277 ret i32 %278}79 80define i32 @test_select_int_icc(i32 %a, i32 %b, i32 %c) nounwind {81; V8-LABEL: test_select_int_icc:82; V8: ! %bb.0: ! %entry83; V8-NEXT: cmp %o0, 084; V8-NEXT: be .LBB1_285; V8-NEXT: mov %o1, %o086; V8-NEXT: ! %bb.1: ! %entry87; V8-NEXT: mov %o2, %o088; V8-NEXT: .LBB1_2: ! %entry89; V8-NEXT: retl90; V8-NEXT: nop91;92; V9-LABEL: test_select_int_icc:93; V9: ! %bb.0: ! %entry94; V9-NEXT: cmp %o0, 095; V9-NEXT: move %icc, %o1, %o296; V9-NEXT: retl97; V9-NEXT: mov %o2, %o098;99; SPARC64-LABEL: test_select_int_icc:100; SPARC64: ! %bb.0: ! %entry101; SPARC64-NEXT: cmp %o0, 0102; SPARC64-NEXT: move %icc, %o1, %o2103; SPARC64-NEXT: retl104; SPARC64-NEXT: mov %o2, %o0105;106; SPARC64-VIS3-LABEL: test_select_int_icc:107; SPARC64-VIS3: ! %bb.0: ! %entry108; SPARC64-VIS3-NEXT: cmp %o0, 0109; SPARC64-VIS3-NEXT: move %icc, %o1, %o2110; SPARC64-VIS3-NEXT: retl111; SPARC64-VIS3-NEXT: mov %o2, %o0112entry:113 %0 = icmp eq i32 %a, 0114 %1 = select i1 %0, i32 %b, i32 %c115 ret i32 %1116}117 118define float @test_select_fp_icc(i32 %a, float %f1, float %f2) nounwind {119; V8-LABEL: test_select_fp_icc:120; V8: ! %bb.0: ! %entry121; V8-NEXT: add %sp, -104, %sp122; V8-NEXT: st %o2, [%sp+100]123; V8-NEXT: cmp %o0, 0124; V8-NEXT: be .LBB2_2125; V8-NEXT: st %o1, [%sp+96]126; V8-NEXT: ! %bb.1: ! %entry127; V8-NEXT: ld [%sp+100], %f0128; V8-NEXT: retl129; V8-NEXT: add %sp, 104, %sp130; V8-NEXT: .LBB2_2:131; V8-NEXT: ld [%sp+96], %f0132; V8-NEXT: retl133; V8-NEXT: add %sp, 104, %sp134;135; V9-LABEL: test_select_fp_icc:136; V9: ! %bb.0: ! %entry137; V9-NEXT: add %sp, -104, %sp138; V9-NEXT: st %o2, [%sp+100]139; V9-NEXT: st %o1, [%sp+96]140; V9-NEXT: ld [%sp+100], %f0141; V9-NEXT: ld [%sp+96], %f1142; V9-NEXT: cmp %o0, 0143; V9-NEXT: fmovse %icc, %f1, %f0144; V9-NEXT: retl145; V9-NEXT: add %sp, 104, %sp146;147; SPARC64-LABEL: test_select_fp_icc:148; SPARC64: ! %bb.0: ! %entry149; SPARC64-NEXT: fmovs %f5, %f0150; SPARC64-NEXT: cmp %o0, 0151; SPARC64-NEXT: retl152; SPARC64-NEXT: fmovse %icc, %f3, %f0153;154; SPARC64-VIS3-LABEL: test_select_fp_icc:155; SPARC64-VIS3: ! %bb.0: ! %entry156; SPARC64-VIS3-NEXT: fmovs %f5, %f0157; SPARC64-VIS3-NEXT: cmp %o0, 0158; SPARC64-VIS3-NEXT: retl159; SPARC64-VIS3-NEXT: fmovse %icc, %f3, %f0160entry:161 %0 = icmp eq i32 %a, 0162 %1 = select i1 %0, float %f1, float %f2163 ret float %1164}165 166define double @test_select_dfp_icc(i32 %a, double %f1, double %f2) nounwind {167; V8-LABEL: test_select_dfp_icc:168; V8: ! %bb.0: ! %entry169; V8-NEXT: add %sp, -112, %sp170; V8-NEXT: mov %o4, %o5171; V8-NEXT: mov %o2, %g3172; V8-NEXT: mov %o3, %o4173; V8-NEXT: std %o4, [%sp+96]174; V8-NEXT: cmp %o0, 0175; V8-NEXT: mov %o1, %g2176; V8-NEXT: be .LBB3_2177; V8-NEXT: std %g2, [%sp+104]178; V8-NEXT: ! %bb.1: ! %entry179; V8-NEXT: ldd [%sp+96], %f0180; V8-NEXT: retl181; V8-NEXT: add %sp, 112, %sp182; V8-NEXT: .LBB3_2:183; V8-NEXT: ldd [%sp+104], %f0184; V8-NEXT: retl185; V8-NEXT: add %sp, 112, %sp186;187; V9-LABEL: test_select_dfp_icc:188; V9: ! %bb.0: ! %entry189; V9-NEXT: add %sp, -112, %sp190; V9-NEXT: mov %o4, %o5191; V9-NEXT: mov %o2, %g3192; V9-NEXT: mov %o3, %o4193; V9-NEXT: std %o4, [%sp+96]194; V9-NEXT: mov %o1, %g2195; V9-NEXT: std %g2, [%sp+104]196; V9-NEXT: ldd [%sp+96], %f0197; V9-NEXT: ldd [%sp+104], %f2198; V9-NEXT: cmp %o0, 0199; V9-NEXT: fmovde %icc, %f2, %f0200; V9-NEXT: retl201; V9-NEXT: add %sp, 112, %sp202;203; SPARC64-LABEL: test_select_dfp_icc:204; SPARC64: ! %bb.0: ! %entry205; SPARC64-NEXT: fmovd %f4, %f0206; SPARC64-NEXT: cmp %o0, 0207; SPARC64-NEXT: retl208; SPARC64-NEXT: fmovde %icc, %f2, %f0209;210; SPARC64-VIS3-LABEL: test_select_dfp_icc:211; SPARC64-VIS3: ! %bb.0: ! %entry212; SPARC64-VIS3-NEXT: fmovd %f4, %f0213; SPARC64-VIS3-NEXT: cmp %o0, 0214; SPARC64-VIS3-NEXT: retl215; SPARC64-VIS3-NEXT: fmovde %icc, %f2, %f0216entry:217 %0 = icmp eq i32 %a, 0218 %1 = select i1 %0, double %f1, double %f2219 ret double %1220}221 222define i32 @test_select_int_fcc(float %f, i32 %a, i32 %b) nounwind {223; V8-LABEL: test_select_int_fcc:224; V8: ! %bb.0: ! %entry225; V8-NEXT: add %sp, -96, %sp226; V8-NEXT: st %o0, [%sp+92]227; V8-NEXT: ld [%sp+92], %f0228; V8-NEXT: sethi %hi(.LCPI4_0), %o0229; V8-NEXT: ld [%o0+%lo(.LCPI4_0)], %f1230; V8-NEXT: fcmps %f0, %f1231; V8-NEXT: nop232; V8-NEXT: fbne .LBB4_2233; V8-NEXT: mov %o1, %o0234; V8-NEXT: ! %bb.1: ! %entry235; V8-NEXT: mov %o2, %o0236; V8-NEXT: .LBB4_2: ! %entry237; V8-NEXT: retl238; V8-NEXT: add %sp, 96, %sp239;240; V9-LABEL: test_select_int_fcc:241; V9: ! %bb.0: ! %entry242; V9-NEXT: add %sp, -96, %sp243; V9-NEXT: st %o0, [%sp+92]244; V9-NEXT: ld [%sp+92], %f0245; V9-NEXT: sethi %hi(.LCPI4_0), %o0246; V9-NEXT: ld [%o0+%lo(.LCPI4_0)], %f1247; V9-NEXT: mov %o2, %o0248; V9-NEXT: fcmps %fcc0, %f0, %f1249; V9-NEXT: movne %fcc0, %o1, %o0250; V9-NEXT: retl251; V9-NEXT: add %sp, 96, %sp252;253; SPARC64-LABEL: test_select_int_fcc:254; SPARC64: ! %bb.0: ! %entry255; SPARC64-NEXT: sethi %h44(.LCPI4_0), %o0256; SPARC64-NEXT: add %o0, %m44(.LCPI4_0), %o0257; SPARC64-NEXT: sllx %o0, 12, %o0258; SPARC64-NEXT: ld [%o0+%l44(.LCPI4_0)], %f0259; SPARC64-NEXT: mov %o2, %o0260; SPARC64-NEXT: fcmps %fcc0, %f1, %f0261; SPARC64-NEXT: retl262; SPARC64-NEXT: movne %fcc0, %o1, %o0263;264; SPARC64-VIS3-LABEL: test_select_int_fcc:265; SPARC64-VIS3: ! %bb.0: ! %entry266; SPARC64-VIS3-NEXT: sethi %h44(.LCPI4_0), %o0267; SPARC64-VIS3-NEXT: add %o0, %m44(.LCPI4_0), %o0268; SPARC64-VIS3-NEXT: sllx %o0, 12, %o0269; SPARC64-VIS3-NEXT: ld [%o0+%l44(.LCPI4_0)], %f0270; SPARC64-VIS3-NEXT: mov %o2, %o0271; SPARC64-VIS3-NEXT: fcmps %fcc0, %f1, %f0272; SPARC64-VIS3-NEXT: retl273; SPARC64-VIS3-NEXT: movne %fcc0, %o1, %o0274entry:275 %0 = fcmp une float %f, 0.000000e+00276 %a.b = select i1 %0, i32 %a, i32 %b277 ret i32 %a.b278}279 280define float @test_select_fp_fcc(float %f, float %f1, float %f2) nounwind {281; V8-LABEL: test_select_fp_fcc:282; V8: ! %bb.0: ! %entry283; V8-NEXT: add %sp, -104, %sp284; V8-NEXT: st %o0, [%sp+92]285; V8-NEXT: st %o2, [%sp+100]286; V8-NEXT: st %o1, [%sp+96]287; V8-NEXT: ld [%sp+92], %f0288; V8-NEXT: sethi %hi(.LCPI5_0), %o0289; V8-NEXT: ld [%o0+%lo(.LCPI5_0)], %f1290; V8-NEXT: fcmps %f0, %f1291; V8-NEXT: nop292; V8-NEXT: fbne .LBB5_2293; V8-NEXT: nop294; V8-NEXT: ! %bb.1: ! %entry295; V8-NEXT: ld [%sp+100], %f0296; V8-NEXT: retl297; V8-NEXT: add %sp, 104, %sp298; V8-NEXT: .LBB5_2:299; V8-NEXT: ld [%sp+96], %f0300; V8-NEXT: retl301; V8-NEXT: add %sp, 104, %sp302;303; V9-LABEL: test_select_fp_fcc:304; V9: ! %bb.0: ! %entry305; V9-NEXT: add %sp, -104, %sp306; V9-NEXT: st %o0, [%sp+92]307; V9-NEXT: st %o2, [%sp+100]308; V9-NEXT: st %o1, [%sp+96]309; V9-NEXT: ld [%sp+92], %f1310; V9-NEXT: ld [%sp+100], %f0311; V9-NEXT: sethi %hi(.LCPI5_0), %o0312; V9-NEXT: ld [%o0+%lo(.LCPI5_0)], %f2313; V9-NEXT: ld [%sp+96], %f3314; V9-NEXT: fcmps %fcc0, %f1, %f2315; V9-NEXT: fmovsne %fcc0, %f3, %f0316; V9-NEXT: retl317; V9-NEXT: add %sp, 104, %sp318;319; SPARC64-LABEL: test_select_fp_fcc:320; SPARC64: ! %bb.0: ! %entry321; SPARC64-NEXT: sethi %h44(.LCPI5_0), %o0322; SPARC64-NEXT: add %o0, %m44(.LCPI5_0), %o0323; SPARC64-NEXT: sllx %o0, 12, %o0324; SPARC64-NEXT: ld [%o0+%l44(.LCPI5_0)], %f2325; SPARC64-NEXT: fmovs %f5, %f0326; SPARC64-NEXT: fcmps %fcc0, %f1, %f2327; SPARC64-NEXT: retl328; SPARC64-NEXT: fmovsne %fcc0, %f3, %f0329;330; SPARC64-VIS3-LABEL: test_select_fp_fcc:331; SPARC64-VIS3: ! %bb.0: ! %entry332; SPARC64-VIS3-NEXT: sethi %h44(.LCPI5_0), %o0333; SPARC64-VIS3-NEXT: add %o0, %m44(.LCPI5_0), %o0334; SPARC64-VIS3-NEXT: sllx %o0, 12, %o0335; SPARC64-VIS3-NEXT: ld [%o0+%l44(.LCPI5_0)], %f2336; SPARC64-VIS3-NEXT: fmovs %f5, %f0337; SPARC64-VIS3-NEXT: fcmps %fcc0, %f1, %f2338; SPARC64-VIS3-NEXT: retl339; SPARC64-VIS3-NEXT: fmovsne %fcc0, %f3, %f0340entry:341 %0 = fcmp une float %f, 0.000000e+00342 %1 = select i1 %0, float %f1, float %f2343 ret float %1344}345 346define double @test_select_dfp_fcc(double %f, double %f1, double %f2) nounwind {347; V8-LABEL: test_select_dfp_fcc:348; V8: ! %bb.0: ! %entry349; V8-NEXT: add %sp, -120, %sp350; V8-NEXT: ! kill: def $o1 killed $o1 killed $o0_o1 def $o0_o1351; V8-NEXT: ! kill: def $o5 killed $o5 killed $o4_o5 def $o4_o5352; V8-NEXT: ! kill: def $o3 killed $o3 killed $o2_o3 def $o2_o3353; V8-NEXT: ! kill: def $o0 killed $o0 killed $o0_o1 def $o0_o1354; V8-NEXT: std %o0, [%sp+112]355; V8-NEXT: ! kill: def $o4 killed $o4 killed $o4_o5 def $o4_o5356; V8-NEXT: std %o4, [%sp+96]357; V8-NEXT: ! kill: def $o2 killed $o2 killed $o2_o3 def $o2_o3358; V8-NEXT: std %o2, [%sp+104]359; V8-NEXT: ldd [%sp+112], %f0360; V8-NEXT: sethi %hi(.LCPI6_0), %o0361; V8-NEXT: ldd [%o0+%lo(.LCPI6_0)], %f2362; V8-NEXT: fcmpd %f0, %f2363; V8-NEXT: nop364; V8-NEXT: fbne .LBB6_2365; V8-NEXT: nop366; V8-NEXT: ! %bb.1: ! %entry367; V8-NEXT: ldd [%sp+96], %f0368; V8-NEXT: retl369; V8-NEXT: add %sp, 120, %sp370; V8-NEXT: .LBB6_2:371; V8-NEXT: ldd [%sp+104], %f0372; V8-NEXT: retl373; V8-NEXT: add %sp, 120, %sp374;375; V9-LABEL: test_select_dfp_fcc:376; V9: ! %bb.0: ! %entry377; V9-NEXT: add %sp, -120, %sp378; V9-NEXT: ! kill: def $o1 killed $o1 killed $o0_o1 def $o0_o1379; V9-NEXT: ! kill: def $o5 killed $o5 killed $o4_o5 def $o4_o5380; V9-NEXT: ! kill: def $o3 killed $o3 killed $o2_o3 def $o2_o3381; V9-NEXT: ! kill: def $o0 killed $o0 killed $o0_o1 def $o0_o1382; V9-NEXT: std %o0, [%sp+112]383; V9-NEXT: ! kill: def $o4 killed $o4 killed $o4_o5 def $o4_o5384; V9-NEXT: std %o4, [%sp+96]385; V9-NEXT: ! kill: def $o2 killed $o2 killed $o2_o3 def $o2_o3386; V9-NEXT: std %o2, [%sp+104]387; V9-NEXT: ldd [%sp+112], %f2388; V9-NEXT: ldd [%sp+96], %f0389; V9-NEXT: sethi %hi(.LCPI6_0), %o0390; V9-NEXT: ldd [%o0+%lo(.LCPI6_0)], %f4391; V9-NEXT: ldd [%sp+104], %f6392; V9-NEXT: fcmpd %fcc0, %f2, %f4393; V9-NEXT: fmovdne %fcc0, %f6, %f0394; V9-NEXT: retl395; V9-NEXT: add %sp, 120, %sp396;397; SPARC64-LABEL: test_select_dfp_fcc:398; SPARC64: ! %bb.0: ! %entry399; SPARC64-NEXT: sethi %h44(.LCPI6_0), %o0400; SPARC64-NEXT: add %o0, %m44(.LCPI6_0), %o0401; SPARC64-NEXT: sllx %o0, 12, %o0402; SPARC64-NEXT: ldd [%o0+%l44(.LCPI6_0)], %f6403; SPARC64-NEXT: fcmpd %fcc0, %f0, %f6404; SPARC64-NEXT: fmovdne %fcc0, %f2, %f4405; SPARC64-NEXT: fmovd %f4, %f0406; SPARC64-NEXT: retl407; SPARC64-NEXT: nop408;409; SPARC64-VIS3-LABEL: test_select_dfp_fcc:410; SPARC64-VIS3: ! %bb.0: ! %entry411; SPARC64-VIS3-NEXT: sethi %h44(.LCPI6_0), %o0412; SPARC64-VIS3-NEXT: add %o0, %m44(.LCPI6_0), %o0413; SPARC64-VIS3-NEXT: sllx %o0, 12, %o0414; SPARC64-VIS3-NEXT: ldd [%o0+%l44(.LCPI6_0)], %f6415; SPARC64-VIS3-NEXT: fcmpd %fcc0, %f0, %f6416; SPARC64-VIS3-NEXT: fmovdne %fcc0, %f2, %f4417; SPARC64-VIS3-NEXT: fmovd %f4, %f0418; SPARC64-VIS3-NEXT: retl419; SPARC64-VIS3-NEXT: nop420entry:421 %0 = fcmp une double %f, 0.000000e+00422 %1 = select i1 %0, double %f1, double %f2423 ret double %1424}425 426define i32 @test_float_cc(double %a, double %b, i32 %c, i32 %d) nounwind {427; V8-LABEL: test_float_cc:428; V8: ! %bb.0: ! %entry429; V8-NEXT: add %sp, -112, %sp430; V8-NEXT: ! kill: def $o3 killed $o3 killed $o2_o3 def $o2_o3431; V8-NEXT: ! kill: def $o1 killed $o1 killed $o0_o1 def $o0_o1432; V8-NEXT: ! kill: def $o2 killed $o2 killed $o2_o3 def $o2_o3433; V8-NEXT: std %o2, [%sp+96]434; V8-NEXT: ! kill: def $o0 killed $o0 killed $o0_o1 def $o0_o1435; V8-NEXT: std %o0, [%sp+104]436; V8-NEXT: ldd [%sp+104], %f2437; V8-NEXT: sethi %hi(.LCPI7_0), %o0438; V8-NEXT: ldd [%o0+%lo(.LCPI7_0)], %f0439; V8-NEXT: fcmpd %f2, %f0440; V8-NEXT: nop441; V8-NEXT: fbuge .LBB7_3442; V8-NEXT: nop443; V8-NEXT: ! %bb.1: ! %loop.2444; V8-NEXT: ldd [%sp+96], %f2445; V8-NEXT: fcmpd %f2, %f0446; V8-NEXT: nop447; V8-NEXT: fbule .LBB7_3448; V8-NEXT: nop449; V8-NEXT: ! %bb.2: ! %exit.1450; V8-NEXT: mov 1, %o0451; V8-NEXT: retl452; V8-NEXT: add %sp, 112, %sp453; V8-NEXT: .LBB7_3: ! %loop454; V8-NEXT: ! =>This Inner Loop Header: Depth=1455; V8-NEXT: cmp %o4, 10456; V8-NEXT: be .LBB7_3457; V8-NEXT: nop458; V8-NEXT: ! %bb.4: ! %exit.0459; V8-NEXT: mov %g0, %o0460; V8-NEXT: retl461; V8-NEXT: add %sp, 112, %sp462;463; V9-LABEL: test_float_cc:464; V9: ! %bb.0: ! %entry465; V9-NEXT: add %sp, -112, %sp466; V9-NEXT: ! kill: def $o3 killed $o3 killed $o2_o3 def $o2_o3467; V9-NEXT: ! kill: def $o1 killed $o1 killed $o0_o1 def $o0_o1468; V9-NEXT: ! kill: def $o2 killed $o2 killed $o2_o3 def $o2_o3469; V9-NEXT: std %o2, [%sp+96]470; V9-NEXT: ! kill: def $o0 killed $o0 killed $o0_o1 def $o0_o1471; V9-NEXT: std %o0, [%sp+104]472; V9-NEXT: ldd [%sp+104], %f2473; V9-NEXT: sethi %hi(.LCPI7_0), %o0474; V9-NEXT: ldd [%o0+%lo(.LCPI7_0)], %f0475; V9-NEXT: fcmpd %fcc0, %f2, %f0476; V9-NEXT: fbuge %fcc0, .LBB7_3477; V9-NEXT: nop478; V9-NEXT: ! %bb.1: ! %loop.2479; V9-NEXT: ldd [%sp+96], %f2480; V9-NEXT: fcmpd %fcc0, %f2, %f0481; V9-NEXT: fbule %fcc0, .LBB7_3482; V9-NEXT: nop483; V9-NEXT: ! %bb.2: ! %exit.1484; V9-NEXT: mov 1, %o0485; V9-NEXT: retl486; V9-NEXT: add %sp, 112, %sp487; V9-NEXT: .LBB7_3: ! %loop488; V9-NEXT: ! =>This Inner Loop Header: Depth=1489; V9-NEXT: cmp %o4, 10490; V9-NEXT: be %icc, .LBB7_3491; V9-NEXT: nop492; V9-NEXT: ! %bb.4: ! %exit.0493; V9-NEXT: mov %g0, %o0494; V9-NEXT: retl495; V9-NEXT: add %sp, 112, %sp496;497; SPARC64-LABEL: test_float_cc:498; SPARC64: ! %bb.0: ! %entry499; SPARC64-NEXT: sethi %h44(.LCPI7_0), %o0500; SPARC64-NEXT: add %o0, %m44(.LCPI7_0), %o0501; SPARC64-NEXT: sllx %o0, 12, %o0502; SPARC64-NEXT: ldd [%o0+%l44(.LCPI7_0)], %f4503; SPARC64-NEXT: fcmpd %fcc0, %f0, %f4504; SPARC64-NEXT: fbuge %fcc0, .LBB7_3505; SPARC64-NEXT: nop506; SPARC64-NEXT: ! %bb.1: ! %loop.2507; SPARC64-NEXT: fcmpd %fcc0, %f2, %f4508; SPARC64-NEXT: fbule %fcc0, .LBB7_3509; SPARC64-NEXT: nop510; SPARC64-NEXT: ! %bb.2: ! %exit.1511; SPARC64-NEXT: retl512; SPARC64-NEXT: mov 1, %o0513; SPARC64-NEXT: .LBB7_3: ! %loop514; SPARC64-NEXT: ! =>This Inner Loop Header: Depth=1515; SPARC64-NEXT: cmp %o2, 10516; SPARC64-NEXT: be %icc, .LBB7_3517; SPARC64-NEXT: nop518; SPARC64-NEXT: ! %bb.4: ! %exit.0519; SPARC64-NEXT: retl520; SPARC64-NEXT: mov %g0, %o0521;522; SPARC64-VIS3-LABEL: test_float_cc:523; SPARC64-VIS3: ! %bb.0: ! %entry524; SPARC64-VIS3-NEXT: sethi %h44(.LCPI7_0), %o0525; SPARC64-VIS3-NEXT: add %o0, %m44(.LCPI7_0), %o0526; SPARC64-VIS3-NEXT: sllx %o0, 12, %o0527; SPARC64-VIS3-NEXT: ldd [%o0+%l44(.LCPI7_0)], %f4528; SPARC64-VIS3-NEXT: fcmpd %fcc0, %f0, %f4529; SPARC64-VIS3-NEXT: fbuge %fcc0, .LBB7_3530; SPARC64-VIS3-NEXT: nop531; SPARC64-VIS3-NEXT: ! %bb.1: ! %loop.2532; SPARC64-VIS3-NEXT: fcmpd %fcc0, %f2, %f4533; SPARC64-VIS3-NEXT: fbule %fcc0, .LBB7_3534; SPARC64-VIS3-NEXT: nop535; SPARC64-VIS3-NEXT: ! %bb.2: ! %exit.1536; SPARC64-VIS3-NEXT: retl537; SPARC64-VIS3-NEXT: mov 1, %o0538; SPARC64-VIS3-NEXT: .LBB7_3: ! %loop539; SPARC64-VIS3-NEXT: ! =>This Inner Loop Header: Depth=1540; SPARC64-VIS3-NEXT: cmp %o2, 10541; SPARC64-VIS3-NEXT: be %icc, .LBB7_3542; SPARC64-VIS3-NEXT: nop543; SPARC64-VIS3-NEXT: ! %bb.4: ! %exit.0544; SPARC64-VIS3-NEXT: retl545; SPARC64-VIS3-NEXT: mov %g0, %o0546entry:547 %0 = fcmp uge double %a, 0.000000e+00548 br i1 %0, label %loop, label %loop.2549 550loop:551 %1 = icmp eq i32 %c, 10552 br i1 %1, label %loop, label %exit.0553 554loop.2:555 %2 = fcmp ogt double %b, 0.000000e+00556 br i1 %2, label %exit.1, label %loop557 558exit.0:559 ret i32 0560 561exit.1:562 ret i32 1563}564 565define void @test_adde_sube(ptr %a, ptr %b, ptr %sum, ptr %diff) nounwind {566; V8-LABEL: test_adde_sube:567; V8: ! %bb.0: ! %entry568; V8-NEXT: save %sp, -96, %sp569; V8-NEXT: ldd [%i0+8], %i4570; V8-NEXT: ldd [%i1+8], %l0571; V8-NEXT: ldd [%i0], %g2572; V8-NEXT: ldd [%i1], %l2573; V8-NEXT: addcc %i5, %l1, %l5574; V8-NEXT: addxcc %i4, %l0, %l4575; V8-NEXT: addxcc %g3, %l3, %l1576; V8-NEXT: addxcc %g2, %l2, %l0577; V8-NEXT: std %l4, [%i2+8]578; V8-NEXT: std %l0, [%i2]579; V8-NEXT: !APP580; V8-NEXT: !NO_APP581; V8-NEXT: ldd [%i0+8], %l0582; V8-NEXT: ldd [%i0], %i0583; V8-NEXT: subcc %i5, %l1, %l3584; V8-NEXT: subxcc %i4, %l0, %l2585; V8-NEXT: subxcc %g3, %i1, %i5586; V8-NEXT: subxcc %g2, %i0, %i4587; V8-NEXT: std %l2, [%i3+8]588; V8-NEXT: std %i4, [%i3]589; V8-NEXT: ret590; V8-NEXT: restore591;592; V9-LABEL: test_adde_sube:593; V9: ! %bb.0: ! %entry594; V9-NEXT: save %sp, -96, %sp595; V9-NEXT: ldd [%i0+8], %i4596; V9-NEXT: ldd [%i1+8], %l0597; V9-NEXT: ldd [%i0], %g2598; V9-NEXT: ldd [%i1], %l2599; V9-NEXT: addcc %i5, %l1, %l5600; V9-NEXT: addxcc %i4, %l0, %l4601; V9-NEXT: addxcc %g3, %l3, %l1602; V9-NEXT: addxcc %g2, %l2, %l0603; V9-NEXT: std %l4, [%i2+8]604; V9-NEXT: std %l0, [%i2]605; V9-NEXT: !APP606; V9-NEXT: !NO_APP607; V9-NEXT: ldd [%i0+8], %l0608; V9-NEXT: ldd [%i0], %i0609; V9-NEXT: subcc %i5, %l1, %l3610; V9-NEXT: subxcc %i4, %l0, %l2611; V9-NEXT: subxcc %g3, %i1, %i5612; V9-NEXT: subxcc %g2, %i0, %i4613; V9-NEXT: std %l2, [%i3+8]614; V9-NEXT: std %i4, [%i3]615; V9-NEXT: ret616; V9-NEXT: restore617;618; SPARC64-LABEL: test_adde_sube:619; SPARC64: .register %g2, #scratch620; SPARC64-NEXT: .register %g3, #scratch621; SPARC64-NEXT: ! %bb.0: ! %entry622; SPARC64-NEXT: save %sp, -128, %sp623; SPARC64-NEXT: ldx [%i0+8], %i4624; SPARC64-NEXT: ldx [%i0], %i5625; SPARC64-NEXT: ldx [%i1], %g2626; SPARC64-NEXT: ldx [%i1+8], %i1627; SPARC64-NEXT: mov %g0, %g3628; SPARC64-NEXT: add %i5, %g2, %g2629; SPARC64-NEXT: add %i4, %i1, %i1630; SPARC64-NEXT: cmp %i1, %i4631; SPARC64-NEXT: movcs %xcc, 1, %g3632; SPARC64-NEXT: srl %g3, 0, %g3633; SPARC64-NEXT: add %g2, %g3, %g2634; SPARC64-NEXT: stx %i1, [%i2+8]635; SPARC64-NEXT: stx %g2, [%i2]636; SPARC64-NEXT: !APP637; SPARC64-NEXT: !NO_APP638; SPARC64-NEXT: ldx [%i0+8], %i1639; SPARC64-NEXT: mov %g0, %i2640; SPARC64-NEXT: ldx [%i0], %i0641; SPARC64-NEXT: cmp %i4, %i1642; SPARC64-NEXT: movcs %xcc, 1, %i2643; SPARC64-NEXT: srl %i2, 0, %i2644; SPARC64-NEXT: sub %i5, %i0, %i0645; SPARC64-NEXT: sub %i0, %i2, %i0646; SPARC64-NEXT: sub %i4, %i1, %i1647; SPARC64-NEXT: stx %i1, [%i3+8]648; SPARC64-NEXT: stx %i0, [%i3]649; SPARC64-NEXT: ret650; SPARC64-NEXT: restore651;652; SPARC64-VIS3-LABEL: test_adde_sube:653; SPARC64-VIS3: .register %g2, #scratch654; SPARC64-VIS3-NEXT: ! %bb.0: ! %entry655; SPARC64-VIS3-NEXT: save %sp, -128, %sp656; SPARC64-VIS3-NEXT: ldx [%i0+8], %i4657; SPARC64-VIS3-NEXT: ldx [%i0], %i5658; SPARC64-VIS3-NEXT: ldx [%i1+8], %g2659; SPARC64-VIS3-NEXT: ldx [%i1], %i1660; SPARC64-VIS3-NEXT: addcc %i4, %g2, %g2661; SPARC64-VIS3-NEXT: addxccc %i5, %i1, %i1662; SPARC64-VIS3-NEXT: stx %i1, [%i2]663; SPARC64-VIS3-NEXT: stx %g2, [%i2+8]664; SPARC64-VIS3-NEXT: !APP665; SPARC64-VIS3-NEXT: !NO_APP666; SPARC64-VIS3-NEXT: ldx [%i0+8], %i1667; SPARC64-VIS3-NEXT: mov %g0, %i2668; SPARC64-VIS3-NEXT: ldx [%i0], %i0669; SPARC64-VIS3-NEXT: cmp %i4, %i1670; SPARC64-VIS3-NEXT: movcs %xcc, 1, %i2671; SPARC64-VIS3-NEXT: srl %i2, 0, %i2672; SPARC64-VIS3-NEXT: sub %i5, %i0, %i0673; SPARC64-VIS3-NEXT: sub %i0, %i2, %i0674; SPARC64-VIS3-NEXT: sub %i4, %i1, %i1675; SPARC64-VIS3-NEXT: stx %i1, [%i3+8]676; SPARC64-VIS3-NEXT: stx %i0, [%i3]677; SPARC64-VIS3-NEXT: ret678; SPARC64-VIS3-NEXT: restore679entry:680 %0 = bitcast ptr %a to ptr681 %1 = bitcast ptr %b to ptr682 %2 = load i128, ptr %0683 %3 = load i128, ptr %1684 %4 = add i128 %2, %3685 %5 = bitcast ptr %sum to ptr686 store i128 %4, ptr %5687 tail call void asm sideeffect "", "=*m,*m"(ptr elementtype(i128) %0, ptr elementtype(i128) %5) nounwind688 %6 = load i128, ptr %0689 %7 = sub i128 %2, %6690 %8 = bitcast ptr %diff to ptr691 store i128 %7, ptr %8692 ret void693}694