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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=sparc64-pc-openbsd -disable-sparc-leaf-proc | FileCheck %s3; Testing 64-bit conditionals. The sparc64 triple is an alias for sparcv9.4 5define void @cmpri(ptr %p, i64 %x) nounwind {6; CHECK-LABEL: cmpri:7; CHECK: ! %bb.0: ! %entry8; CHECK-NEXT: save %sp, -128, %sp9; CHECK-NEXT: cmp %i1, 110; CHECK-NEXT: be %xcc, .LBB0_211; CHECK-NEXT: nop12; CHECK-NEXT: ! %bb.1: ! %if.then13; CHECK-NEXT: stx %i1, [%i0]14; CHECK-NEXT: .LBB0_2: ! %if.end15; CHECK-NEXT: ret16; CHECK-NEXT: restore17entry:18 %tobool = icmp eq i64 %x, 119 br i1 %tobool, label %if.end, label %if.then20 21if.then:22 store i64 %x, ptr %p, align 823 br label %if.end24 25if.end:26 ret void27}28 29define void @cmprr(ptr %p, i64 %x, i64 %y) nounwind {30; CHECK-LABEL: cmprr:31; CHECK: ! %bb.0: ! %entry32; CHECK-NEXT: save %sp, -128, %sp33; CHECK-NEXT: cmp %i1, %i234; CHECK-NEXT: bgu %xcc, .LBB1_235; CHECK-NEXT: nop36; CHECK-NEXT: ! %bb.1: ! %if.then37; CHECK-NEXT: stx %i1, [%i0]38; CHECK-NEXT: .LBB1_2: ! %if.end39; CHECK-NEXT: ret40; CHECK-NEXT: restore41entry:42 %tobool = icmp ugt i64 %x, %y43 br i1 %tobool, label %if.end, label %if.then44 45if.then:46 store i64 %x, ptr %p, align 847 br label %if.end48 49if.end:50 ret void51}52 53define i32 @selecti32_xcc(i64 %x, i64 %y, i32 %a, i32 %b) nounwind {54; CHECK-LABEL: selecti32_xcc:55; CHECK: ! %bb.0: ! %entry56; CHECK-NEXT: save %sp, -128, %sp57; CHECK-NEXT: cmp %i0, %i158; CHECK-NEXT: movg %xcc, %i2, %i359; CHECK-NEXT: ret60; CHECK-NEXT: restore %g0, %i3, %o061entry:62 %tobool = icmp sgt i64 %x, %y63 %rv = select i1 %tobool, i32 %a, i32 %b64 ret i32 %rv65}66 67define i64 @selecti64_xcc(i64 %x, i64 %y, i64 %a, i64 %b) nounwind {68; CHECK-LABEL: selecti64_xcc:69; CHECK: ! %bb.0: ! %entry70; CHECK-NEXT: save %sp, -128, %sp71; CHECK-NEXT: cmp %i0, %i172; CHECK-NEXT: movg %xcc, %i2, %i373; CHECK-NEXT: ret74; CHECK-NEXT: restore %g0, %i3, %o075entry:76 %tobool = icmp sgt i64 %x, %y77 %rv = select i1 %tobool, i64 %a, i64 %b78 ret i64 %rv79}80 81define i64 @selecti64_icc(i32 %x, i32 %y, i64 %a, i64 %b) nounwind {82; CHECK-LABEL: selecti64_icc:83; CHECK: ! %bb.0: ! %entry84; CHECK-NEXT: save %sp, -128, %sp85; CHECK-NEXT: cmp %i0, %i186; CHECK-NEXT: movg %icc, %i2, %i387; CHECK-NEXT: ret88; CHECK-NEXT: restore %g0, %i3, %o089entry:90 %tobool = icmp sgt i32 %x, %y91 %rv = select i1 %tobool, i64 %a, i64 %b92 ret i64 %rv93}94 95define i64 @selecti64_fcc(float %x, float %y, i64 %a, i64 %b) nounwind {96; CHECK-LABEL: selecti64_fcc:97; CHECK: ! %bb.0: ! %entry98; CHECK-NEXT: save %sp, -128, %sp99; CHECK-NEXT: mov %i3, %i0100; CHECK-NEXT: fcmps %fcc0, %f1, %f3101; CHECK-NEXT: movul %fcc0, %i2, %i0102; CHECK-NEXT: ret103; CHECK-NEXT: restore104entry:105 %tobool = fcmp ult float %x, %y106 %rv = select i1 %tobool, i64 %a, i64 %b107 ret i64 %rv108}109 110define float @selectf32_xcc(i64 %x, i64 %y, float %a, float %b) nounwind {111; CHECK-LABEL: selectf32_xcc:112; CHECK: ! %bb.0: ! %entry113; CHECK-NEXT: save %sp, -128, %sp114; CHECK-NEXT: fmovs %f7, %f0115; CHECK-NEXT: cmp %i0, %i1116; CHECK-NEXT: fmovsg %xcc, %f5, %f0117; CHECK-NEXT: ret118; CHECK-NEXT: restore119entry:120 %tobool = icmp sgt i64 %x, %y121 %rv = select i1 %tobool, float %a, float %b122 ret float %rv123}124 125define double @selectf64_xcc(i64 %x, i64 %y, double %a, double %b) nounwind {126; CHECK-LABEL: selectf64_xcc:127; CHECK: ! %bb.0: ! %entry128; CHECK-NEXT: save %sp, -128, %sp129; CHECK-NEXT: fmovd %f6, %f0130; CHECK-NEXT: cmp %i0, %i1131; CHECK-NEXT: fmovdg %xcc, %f4, %f0132; CHECK-NEXT: ret133; CHECK-NEXT: restore134entry:135 %tobool = icmp sgt i64 %x, %y136 %rv = select i1 %tobool, double %a, double %b137 ret double %rv138}139 140; The MOVXCC instruction can't use %g0 for its tied operand.141define i64 @select_consti64_xcc(i64 %x, i64 %y) nounwind {142; CHECK-LABEL: select_consti64_xcc:143; CHECK: ! %bb.0: ! %entry144; CHECK-NEXT: save %sp, -128, %sp145; CHECK-NEXT: mov %g0, %i2146; CHECK-NEXT: cmp %i0, %i1147; CHECK-NEXT: movg %xcc, 123, %i2148; CHECK-NEXT: ret149; CHECK-NEXT: restore %g0, %i2, %o0150entry:151 %tobool = icmp sgt i64 %x, %y152 %rv = select i1 %tobool, i64 123, i64 0153 ret i64 %rv154}155 156define i1 @setcc_resultty(i64 %a, i1 %b) nounwind {157; CHECK-LABEL: setcc_resultty:158; CHECK: ! %bb.0:159; CHECK-NEXT: save %sp, -128, %sp160; CHECK-NEXT: mov %g0, %i2161; CHECK-NEXT: sethi 4194303, %i3162; CHECK-NEXT: or %i3, 1023, %i3163; CHECK-NEXT: sethi 131071, %i4164; CHECK-NEXT: or %i4, 1023, %i4165; CHECK-NEXT: sllx %i4, 32, %i4166; CHECK-NEXT: or %i4, %i3, %i3167; CHECK-NEXT: and %i0, %i3, %i3168; CHECK-NEXT: cmp %i3, %i0169; CHECK-NEXT: movne %xcc, 1, %i2170; CHECK-NEXT: or %i2, %i1, %i0171; CHECK-NEXT: ret172; CHECK-NEXT: restore173 %a0 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %a, i64 32)174 %a1 = extractvalue { i64, i1 } %a0, 1175 %a4 = or i1 %a1, %b176 ret i1 %a4177}178 179declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64)180