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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s -check-prefix=V93; RUN: llc < %s -mtriple=sparcv9 -mattr=vis3 | FileCheck %s -check-prefix=VIS34 5define i32 @stow(float %float) nounwind {6; V9-LABEL: stow:7; V9: ! %bb.0:8; V9-NEXT: add %sp, -144, %sp9; V9-NEXT: st %f1, [%sp+2187]10; V9-NEXT: ld [%sp+2187], %o011; V9-NEXT: retl12; V9-NEXT: add %sp, 144, %sp13;14; VIS3-LABEL: stow:15; VIS3: ! %bb.0:16; VIS3-NEXT: retl17; VIS3-NEXT: movstouw %f1, %o018 %w = bitcast float %float to i3219 ret i32 %w20}21 22define zeroext i32 @stouw(float %float) nounwind {23; V9-LABEL: stouw:24; V9: ! %bb.0:25; V9-NEXT: add %sp, -144, %sp26; V9-NEXT: st %f1, [%sp+2187]27; V9-NEXT: ld [%sp+2187], %o028; V9-NEXT: retl29; V9-NEXT: add %sp, 144, %sp30;31; VIS3-LABEL: stouw:32; VIS3: ! %bb.0:33; VIS3-NEXT: retl34; VIS3-NEXT: movstouw %f1, %o035 %uw = bitcast float %float to i3236 ret i32 %uw37}38 39define signext i32 @stosw(float %float) nounwind {40; V9-LABEL: stosw:41; V9: ! %bb.0:42; V9-NEXT: add %sp, -144, %sp43; V9-NEXT: st %f1, [%sp+2187]44; V9-NEXT: ldsw [%sp+2187], %o045; V9-NEXT: retl46; V9-NEXT: add %sp, 144, %sp47;48; VIS3-LABEL: stosw:49; VIS3: ! %bb.0:50; VIS3-NEXT: retl51; VIS3-NEXT: movstosw %f1, %o052 %sw = bitcast float %float to i3253 ret i32 %sw54}55 56define float @wtos(i32 %w) nounwind {57; V9-LABEL: wtos:58; V9: ! %bb.0:59; V9-NEXT: add %sp, -144, %sp60; V9-NEXT: st %o0, [%sp+2187]61; V9-NEXT: ld [%sp+2187], %f062; V9-NEXT: retl63; V9-NEXT: add %sp, 144, %sp64;65; VIS3-LABEL: wtos:66; VIS3: ! %bb.0:67; VIS3-NEXT: retl68; VIS3-NEXT: movwtos %o0, %f069 %float = bitcast i32 %w to float70 ret float %float71}72 73define float @uwtos(i32 zeroext %uw) nounwind {74; V9-LABEL: uwtos:75; V9: ! %bb.0:76; V9-NEXT: add %sp, -144, %sp77; V9-NEXT: st %o0, [%sp+2187]78; V9-NEXT: ld [%sp+2187], %f079; V9-NEXT: retl80; V9-NEXT: add %sp, 144, %sp81;82; VIS3-LABEL: uwtos:83; VIS3: ! %bb.0:84; VIS3-NEXT: retl85; VIS3-NEXT: movwtos %o0, %f086 %float = bitcast i32 %uw to float87 ret float %float88}89 90define float @swtos(i32 signext %sw) nounwind {91; V9-LABEL: swtos:92; V9: ! %bb.0:93; V9-NEXT: add %sp, -144, %sp94; V9-NEXT: st %o0, [%sp+2187]95; V9-NEXT: ld [%sp+2187], %f096; V9-NEXT: retl97; V9-NEXT: add %sp, 144, %sp98;99; VIS3-LABEL: swtos:100; VIS3: ! %bb.0:101; VIS3-NEXT: retl102; VIS3-NEXT: movwtos %o0, %f0103 %float = bitcast i32 %sw to float104 ret float %float105}106 107define i64 @dtox(double %double) nounwind {108; V9-LABEL: dtox:109; V9: ! %bb.0:110; V9-NEXT: add %sp, -144, %sp111; V9-NEXT: std %f0, [%sp+2183]112; V9-NEXT: ldx [%sp+2183], %o0113; V9-NEXT: retl114; V9-NEXT: add %sp, 144, %sp115;116; VIS3-LABEL: dtox:117; VIS3: ! %bb.0:118; VIS3-NEXT: retl119; VIS3-NEXT: movdtox %f0, %o0120 %x = bitcast double %double to i64121 ret i64 %x122}123 124define double @xtod(i64 %x) nounwind {125; V9-LABEL: xtod:126; V9: ! %bb.0:127; V9-NEXT: add %sp, -144, %sp128; V9-NEXT: stx %o0, [%sp+2183]129; V9-NEXT: ldd [%sp+2183], %f0130; V9-NEXT: retl131; V9-NEXT: add %sp, 144, %sp132;133; VIS3-LABEL: xtod:134; VIS3: ! %bb.0:135; VIS3-NEXT: retl136; VIS3-NEXT: movxtod %o0, %f0137 %double = bitcast i64 %x to double138 ret double %double139}140