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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=sparc64 -sparc-bpcc-offset-bits=4 -sparc-bpr-offset-bits=4 | FileCheck --check-prefix=SPARC64 %s3 4define i32 @branch_relax_int(i32 %in) {5; SPARC64-LABEL: branch_relax_int:6; SPARC64:         .cfi_startproc7; SPARC64-NEXT:  ! %bb.0:8; SPARC64-NEXT:    save %sp, -128, %sp9; SPARC64-NEXT:    .cfi_def_cfa_register %fp10; SPARC64-NEXT:    .cfi_window_save11; SPARC64-NEXT:    .cfi_register %o7, %i712; SPARC64-NEXT:    cmp %i0, 013; SPARC64-NEXT:    bne %icc, .LBB0_114; SPARC64-NEXT:    nop15; SPARC64-NEXT:    ba .LBB0_216; SPARC64-NEXT:    nop17; SPARC64-NEXT:  .LBB0_1: ! %false18; SPARC64-NEXT:    !APP19; SPARC64-NEXT:    nop20; SPARC64-NEXT:    nop21; SPARC64-NEXT:    nop22; SPARC64-NEXT:    nop23; SPARC64-NEXT:    nop24; SPARC64-NEXT:    nop25; SPARC64-NEXT:    nop26; SPARC64-NEXT:    nop27; SPARC64-NEXT:    !NO_APP28; SPARC64-NEXT:    ret29; SPARC64-NEXT:    restore %g0, %g0, %o030; SPARC64-NEXT:  .LBB0_2: ! %true31; SPARC64-NEXT:    mov 4, %i032; SPARC64-NEXT:    !APP33; SPARC64-NEXT:    nop34; SPARC64-NEXT:    nop35; SPARC64-NEXT:    nop36; SPARC64-NEXT:    nop37; SPARC64-NEXT:    nop38; SPARC64-NEXT:    nop39; SPARC64-NEXT:    nop40; SPARC64-NEXT:    nop41; SPARC64-NEXT:    !NO_APP42; SPARC64-NEXT:    ret43; SPARC64-NEXT:    restore44  %tst = icmp eq i32 %in, 045  br i1 %tst, label %true, label %false46 47true:48  call void asm sideeffect "nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop", ""()49  ret i32 450 51false:52  call void asm sideeffect "nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop", ""()53  ret i32 054}55 56define i64 @branch_relax_reg(i64 %in) {57; SPARC64-LABEL: branch_relax_reg:58; SPARC64:         .cfi_startproc59; SPARC64-NEXT:  ! %bb.0:60; SPARC64-NEXT:    save %sp, -128, %sp61; SPARC64-NEXT:    .cfi_def_cfa_register %fp62; SPARC64-NEXT:    .cfi_window_save63; SPARC64-NEXT:    .cfi_register %o7, %i764; SPARC64-NEXT:    brnz %i0, .LBB1_165; SPARC64-NEXT:    nop66; SPARC64-NEXT:    ba .LBB1_267; SPARC64-NEXT:    nop68; SPARC64-NEXT:  .LBB1_1: ! %false69; SPARC64-NEXT:    !APP70; SPARC64-NEXT:    nop71; SPARC64-NEXT:    nop72; SPARC64-NEXT:    nop73; SPARC64-NEXT:    nop74; SPARC64-NEXT:    nop75; SPARC64-NEXT:    nop76; SPARC64-NEXT:    nop77; SPARC64-NEXT:    nop78; SPARC64-NEXT:    !NO_APP79; SPARC64-NEXT:    ret80; SPARC64-NEXT:    restore %g0, %g0, %o081; SPARC64-NEXT:  .LBB1_2: ! %true82; SPARC64-NEXT:    mov 4, %i083; SPARC64-NEXT:    !APP84; SPARC64-NEXT:    nop85; SPARC64-NEXT:    nop86; SPARC64-NEXT:    nop87; SPARC64-NEXT:    nop88; SPARC64-NEXT:    nop89; SPARC64-NEXT:    nop90; SPARC64-NEXT:    nop91; SPARC64-NEXT:    nop92; SPARC64-NEXT:    !NO_APP93; SPARC64-NEXT:    ret94; SPARC64-NEXT:    restore95  %tst = icmp eq i64 %in, 096  br i1 %tst, label %true, label %false97 98true:99  call void asm sideeffect "nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop", ""()100  ret i64 4101 102false:103  call void asm sideeffect "nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop", ""()104  ret i64 0105}106 107define float @branch_relax_float(float %in) {108; SPARC64-LABEL: branch_relax_float:109; SPARC64:         .cfi_startproc110; SPARC64-NEXT:  ! %bb.0:111; SPARC64-NEXT:    save %sp, -128, %sp112; SPARC64-NEXT:    .cfi_def_cfa_register %fp113; SPARC64-NEXT:    .cfi_window_save114; SPARC64-NEXT:    .cfi_register %o7, %i7115; SPARC64-NEXT:    sethi %h44(.LCPI2_0), %i0116; SPARC64-NEXT:    add %i0, %m44(.LCPI2_0), %i0117; SPARC64-NEXT:    sllx %i0, 12, %i0118; SPARC64-NEXT:    ld [%i0+%l44(.LCPI2_0)], %f0119; SPARC64-NEXT:    fcmps %fcc0, %f1, %f0120; SPARC64-NEXT:    fbe %fcc0, .LBB2_1121; SPARC64-NEXT:    nop122; SPARC64-NEXT:    ba .LBB2_2123; SPARC64-NEXT:    nop124; SPARC64-NEXT:  .LBB2_1: ! %true125; SPARC64-NEXT:    sethi %h44(.LCPI2_1), %i0126; SPARC64-NEXT:    add %i0, %m44(.LCPI2_1), %i0127; SPARC64-NEXT:    sllx %i0, 12, %i0128; SPARC64-NEXT:    ld [%i0+%l44(.LCPI2_1)], %f0129; SPARC64-NEXT:    !APP130; SPARC64-NEXT:    nop131; SPARC64-NEXT:    nop132; SPARC64-NEXT:    nop133; SPARC64-NEXT:    nop134; SPARC64-NEXT:    nop135; SPARC64-NEXT:    nop136; SPARC64-NEXT:    nop137; SPARC64-NEXT:    nop138; SPARC64-NEXT:    !NO_APP139; SPARC64-NEXT:    ret140; SPARC64-NEXT:    restore141; SPARC64-NEXT:  .LBB2_2: ! %false142; SPARC64-NEXT:    !APP143; SPARC64-NEXT:    nop144; SPARC64-NEXT:    nop145; SPARC64-NEXT:    nop146; SPARC64-NEXT:    nop147; SPARC64-NEXT:    nop148; SPARC64-NEXT:    nop149; SPARC64-NEXT:    nop150; SPARC64-NEXT:    nop151; SPARC64-NEXT:    !NO_APP152; SPARC64-NEXT:    ret153; SPARC64-NEXT:    restore154  %tst = fcmp oeq float %in, 0.0155  br i1 %tst, label %true, label %false156 157true:158  call void asm sideeffect "nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop", ""()159  ret float 4.0160 161false:162  call void asm sideeffect "nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop", ""()163  ret float 0.0164}165