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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s -check-prefix=V93; RUN: llc < %s -mtriple=sparcv9 -mattr=+vis3 | FileCheck %s -check-prefix=VIS34 5define i128 @signed_multiply_extend(i64 %0, i64 %1) nounwind {6; V9-LABEL: signed_multiply_extend:7; V9: ! %bb.0:8; V9-NEXT: save %sp, -176, %sp9; V9-NEXT: mov %i1, %o110; V9-NEXT: mov %i0, %o311; V9-NEXT: srax %i0, 63, %o212; V9-NEXT: call __multi313; V9-NEXT: srax %i1, 63, %o014; V9-NEXT: mov %o0, %i015; V9-NEXT: ret16; V9-NEXT: restore %g0, %o1, %o117;18; VIS3-LABEL: signed_multiply_extend:19; VIS3: ! %bb.0:20; VIS3-NEXT: srax %o0, 63, %o221; VIS3-NEXT: and %o2, %o1, %o222; VIS3-NEXT: srax %o1, 63, %o323; VIS3-NEXT: and %o3, %o0, %o324; VIS3-NEXT: add %o3, %o2, %o225; VIS3-NEXT: umulxhi %o1, %o0, %o326; VIS3-NEXT: sub %o3, %o2, %o227; VIS3-NEXT: mulx %o1, %o0, %o128; VIS3-NEXT: retl29; VIS3-NEXT: mov %o2, %o030 %3 = sext i64 %0 to i12831 %4 = sext i64 %1 to i12832 %5 = mul nsw i128 %4, %333 ret i128 %534}35 36define i128 @unsigned_multiply_extend(i64 %0, i64 %1) nounwind {37; V9-LABEL: unsigned_multiply_extend:38; V9: ! %bb.0:39; V9-NEXT: save %sp, -176, %sp40; V9-NEXT: mov %i1, %o141; V9-NEXT: mov %i0, %o342; V9-NEXT: mov %g0, %o043; V9-NEXT: call __multi344; V9-NEXT: mov %g0, %o245; V9-NEXT: mov %o0, %i046; V9-NEXT: ret47; V9-NEXT: restore %g0, %o1, %o148;49; VIS3-LABEL: unsigned_multiply_extend:50; VIS3: ! %bb.0:51; VIS3-NEXT: umulxhi %o1, %o0, %o252; VIS3-NEXT: mulx %o1, %o0, %o153; VIS3-NEXT: retl54; VIS3-NEXT: mov %o2, %o055 %3 = zext i64 %0 to i12856 %4 = zext i64 %1 to i12857 %5 = mul nuw i128 %4, %358 ret i128 %559}60